OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /funbase_ip_library/trunk/TUT/soc/basic_tester_example/1.0/sim
    from Rev 145 to Rev 150
    ↔ Reverse comparison
  •

Rev 145 → Rev 150

/basic_tester_hibi_example.structural.create_makefile.do
1,5 → 1,6
# Script compiles all vhdl-files and generates a makefile for them
# This script is tested for Modelsim version 6.6a
# Based on file D:/user/matilail/funbase/repos/daci_repo/soc/basic_tester_example/1.0/ip_xact/basic_tester_hibi_example.1.0.xml and its view "structural_seg"
 
.main clear
 
9,63 → 10,155
echo "Processing file set rtl of component TUT:ip.hwp.communication:basic_tester_tx:1.0."
echo " Adding library work"
vlib work
vcom -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/basic_tester/1.0/vhd/txt_util.vhd
vcom -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_pkg.vhd
vcom -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_tx.vhd
vcom -check_synthesis D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/basic_tester/1.0/vhd/txt_util.vhd
vcom -check_synthesis D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_pkg.vhd
vcom -check_synthesis D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_tx.vhd
 
echo "Processing component TUT:ip.hwp.interface:clk_gen:1.0"
echo "Processing file set behavioral of component TUT:ip.hwp.interface:clk_gen:1.0."
vcom -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.interface/clock/1.0/vhd/clk_gen.vhd
 
echo "Processing component TUT:ip.hwp.communication:basic_tester_rx:1.0"
echo "Processing file set rtl of component TUT:ip.hwp.communication:basic_tester_rx:1.0."
vcom -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_rx.vhd
vcom -check_synthesis D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/basic_tester/1.0/vhd/basic_tester_rx.vhd
 
echo "Processing component TUT:ip.hwp.interface:rst_gen:1.0"
echo "Processing file set behavioral of component TUT:ip.hwp.interface:rst_gen:1.0."
vcom D:/user/ege/Svn/daci_ip/trunk/ip.hwp.interface/reset/1.0/vhd/rst_gen.vhd
vcom D:/user/matilail/funbase/repos/daci_repo/ip.hwp.interface/reset/1.0/vhd/rst_gen.vhd
 
echo "Processing component TUT:ip.hwp.communication:hibi_segment_small:3.0"
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_segment_small:3.0."
echo "Processing component TUT:ip.hwp.interface:clk_gen:1.0"
echo "Processing file set behavioral of component TUT:ip.hwp.interface:clk_gen:1.0."
vcom -check_synthesis D:/user/matilail/funbase/repos/daci_repo/ip.hwp.interface/clock/1.0/vhd/clk_gen.vhd
 
echo "Processing component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0"
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
echo " Adding library hibi"
vlib hibi
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibiv3_pkg.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/addr_data_demux_read.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/addr_data_mux_write.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/addr_decoder.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/cfg_init_pkg.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/cfg_mem.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/double_fifo_demux_wr.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/double_fifo_mux_rd.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/dyn_arb.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/fifo_demux_wr.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/fifo_mux_rd.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/lfsr.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/receiver.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/rx_control.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/transmitter.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/tx_control.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r1.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r3.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r4.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibi_segment_small.vhd
vcom -quiet -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/hibi/3.0/vhd/hibi_segment_v3.vhd
echo "Processing file set fifo_rtl of component TUT:ip.hwp.communication:hibi_segment_small:3.0."
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/fifo/1.0/vhd/fifo.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/mixed_clk_fifo_v3.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/multiclk_fifo.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/re_pulse_synchronizer.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/we_pulse_synchronizer.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_top.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_in.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_out.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_top.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_in.vhd
vcom -check_synthesis -work hibi D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_out.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibiv3_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r1.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r4.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/lfsr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/receiver.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/rx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/transmitter.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/tx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/addr_decoder.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_init_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_mem.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/dyn_arb.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_demux_wr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_demux_wr.vhd
echo "Processing file set fifo_rtl of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/fifo/1.0/vhd/fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/mixed_clk_fifo_v3.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/multiclk_fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/re_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/we_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_out.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_out.vhd
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibiv3_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r1.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r4.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/lfsr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/receiver.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/rx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/transmitter.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/tx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/addr_decoder.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_init_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_mem.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/dyn_arb.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_demux_wr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_demux_wr.vhd
echo "Processing file set fifo_rtl of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/fifo/1.0/vhd/fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/mixed_clk_fifo_v3.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/multiclk_fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/re_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/we_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_out.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_out.vhd
 
echo "Processing component TUT:ip.hwp.communication:hibi_orbus:3.0"
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_orbus:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_orbus_small.vhd
 
echo "Processing component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0"
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibiv3_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r1.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r4.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/lfsr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/receiver.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/rx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/transmitter.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/tx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/addr_decoder.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_init_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_mem.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/dyn_arb.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_demux_wr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_demux_wr.vhd
echo "Processing file set fifo_rtl of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/fifo/1.0/vhd/fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/mixed_clk_fifo_v3.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/multiclk_fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/re_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/we_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_out.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_out.vhd
echo "Processing file set hdlSources of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibiv3_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r1.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_wrapper_r4.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/lfsr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/receiver.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/rx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/transmitter.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/tx_control.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/addr_decoder.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_init_pkg.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/cfg_mem.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/dyn_arb.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/fifo_demux_wr.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_mux_rd.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/double_fifo_demux_wr.vhd
echo "Processing file set fifo_rtl of component TUT:ip.hwp.communication:hibi_wrapper_r4:3.0."
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/fifo/1.0/vhd/fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/mixed_clk_fifo_v3.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/multiclk_fifo.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/re_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/multiclk_fifo/1.0/vhd/we_pulse_synchronizer.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_out.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_read_top.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_in.vhd
vcom -work hibi -check_synthesis -quiet D:/user/matilail/funbase/repos/daci_repo/ip.hwp.storage/fifos/synchronizer/1.0/vhd/aif_we_out.vhd
 
echo "Processing component TUT:ip.hwp.communication:hibi_segment:3.0"
echo "Processing file set structural_vhdlSource of component TUT:ip.hwp.communication:hibi_segment:3.0."
vcom -quiet -check_synthesis -work work D:/user/matilail/funbase/repos/daci_repo/ip.hwp.communication/hibi/3.0/vhd/hibi_segment.vhd
 
echo "Processing component TUT:soc:basic_tester_hibi_example:1.0"
echo "Processing file set structural_vhdlSource of component TUT:soc:basic_tester_hibi_example:1.0."
vcom -quiet -check_synthesis -work work D:/user/ege/Svn/daci_ip/trunk/soc/basic_tester_example/1.0/vhd/basic_tester_hibi_example.vhd
vcom -quiet -check_synthesis -work work D:/user/matilail/funbase/repos/daci_repo/soc/basic_tester_example/1.0/vhd/basic_tester_hibi_example.vhd
 
echo " Creating a new Makefile"
 
/test_rx.txt
12,9 → 12,9
# Moreover, comm (last param) can simply be omitted
# and then no checking is done.
 
0025 03000000 00000100 02
0050 03000001 00000101 02
0012 03000002 00000102 03
0025 00000003 00000100 02
0050 00000003 00000101 02
0012 00000003 00000102 03
# There can be empty lines as shown below
 
# Address 0...0 means that it must not change from previous transfer
/test_tx.txt
4,9 → 4,9
# delay_in_cycles addr data cmd(optional)
# The values are in hexadecimal format
 
000A 03000000 00000100 02
0005 03000001 00000101 02
0008 03000002 00000102 03
000A 00000003 00000100 02
0005 00000003 00000101 02
0008 00000003 00000102 03
 
# There can be empty lines as shown below
 

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