OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

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  • This comparison shows the changes necessary to convert path 
    /funbase_ip_library/trunk
    from Rev 158 to Rev 159
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  •

Rev 158 → Rev 159

/TUT/ip.hwp.accelerator/hibi_dct/1.0/hibi_dct.1.0.xml
74,10 → 74,37
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>hibi_master</spirit:name>
<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>hibi_slave</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.busdef" spirit:version="3.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.absdef" spirit:version="3.0"/>
<spirit:master/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
89,7 → 116,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_av_out</spirit:name>
<spirit:name>hibi_av_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
105,7 → 132,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_comm_out</spirit:name>
<spirit:name>hibi_comm_in</spirit:name>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
121,7 → 148,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_data_out</spirit:name>
<spirit:name>hibi_data_in</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
130,7 → 157,7
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RE</spirit:name>
<spirit:name>EMPTY</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
137,7 → 164,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_re_out</spirit:name>
<spirit:name>hibi_empty_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
146,7 → 173,7
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WE</spirit:name>
<spirit:name>FULL</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
153,7 → 180,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_we_out</spirit:name>
<spirit:name>hibi_full_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
165,10 → 192,10
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>hibi_slave</spirit:name>
<spirit:name>hibi_master</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.busdef" spirit:version="3.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.communication" spirit:name="hibi_ip_r4.absdef" spirit:version="3.0"/>
<spirit:slave/>
<spirit:master/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
180,7 → 207,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_av_in</spirit:name>
<spirit:name>hibi_av_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
196,7 → 223,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_comm_in</spirit:name>
<spirit:name>hibi_comm_out</spirit:name>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
212,7 → 239,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_data_in</spirit:name>
<spirit:name>hibi_data_out</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
221,7 → 248,7
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>EMPTY</spirit:name>
<spirit:name>RE</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
228,7 → 255,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_empty_in</spirit:name>
<spirit:name>hibi_re_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
237,7 → 264,7
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>FULL</spirit:name>
<spirit:name>WE</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
244,7 → 271,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_full_in</spirit:name>
<spirit:name>hibi_we_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
255,33 → 282,6
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
289,7 → 289,19
<spirit:name>structural</spirit:name>
<spirit:envIdentifier>::</spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="hibi_dct.designcfg" spirit:version="1.0"/>
<spirit:vendorExtensions>
<kactus2:topLevelViewRef>structural_vhd</kactus2:topLevelViewRef>
</spirit:vendorExtensions>
</spirit:view>
<spirit:view>
<spirit:name>structural_vhd</spirit:name>
<spirit:envIdentifier>VHDL:Kactus2:</spirit:envIdentifier>
<spirit:language spirit:strict="false">vhdl</spirit:language>
<spirit:modelName>hibi_dct</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>structural_vhdlSource</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
414,6 → 426,41
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:fileSets>
<spirit:fileSet>
<spirit:name>structural_vhdlSource</spirit:name>
<spirit:group>sourceFiles</spirit:group>
<spirit:file>
<spirit:name>vhd/hibi_dct.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">true</spirit:isIncludeFile>
<spirit:logicalName spirit:default="false">work</spirit:logicalName>
<spirit:buildCommand>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:buildCommand>
</spirit:file>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource-87</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
<spirit:defaultFileBuilder>
<spirit:fileType>vhdlSource-93</spirit:fileType>
<spirit:command>vcom</spirit:command>
<spirit:flags>-quiet -check_synthesis -work work</spirit:flags>
<spirit:replaceDefaultFlags>true</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
</spirit:fileSet>
</spirit:fileSets>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/ip.hwp.accelerator/hibi_dct/1.0/vhd/hibi_dct.vhd
0,0 → 1,282
-- ***************************************************
-- File: hibi_dct.vhd
-- Creation date: 12.02.2013
-- Creation time: 10:33:28
-- Description: DCT to Hibi. Connects dctQidct block to HIBI Wrapper
--
--
-- Input:
-- 1. Two address to send the results to (one for quant, one for idct)
-- 2. Control word for the current macroblock
-- Control word structure: bit 6: chroma(1)/luma(0), 5: intra(1)/inter(0),
-- 4..0: quantizer parameter (QP)
-- 3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )
--
-- Chroma/luma: 4 luma, 2 chroma
--
-- Outputs:
-- Outputs are 16-bit words which are packed up to hibi. If hibi width is
-- 32b, then 2 16-bit words are combined into one hibi word.
-- 01. quant results: 1. 8*8 x 16bit values to quant result address
-- 02. idct results: 1. 8*8 x 16bit values to idct result address
-- 03. quant results: 2. 8*8 x 16bit values to quant result address
-- 04. idct results: 2. 8*8 x 16bit values to idct result address
-- 05. quant results: 3. 8*8 x 16bit values to quant result address
-- 06. idct results: 3. 8*8 x 16bit values to idct result address
-- 07. quant results: 4. 8*8 x 16bit values to quant result address
-- 08. idct results: 4. 8*8 x 16bit values to idct result address
-- 09. quant results: 5. 8*8 x 16bit values to quant result address
-- 10. idct results: 5. 8*8 x 16bit values to idct result address
-- 11. quant results: 6. 8*8 x 16bit values to quant result address
-- 12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)
-- has all values zeros (except dc-component in intra)
-- 13. idct results: 6. 8*8 x 16bit values to idct result address
-- -
-- Total amount of 16-bit values is: 384 per result address + 1 hibi word to
-- quantization result address.
--
-- With default parameter:
-- Total of 193 words of data to quant address (if data_width_g = 32)
-- Total of 192 words of data to idct address (if data_width_g = 32)
--
-- Created by: matilail
-- This file was generated with Kactus2 vhdl generator.
-- ***************************************************
library IEEE;
library dct_to_hibi;
library work;
use dct_to_hibi.all;
use work.all;
use IEEE.std_logic_1164.all;
 
entity hibi_dct is
 
port (
 
-- Interface: clk
clk : in std_logic;
 
-- Interface: hibi_master
hibi_av_out : out std_logic;
hibi_comm_out : out std_logic_vector(4 downto 0);
hibi_data_out : out std_logic_vector(31 downto 0);
hibi_re_out : out std_logic;
hibi_we_out : out std_logic;
 
-- Interface: hibi_slave
hibi_av_in : in std_logic;
hibi_comm_in : in std_logic_vector(4 downto 0);
hibi_data_in : in std_logic_vector(31 downto 0);
hibi_empty_in : in std_logic;
hibi_full_in : in std_logic;
 
-- Interface: rst_n
rst_n : in std_logic
);
 
end hibi_dct;
 
 
architecture structural of hibi_dct is
 
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifCHROMA_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_DCT_TO_ACC : std_logic_vector(8 downto 0);
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_IDCT_FROM_ACC : std_logic_vector(8 downto 0);
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_QUANT_FROM_ACC : std_logic_vector(7 downto 0);
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDCT_READY4COL_FROM_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifIDCT_READY4COL_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifINTRA_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifLOAD_QP_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQP_TO_ACC : std_logic_vector(4 downto 0);
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQUANT_READY4COL_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_DCT_TO_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_IDCT_FROM_ACC : std_logic;
signal dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_QUANT_FROM_ACC : std_logic;
 
-- DCT to Hibi. Connects dctQidct block to HIBI Wrapper
--
--
-- Input:
-- 1. Two address to send the results to (one for quant, one for idct)
-- 2. Control word for the current macroblock
-- Control word structure: bit 6: chroma(1)/luma(0), 5: intra(1)/inter(0),
-- 4..0: quantizer parameter (QP)
-- 3. Then the DCT data ( 8x8x6 x 16-bit values = 384 x 16 bit )
--
-- Chroma/luma: 4 luma, 2 chroma
--
-- Outputs:
-- Outputs are 16-bit words which are packed up to hibi. If hibi width is
-- 32b, then 2 16-bit words are combined into one hibi word.
-- 01. quant results: 1. 8*8 x 16bit values to quant result address
-- 02. idct results: 1. 8*8 x 16bit values to idct result address
-- 03. quant results: 2. 8*8 x 16bit values to quant result address
-- 04. idct results: 2. 8*8 x 16bit values to idct result address
-- 05. quant results: 3. 8*8 x 16bit values to quant result address
-- 06. idct results: 3. 8*8 x 16bit values to idct result address
-- 07. quant results: 4. 8*8 x 16bit values to quant result address
-- 08. idct results: 4. 8*8 x 16bit values to idct result address
-- 09. quant results: 5. 8*8 x 16bit values to quant result address
-- 10. idct results: 5. 8*8 x 16bit values to idct result address
-- 11. quant results: 6. 8*8 x 16bit values to quant result address
-- 12. quant results: 1 word with bits 5..0 determing if 8x8 quant blocks(1-6)
-- has all values zeros (except dc-component in intra)
-- 13. idct results: 6. 8*8 x 16bit values to idct result address
-- -
-- Total amount of 16-bit values is: 384 per result address + 1 hibi word to
-- quantization result address.
--
-- With default parameter:
-- Total of 193 words of data to quant address (if data_width_g = 32)
-- Total of 192 words of data to idct address (if data_width_g = 32)
--
component dct_to_hibi
generic (
comm_width_g : integer := 5;
data_width_g : integer := 32;
dct_width_g : integer := 9; -- Incoming data width(9b)
debug_w_g : integer := 1;
idct_width_g : integer := 9; -- Data width after IDCT(9b)
own_address_g : integer := 0; -- Used for self-release
quant_width_g : integer := 8; -- Quantizated data width(8b)
rtm_address_g : integer := 0; -- Used for self-release
use_self_rel_g : integer := 1 -- Does it release itself from RTM?
 
);
port (
 
-- Interface: clk
-- Clock interface
clk : in std_logic;
 
-- Interface: dct_if
-- Interface for connecting idctquant accelerator
data_idct_in : in std_logic_vector(8 downto 0);
data_quant_in : in std_logic_vector(7 downto 0);
dct_ready4col_in : in std_logic;
wr_idct_in : in std_logic;
wr_quant_in : in std_logic;
chroma_out : out std_logic;
data_dct_out : out std_logic_vector(8 downto 0);
idct_ready4col_out : out std_logic;
intra_out : out std_logic;
loadQP_out : out std_logic;
QP_out : out std_logic_vector(4 downto 0);
quant_ready4col_out : out std_logic;
wr_dct_out : out std_logic;
 
-- Interface: hibi_master
-- HIBI wrapper r4 version 2 master interface
hibi_av_out : out std_logic;
hibi_comm_out : out std_logic_vector(4 downto 0);
hibi_data_out : out std_logic_vector(31 downto 0);
hibi_re_out : out std_logic;
hibi_we_out : out std_logic;
 
-- Interface: hibi_slave
hibi_av_in : in std_logic;
hibi_comm_in : in std_logic_vector(4 downto 0);
hibi_data_in : in std_logic_vector(31 downto 0);
hibi_empty_in : in std_logic;
hibi_full_in : in std_logic;
 
-- These ports are not in any interface
-- debug_out : out std_logic;
 
-- Interface: rst_n
-- Active low reset input.
rst_n : in std_logic
 
);
end component;
 
component dctQidct_core
port (
 
-- Interface: clk
clk : in std_logic;
 
-- Interface: dct_if
chroma_in : in std_logic;
data_dct_in : in std_logic_vector(8 downto 0);
idct_ready4column_in : in std_logic;
intra_in : in std_logic;
loadQP_in : in std_logic;
QP_in : in std_logic_vector(4 downto 0);
quant_ready4column_in : in std_logic;
wr_dct_in : in std_logic;
data_idct_out : out std_logic_vector(8 downto 0);
data_quant_out : out std_logic_vector(7 downto 0);
dct_ready4column_out : out std_logic;
wr_idct_out : out std_logic;
wr_quant_out : out std_logic;
 
-- Interface: rst_n
rst_n : in std_logic
 
);
end component;
 
-- You can write vhdl code after this tag and it is saved through the generator.
-- ##KACTUS2_BLACK_BOX_DECLARATIONS_BEGIN##
-- ##KACTUS2_BLACK_BOX_DECLARATIONS_END##
-- Stop writing your code after this tag.
 
 
begin
 
-- You can write vhdl code after this tag and it is saved through the generator.
-- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_BEGIN##
-- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_END##
-- Stop writing your code after this tag.
 
dct_to_hibi_0 : dct_to_hibi
port map (
chroma_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifCHROMA_TO_ACC,
clk => clk,
data_dct_out(8 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_DCT_TO_ACC(8 downto 0),
data_idct_in(8 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_IDCT_FROM_ACC(8 downto 0),
data_quant_in(7 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_QUANT_FROM_ACC(7 downto 0),
dct_ready4col_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDCT_READY4COL_FROM_ACC,
hibi_av_in => hibi_av_in,
hibi_av_out => hibi_av_out,
hibi_comm_in(4 downto 0) => hibi_comm_in(4 downto 0),
hibi_comm_out(4 downto 0) => hibi_comm_out(4 downto 0),
hibi_data_in(31 downto 0) => hibi_data_in(31 downto 0),
hibi_data_out(31 downto 0) => hibi_data_out(31 downto 0),
hibi_empty_in => hibi_empty_in,
hibi_full_in => hibi_full_in,
hibi_re_out => hibi_re_out,
hibi_we_out => hibi_we_out,
idct_ready4col_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifIDCT_READY4COL_TO_ACC,
intra_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifINTRA_TO_ACC,
loadQP_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifLOAD_QP_TO_ACC,
QP_out(4 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQP_TO_ACC(4 downto 0),
quant_ready4col_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQUANT_READY4COL_TO_ACC,
rst_n => rst_n,
wr_dct_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_DCT_TO_ACC,
wr_idct_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_IDCT_FROM_ACC,
wr_quant_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_QUANT_FROM_ACC
);
 
dctqidct_0 : dctQidct_core
port map (
chroma_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifCHROMA_TO_ACC,
clk => clk,
data_dct_in(8 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_DCT_TO_ACC(8 downto 0),
data_idct_out(8 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_IDCT_FROM_ACC(8 downto 0),
data_quant_out(7 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDATA_QUANT_FROM_ACC(7 downto 0),
dct_ready4column_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifDCT_READY4COL_FROM_ACC,
idct_ready4column_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifIDCT_READY4COL_TO_ACC,
intra_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifINTRA_TO_ACC,
loadQP_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifLOAD_QP_TO_ACC,
QP_in(4 downto 0) => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQP_TO_ACC(4 downto 0),
quant_ready4column_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifQUANT_READY4COL_TO_ACC,
rst_n => rst_n,
wr_dct_in => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_DCT_TO_ACC,
wr_idct_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_IDCT_FROM_ACC,
wr_quant_out => dct_to_hibi_0_dct_if_to_dctqidct_0_dct_ifWR_QUANT_FROM_ACC
);
 
end structural;
 
/TUT/ip.hwp.accelerator/hibi_dct/1.0/hibi_dct.design.1.0.xml
10,28 → 10,22
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>dct_to_hibi_0</spirit:instanceName>
<spirit:instanceName>dctqidct_0</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dct_to_hibi" spirit:version="1.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dctqidct" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="250" y="180"/>
<kactus2:position x="250" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="dct_if">
<kactus2:position x="80" y="40"/>
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_master">
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_slave">
<kactus2:position x="-80" y="100"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="70"/>
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
</kactus2:portPositions>
<kactus2:adHocVisibilities/>
39,22 → 33,28
</spirit:vendorExtensions>
</spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>dctqidct_0</spirit:instanceName>
<spirit:instanceName>dct_to_hibi_0</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dctqidct" spirit:version="1.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="dct_to_hibi" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="250" y="60"/>
<kactus2:position x="250" y="190"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="dct_if">
<kactus2:position x="80" y="70"/>
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_master">
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_slave">
<kactus2:position x="-80" y="100"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="40"/>
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
</kactus2:portPositions>
<kactus2:adHocVisibilities/>
72,30 → 72,43
</spirit:interconnection>
</spirit:interconnections>
<spirit:hierConnections>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="dctqidct_0" spirit:busRef="rst_n"/>
<spirit:hierConnection spirit:interfaceRef="clk">
<spirit:interface spirit:componentRef="dctqidct_0" spirit:busRef="clk"/>
<spirit:vendorExtensions>
<kactus2:position x="440" y="180"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="330" y="100"/>
<kactus2:position x="390" y="100"/>
<kactus2:position x="390" y="180"/>
<kactus2:position x="440" y="180"/>
<kactus2:position x="170" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="hibi_master">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="hibi_master"/>
<spirit:hierConnection spirit:interfaceRef="clk">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="clk"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="250"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="170" y="250"/>
<kactus2:position x="60" y="250"/>
<kactus2:position x="170" y="230"/>
<kactus2:position x="150" y="230"/>
<kactus2:position x="150" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="hibi_slave">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="hibi_slave"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="280"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="170" y="290"/>
<kactus2:position x="80" y="290"/>
<kactus2:position x="80" y="280"/>
<kactus2:position x="60" y="280"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
102,48 → 115,39
<kactus2:position x="440" y="180"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="330" y="250"/>
<kactus2:position x="390" y="250"/>
<kactus2:position x="330" y="260"/>
<kactus2:position x="390" y="260"/>
<kactus2:position x="390" y="180"/>
<kactus2:position x="440" y="180"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="hibi_slave">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="hibi_slave"/>
<spirit:hierConnection spirit:interfaceRef="hibi_master">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="hibi_master"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="280"/>
<kactus2:position x="60" y="250"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="170" y="280"/>
<kactus2:position x="60" y="280"/>
<kactus2:position x="170" y="260"/>
<kactus2:position x="80" y="260"/>
<kactus2:position x="80" y="250"/>
<kactus2:position x="60" y="250"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="clk">
<spirit:interface spirit:componentRef="dct_to_hibi_0" spirit:busRef="clk"/>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="dctqidct_0" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:position x="440" y="180"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="170" y="220"/>
<kactus2:position x="150" y="220"/>
<kactus2:position x="150" y="100"/>
<kactus2:position x="60" y="100"/>
<kactus2:position x="330" y="100"/>
<kactus2:position x="390" y="100"/>
<kactus2:position x="390" y="180"/>
<kactus2:position x="440" y="180"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="clk">
<spirit:interface spirit:componentRef="dctqidct_0" spirit:busRef="clk"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route kactus2:offPage="false">
<kactus2:position x="170" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
</spirit:hierConnections>
<spirit:vendorExtensions>
<kactus2:columnLayout>
153,11 → 157,12
</kactus2:columnLayout>
<kactus2:routes>
<kactus2:route kactus2:connRef="dct_to_hibi_0_dct_if_to_dctqidct_0_dct_if" kactus2:offPage="false">
<kactus2:position x="330" y="220"/>
<kactus2:position x="350" y="220"/>
<kactus2:position x="330" y="230"/>
<kactus2:position x="350" y="230"/>
<kactus2:position x="350" y="130"/>
<kactus2:position x="330" y="130"/>
</kactus2:route>
</kactus2:routes>
<kactus2:adHocVisibilities/>
</spirit:vendorExtensions>
</spirit:design>
/TUT/ip.hwp.accelerator/hibi_dct/1.0/hibi_dct.designcfg.1.0.xml
9,4 → 9,12
<spirit:name>hibi_dct.designcfg</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:designRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="hibi_dct.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>dct_to_hibi_0</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>dctqidct_0</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
</spirit:designConfiguration>
/TUT/ip.hwp.accelerator/dct_to_hibi/1.0/dct_to_hibi.1.0.xml
600,6 → 600,9
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
607,6 → 610,9
<spirit:name>clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
629,6 → 635,9
<spirit:left>8</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>(others =&gt; '0')</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
640,6 → 649,9
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>(others =&gt; '0')</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
647,6 → 659,9
<spirit:name>dct_ready4col_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
665,6 → 680,9
<spirit:name>hibi_av_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
684,7 → 702,7
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>&quot;000&quot;</spirit:defaultValue>
<spirit:defaultValue>(others =&gt; '0')</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
740,7 → 758,7
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:driver>
<spirit:defaultValue>0</spirit:defaultValue>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
799,6 → 817,9
<spirit:name>rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
821,6 → 842,9
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>
832,6 → 856,9
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:driver>
<spirit:defaultValue>'0'</spirit:defaultValue>
</spirit:driver>
</spirit:wire>
<spirit:vendorExtensions/>
</spirit:port>

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