OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

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  • This comparison shows the changes necessary to convert path
    /funbase_ip_library/trunk
    from Rev 21 to Rev 22
    Reverse comparison

Rev 21 → Rev 22

/TUT/product/pc_arria_ii_gx/1.0/pc_arria_ii_gx.design.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 17:27:21 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:04 ma marras 7 2011-->
<spirit:design>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>product</spirit:library>
7,31 → 7,31
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>pc_board</spirit:instanceName>
<spirit:instanceName>ArriaII_GX_Board</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="board" spirit:name="pc_board" spirit:version="1.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="board" spirit:name="arria_ii_board" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="130" y="60"/>
<kactus2:position x="390" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="pcie_4x">
<kactus2:position x="80" y="40"/>
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
</spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>arria_ii_gx_board</spirit:instanceName>
<spirit:instanceName>Linux_PC</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="board" spirit:name="arria_ii_board" spirit:version="1.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="board" spirit:name="pc_board" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="390" y="60"/>
<kactus2:position x="130" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="-80" y="40"/>
<kactus2:portPosition kactus2:busRef="pcie_4x">
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
42,8 → 42,8
<spirit:name>arria_ii_gx_board_pcie_4x_p_to_pc_board_1_pcie_4x</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="arria_ii_gx_board" spirit:busRef="pcie_4x_p"/>
<spirit:activeInterface spirit:componentRef="pc_board" spirit:busRef="pcie_4x"/>
<spirit:activeInterface spirit:componentRef="ArriaII_GX_Board" spirit:busRef="pcie_4x_p"/>
<spirit:activeInterface spirit:componentRef="Linux_PC" spirit:busRef="pcie_4x"/>
</spirit:interconnection>
</spirit:interconnections>
<spirit:vendorExtensions>
/TUT/product/pc_arria_ii_gx/1.0/pc_arria_ii_gx.designcfg.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 17:27:21 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:04 ma marras 7 2011-->
<spirit:designConfiguration>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>product</spirit:library>
7,11 → 7,11
<spirit:version>1.0</spirit:version>
<spirit:designRef spirit:vendor="TUT" spirit:library="product" spirit:name="pc_arria_ii_gx.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>arria_ii_gx_board</spirit:instanceName>
<spirit:viewName>kactusHierarchical</spirit:viewName>
<spirit:instanceName>ArriaII_GX_Board</spirit:instanceName>
<spirit:viewName>hierarchical</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>pc_board</spirit:instanceName>
<spirit:viewName></spirit:viewName>
<spirit:instanceName>Linux_PC</spirit:instanceName>
<spirit:viewName>flat</spirit:viewName>
</spirit:viewConfiguration>
</spirit:designConfiguration>
/TUT/product/pc_arria_ii_gx/1.0/pc_arria_ii_gx.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 17:27:21 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:31 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>product</spirit:library>
8,12 → 8,19
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:name>hierachical</spirit:name>
<spirit:description>Hierarchical view for lower abstraction level (board). </spirit:description>
<spirit:envIdentifier>none:Kactus2:</spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="product" spirit:name="pc_arria_ii_gx.designcfg" spirit:version="1.0"/>
</spirit:view>
<spirit:view>
<spirit:name>flat</spirit:name>
<spirit:description>Flat view for pc_arria_II_gx product.</spirit:description>
<spirit:envIdentifier>none:Kactus2:</spirit:envIdentifier>
</spirit:view>
</spirit:views>
</spirit:model>
<spirit:description>Example Kactus2 product which includes Linux_PC and ArriaII_GX development board connected together with PCIe.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/chip/arria_ii/1.0/arria_ii.design.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:35 su loka 2 2011-->
<!--Created by Kactus 2 document generator 13:49:41 ma marras 7 2011-->
<spirit:design>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>chip</spirit:library>
16,7 → 16,7
<kactus2:position x="250" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="160"/>
<kactus2:position x="-80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="ddr2_p">
<kactus2:position x="80" y="40"/>
25,20 → 25,8
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="80"/>
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n_1">
<kactus2:position x="80" y="100"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n_2">
<kactus2:position x="80" y="120"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n_3">
<kactus2:position x="80" y="140"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="soft_rst_n">
<kactus2:position x="80" y="180"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
</spirit:componentInstance>
70,6 → 58,32
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="clk_in">
<spirit:interface spirit:componentRef="arria_ii_gx_demo_soc_1" spirit:busRef="clk_in"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="150"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="170" y="150"/>
<kactus2:position x="70" y="150"/>
<kactus2:position x="70" y="150"/>
<kactus2:position x="60" y="150"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="push_button_0">
<spirit:interface spirit:componentRef="arria_ii_gx_demo_soc_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="440" y="150"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="330" y="150"/>
<kactus2:position x="430" y="150"/>
<kactus2:position x="430" y="150"/>
<kactus2:position x="440" y="150"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
</spirit:hierConnections>
<spirit:vendorExtensions>
<kactus2:columnLayout>
/TUT/chip/arria_ii/1.0/arria_ii.designcfg.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:35 su loka 2 2011-->
<!--Created by Kactus 2 document generator 13:49:41 ma marras 7 2011-->
<spirit:designConfiguration>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>chip</spirit:library>
8,7 → 8,7
<spirit:designRef spirit:vendor="TUT" spirit:library="chip" spirit:name="arria_ii.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>arria_ii_gx_demo_soc_1</spirit:instanceName>
<spirit:viewName>kactusHierarchical</spirit:viewName>
<spirit:viewName>structural</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>example_soc_2_1</spirit:instanceName>
/TUT/chip/arria_ii/1.0/arria_ii.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:35 su loka 2 2011-->
<!--Created by Kactus 2 document generator 13:49:41 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>chip</spirit:library>
7,6 → 7,33
<spirit:version>1.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>clk_in</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clkin_bot_p</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>ddr2_p</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.absdef" spirit:version="1.0"/>
172,17 → 199,65
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>push_button_0</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>user_pb</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:name>hierarchical</spirit:name>
<spirit:envIdentifier>none:Kactus2:</spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="chip" spirit:name="arria_ii.designcfg" spirit:version="1.0"/>
</spirit:view>
<spirit:view>
<spirit:name>flat</spirit:name>
<spirit:envIdentifier>none:Kactus2:</spirit:envIdentifier>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clkin_bot_p</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_p_ADDR_TO_DDR2</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
362,8 → 437,26
</spirit:vector>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>user_pb</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:description>Arria II GX EP2AGX125EF35C4ES FPGA chip.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/chip/ddr2_memory/1.0/ddr2_memory.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 17:07:06 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:14:01 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>chip</spirit:library>
19,11 → 19,12
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:name>flat</spirit:name>
<spirit:envIdentifier>none::</spirit:envIdentifier>
</spirit:view>
</spirit:views>
</spirit:model>
<spirit:description>Dummy DDR2 memory block.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/ip.hwp.interface/pcie/pcie_to_hibi_4x/1.0/pcie_to_hibi_4x.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 18:17:30 su loka 2 2011-->
<!--Created by Kactus 2 document generator 13:46:50 ma marras 7 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.interface</spirit:library>
228,6 → 228,15
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl:quartus:</spirit:envIdentifier>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk_in</spirit:name>
709,7 → 718,54
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>Documentation</spirit:name>
<spirit:description>pcie_to_hibi IP documentations.</spirit:description>
<spirit:file>
<spirit:name>doc/PCI-E_to_hibi.docx</spirit:name>
<spirit:userFileType>documentation</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
<spirit:buildCommand>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
<spirit:description>pcie_to_hibi IP block documentation in word document.</spirit:description>
</spirit:file>
<spirit:file>
<spirit:name>doc/PCI-E_to_hibi.pptx</spirit:name>
<spirit:userFileType>documentation</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
<spirit:buildCommand>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
<spirit:description>pcie_to_hibi IP block documentation in powerpoint presentation.</spirit:description>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>fpga_settings</spirit:name>
<spirit:file>
<spirit:name>fpga_settings/pcie.sdc</spirit:name>
<spirit:userFileType>quartusSDCFile</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
<spirit:buildCommand>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
<spirit:description>pcie_to_hibi timing and area constraints.</spirit:description>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>sopc_files</spirit:name>
<spirit:file>
<spirit:name>sopc/pcie_to_hibi_4x_sopc.sopc</spirit:name>
<spirit:userFileType>quartusSOPCFILE</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
<spirit:buildCommand>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
<spirit:description>SOPC project file</spirit:description>
</spirit:file>
</spirit:fileSet>
</spirit:fileSets>
<spirit:description>Adapter to connect HIBI based FPGA subsystem to PCIe bus.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:47:26 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:49:08 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
8,6 → 8,7
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>clk_in</spirit:name>
<spirit:description>Clock input for demo design</spirit:description>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
35,6 → 36,7
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>ddr2_p</spirit:name>
<spirit:description>DDR2 interface to DDR2 memory</spirit:description>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.absdef" spirit:version="1.0"/>
<spirit:master/>
270,6 → 272,7
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>pcie_4x_p</spirit:name>
<spirit:description>PCIe 4x interface</spirit:description>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="pcie_4x.busdef" spirit:version="1.1"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="pcie_4x.absdef" spirit:version="1.1"/>
<spirit:mirroredMaster/>
359,7 → 362,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>rst_n_RESETn</spirit:name>
<spirit:name>user_pb</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
370,114 → 373,18
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>rst_n_1</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>rst_n_RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>rst_n_2</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>rst_n_RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>rst_n_3</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>rst_n_RESETn</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>soft_rst_n</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>soft_rst_n_RESETn</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:name>structural</spirit:name>
<spirit:envIdentifier>vhdl:quartus:</spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="soc" spirit:name="arria_ii_gx_demo_soc.designcfg" spirit:version="1.0"/>
</spirit:view>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl:quartus:</spirit:envIdentifier>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
488,6 → 395,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
498,6 → 412,13
<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
508,6 → 429,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
518,6 → 446,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
528,6 → 463,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
538,6 → 480,13
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
548,6 → 497,13
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
558,6 → 514,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
568,6 → 531,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
578,6 → 548,13
<spirit:left>63</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
588,6 → 565,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
598,6 → 582,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
608,6 → 599,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
618,6 → 616,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
628,6 → 633,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
638,6 → 650,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
648,6 → 667,13
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
658,6 → 684,13
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
668,22 → 701,30
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>soft_rst_n_RESETn</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>user_pb</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>1</spirit:left>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.design.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:47:26 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:49:08 ma marras 7 2011-->
<spirit:design>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
13,19 → 13,19
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="pcie_to_hibi_4x" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="530"/>
<kactus2:position x="510" y="560"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="40"/>
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="80" y="70"/>
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="120"/>
<kactus2:position x="-80" y="100"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
37,25 → 37,25
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="a2_ddr2_dimm_1GB" spirit:version="2.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="200"/>
<kactus2:position x="510" y="230"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="alt_ddr2_p">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="70"/>
<kactus2:position x="80" y="100"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="ddr2_p">
<kactus2:position x="80" y="40"/>
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="phy_clk_out">
<kactus2:position x="-80" y="130"/>
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="130"/>
<kactus2:position x="-80" y="80"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="soft_rst_n">
<kactus2:position x="80" y="100"/>
<kactus2:position x="80" y="130"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
70,16 → 70,16
<kactus2:position x="510" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="alt_ddr2_p">
<kactus2:position x="-80" y="90"/>
<kactus2:position x="-80" y="120"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="-80" y="60"/>
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="40"/>
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="70"/>
<kactus2:position x="80" y="50"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
91,13 → 91,13
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="picture_manip" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="380"/>
<kactus2:position x="510" y="410"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk">
<kactus2:position x="-80" y="40"/>
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="70"/>
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="-80" y="100"/>
115,19 → 115,19
<kactus2:position x="250" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="140"/>
<kactus2:position x="80" y="490"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="ddr2_ctrl_p">
<kactus2:position x="80" y="40"/>
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p1">
<kactus2:position x="80" y="510"/>
<kactus2:position x="80" y="570"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p2">
<kactus2:position x="80" y="390"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="-80" y="40"/>
<kactus2:position x="80" y="50"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
192,29 → 192,16
</spirit:interconnection>
</spirit:interconnections>
<spirit:hierConnections>
<spirit:hierConnection spirit:interfaceRef="rst_n_1">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="330"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="700" y="330"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="pcie_4x_p">
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="pcie_4x_p"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="600"/>
<kactus2:position x="700" y="650"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="600"/>
<kactus2:position x="690" y="600"/>
<kactus2:position x="690" y="600"/>
<kactus2:position x="700" y="600"/>
<kactus2:position x="590" y="650"/>
<kactus2:position x="690" y="650"/>
<kactus2:position x="690" y="650"/>
<kactus2:position x="700" y="650"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
221,13 → 208,13
<spirit:hierConnection spirit:interfaceRef="ddr2_p">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="ddr2_p"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="240"/>
<kactus2:position x="700" y="300"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="240"/>
<kactus2:position x="690" y="240"/>
<kactus2:position x="690" y="240"/>
<kactus2:position x="700" y="240"/>
<kactus2:position x="590" y="300"/>
<kactus2:position x="680" y="300"/>
<kactus2:position x="680" y="300"/>
<kactus2:position x="700" y="300"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
234,78 → 221,76
<spirit:hierConnection spirit:interfaceRef="clk_in">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="clk_in"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="270"/>
<kactus2:position x="700" y="330"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="270"/>
<kactus2:position x="690" y="270"/>
<kactus2:position x="690" y="270"/>
<kactus2:position x="700" y="270"/>
<kactus2:position x="590" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="700" y="330"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="soft_rst_n">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="soft_rst_n"/>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="hibi_segment_small_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="300"/>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="300"/>
<kactus2:position x="690" y="300"/>
<kactus2:position x="690" y="300"/>
<kactus2:position x="700" y="300"/>
<kactus2:position x="330" y="110"/>
<kactus2:position x="700" y="110"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="hibi_segment_small_1" spirit:busRef="rst_n"/>
<spirit:interface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="170" y="100"/>
<kactus2:position x="160" y="100"/>
<kactus2:position x="160" y="100"/>
<kactus2:position x="60" y="100"/>
<kactus2:position x="590" y="110"/>
<kactus2:position x="600" y="110"/>
<kactus2:position x="600" y="110"/>
<kactus2:position x="700" y="110"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="picture_manip_1" spirit:busRef="rst_n"/>
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="430" y="480"/>
<kactus2:position x="80" y="480"/>
<kactus2:position x="80" y="100"/>
<kactus2:position x="60" y="100"/>
<kactus2:position x="430" y="660"/>
<kactus2:position x="140" y="660"/>
<kactus2:position x="140" y="110"/>
<kactus2:position x="700" y="110"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n_2">
<spirit:interface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="rst_n"/>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="130"/>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="130"/>
<kactus2:position x="690" y="130"/>
<kactus2:position x="690" y="130"/>
<kactus2:position x="700" y="130"/>
<kactus2:position x="430" y="310"/>
<kactus2:position x="160" y="310"/>
<kactus2:position x="160" y="110"/>
<kactus2:position x="700" y="110"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n_3">
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="rst_n"/>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="picture_manip_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="650"/>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="650"/>
<kactus2:position x="690" y="650"/>
<kactus2:position x="690" y="650"/>
<kactus2:position x="700" y="650"/>
<kactus2:position x="430" y="510"/>
<kactus2:position x="150" y="510"/>
<kactus2:position x="150" y="110"/>
<kactus2:position x="700" y="110"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
319,42 → 304,40
</kactus2:columnLayout>
<kactus2:routes>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_alt_ddr2_p_to_hibi_mem_dma_1_alt_ddr2_p">
<kactus2:position x="430" y="240"/>
<kactus2:position x="420" y="240"/>
<kactus2:position x="420" y="150"/>
<kactus2:position x="430" y="150"/>
<kactus2:position x="430" y="270"/>
<kactus2:position x="420" y="270"/>
<kactus2:position x="420" y="180"/>
<kactus2:position x="430" y="180"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_ddr2_ctrl_p_to_hibi_mem_dma_1_hibi_p">
<kactus2:position x="330" y="100"/>
<kactus2:position x="410" y="100"/>
<kactus2:position x="410" y="100"/>
<kactus2:position x="430" y="100"/>
<kactus2:position x="330" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="430" y="130"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_pcie_to_hibi_4x_1_clk_in">
<kactus2:position x="430" y="330"/>
<kactus2:position x="400" y="330"/>
<kactus2:position x="400" y="360"/>
<kactus2:position x="600" y="360"/>
<kactus2:position x="600" y="570"/>
<kactus2:position x="590" y="570"/>
<kactus2:position x="590" y="270"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="600"/>
<kactus2:position x="590" y="600"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_clk_in_to_a2_ddr2_dimm_1GB_1_phy_clk_out">
<kactus2:position x="330" y="200"/>
<kactus2:position x="400" y="200"/>
<kactus2:position x="400" y="330"/>
<kactus2:position x="430" y="330"/>
<kactus2:position x="330" y="550"/>
<kactus2:position x="740" y="550"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="590" y="270"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_hibi_mem_dma_1_clk_in">
<kactus2:position x="430" y="330"/>
<kactus2:position x="400" y="330"/>
<kactus2:position x="400" y="120"/>
<kactus2:position x="430" y="120"/>
<kactus2:position x="590" y="270"/>
<kactus2:position x="600" y="270"/>
<kactus2:position x="600" y="150"/>
<kactus2:position x="590" y="150"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p1_to_pcie_to_hibi_4x_1_hibi_p">
<kactus2:position x="330" y="570"/>
<kactus2:position x="420" y="570"/>
<kactus2:position x="420" y="570"/>
<kactus2:position x="430" y="570"/>
<kactus2:position x="330" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="430" y="630"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p2_to_picture_manip_1_hibi_p">
<kactus2:position x="330" y="450"/>
363,10 → 346,10
<kactus2:position x="430" y="450"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_picture_manip_1_clk">
<kactus2:position x="430" y="330"/>
<kactus2:position x="400" y="330"/>
<kactus2:position x="400" y="420"/>
<kactus2:position x="430" y="420"/>
<kactus2:position x="590" y="270"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="480"/>
<kactus2:position x="590" y="480"/>
</kactus2:route>
</kactus2:routes>
</spirit:vendorExtensions>
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.designcfg.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:47:26 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:49:08 ma marras 7 2011-->
<spirit:designConfiguration>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
6,4 → 6,24
<spirit:name>arria_ii_gx_demo_soc.designcfg</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:designRef spirit:vendor="TUT" spirit:library="soc" spirit:name="arria_ii_gx_demo_soc.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>a2_ddr2_dimm_1GB_1</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>hibi_mem_dma_1</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>hibi_segment_small_1</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>pcie_to_hibi_4x_1</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>picture_manip_1</spirit:instanceName>
<spirit:viewName>rtl</spirit:viewName>
</spirit:viewConfiguration>
</spirit:designConfiguration>
/TUT/board/arria_ii_board/1.0/arria_ii_board.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:01 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:57 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>board</spirit:library>
53,10 → 53,14
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:name>hierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="board" spirit:name="arria_ii_board.designcfg" spirit:version="1.0"/>
</spirit:view>
<spirit:view>
<spirit:name>flat</spirit:name>
<spirit:envIdentifier>none::</spirit:envIdentifier>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
93,6 → 97,7
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:description>Arria II GX development board.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
/TUT/board/arria_ii_board/1.0/arria_ii_board.design.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:01 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:57 ma marras 7 2011-->
<spirit:design>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>board</spirit:library>
30,6 → 30,9
<spirit:vendorExtensions>
<kactus2:position x="250" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="80"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="ddr2_p">
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
36,6 → 39,9
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="100"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
</spirit:componentInstance>
/TUT/board/arria_ii_board/1.0/arria_ii_board.designcfg.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:45:01 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:16:57 ma marras 7 2011-->
<spirit:designConfiguration>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>board</spirit:library>
8,10 → 8,10
<spirit:designRef spirit:vendor="TUT" spirit:library="board" spirit:name="arria_ii_board.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>arria_ii_gx_chip</spirit:instanceName>
<spirit:viewName>kactusHierarchical</spirit:viewName>
<spirit:viewName>hierarchical</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>ddr2_memory</spirit:instanceName>
<spirit:viewName></spirit:viewName>
<spirit:viewName>flat</spirit:viewName>
</spirit:viewConfiguration>
</spirit:designConfiguration>
/TUT/board/pc_board/1.0/pc_board.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 17:50:37 su loka 2 2011-->
<!--Created by Kactus 2 document generator 11:40:57 ma marras 7 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>board</spirit:library>
19,9 → 19,8
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>kactusHierarchical</spirit:name>
<spirit:envIdentifier></spirit:envIdentifier>
<spirit:hierarchyRef spirit:vendor="TUT" spirit:library="board" spirit:name="pc_board.designcfg" spirit:version="1.0"/>
<spirit:name>flat</spirit:name>
<spirit:envIdentifier>none:Kactus2:</spirit:envIdentifier>
</spirit:view>
</spirit:views>
</spirit:model>
/TUT/ip.hwp.accelerator/picture_manip/1.0/picture_manip.1.0.xml
1,6 → 1,6
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:54:20 to syys 29 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<!--Created by Kactus 2 document generator 13:47:16 ma marras 7 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.accelerator</spirit:library>
<spirit:name>picture_manip</spirit:name>
169,11 → 169,27
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl::</spirit:envIdentifier>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
180,6 → 196,13
<spirit:name>hibi_av_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
186,6 → 209,13
<spirit:name>hibi_av_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
196,6 → 226,13
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
206,6 → 243,13
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
216,6 → 260,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
226,6 → 277,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
232,6 → 290,13
<spirit:name>hibi_empty_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
238,6 → 303,13
<spirit:name>hibi_full_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
244,6 → 316,13
<spirit:name>hibi_one_d_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
250,6 → 329,13
<spirit:name>hibi_one_p_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
256,6 → 342,13
<spirit:name>hibi_re_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
262,6 → 355,13
<spirit:name>hibi_we_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
268,6 → 368,13
<spirit:name>rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
304,4 → 411,13
</spirit:file>
</spirit:fileSet>
</spirit:fileSets>
<spirit:description>Simple picture manipulator IP to rotate 8-bit grayscale picture 90 degrees clockwise.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
<kactus2:kts_productHier>IP</kactus2:kts_productHier>
<kactus2:kts_firmness>Mutable</kactus2:kts_firmness>
</kactus2:kts_attributes>
</kactus2:extensions>
</spirit:vendorExtensions>
</spirit:component>
/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/hibi_mem_dma.comp.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:24:55 su loka 2 2011-->
<!--Created by Kactus 2 document generator 13:45:28 ma marras 7 2011-->
<spirit:component kts_producthier="Global" kts_reuselevel="Block" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
324,11 → 324,28
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:description>HIBI_MEM_DMA vhdl source view</spirit:description>
<spirit:envIdentifier>vhdl::</spirit:envIdentifier>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
339,6 → 356,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
349,6 → 373,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
355,6 → 386,13
<spirit:name>hibi_av_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
365,6 → 403,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
375,6 → 420,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
385,6 → 437,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
395,6 → 454,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
401,6 → 467,13
<spirit:name>hibi_empty_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
407,6 → 480,13
<spirit:name>hibi_full_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
417,6 → 497,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
423,6 → 510,13
<spirit:name>hibi_msg_av_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
433,6 → 527,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
443,6 → 544,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
453,6 → 561,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
463,6 → 578,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
469,6 → 591,13
<spirit:name>hibi_msg_empty_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
475,6 → 604,13
<spirit:name>hibi_msg_full_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
481,6 → 617,13
<spirit:name>hibi_msg_re_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
487,6 → 630,13
<spirit:name>hibi_msg_we_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
493,6 → 643,13
<spirit:name>hibi_re_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
503,6 → 660,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
513,6 → 677,13
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
523,6 → 694,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
529,6 → 707,13
<spirit:name>mem_burst_begin_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
539,6 → 724,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
545,6 → 737,13
<spirit:name>mem_init_done_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
551,6 → 750,13
<spirit:name>mem_rd_req_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
561,6 → 767,13
<spirit:left>255</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
567,6 → 780,13
<spirit:name>mem_rdata_valid_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
573,6 → 793,13
<spirit:name>mem_ready_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
583,6 → 810,13
<spirit:left>255</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
593,6 → 827,13
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
599,6 → 840,13
<spirit:name>rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
633,7 → 881,6
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
</spirit:file>
<spirit:file>
<spirit:name>hdl/onchip_ram_u.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
668,5 → 915,26
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:defaultFileBuilder>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>Documentation</spirit:name>
<spirit:file>
<spirit:name>doc/HIBI_MEM_DMA.docx</spirit:name>
<spirit:userFileType>documentation</spirit:userFileType>
<spirit:isIncludeFile spirit:externalDeclarations="false">false</spirit:isIncludeFile>
<spirit:buildCommand>
<spirit:replaceDefaultFlags>false</spirit:replaceDefaultFlags>
</spirit:buildCommand>
<spirit:description>hibi_mem_dma IP block datasheet.</spirit:description>
</spirit:file>
</spirit:fileSet>
</spirit:fileSets>
<spirit:description>HIBI memory DMA access IP.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
<kactus2:kts_productHier>IP</kactus2:kts_productHier>
<kactus2:kts_firmness>Mutable</kactus2:kts_firmness>
</kactus2:kts_attributes>
</kactus2:extensions>
</spirit:vendorExtensions>
</spirit:component>
/TUT/ip.hwp.storage/ddrx/a2_ddr2_dimm_1GB.comp/2.0/alt_ddr2_a2.comp.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:26:52 su loka 2 2011-->
<!--Created by Kactus 2 document generator 12:51:29 ma marras 7 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
306,6 → 306,12
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl::</spirit:envIdentifier>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>aux_full_rate_clk</spirit:name>
977,4 → 983,13
</spirit:defaultFileBuilder>
</spirit:fileSet>
</spirit:fileSets>
<spirit:description>Altera ddr2 memory controller</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>
<kactus2:kts_productHier>Global</kactus2:kts_productHier>
<kactus2:kts_firmness>Mutable</kactus2:kts_firmness>
</kactus2:kts_attributes>
</kactus2:extensions>
</spirit:vendorExtensions>
</spirit:component>
/TUT/ip.hwp.communication/hibi/hibi_segment_small/2.0/hibi_segment_small.2.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 18:02:16 pe syys 30 2011-->
<!--Created by Kactus 2 document generator 13:46:35 ma marras 7 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.communication</spirit:library>
463,6 → 463,15
</spirit:channel>
</spirit:channels>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl::</spirit:envIdentifier>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>agent_addr_in_17</spirit:name>
1866,6 → 1875,7
</spirit:defaultFileBuilder>
</spirit:fileSet>
</spirit:fileSets>
<spirit:description>HIBI segment block including two r4_wrapper and one r3_wrapper interfaces.</spirit:description>
<spirit:vendorExtensions>
<kactus2:extensions>
<kactus2:kts_attributes>

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