OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /funbase_ip_library/trunk
    from Rev 24 to Rev 25
    Reverse comparison

Rev 24 → Rev 25

/TUT/ip.hwp.interface/pcie/pcie_to_hibi_4x/1.0/pcie_to_hibi_4x.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:46:50 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 10:49:24 ti marras 8 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.interface</spirit:library>
16,9 → 16,17
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk_in</spirit:name>
<spirit:name>clk</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
239,9 → 247,16
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk_in</spirit:name>
<spirit:name>clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
248,6 → 263,13
<spirit:name>hibi_av_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
254,6 → 276,13
<spirit:name>hibi_av_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
261,9 → 290,16
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
271,9 → 307,16
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
284,6 → 327,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
294,6 → 344,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
300,6 → 357,13
<spirit:name>hibi_empty_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
306,6 → 370,13
<spirit:name>hibi_full_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
312,6 → 383,13
<spirit:name>hibi_one_d_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
318,6 → 396,13
<spirit:name>hibi_one_p_in</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
324,6 → 409,13
<spirit:name>hibi_re_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
330,6 → 422,13
<spirit:name>hibi_we_out</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
336,6 → 435,13
<spirit:name>pcie_ref_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
342,6 → 448,13
<spirit:name>pcie_rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
352,6 → 465,13
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
362,6 → 482,13
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
368,6 → 495,13
<spirit:name>rst_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
/TUT/ip.hwp.interface/pcie/pcie_to_hibi_4x/1.0/quartus/a2gx_sopc_pcie_x4_hibi/ddr2_sodimm.qsf
41,7 → 41,7
set_global_assignment -name TOP_LEVEL_ENTITY a2gx_dev_kit_golden_top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:17:30 JANUARY 19, 2010"
set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP1"
set_global_assignment -name LAST_QUARTUS_VERSION "11.0 SP1"
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 14:16:58 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 11:33:17 ti marras 8 2011-->
<spirit:component>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
36,7 → 36,6
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>ddr2_p</spirit:name>
<spirit:description>DDR2 interface to DDR2 memory</spirit:description>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="ddr2_a2.absdef" spirit:version="1.0"/>
<spirit:master/>
44,226 → 43,114
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ADDR_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>CLK_TO_AND_FROM_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_addr</spirit:name>
<spirit:vector>
<spirit:left>15</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_clk</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BA_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>CLK_N_TO_AND_FROM_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_ba</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_clk_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CAS_N_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>CKE_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_cas_n</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_cke</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CKE_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>CS_N_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_cke</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_cs_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK_N_TO_AND_FROM_DDR2</spirit:name>
<spirit:vector>
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>CAS_N_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_clk_n</spirit:name>
<spirit:vector>
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_cas_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK_TO_AND_FROM_DDR2</spirit:name>
<spirit:vector>
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>RAS_N_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_clk</spirit:name>
<spirit:vector>
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_ras_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CS_N_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>ODT_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_cs_n</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_odt</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DQS_N_TO_AND_FROM_DDR2</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>WE_N_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_dqs_n</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_we_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DQS_TO_AND_FROM_DDR2</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>BA_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_dqs</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_ba</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DQ_M_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>ADDR_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_dm</spirit:name>
<spirit:vector>
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_addr</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DQ_TO_AND_FROM_DDR2</spirit:name>
<spirit:vector>
<spirit:left>63</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>DQ_M_TO_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_dq</spirit:name>
<spirit:vector>
<spirit:left>63</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_dm</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ODT_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>DQS_TO_AND_FROM_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_odt</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_dqs</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RAS_N_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>DQS_N_TO_AND_FROM_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_ras_n</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_dqsn</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WE_N_TO_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>DQ_TO_AND_FROM_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>ddr2_dimm_we_n</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:name>mem_dq</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
348,7 → 235,6
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>rst_n</spirit:name>
<spirit:description>Active low reset</spirit:description>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
363,7 → 249,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>user_pb</spirit:name>
<spirit:name>user_pb_0</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
374,6 → 260,25
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>soft_rst_n</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="reset.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RESETn</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>soft_reset_n</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
414,11 → 319,11
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_addr</spirit:name>
<spirit:name>mem_addr</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>15</spirit:left>
<spirit:left>13</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
431,7 → 336,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_ba</spirit:name>
<spirit:name>mem_ba</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
448,13 → 353,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_cas_n</spirit:name>
<spirit:name>mem_cas_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
465,13 → 366,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_cke</spirit:name>
<spirit:name>mem_cke</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
482,7 → 379,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_clk</spirit:name>
<spirit:name>mem_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
499,7 → 396,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_clk_n</spirit:name>
<spirit:name>mem_clk_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
516,13 → 413,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_cs_n</spirit:name>
<spirit:name>mem_cs_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
533,7 → 426,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_dm</spirit:name>
<spirit:name>mem_dm</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
550,7 → 443,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_dq</spirit:name>
<spirit:name>mem_dq</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
567,7 → 460,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_dqs</spirit:name>
<spirit:name>mem_dqs</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
584,7 → 477,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_dqs_n</spirit:name>
<spirit:name>mem_dqsn</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>inout</spirit:direction>
<spirit:vector>
601,13 → 494,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_odt</spirit:name>
<spirit:name>mem_odt</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
618,13 → 507,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_ras_n</spirit:name>
<spirit:name>mem_ras_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
635,13 → 520,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>ddr2_dimm_we_n</spirit:name>
<spirit:name>mem_we_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
720,16 → 601,29
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>user_pb</spirit:name>
<spirit:name>soft_reset_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>user_pb_0</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
/TUT/soc/arria_ii_gx_demo_soc/1.0/vhd/arria_ii_gx_demo_soc.vhd
1,6 → 1,6
-- ****************************************************
-- ** File: arria_ii_gx_demo_soc.vhd
-- ** Date: 07.11.2011 14:06:37
-- ** Date: 08.11.2011 11:33:16
-- ** Description:
-- **
-- ** This file was generated by Kactus2 vhdl generator
11,14 → 11,16
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
 
library pcie_to_hibi_4x;
use pcie_to_hibi_4x.all;
library hibi_mem_dma;
use hibi_mem_dma.all;
library picture_manip;
use picture_manip.all;
library pciture_manip;
use pciture_manip.all;
library hibi_mem_dma;
use hibi_mem_dma.all;
library alt_ddr2_a2;
use alt_ddr2_a2.all;
library pcie_to_hibi_4x;
use pcie_to_hibi_4x.all;
library hibi;
use hibi.all;
 
26,24 → 28,25
 
port (
clkin_bot_p : in std_logic;
ddr2_dimm_addr : out std_logic_vector(15 downto 0);
ddr2_dimm_ba : out std_logic_vector(2 downto 0);
ddr2_dimm_cas_n : out std_logic;
ddr2_dimm_cke : out std_logic;
ddr2_dimm_clk : inout std_logic_vector(1 downto 0);
ddr2_dimm_clk_n : inout std_logic_vector(1 downto 0);
ddr2_dimm_cs_n : out std_logic;
ddr2_dimm_dm : out std_logic_vector(7 downto 0);
ddr2_dimm_dq : inout std_logic_vector(63 downto 0);
ddr2_dimm_dqs : inout std_logic_vector(7 downto 0);
ddr2_dimm_dqs_n : inout std_logic_vector(7 downto 0);
ddr2_dimm_odt : out std_logic;
ddr2_dimm_ras_n : out std_logic;
ddr2_dimm_we_n : out std_logic;
mem_addr : out std_logic_vector(13 downto 0);
mem_ba : out std_logic_vector(2 downto 0);
mem_cas_n : out std_logic;
mem_cke : out std_logic;
mem_clk : inout std_logic_vector(1 downto 0);
mem_clk_n : inout std_logic_vector(1 downto 0);
mem_cs_n : out std_logic;
mem_dm : out std_logic_vector(7 downto 0);
mem_dq : inout std_logic_vector(63 downto 0);
mem_dqs : inout std_logic_vector(7 downto 0);
mem_dqsn : inout std_logic_vector(7 downto 0);
mem_odt : out std_logic;
mem_ras_n : out std_logic;
mem_we_n : out std_logic;
pcie_refclk_p : in std_logic;
pcie_rx_p : in std_logic_vector(3 downto 0);
pcie_tx_p : out std_logic_vector(3 downto 0);
user_pb : in std_logic_vector(2 downto 0));
soft_reset_n : in std_logic;
user_pb_0 : in std_logic);
 
end arria_ii_gx_demo_soc;
 
50,17 → 53,17
architecture structural of arria_ii_gx_demo_soc is
 
signal a2_ddr2_dimm_1GB_1_local_address_hibi_mem_dma_1_mem_addr_out : std_logic_vector(24 downto 0);
signal a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out : std_logic_vector(31 downto 0);
signal a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out : std_logic_vector(3 downto 0);
signal a2_ddr2_dimm_1GB_1_local_burstbegin_hibi_mem_dma_1_mem_burst_begin_out : std_logic;
signal a2_ddr2_dimm_1GB_1_local_init_done_hibi_mem_dma_1_mem_init_done_in : std_logic;
signal a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in : std_logic_vector(255 downto 0);
signal a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in : std_logic_vector(31 downto 0);
signal a2_ddr2_dimm_1GB_1_local_rdata_valid_hibi_mem_dma_1_mem_rdata_valid_in : std_logic;
signal a2_ddr2_dimm_1GB_1_local_read_req_hibi_mem_dma_1_mem_rd_req_out : std_logic;
signal a2_ddr2_dimm_1GB_1_local_ready_hibi_mem_dma_1_mem_ready_in : std_logic;
signal a2_ddr2_dimm_1GB_1_local_size_hibi_mem_dma_1_mem_burst_size_out : std_logic_vector(2 downto 0);
signal a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out : std_logic_vector(255 downto 0);
signal a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out : std_logic_vector(31 downto 0);
signal a2_ddr2_dimm_1GB_1_local_write_req_hibi_mem_dma_1_mem_wr_req_out : std_logic;
signal a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in : std_logic;
signal a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk : std_logic;
signal hibi_segment_small_1_agent_addr_out_17_hibi_mem_dma_1_hibi_addr_in : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_addr_in_17_hibi_mem_dma_1_hibi_addr_out : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_comm_out_17_hibi_mem_dma_1_hibi_comm_in : std_logic_vector(2 downto 0);
81,29 → 84,27
signal hibi_segment_small_1_agent_re_in_17_hibi_mem_dma_1_hibi_re_out : std_logic;
signal hibi_segment_small_1_agent_we_in_17_hibi_mem_dma_1_hibi_we_out : std_logic;
signal hibi_segment_small_1_agent_av_in_1_pcie_to_hibi_4x_1_hibi_av_out : std_logic;
signal hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_av_out : std_logic;
signal hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_oAv : std_logic;
signal hibi_segment_small_1_agent_av_out_1_pcie_to_hibi_4x_1_hibi_av_in : std_logic;
signal hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_av_in : std_logic;
signal hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_iAv : std_logic;
signal hibi_segment_small_1_agent_comm_in_1_pcie_to_hibi_4x_1_hibi_comm_out : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_comm_out : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_oComm : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_comm_out_1_pcie_to_hibi_4x_1_hibi_comm_in : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_comm_in : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_iComm : std_logic_vector(2 downto 0);
signal hibi_segment_small_1_agent_data_in_1_pcie_to_hibi_4x_1_hibi_data_out : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_data_out : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_oData : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_data_out_1_pcie_to_hibi_4x_1_hibi_data_in : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_data_in : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_iData : std_logic_vector(31 downto 0);
signal hibi_segment_small_1_agent_empty_out_1_pcie_to_hibi_4x_1_hibi_empty_in : std_logic;
signal hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_empty_in : std_logic;
signal hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_iEmpty : std_logic;
signal hibi_segment_small_1_agent_full_out_1_pcie_to_hibi_4x_1_hibi_full_in : std_logic;
signal hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_full_in : std_logic;
signal hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_iFull : std_logic;
signal hibi_segment_small_1_agent_one_d_out_1_pcie_to_hibi_4x_1_hibi_one_d_in : std_logic;
signal hibi_segment_small_1_agent_one_d_out_2_picture_manip_1_hibi_one_d_in : std_logic;
signal hibi_segment_small_1_agent_one_p_out_1_pcie_to_hibi_4x_1_hibi_one_p_in : std_logic;
signal hibi_segment_small_1_agent_one_p_out_2_picture_manip_1_hibi_one_p_in : std_logic;
signal hibi_segment_small_1_agent_re_in_1_pcie_to_hibi_4x_1_hibi_re_out : std_logic;
signal hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_re_out : std_logic;
signal hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_Ore : std_logic;
signal hibi_segment_small_1_agent_we_in_1_pcie_to_hibi_4x_1_hibi_we_out : std_logic;
signal hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_we_out : std_logic;
signal hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_oWe : std_logic;
 
-- Altera ddr2 memory controller
component a2_ddr2_dimm_1GB
135,11 → 136,19
mem_ras_n : out std_logic;
mem_we_n : out std_logic;
phy_clk : out std_logic;
pll_ref_clk : in std_logic);
pll_ref_clk : in std_logic;
soft_reset_n : in std_logic);
end component;
 
-- HIBI memory DMA access IP.
component hibi_mem_dma
generic (
BURST_SIZE_WIDTH : integer := 1;
HIBI_COM_WIDTH : integer := 3;
HIBI_DATA_WIDTH : integer := 32;
MEM_ADDR_WIDTH : integer := 22;
MEM_BE_WIDTH : integer := 4;
MEM_DATA_WIDTH : integer := 32);
port (
clk : in std_logic;
hibi_addr_in : in std_logic_vector(31 downto 0);
162,15 → 171,15
hibi_re_out : out std_logic;
hibi_we_out : out std_logic;
mem_addr_out : out std_logic_vector(24 downto 0);
mem_be_out : out std_logic_vector(31 downto 0);
mem_be_out : out std_logic_vector(3 downto 0);
mem_burst_begin_out : out std_logic;
mem_burst_size_out : out std_logic_vector(2 downto 0);
mem_init_done_in : in std_logic;
mem_rd_req_out : out std_logic;
mem_rdata_in : in std_logic_vector(255 downto 0);
mem_rdata_in : in std_logic_vector(31 downto 0);
mem_rdata_valid_in : in std_logic;
mem_ready_in : in std_logic;
mem_wdata_out : out std_logic_vector(255 downto 0);
mem_wdata_out : out std_logic_vector(31 downto 0);
mem_wr_req_out : out std_logic;
rst_n : in std_logic);
end component;
212,9 → 221,7
agent_msg_re_in_17 : in std_logic;
agent_msg_we_in_17 : in std_logic;
agent_one_d_out_1 : out std_logic;
agent_one_d_out_2 : out std_logic;
agent_one_p_out_1 : out std_logic;
agent_one_p_out_2 : out std_logic;
agent_re_in_1 : in std_logic;
agent_re_in_17 : in std_logic;
agent_re_in_2 : in std_logic;
230,11 → 237,11
generic (
HIBI_DATA_WIDTH : integer := 32);
port (
clk_in : in std_logic;
clk : in std_logic;
hibi_av_in : in std_logic;
hibi_av_out : out std_logic;
hibi_comm_in : in std_logic_vector(4 downto 0);
hibi_comm_out : out std_logic_vector(4 downto 0);
hibi_comm_in : in std_logic_vector(2 downto 0);
hibi_comm_out : out std_logic_vector(2 downto 0);
hibi_data_in : in std_logic_vector(31 downto 0);
hibi_data_out : out std_logic_vector(31 downto 0);
hibi_empty_in : in std_logic;
244,7 → 251,6
hibi_re_out : out std_logic;
hibi_we_out : out std_logic;
pcie_ref_clk : in std_logic;
pcie_rst_n : in std_logic;
pcie_rx : in std_logic_vector(3 downto 0);
pcie_tx : out std_logic_vector(3 downto 0);
rst_n : in std_logic);
253,20 → 259,18
-- Simple picture manipulator IP to rotate 8-bit grayscale picture 90 degrees clockwise.
component picture_manip
port (
clk : in std_logic;
hibi_av_in : in std_logic;
hibi_av_out : out std_logic;
hibi_comm_in : in std_logic_vector(4 downto 0);
hibi_comm_out : out std_logic_vector(4 downto 0);
hibi_data_in : in std_logic_vector(31 downto 0);
hibi_data_out : out std_logic_vector(31 downto 0);
hibi_empty_in : in std_logic;
hibi_full_in : in std_logic;
hibi_one_d_in : in std_logic;
hibi_one_p_in : in std_logic;
hibi_re_out : out std_logic;
hibi_we_out : out std_logic;
rst_n : in std_logic);
hibi_Ore : out std_logic;
hibi_iAv : in std_logic;
hibi_iComm : in std_logic_vector(2 downto 0);
hibi_iData : in std_logic_vector(31 downto 0);
hibi_iEmpty : in std_logic;
hibi_iFull : in std_logic;
hibi_oAv : out std_logic;
hibi_oComm : out std_logic_vector(2 downto 0);
hibi_oData : out std_logic_vector(31 downto 0);
hibi_oWe : out std_logic;
sys_iClk : in std_logic;
sys_iReset_n : in std_logic);
end component;
 
 
276,155 → 280,156
 
a2_ddr2_dimm_1GB_1 : a2_ddr2_dimm_1GB
port map (
mem_dq => ddr2_dimm_dq,
mem_clk => ddr2_dimm_clk,
mem_clk_n => ddr2_dimm_clk_n,
local_wdata => a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out,
mem_odt => ddr2_dimm_odt,
mem_dqs => ddr2_dimm_dqs,
mem_dqsn => ddr2_dimm_dqs_n,
local_wdata(31 downto 0) => a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out(31 downto 0),
mem_cas_n => mem_cas_n,
mem_cke => mem_cke,
mem_addr => mem_addr,
global_reset_n => user_pb_0,
mem_clk_n => mem_clk_n,
mem_cs_n => mem_cs_n,
local_address(24 downto 0) => a2_ddr2_dimm_1GB_1_local_address_hibi_mem_dma_1_mem_addr_out(24 downto 0),
local_burstbegin => a2_ddr2_dimm_1GB_1_local_burstbegin_hibi_mem_dma_1_mem_burst_begin_out,
mem_odt => mem_odt,
mem_ras_n => mem_ras_n,
mem_dqsn => mem_dqsn,
local_init_done => a2_ddr2_dimm_1GB_1_local_init_done_hibi_mem_dma_1_mem_init_done_in,
local_rdata(31 downto 0) => a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in(31 downto 0),
pll_ref_clk => clkin_bot_p,
soft_reset_n => soft_reset_n,
phy_clk => a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk,
local_be(3 downto 0) => a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out(3 downto 0),
mem_dq => mem_dq,
mem_dqs => mem_dqs,
local_size(2 downto 0) => a2_ddr2_dimm_1GB_1_local_size_hibi_mem_dma_1_mem_burst_size_out(2 downto 0),
mem_dm => mem_dm,
mem_we_n => mem_we_n,
local_rdata_valid => a2_ddr2_dimm_1GB_1_local_rdata_valid_hibi_mem_dma_1_mem_rdata_valid_in,
mem_ba => mem_ba,
mem_clk => mem_clk,
local_read_req => a2_ddr2_dimm_1GB_1_local_read_req_hibi_mem_dma_1_mem_rd_req_out,
mem_cke => ddr2_dimm_cke,
pll_ref_clk => clkin_bot_p,
local_address => a2_ddr2_dimm_1GB_1_local_address_hibi_mem_dma_1_mem_addr_out,
local_be => a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out,
mem_cs_n => ddr2_dimm_cs_n,
mem_dm => ddr2_dimm_dm,
mem_ras_n => ddr2_dimm_ras_n,
mem_we_n => ddr2_dimm_we_n,
local_ready => a2_ddr2_dimm_1GB_1_local_ready_hibi_mem_dma_1_mem_ready_in,
local_size => a2_ddr2_dimm_1GB_1_local_size_hibi_mem_dma_1_mem_burst_size_out,
global_reset_n => user_pb,
local_burstbegin => a2_ddr2_dimm_1GB_1_local_burstbegin_hibi_mem_dma_1_mem_burst_begin_out,
mem_addr => ddr2_dimm_addr,
local_write_req => a2_ddr2_dimm_1GB_1_local_write_req_hibi_mem_dma_1_mem_wr_req_out,
phy_clk => a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in,
mem_ba => ddr2_dimm_ba,
mem_cas_n => ddr2_dimm_cas_n,
local_rdata_valid => a2_ddr2_dimm_1GB_1_local_rdata_valid_hibi_mem_dma_1_mem_rdata_valid_in,
local_init_done => a2_ddr2_dimm_1GB_1_local_init_done_hibi_mem_dma_1_mem_init_done_in,
local_rdata => a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in);
local_write_req => a2_ddr2_dimm_1GB_1_local_write_req_hibi_mem_dma_1_mem_wr_req_out);
 
hibi_mem_dma_1 : hibi_mem_dma
generic map (
BURST_SIZE_WIDTH => 3,
HIBI_DATA_WIDTH => 32,
MEM_ADDR_WIDTH => 25,
MEM_BE_WIDTH => 4)
port map (
hibi_comm_in => hibi_segment_small_1_agent_comm_out_17_hibi_mem_dma_1_hibi_comm_in,
hibi_msg_data_out => hibi_segment_small_1_agent_msg_data_in_17_hibi_mem_dma_1_hibi_msg_data_out,
mem_wr_req_out => a2_ddr2_dimm_1GB_1_local_write_req_hibi_mem_dma_1_mem_wr_req_out,
hibi_we_out => hibi_segment_small_1_agent_we_in_17_hibi_mem_dma_1_hibi_we_out,
mem_addr_out(24 downto 0) => a2_ddr2_dimm_1GB_1_local_address_hibi_mem_dma_1_mem_addr_out(24 downto 0),
hibi_msg_we_out => hibi_segment_small_1_agent_msg_we_in_17_hibi_mem_dma_1_hibi_msg_we_out,
hibi_msg_full_in => hibi_segment_small_1_agent_msg_full_out_17_hibi_mem_dma_1_hibi_msg_full_in,
hibi_msg_re_out => hibi_segment_small_1_agent_msg_re_in_17_hibi_mem_dma_1_hibi_msg_re_out,
hibi_full_in => hibi_segment_small_1_agent_full_out_17_hibi_mem_dma_1_hibi_full_in,
hibi_comm_out => hibi_segment_small_1_agent_comm_in_17_hibi_mem_dma_1_hibi_comm_out,
mem_wdata_out(31 downto 0) => a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out(31 downto 0),
hibi_msg_comm_in => hibi_segment_small_1_agent_msg_comm_out_17_hibi_mem_dma_1_hibi_msg_comm_in,
hibi_msg_comm_out => hibi_segment_small_1_agent_msg_comm_in_17_hibi_mem_dma_1_hibi_msg_comm_out,
mem_rdata_in => a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in,
clk => a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in,
hibi_we_out => hibi_segment_small_1_agent_we_in_17_hibi_mem_dma_1_hibi_we_out,
mem_burst_size_out => a2_ddr2_dimm_1GB_1_local_size_hibi_mem_dma_1_mem_burst_size_out,
mem_wdata_out => a2_ddr2_dimm_1GB_1_local_wdata_hibi_mem_dma_1_mem_wdata_out,
hibi_re_out => hibi_segment_small_1_agent_re_in_17_hibi_mem_dma_1_hibi_re_out,
hibi_addr_in(31 downto 0) => hibi_segment_small_1_agent_addr_out_17_hibi_mem_dma_1_hibi_addr_in(31 downto 0),
hibi_empty_in => hibi_segment_small_1_agent_empty_out_17_hibi_mem_dma_1_hibi_empty_in,
mem_rdata_in(31 downto 0) => a2_ddr2_dimm_1GB_1_local_rdata_hibi_mem_dma_1_mem_rdata_in(31 downto 0),
mem_be_out(3 downto 0) => a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out(3 downto 0),
clk => a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk,
mem_rd_req_out => a2_ddr2_dimm_1GB_1_local_read_req_hibi_mem_dma_1_mem_rd_req_out,
rst_n => user_pb_0,
hibi_msg_data_in => hibi_segment_small_1_agent_msg_data_out_17_hibi_mem_dma_1_hibi_msg_data_in,
mem_burst_begin_out => a2_ddr2_dimm_1GB_1_local_burstbegin_hibi_mem_dma_1_mem_burst_begin_out,
hibi_addr_out => hibi_segment_small_1_agent_addr_in_17_hibi_mem_dma_1_hibi_addr_out,
hibi_msg_addr_out => hibi_segment_small_1_agent_msg_addr_in_17_hibi_mem_dma_1_hibi_msg_addr_out,
hibi_data_in => hibi_segment_small_1_agent_data_out_17_hibi_mem_dma_1_hibi_data_in,
hibi_data_out => hibi_segment_small_1_agent_data_in_17_hibi_mem_dma_1_hibi_data_out,
hibi_empty_in => hibi_segment_small_1_agent_empty_out_17_hibi_mem_dma_1_hibi_empty_in,
hibi_data_in => hibi_segment_small_1_agent_data_out_17_hibi_mem_dma_1_hibi_data_in,
hibi_addr_in(31 downto 0) => hibi_segment_small_1_agent_addr_out_17_hibi_mem_dma_1_hibi_addr_in(31 downto 0),
mem_wr_req_out => a2_ddr2_dimm_1GB_1_local_write_req_hibi_mem_dma_1_mem_wr_req_out,
hibi_msg_re_out => hibi_segment_small_1_agent_msg_re_in_17_hibi_mem_dma_1_hibi_msg_re_out,
mem_rdata_valid_in => a2_ddr2_dimm_1GB_1_local_rdata_valid_hibi_mem_dma_1_mem_rdata_valid_in,
mem_ready_in => a2_ddr2_dimm_1GB_1_local_ready_hibi_mem_dma_1_mem_ready_in,
mem_addr_out => a2_ddr2_dimm_1GB_1_local_address_hibi_mem_dma_1_mem_addr_out,
mem_be_out => a2_ddr2_dimm_1GB_1_local_be_hibi_mem_dma_1_mem_be_out,
hibi_msg_full_in => hibi_segment_small_1_agent_msg_full_out_17_hibi_mem_dma_1_hibi_msg_full_in,
mem_burst_size_out(2 downto 0) => a2_ddr2_dimm_1GB_1_local_size_hibi_mem_dma_1_mem_burst_size_out(2 downto 0),
mem_init_done_in => a2_ddr2_dimm_1GB_1_local_init_done_hibi_mem_dma_1_mem_init_done_in,
mem_rd_req_out => a2_ddr2_dimm_1GB_1_local_read_req_hibi_mem_dma_1_mem_rd_req_out,
hibi_msg_data_out => hibi_segment_small_1_agent_msg_data_in_17_hibi_mem_dma_1_hibi_msg_data_out,
hibi_msg_empty_in => hibi_segment_small_1_agent_msg_empty_out_17_hibi_mem_dma_1_hibi_msg_empty_in,
hibi_msg_we_out => hibi_segment_small_1_agent_msg_we_in_17_hibi_mem_dma_1_hibi_msg_we_out,
hibi_re_out => hibi_segment_small_1_agent_re_in_17_hibi_mem_dma_1_hibi_re_out,
hibi_comm_out => hibi_segment_small_1_agent_comm_in_17_hibi_mem_dma_1_hibi_comm_out,
rst_n => user_pb,
hibi_full_in => hibi_segment_small_1_agent_full_out_17_hibi_mem_dma_1_hibi_full_in,
hibi_addr_out => hibi_segment_small_1_agent_addr_in_17_hibi_mem_dma_1_hibi_addr_out,
hibi_comm_in => hibi_segment_small_1_agent_comm_out_17_hibi_mem_dma_1_hibi_comm_in,
hibi_msg_addr_out => hibi_segment_small_1_agent_msg_addr_in_17_hibi_mem_dma_1_hibi_msg_addr_out,
mem_burst_begin_out => a2_ddr2_dimm_1GB_1_local_burstbegin_hibi_mem_dma_1_mem_burst_begin_out);
mem_rdata_valid_in => a2_ddr2_dimm_1GB_1_local_rdata_valid_hibi_mem_dma_1_mem_rdata_valid_in,
mem_ready_in => a2_ddr2_dimm_1GB_1_local_ready_hibi_mem_dma_1_mem_ready_in);
 
hibi_segment_small_1 : hibi_segment_small
port map (
agent_av_in_2 => hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_oAv,
agent_comm_in_1 => hibi_segment_small_1_agent_comm_in_1_pcie_to_hibi_4x_1_hibi_comm_out,
agent_comm_in_17 => hibi_segment_small_1_agent_comm_in_17_hibi_mem_dma_1_hibi_comm_out,
agent_re_in_1 => hibi_segment_small_1_agent_re_in_1_pcie_to_hibi_4x_1_hibi_re_out,
agent_re_in_17 => hibi_segment_small_1_agent_re_in_17_hibi_mem_dma_1_hibi_re_out,
agent_re_in_2 => hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_Ore,
agent_empty_out_1 => hibi_segment_small_1_agent_empty_out_1_pcie_to_hibi_4x_1_hibi_empty_in,
agent_empty_out_17 => hibi_segment_small_1_agent_empty_out_17_hibi_mem_dma_1_hibi_empty_in,
agent_msg_addr_in_17 => hibi_segment_small_1_agent_msg_addr_in_17_hibi_mem_dma_1_hibi_msg_addr_out,
agent_data_in_17 => hibi_segment_small_1_agent_data_in_17_hibi_mem_dma_1_hibi_data_out,
agent_msg_full_out_17 => hibi_segment_small_1_agent_msg_full_out_17_hibi_mem_dma_1_hibi_msg_full_in,
agent_we_in_17 => hibi_segment_small_1_agent_we_in_17_hibi_mem_dma_1_hibi_we_out,
agent_data_out_2 => hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_iData,
agent_empty_out_2 => hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_iEmpty,
agent_we_in_1 => hibi_segment_small_1_agent_we_in_1_pcie_to_hibi_4x_1_hibi_we_out,
agent_we_in_2 => hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_oWe,
clk => a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk,
agent_msg_re_in_17 => hibi_segment_small_1_agent_msg_re_in_17_hibi_mem_dma_1_hibi_msg_re_out,
rst_n => user_pb_0,
agent_av_out_2 => hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_iAv,
agent_addr_out_17 => hibi_segment_small_1_agent_addr_out_17_hibi_mem_dma_1_hibi_addr_in,
agent_av_in_1 => hibi_segment_small_1_agent_av_in_1_pcie_to_hibi_4x_1_hibi_av_out,
agent_comm_out_1 => hibi_segment_small_1_agent_comm_out_1_pcie_to_hibi_4x_1_hibi_comm_in,
agent_comm_out_17 => hibi_segment_small_1_agent_comm_out_17_hibi_mem_dma_1_hibi_comm_in,
agent_comm_out_2 => hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_iComm,
agent_full_out_2 => hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_iFull,
agent_msg_we_in_17 => hibi_segment_small_1_agent_msg_we_in_17_hibi_mem_dma_1_hibi_msg_we_out,
agent_full_out_1 => hibi_segment_small_1_agent_full_out_1_pcie_to_hibi_4x_1_hibi_full_in,
agent_full_out_17 => hibi_segment_small_1_agent_full_out_17_hibi_mem_dma_1_hibi_full_in,
agent_comm_out_2 => hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_comm_in,
agent_data_in_1 => hibi_segment_small_1_agent_data_in_1_pcie_to_hibi_4x_1_hibi_data_out,
agent_one_d_out_1 => hibi_segment_small_1_agent_one_d_out_1_pcie_to_hibi_4x_1_hibi_one_d_in,
agent_av_in_2 => hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_av_out,
agent_we_in_1 => hibi_segment_small_1_agent_we_in_1_pcie_to_hibi_4x_1_hibi_we_out,
agent_we_in_17 => hibi_segment_small_1_agent_we_in_17_hibi_mem_dma_1_hibi_we_out,
clk => a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in,
agent_comm_out_1 => hibi_segment_small_1_agent_comm_out_1_pcie_to_hibi_4x_1_hibi_comm_in,
agent_comm_in_17 => hibi_segment_small_1_agent_comm_in_17_hibi_mem_dma_1_hibi_comm_out,
agent_comm_in_2 => hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_comm_out,
agent_empty_out_2 => hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_empty_in,
agent_msg_empty_out_17 => hibi_segment_small_1_agent_msg_empty_out_17_hibi_mem_dma_1_hibi_msg_empty_in,
agent_data_in_17 => hibi_segment_small_1_agent_data_in_17_hibi_mem_dma_1_hibi_data_out,
agent_data_in_2 => hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_data_out,
agent_one_d_out_2 => hibi_segment_small_1_agent_one_d_out_2_picture_manip_1_hibi_one_d_in,
agent_one_p_out_1 => hibi_segment_small_1_agent_one_p_out_1_pcie_to_hibi_4x_1_hibi_one_p_in,
agent_re_in_2 => hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_re_out,
agent_full_out_2 => hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_full_in,
agent_data_out_2 => hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_data_in,
agent_empty_out_1 => hibi_segment_small_1_agent_empty_out_1_pcie_to_hibi_4x_1_hibi_empty_in,
agent_av_out_1 => hibi_segment_small_1_agent_av_out_1_pcie_to_hibi_4x_1_hibi_av_in,
agent_av_out_2 => hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_av_in,
agent_one_p_out_2 => hibi_segment_small_1_agent_one_p_out_2_picture_manip_1_hibi_one_p_in,
agent_msg_comm_in_17 => hibi_segment_small_1_agent_msg_comm_in_17_hibi_mem_dma_1_hibi_msg_comm_out,
agent_msg_comm_out_17 => hibi_segment_small_1_agent_msg_comm_out_17_hibi_mem_dma_1_hibi_msg_comm_in,
agent_comm_in_2 => hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_oComm,
agent_data_out_17 => hibi_segment_small_1_agent_data_out_17_hibi_mem_dma_1_hibi_data_in,
agent_msg_data_in_17 => hibi_segment_small_1_agent_msg_data_in_17_hibi_mem_dma_1_hibi_msg_data_out,
agent_msg_data_out_17 => hibi_segment_small_1_agent_msg_data_out_17_hibi_mem_dma_1_hibi_msg_data_in,
agent_msg_full_out_17 => hibi_segment_small_1_agent_msg_full_out_17_hibi_mem_dma_1_hibi_msg_full_in,
agent_msg_empty_out_17 => hibi_segment_small_1_agent_msg_empty_out_17_hibi_mem_dma_1_hibi_msg_empty_in,
agent_data_in_2 => hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_oData,
agent_data_out_1 => hibi_segment_small_1_agent_data_out_1_pcie_to_hibi_4x_1_hibi_data_in,
rst_n => user_pb,
agent_re_in_1 => hibi_segment_small_1_agent_re_in_1_pcie_to_hibi_4x_1_hibi_re_out,
agent_re_in_17 => hibi_segment_small_1_agent_re_in_17_hibi_mem_dma_1_hibi_re_out,
agent_comm_out_17 => hibi_segment_small_1_agent_comm_out_17_hibi_mem_dma_1_hibi_comm_in,
agent_data_out_17 => hibi_segment_small_1_agent_data_out_17_hibi_mem_dma_1_hibi_data_in,
agent_msg_addr_in_17 => hibi_segment_small_1_agent_msg_addr_in_17_hibi_mem_dma_1_hibi_msg_addr_out,
agent_msg_comm_in_17 => hibi_segment_small_1_agent_msg_comm_in_17_hibi_mem_dma_1_hibi_msg_comm_out,
agent_msg_comm_out_17 => hibi_segment_small_1_agent_msg_comm_out_17_hibi_mem_dma_1_hibi_msg_comm_in,
agent_av_out_1 => hibi_segment_small_1_agent_av_out_1_pcie_to_hibi_4x_1_hibi_av_in,
agent_addr_in_17 => hibi_segment_small_1_agent_addr_in_17_hibi_mem_dma_1_hibi_addr_out,
agent_we_in_2 => hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_we_out,
agent_empty_out_17 => hibi_segment_small_1_agent_empty_out_17_hibi_mem_dma_1_hibi_empty_in,
agent_addr_out_17 => hibi_segment_small_1_agent_addr_out_17_hibi_mem_dma_1_hibi_addr_in,
agent_av_in_1 => hibi_segment_small_1_agent_av_in_1_pcie_to_hibi_4x_1_hibi_av_out,
agent_comm_in_1 => hibi_segment_small_1_agent_comm_in_1_pcie_to_hibi_4x_1_hibi_comm_out);
agent_one_d_out_1 => hibi_segment_small_1_agent_one_d_out_1_pcie_to_hibi_4x_1_hibi_one_d_in,
agent_one_p_out_1 => hibi_segment_small_1_agent_one_p_out_1_pcie_to_hibi_4x_1_hibi_one_p_in);
 
pcie_to_hibi_4x_1 : pcie_to_hibi_4x
port map (
hibi_one_d_in => hibi_segment_small_1_agent_one_d_out_1_pcie_to_hibi_4x_1_hibi_one_d_in,
hibi_one_p_in => hibi_segment_small_1_agent_one_p_out_1_pcie_to_hibi_4x_1_hibi_one_p_in,
hibi_av_in => hibi_segment_small_1_agent_av_out_1_pcie_to_hibi_4x_1_hibi_av_in,
hibi_comm_out => hibi_segment_small_1_agent_comm_in_1_pcie_to_hibi_4x_1_hibi_comm_out,
rst_n => user_pb_0,
hibi_data_in => hibi_segment_small_1_agent_data_out_1_pcie_to_hibi_4x_1_hibi_data_in,
hibi_we_out => hibi_segment_small_1_agent_we_in_1_pcie_to_hibi_4x_1_hibi_we_out,
clk => a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk,
pcie_tx(3 downto 0) => pcie_tx_p(3 downto 0),
hibi_full_in => hibi_segment_small_1_agent_full_out_1_pcie_to_hibi_4x_1_hibi_full_in,
hibi_re_out => hibi_segment_small_1_agent_re_in_1_pcie_to_hibi_4x_1_hibi_re_out,
pcie_ref_clk => pcie_refclk_p,
pcie_rx(3 downto 0) => pcie_rx_p(3 downto 0),
hibi_data_out => hibi_segment_small_1_agent_data_in_1_pcie_to_hibi_4x_1_hibi_data_out,
hibi_empty_in => hibi_segment_small_1_agent_empty_out_1_pcie_to_hibi_4x_1_hibi_empty_in,
hibi_av_in => hibi_segment_small_1_agent_av_out_1_pcie_to_hibi_4x_1_hibi_av_in,
hibi_full_in => hibi_segment_small_1_agent_full_out_1_pcie_to_hibi_4x_1_hibi_full_in,
rst_n => user_pb,
clk_in => a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in,
pcie_rst_n => user_pb,
pcie_rx(3 downto 0) => pcie_rx_p(3 downto 0),
hibi_we_out => hibi_segment_small_1_agent_we_in_1_pcie_to_hibi_4x_1_hibi_we_out,
hibi_av_out => hibi_segment_small_1_agent_av_in_1_pcie_to_hibi_4x_1_hibi_av_out,
pcie_ref_clk => pcie_refclk_p,
pcie_tx(3 downto 0) => pcie_tx_p(3 downto 0),
hibi_comm_in => hibi_segment_small_1_agent_comm_out_1_pcie_to_hibi_4x_1_hibi_comm_in,
hibi_comm_out => hibi_segment_small_1_agent_comm_in_1_pcie_to_hibi_4x_1_hibi_comm_out,
hibi_one_d_in => hibi_segment_small_1_agent_one_d_out_1_pcie_to_hibi_4x_1_hibi_one_d_in,
hibi_one_p_in => hibi_segment_small_1_agent_one_p_out_1_pcie_to_hibi_4x_1_hibi_one_p_in,
hibi_re_out => hibi_segment_small_1_agent_re_in_1_pcie_to_hibi_4x_1_hibi_re_out);
hibi_comm_in => hibi_segment_small_1_agent_comm_out_1_pcie_to_hibi_4x_1_hibi_comm_in);
 
picture_manip_1 : picture_manip
port map (
hibi_av_in => hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_av_in,
hibi_empty_in => hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_empty_in,
clk => a2_ddr2_dimm_1GB_1_phy_clk_pcie_to_hibi_4x_1_clk_in,
rst_n => user_pb,
hibi_one_p_in => hibi_segment_small_1_agent_one_p_out_2_picture_manip_1_hibi_one_p_in,
hibi_full_in => hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_full_in,
hibi_one_d_in => hibi_segment_small_1_agent_one_d_out_2_picture_manip_1_hibi_one_d_in,
hibi_re_out => hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_re_out,
hibi_we_out => hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_we_out,
hibi_data_in => hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_data_in,
hibi_data_out => hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_data_out,
hibi_comm_out => hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_comm_out,
hibi_av_out => hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_av_out,
hibi_comm_in => hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_comm_in);
sys_iClk => a2_ddr2_dimm_1GB_1_phy_clk_picture_manip_1_sys_iClk,
sys_iReset_n => user_pb_0,
hibi_Ore => hibi_segment_small_1_agent_re_in_2_picture_manip_1_hibi_Ore,
hibi_iAv => hibi_segment_small_1_agent_av_out_2_picture_manip_1_hibi_iAv,
hibi_iData(31 downto 0) => hibi_segment_small_1_agent_data_out_2_picture_manip_1_hibi_iData(31 downto 0),
hibi_iEmpty => hibi_segment_small_1_agent_empty_out_2_picture_manip_1_hibi_iEmpty,
hibi_iFull => hibi_segment_small_1_agent_full_out_2_picture_manip_1_hibi_iFull,
hibi_oAv => hibi_segment_small_1_agent_av_in_2_picture_manip_1_hibi_oAv,
hibi_iComm(2 downto 0) => hibi_segment_small_1_agent_comm_out_2_picture_manip_1_hibi_iComm(2 downto 0),
hibi_oWe => hibi_segment_small_1_agent_we_in_2_picture_manip_1_hibi_oWe,
hibi_oComm(2 downto 0) => hibi_segment_small_1_agent_comm_in_2_picture_manip_1_hibi_oComm(2 downto 0),
hibi_oData(31 downto 0) => hibi_segment_small_1_agent_data_in_2_picture_manip_1_hibi_oData(31 downto 0));
 
end structural;
 
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.design.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 12:49:08 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 11:27:04 ti marras 8 2011-->
<spirit:design>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
7,25 → 7,51
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>pcie_to_hibi_4x_1</spirit:instanceName>
<spirit:instanceName>picture_manip_1</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="pcie_to_hibi_4x" spirit:version="1.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="picture_manip" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="560"/>
<kactus2:position x="510" y="410"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk">
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="-80" y="100"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
</spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>hibi_mem_dma_1</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="hibi_mem_dma" spirit:version="2.0"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="BURST_SIZE_WIDTH">3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="HIBI_DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MEM_ADDR_WIDTH">25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MEM_BE_WIDTH">4</spirit:configurableElementValue>
</spirit:configurableElementValues>
<spirit:vendorExtensions>
<kactus2:position x="510" y="60"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="alt_ddr2_p">
<kactus2:position x="-80" y="120"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="40"/>
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="-80" y="100"/>
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
43,7 → 69,7
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="100"/>
<kactus2:position x="80" y="110"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="ddr2_p">
<kactus2:position x="80" y="70"/>
61,44 → 87,23
</spirit:vendorExtensions>
</spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>hibi_mem_dma_1</spirit:instanceName>
<spirit:instanceName>pcie_to_hibi_4x_1</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="hibi_mem_dma" spirit:version="2.0"/>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="pcie_to_hibi_4x" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="60"/>
<kactus2:position x="510" y="560"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="alt_ddr2_p">
<kactus2:position x="-80" y="120"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="clk_in">
<kactus2:position x="80" y="90"/>
<kactus2:position x="80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="50"/>
<kactus2:portPosition kactus2:busRef="pcie_4x_p">
<kactus2:position x="80" y="90"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
</spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>picture_manip_1</spirit:instanceName>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:componentRef spirit:vendor="TUT" spirit:library="ip.hwp.accelerator" spirit:name="picture_manip" spirit:version="1.0"/>
<spirit:configurableElementValues/>
<spirit:vendorExtensions>
<kactus2:position x="510" y="410"/>
<kactus2:portPositions>
<kactus2:portPosition kactus2:busRef="clk">
<kactus2:position x="80" y="70"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="hibi_p">
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="-80" y="100"/>
</kactus2:portPosition>
127,7 → 132,7
<kactus2:position x="80" y="390"/>
</kactus2:portPosition>
<kactus2:portPosition kactus2:busRef="rst_n">
<kactus2:position x="80" y="50"/>
<kactus2:position x="-80" y="40"/>
</kactus2:portPosition>
</kactus2:portPositions>
</spirit:vendorExtensions>
135,63 → 140,76
</spirit:componentInstances>
<spirit:interconnections>
<spirit:interconnection>
<spirit:name>a2_ddr2_dimm_1GB_1_alt_ddr2_p_to_hibi_mem_dma_1_alt_ddr2_p</spirit:name>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_picture_manip_1_clk</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="alt_ddr2_p"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="alt_ddr2_p"/>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="picture_manip_1" spirit:busRef="clk"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>hibi_segment_small_1_ddr2_ctrl_p_to_hibi_mem_dma_1_hibi_p</spirit:name>
<spirit:name>hibi_segment_small_1_hibi_p2_to_picture_manip_1_hibi_p</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="ddr2_ctrl_p"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="hibi_p"/>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="hibi_p2"/>
<spirit:activeInterface spirit:componentRef="picture_manip_1" spirit:busRef="hibi_p"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_pcie_to_hibi_4x_1_clk_in</spirit:name>
<spirit:name>hibi_segment_small_1_hibi_p1_to_pcie_to_hibi_4x_1_hibi_p</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="clk_in"/>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="hibi_p1"/>
<spirit:activeInterface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="hibi_p"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>hibi_segment_small_1_clk_in_to_a2_ddr2_dimm_1GB_1_phy_clk_out</spirit:name>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_hibi_mem_dma_1_clk_in</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="clk_in"/>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="clk_in"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_hibi_mem_dma_1_clk_in</spirit:name>
<spirit:name>hibi_segment_small_1_clk_in_to_a2_ddr2_dimm_1GB_1_phy_clk_out</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="clk_in"/>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="clk_in"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>hibi_segment_small_1_hibi_p1_to_pcie_to_hibi_4x_1_hibi_p</spirit:name>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_pcie_to_hibi_4x_1_clk_in</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="hibi_p1"/>
<spirit:activeInterface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="hibi_p"/>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="clk_in"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>hibi_segment_small_1_hibi_p2_to_picture_manip_1_hibi_p</spirit:name>
<spirit:name>hibi_segment_small_1_ddr2_ctrl_p_to_hibi_mem_dma_1_hibi_p</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="hibi_p2"/>
<spirit:activeInterface spirit:componentRef="picture_manip_1" spirit:busRef="hibi_p"/>
<spirit:activeInterface spirit:componentRef="hibi_segment_small_1" spirit:busRef="ddr2_ctrl_p"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="hibi_p"/>
</spirit:interconnection>
<spirit:interconnection>
<spirit:name>a2_ddr2_dimm_1GB_1_phy_clk_out_to_picture_manip_1_clk</spirit:name>
<spirit:name>a2_ddr2_dimm_1GB_1_alt_ddr2_p_to_hibi_mem_dma_1_alt_ddr2_p</spirit:name>
<spirit:displayName></spirit:displayName>
<spirit:description></spirit:description>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="phy_clk_out"/>
<spirit:activeInterface spirit:componentRef="picture_manip_1" spirit:busRef="clk"/>
<spirit:activeInterface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="alt_ddr2_p"/>
<spirit:activeInterface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="alt_ddr2_p"/>
</spirit:interconnection>
</spirit:interconnections>
<spirit:hierConnections>
<spirit:hierConnection spirit:interfaceRef="clk_in">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="clk_in"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="330"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="700" y="330"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="pcie_4x_p">
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="pcie_4x_p"/>
<spirit:vendorExtensions>
205,29 → 223,27
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="ddr2_p">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="ddr2_p"/>
<spirit:hierConnection spirit:interfaceRef="soft_rst_n">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="soft_rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="300"/>
<kactus2:position x="700" y="360"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="300"/>
<kactus2:position x="680" y="300"/>
<kactus2:position x="680" y="300"/>
<kactus2:position x="700" y="300"/>
<kactus2:position x="590" y="360"/>
<kactus2:position x="690" y="360"/>
<kactus2:position x="690" y="360"/>
<kactus2:position x="700" y="360"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="clk_in">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="clk_in"/>
<spirit:hierConnection spirit:interfaceRef="ddr2_p">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="ddr2_p"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="330"/>
<kactus2:position x="700" y="300"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="690" y="330"/>
<kactus2:position x="700" y="330"/>
<kactus2:position x="590" y="300"/>
<kactus2:position x="700" y="300"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
234,11 → 250,13
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="hibi_segment_small_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="330" y="110"/>
<kactus2:position x="700" y="110"/>
<kactus2:position x="170" y="100"/>
<kactus2:position x="160" y="100"/>
<kactus2:position x="160" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
245,26 → 263,28
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="hibi_mem_dma_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="590" y="110"/>
<kactus2:position x="600" y="110"/>
<kactus2:position x="600" y="110"/>
<kactus2:position x="700" y="110"/>
<kactus2:position x="590" y="100"/>
<kactus2:position x="600" y="100"/>
<kactus2:position x="600" y="90"/>
<kactus2:position x="80" y="90"/>
<kactus2:position x="80" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="rst_n"/>
<spirit:interface spirit:componentRef="picture_manip_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="430" y="660"/>
<kactus2:position x="140" y="660"/>
<kactus2:position x="140" y="110"/>
<kactus2:position x="700" y="110"/>
<kactus2:position x="430" y="510"/>
<kactus2:position x="420" y="510"/>
<kactus2:position x="420" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
271,26 → 291,26
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="a2_ddr2_dimm_1GB_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="430" y="310"/>
<kactus2:position x="160" y="310"/>
<kactus2:position x="160" y="110"/>
<kactus2:position x="700" y="110"/>
<kactus2:position x="420" y="310"/>
<kactus2:position x="420" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="rst_n">
<spirit:interface spirit:componentRef="picture_manip_1" spirit:busRef="rst_n"/>
<spirit:interface spirit:componentRef="pcie_to_hibi_4x_1" spirit:busRef="rst_n"/>
<spirit:vendorExtensions>
<kactus2:position x="700" y="110"/>
<kactus2:direction x="-1" y="0"/>
<kactus2:position x="60" y="100"/>
<kactus2:direction x="1" y="0"/>
<kactus2:route>
<kactus2:position x="430" y="510"/>
<kactus2:position x="150" y="510"/>
<kactus2:position x="150" y="110"/>
<kactus2:position x="700" y="110"/>
<kactus2:position x="430" y="660"/>
<kactus2:position x="420" y="660"/>
<kactus2:position x="420" y="100"/>
<kactus2:position x="60" y="100"/>
</kactus2:route>
</spirit:vendorExtensions>
</spirit:hierConnection>
303,23 → 323,29
<kactus2:column name="IO" contentType="0" allowedItems="1"/>
</kactus2:columnLayout>
<kactus2:routes>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_alt_ddr2_p_to_hibi_mem_dma_1_alt_ddr2_p">
<kactus2:position x="430" y="270"/>
<kactus2:position x="420" y="270"/>
<kactus2:position x="420" y="180"/>
<kactus2:position x="430" y="180"/>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_picture_manip_1_clk">
<kactus2:position x="590" y="270"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="480"/>
<kactus2:position x="590" y="480"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_ddr2_ctrl_p_to_hibi_mem_dma_1_hibi_p">
<kactus2:position x="330" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="430" y="130"/>
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p2_to_picture_manip_1_hibi_p">
<kactus2:position x="330" y="450"/>
<kactus2:position x="390" y="450"/>
<kactus2:position x="390" y="450"/>
<kactus2:position x="430" y="450"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_pcie_to_hibi_4x_1_clk_in">
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p1_to_pcie_to_hibi_4x_1_hibi_p">
<kactus2:position x="330" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="430" y="630"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_hibi_mem_dma_1_clk_in">
<kactus2:position x="590" y="270"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="600"/>
<kactus2:position x="590" y="600"/>
<kactus2:position x="600" y="270"/>
<kactus2:position x="600" y="150"/>
<kactus2:position x="590" y="150"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_clk_in_to_a2_ddr2_dimm_1GB_1_phy_clk_out">
<kactus2:position x="330" y="550"/>
327,30 → 353,24
<kactus2:position x="740" y="270"/>
<kactus2:position x="590" y="270"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_hibi_mem_dma_1_clk_in">
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_pcie_to_hibi_4x_1_clk_in">
<kactus2:position x="590" y="270"/>
<kactus2:position x="600" y="270"/>
<kactus2:position x="600" y="150"/>
<kactus2:position x="590" y="150"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="600"/>
<kactus2:position x="590" y="600"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p1_to_pcie_to_hibi_4x_1_hibi_p">
<kactus2:position x="330" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="420" y="630"/>
<kactus2:position x="430" y="630"/>
<kactus2:route kactus2:connRef="hibi_segment_small_1_ddr2_ctrl_p_to_hibi_mem_dma_1_hibi_p">
<kactus2:position x="330" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="410" y="130"/>
<kactus2:position x="430" y="130"/>
</kactus2:route>
<kactus2:route kactus2:connRef="hibi_segment_small_1_hibi_p2_to_picture_manip_1_hibi_p">
<kactus2:position x="330" y="450"/>
<kactus2:position x="390" y="450"/>
<kactus2:position x="390" y="450"/>
<kactus2:position x="430" y="450"/>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_alt_ddr2_p_to_hibi_mem_dma_1_alt_ddr2_p">
<kactus2:position x="430" y="270"/>
<kactus2:position x="420" y="270"/>
<kactus2:position x="420" y="180"/>
<kactus2:position x="430" y="180"/>
</kactus2:route>
<kactus2:route kactus2:connRef="a2_ddr2_dimm_1GB_1_phy_clk_out_to_picture_manip_1_clk">
<kactus2:position x="590" y="270"/>
<kactus2:position x="740" y="270"/>
<kactus2:position x="740" y="480"/>
<kactus2:position x="590" y="480"/>
</kactus2:route>
</kactus2:routes>
</spirit:vendorExtensions>
</spirit:design>
/TUT/soc/arria_ii_gx_demo_soc/1.0/arria_ii_gx_demo_soc.designcfg.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 12:49:08 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 11:27:04 ti marras 8 2011-->
<spirit:designConfiguration>
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
/TUT/ip.hwp.accelerator/picture_manip/1.0/picture_manip.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:47:16 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 10:42:01 ti marras 8 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.accelerator</spirit:library>
22,7 → 22,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk</spirit:name>
<spirit:name>sys_iClk</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
43,97 → 43,193
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AV_FROM_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_av_out</spirit:name>
<spirit:name>hibi_oAv</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ONE_D_TO_IP</spirit:name>
<spirit:name>AV_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_one_d_in</spirit:name>
<spirit:name>hibi_iAv</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DATA_TO_IP</spirit:name>
<spirit:name>COMM_FROM_IP</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_data_in</spirit:name>
<spirit:name>hibi_oComm</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>DATA_FROM_IP</spirit:name>
<spirit:name>COMM_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_data_out</spirit:name>
<spirit:name>hibi_iComm</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AV_TO_IP</spirit:name>
<spirit:name>DATA_FROM_IP</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_av_in</spirit:name>
<spirit:name>hibi_oData</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>FULL_TO_IP</spirit:name>
<spirit:name>DATA_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_full_in</spirit:name>
<spirit:name>hibi_iData</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>COMM_FROM_IP</spirit:name>
<spirit:name>EMPTY_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_comm_out</spirit:name>
<spirit:name>hibi_iEmpty</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WE_FROM_IP</spirit:name>
<spirit:name>FULL_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_we_out</spirit:name>
<spirit:name>hibi_iFull</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>COMM_TO_IP</spirit:name>
<spirit:name>ONE_D_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_comm_in</spirit:name>
<spirit:name>hibi_iOne_d</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>EMPTY_TO_IP</spirit:name>
<spirit:name>ONE_P_TO_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_empty_in</spirit:name>
<spirit:name>hibi_iOne_p</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RE_FROM_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_re_out</spirit:name>
<spirit:name>hibi_Ore</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ONE_P_TO_IP</spirit:name>
<spirit:name>WE_FROM_IP</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>hibi_one_p_in</spirit:name>
<spirit:name>hibi_oWe</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
156,7 → 252,7
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>rst_n</spirit:name>
<spirit:name>sys_iReset_n</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
180,9 → 276,9
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk</spirit:name>
<spirit:name>hibi_Ore</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
193,7 → 289,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_av_in</spirit:name>
<spirit:name>hibi_iAv</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
206,12 → 302,16
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_av_out</spirit:name>
<spirit:name>hibi_iComm</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
219,11 → 319,11
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_comm_in</spirit:name>
<spirit:name>hibi_iData</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
236,16 → 336,12
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_comm_out</spirit:name>
<spirit:name>hibi_iEmpty</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>4</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
253,16 → 349,12
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_data_in</spirit:name>
<spirit:name>hibi_iFull</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
270,16 → 362,12
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_data_out</spirit:name>
<spirit:name>hibi_iOne_d_left</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
287,7 → 375,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_empty_in</spirit:name>
<spirit:name>hibi_iOne_p_left</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
300,9 → 388,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_full_in</spirit:name>
<spirit:name>hibi_oAv</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
313,12 → 401,16
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_one_d_in</spirit:name>
<spirit:name>hibi_oComm</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
326,12 → 418,16
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_one_p_in</spirit:name>
<spirit:name>hibi_oData</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
339,7 → 435,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_re_out</spirit:name>
<spirit:name>hibi_oWe</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
352,9 → 448,9
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>hibi_we_out</spirit:name>
<spirit:name>sys_iClk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
365,7 → 461,7
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>rst_n</spirit:name>
<spirit:name>sys_iReset_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
/TUT/ip.hwp.storage/ddrx/alt_ddr2_a2.absdef/1.0/alt_ddr2_a2.absdef.1.0.xml
1,57 → 1,121
<spirit:abstractionDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
<spirit:name>alt_ddr2_a2.absdef</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="alt_ddr2_a2.busdef" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>out</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_WR_REQ_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RD_REQ_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_ADDR_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>25</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_READY_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>out</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RDATA_VALID_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>out</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_WDATA_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>256</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RDATA_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>256</spirit:width><spirit:direction>out</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BE_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>32</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>1</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire><spirit:onMaster><spirit:width>3</spirit:width><spirit:direction>in</spirit:direction></spirit:onMaster></spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 11:19:44 ti marras 8 2011-->
<spirit:abstractionDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
<spirit:name>alt_ddr2_a2.absdef</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.storage" spirit:name="alt_ddr2_a2.busdef" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>MEM_ADDR_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>25</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BE_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>32</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>3</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RDATA_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>256</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RDATA_VALID_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_RD_REQ_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_READY_FROM_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_WDATA_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>256</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>MEM_WR_REQ_TO_ALT_DDR2</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
/TUT/ip.hwp.storage/ddrx/ddr2_a2.absdef/2.0/ddr2_a2.absdef.2.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:15:02 ma syys 5 2011-->
<!--Created by Kactus 2 document generator 10:08:29 ti marras 8 2011-->
<spirit:abstractionDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.interface</spirit:library>
12,7 → 12,7
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:width>14</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
/TUT/ip.hwp.storage/ddrx/ddr2_a2.absdef/1.0/ddr2_a2.absdef.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 19:34:34 su loka 2 2011-->
<!--Created by Kactus 2 document generator 10:08:39 ti marras 8 2011-->
<spirit:abstractionDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.interface</spirit:library>
12,7 → 12,7
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:width>14</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:requiresDriver spirit:driverType="any"/>false</spirit:wire>
/TUT/ip.hwp.storage/ddrx/alt_ddr2_a2.busdef/1.0/alt_ddr2_a2.busdef.1.0.xml
1,11 → 1,10
<?xml version="1.0" encoding="UTF-8"?>
<!-- Spirit bus definition for DDR2 Arria II GX board-->
<spirit:busDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
<spirit:name>alt_ddr2_a2.busdef</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>true</spirit:isAddressable>
</spirit:busDefinition>
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 11:19:44 ti marras 8 2011-->
<spirit:busDefinition xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
<spirit:name>alt_ddr2_a2.busdef</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>true</spirit:isAddressable>
</spirit:busDefinition>
/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/hibi_mem_dma.comp.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:45:28 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 11:31:58 ti marras 8 2011-->
<spirit:component kts_producthier="Global" kts_reuselevel="Block" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
15,90 → 15,178
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:name>
<spirit:name>MEM_RDATA_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_init_done_in</spirit:name>
<spirit:name>mem_rdata_in</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_WR_REQ_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_WDATA_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_wr_req_out</spirit:name>
<spirit:name>mem_wdata_out</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RD_REQ_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_rd_req_out</spirit:name>
<spirit:name>mem_burst_size_out</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_ADDR_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_addr_out</spirit:name>
<spirit:name>mem_burst_begin_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_READY_FROM_ALT_DDR2</spirit:name>
<spirit:name>MEM_RDATA_VALID_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_ready_in</spirit:name>
<spirit:name>mem_rdata_valid_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RDATA_VALID_FROM_ALT_DDR2</spirit:name>
<spirit:name>MEM_READY_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_rdata_valid_in</spirit:name>
<spirit:name>mem_ready_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_WDATA_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_ADDR_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_wdata_out</spirit:name>
<spirit:name>mem_addr_out</spirit:name>
<spirit:vector>
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RDATA_FROM_ALT_DDR2</spirit:name>
<spirit:name>MEM_RD_REQ_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_rdata_in</spirit:name>
<spirit:name>mem_rd_req_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BE_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_WR_REQ_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_be_out</spirit:name>
<spirit:name>mem_wr_req_out</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_burst_begin_out</spirit:name>
<spirit:name>mem_init_done_in</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_BE_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>mem_burst_size_out</spirit:name>
<spirit:name>mem_be_out</spirit:name>
<spirit:vector>
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
691,7 → 779,7
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
764,7 → 852,7
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:vector>
<spirit:left>255</spirit:left>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
807,7 → 895,7
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:vector>
<spirit:left>255</spirit:left>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
850,6 → 938,32
</spirit:wire>
</spirit:port>
</spirit:ports>
<spirit:modelParameters>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>BURST_SIZE_WIDTH</spirit:name>
<spirit:value>1</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>HIBI_COM_WIDTH</spirit:name>
<spirit:value>3</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>HIBI_DATA_WIDTH</spirit:name>
<spirit:value>32</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>MEM_ADDR_WIDTH</spirit:name>
<spirit:value>22</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>MEM_BE_WIDTH</spirit:name>
<spirit:value>4</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer" spirit:usageType="nontyped">
<spirit:name>MEM_DATA_WIDTH</spirit:name>
<spirit:value>32</spirit:value>
</spirit:modelParameter>
</spirit:modelParameters>
</spirit:model>
<spirit:fileSets>
<spirit:fileSet>
/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/ts/a2gx_hibi_mem_dma/ddr2_sodimm.qsf
41,7 → 41,7
set_global_assignment -name TOP_LEVEL_ENTITY hibi_mem_dma_tb
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:17:30 JANUARY 19, 2010"
set_global_assignment -name LAST_QUARTUS_VERSION "10.1 SP1"
set_global_assignment -name LAST_QUARTUS_VERSION "11.0 SP1"
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
770,1770 → 770,11
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to ddr2_dimm_dm[6]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to ddr2_dimm_dm[7]
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=M9K" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=1024" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name MISC_FILE "D:/svn/koski/trunk/lib/hw_lib/ips/memories/memory_to_hibi_r2/ts/a2gx_m2h2/ddr2_sodimm.dpf"
set_location_assignment PIN_AL8 -to ddr2_dimm_cas_n
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "m2h2_tester:m2h2_tester_0|fsm_state.CONF_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "m2h2_tester:m2h2_tester_0|fsm_state.CONF_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "m2h2_tester:m2h2_tester_0|fsm_state.DELAY" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "m2h2_tester:m2h2_tester_0|fsm_state.MEM_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "m2h2_tester:m2h2_tester_0|fsm_state.MEM_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "m2h2_tester:m2h2_tester_0|fsm_state.RET_ADDR_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_WR_AV" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "m2h2_tester:m2h2_tester_0|fsm_state.WAIT_START" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "m2h2_tester:m2h2_tester_0|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "m2h2_tester:m2h2_tester_0|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[75] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[76] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[77] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[78] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[79] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[80] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[81] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[82] -to "m2h2_tester:m2h2_tester_0|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[83] -to "m2h2_tester:m2h2_tester_0|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[84] -to "m2h2_tester:m2h2_tester_0|hibi_msg_wr" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[85] -to "m2h2_tester:m2h2_tester_0|hibi_one_d_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[86] -to "m2h2_tester:m2h2_tester_0|hibi_one_p_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[87] -to "m2h2_tester:m2h2_tester_0|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[88] -to "m2h2_tester:m2h2_tester_0|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[89] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[90] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[91] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[92] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_RD_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_REQ_ACK_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_REQ_SEND" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_WR_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "m2h2_tester:m2h2_tester_0|fsm_state.CONF_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "m2h2_tester:m2h2_tester_0|fsm_state.CONF_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "m2h2_tester:m2h2_tester_0|fsm_state.DELAY" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "m2h2_tester:m2h2_tester_0|fsm_state.MEM_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "m2h2_tester:m2h2_tester_0|fsm_state.MEM_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "m2h2_tester:m2h2_tester_0|fsm_state.RET_ADDR_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "m2h2_tester:m2h2_tester_0|fsm_state.SINGLE_WR_AV" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "m2h2_tester:m2h2_tester_0|fsm_state.WAIT_START" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "m2h2_tester:m2h2_tester_0|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "m2h2_tester:m2h2_tester_0|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "m2h2_tester:m2h2_tester_0|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "m2h2_tester:m2h2_tester_0|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "m2h2_tester:m2h2_tester_0|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "m2h2_tester:m2h2_tester_0|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "m2h2_tester:m2h2_tester_0|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "m2h2_tester:m2h2_tester_0|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "m2h2_tester:m2h2_tester_0|hibi_msg_wr" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "m2h2_tester:m2h2_tester_0|hibi_one_d_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "m2h2_tester:m2h2_tester_0|hibi_one_p_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "m2h2_tester:m2h2_tester_0|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "m2h2_tester:m2h2_tester_0|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_rw_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_RD_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_REQ_ACK_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_REQ_SEND" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "m2h2_tester:m2h2_tester_0|m2h2_conf_state.M2H2_WR_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "m2h2_tester:m2h2_tester_0|mem_rw_block_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "memory_to_hibi:memory_to_hibi_0|clk" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[136] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[137] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[138] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[139] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[140] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[141] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[142] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[143] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[144] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[145] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[146] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[147] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[148] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[149] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[150] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[151] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[152] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[153] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[154] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[155] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[156] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[157] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[158] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[159] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[160] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[161] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[162] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[163] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[164] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[165] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[166] -to "m2h2_tester:m2h2_tester_0|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[167] -to "m2h2_tester:m2h2_tester_0|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[168] -to "m2h2_tester:m2h2_tester_0|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[169] -to "m2h2_tester:m2h2_tester_0|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[170] -to "m2h2_tester:m2h2_tester_0|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[171] -to "m2h2_tester:m2h2_tester_0|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[172] -to "m2h2_tester:m2h2_tester_0|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[173] -to "m2h2_tester:m2h2_tester_0|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[174] -to "m2h2_tester:m2h2_tester_0|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[175] -to "m2h2_tester:m2h2_tester_0|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[176] -to "m2h2_tester:m2h2_tester_0|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[177] -to "m2h2_tester:m2h2_tester_0|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[178] -to "m2h2_tester:m2h2_tester_0|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[179] -to "m2h2_tester:m2h2_tester_0|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[180] -to "m2h2_tester:m2h2_tester_0|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[181] -to "m2h2_tester:m2h2_tester_0|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[182] -to "m2h2_tester:m2h2_tester_0|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[183] -to "m2h2_tester:m2h2_tester_0|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[184] -to "m2h2_tester:m2h2_tester_0|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[185] -to "m2h2_tester:m2h2_tester_0|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[186] -to "m2h2_tester:m2h2_tester_0|test_error_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[187] -to "m2h2_tester:m2h2_tester_1|fsm_state.CONF_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[188] -to "m2h2_tester:m2h2_tester_1|fsm_state.CONF_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[189] -to "m2h2_tester:m2h2_tester_1|fsm_state.DELAY" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[190] -to "m2h2_tester:m2h2_tester_1|fsm_state.MEM_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[191] -to "m2h2_tester:m2h2_tester_1|fsm_state.MEM_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[192] -to "m2h2_tester:m2h2_tester_1|fsm_state.RET_ADDR_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[193] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[194] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[195] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_WR_AV" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[196] -to "m2h2_tester:m2h2_tester_1|fsm_state.WAIT_START" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[197] -to "m2h2_tester:m2h2_tester_1|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[198] -to "m2h2_tester:m2h2_tester_1|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[199] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[200] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[201] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[202] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[203] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[204] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[205] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[206] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[207] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[208] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[209] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[210] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[211] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[212] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[213] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[214] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[215] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[216] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[217] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[218] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[219] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[220] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[221] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[222] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[223] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[224] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[225] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[226] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[227] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[228] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[229] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[230] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[231] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[232] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[233] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[234] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[235] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[236] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[237] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[238] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[239] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[240] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[241] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[242] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[243] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[244] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[245] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[246] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[247] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[248] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[249] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[250] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[251] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[252] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[253] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[254] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[255] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[256] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[257] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[258] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[259] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[260] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[261] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[262] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[263] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[264] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[265] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[266] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[267] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[268] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[269] -to "m2h2_tester:m2h2_tester_1|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[270] -to "m2h2_tester:m2h2_tester_1|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[271] -to "m2h2_tester:m2h2_tester_1|hibi_msg_wr" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[272] -to "m2h2_tester:m2h2_tester_1|hibi_one_d_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[273] -to "m2h2_tester:m2h2_tester_1|hibi_one_p_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[274] -to "m2h2_tester:m2h2_tester_1|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[275] -to "m2h2_tester:m2h2_tester_1|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[276] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[277] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[278] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[279] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[280] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[281] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[282] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[283] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[284] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[285] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[286] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[287] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[288] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[289] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[290] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[291] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[292] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[293] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[294] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[295] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[296] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_RD_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[297] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_REQ_ACK_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[298] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_REQ_SEND" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[299] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[300] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_WR_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[301] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[302] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[303] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[304] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[305] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[306] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[307] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[308] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[309] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[310] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[311] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[312] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[313] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[314] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[315] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[316] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[317] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[318] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[319] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[320] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[321] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[322] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[323] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[324] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[325] -to "m2h2_tester:m2h2_tester_1|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[326] -to "m2h2_tester:m2h2_tester_1|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[327] -to "m2h2_tester:m2h2_tester_1|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[328] -to "m2h2_tester:m2h2_tester_1|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[329] -to "m2h2_tester:m2h2_tester_1|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[330] -to "m2h2_tester:m2h2_tester_1|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[331] -to "m2h2_tester:m2h2_tester_1|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[332] -to "m2h2_tester:m2h2_tester_1|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[333] -to "m2h2_tester:m2h2_tester_1|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[334] -to "m2h2_tester:m2h2_tester_1|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[335] -to "m2h2_tester:m2h2_tester_1|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[336] -to "m2h2_tester:m2h2_tester_1|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[337] -to "m2h2_tester:m2h2_tester_1|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[338] -to "m2h2_tester:m2h2_tester_1|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[339] -to "m2h2_tester:m2h2_tester_1|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[340] -to "m2h2_tester:m2h2_tester_1|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[341] -to "m2h2_tester:m2h2_tester_1|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[342] -to "m2h2_tester:m2h2_tester_1|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[343] -to "m2h2_tester:m2h2_tester_1|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[344] -to "m2h2_tester:m2h2_tester_1|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[345] -to "m2h2_tester:m2h2_tester_1|test_error_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "m2h2_tester:m2h2_tester_0|mem_rw_test_cnt[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "m2h2_tester:m2h2_tester_0|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "m2h2_tester:m2h2_tester_0|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "m2h2_tester:m2h2_tester_0|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "m2h2_tester:m2h2_tester_0|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to "m2h2_tester:m2h2_tester_0|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "m2h2_tester:m2h2_tester_0|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to "m2h2_tester:m2h2_tester_0|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to "m2h2_tester:m2h2_tester_0|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to "m2h2_tester:m2h2_tester_0|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[175] -to "m2h2_tester:m2h2_tester_0|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[176] -to "m2h2_tester:m2h2_tester_0|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[177] -to "m2h2_tester:m2h2_tester_0|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[178] -to "m2h2_tester:m2h2_tester_0|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[179] -to "m2h2_tester:m2h2_tester_0|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[180] -to "m2h2_tester:m2h2_tester_0|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[181] -to "m2h2_tester:m2h2_tester_0|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[182] -to "m2h2_tester:m2h2_tester_0|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[183] -to "m2h2_tester:m2h2_tester_0|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[184] -to "m2h2_tester:m2h2_tester_0|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[185] -to "m2h2_tester:m2h2_tester_0|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[186] -to "m2h2_tester:m2h2_tester_0|test_error_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[187] -to "m2h2_tester:m2h2_tester_1|fsm_state.CONF_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[188] -to "m2h2_tester:m2h2_tester_1|fsm_state.CONF_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[189] -to "m2h2_tester:m2h2_tester_1|fsm_state.DELAY" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[190] -to "m2h2_tester:m2h2_tester_1|fsm_state.MEM_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[191] -to "m2h2_tester:m2h2_tester_1|fsm_state.MEM_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[192] -to "m2h2_tester:m2h2_tester_1|fsm_state.RET_ADDR_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[193] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_RD" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[194] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_WR" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[195] -to "m2h2_tester:m2h2_tester_1|fsm_state.SINGLE_WR_AV" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[196] -to "m2h2_tester:m2h2_tester_1|fsm_state.WAIT_START" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[197] -to "m2h2_tester:m2h2_tester_1|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[198] -to "m2h2_tester:m2h2_tester_1|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[199] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[200] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[201] -to "m2h2_tester:m2h2_tester_1|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[202] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[203] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[204] -to "m2h2_tester:m2h2_tester_1|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[205] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[206] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[207] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[208] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[209] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[210] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[211] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[212] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[213] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[214] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[215] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[216] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[217] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[218] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[219] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[220] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[221] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[222] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[223] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[224] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[225] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[226] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[227] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[228] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[229] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[230] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[231] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[232] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[233] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[234] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[235] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[236] -to "m2h2_tester:m2h2_tester_1|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[237] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[238] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[239] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[240] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[241] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[242] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[243] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[244] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[245] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[246] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[247] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[248] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[249] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[250] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[251] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[252] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[253] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[254] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[255] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[256] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[257] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[258] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[259] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[260] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[261] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[262] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[263] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[264] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[265] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[266] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[267] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[268] -to "m2h2_tester:m2h2_tester_1|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[269] -to "m2h2_tester:m2h2_tester_1|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[270] -to "m2h2_tester:m2h2_tester_1|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[271] -to "m2h2_tester:m2h2_tester_1|hibi_msg_wr" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[272] -to "m2h2_tester:m2h2_tester_1|hibi_one_d_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[273] -to "m2h2_tester:m2h2_tester_1|hibi_one_p_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[274] -to "m2h2_tester:m2h2_tester_1|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[275] -to "m2h2_tester:m2h2_tester_1|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[276] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[277] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[278] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[279] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[280] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[281] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[282] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[283] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[284] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[285] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[286] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[287] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[288] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[289] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[290] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[291] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[292] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[293] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[294] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[295] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_rw_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[296] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_RD_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[297] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_REQ_ACK_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[298] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_REQ_SEND" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[299] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_WAIT" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[300] -to "m2h2_tester:m2h2_tester_1|m2h2_conf_state.M2H2_WR_CONF" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[301] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[302] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[303] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[304] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[305] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[306] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[307] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[308] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[309] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[310] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[311] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[312] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[313] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[314] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[315] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[316] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[317] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[318] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[319] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[320] -to "m2h2_tester:m2h2_tester_1|mem_rw_block_length[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[321] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[322] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[323] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[324] -to "m2h2_tester:m2h2_tester_1|test_cfg_delay_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[325] -to "m2h2_tester:m2h2_tester_1|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[326] -to "m2h2_tester:m2h2_tester_1|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[327] -to "m2h2_tester:m2h2_tester_1|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[328] -to "m2h2_tester:m2h2_tester_1|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[329] -to "m2h2_tester:m2h2_tester_1|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[330] -to "m2h2_tester:m2h2_tester_1|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[331] -to "m2h2_tester:m2h2_tester_1|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[332] -to "m2h2_tester:m2h2_tester_1|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[333] -to "m2h2_tester:m2h2_tester_1|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[334] -to "m2h2_tester:m2h2_tester_1|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[335] -to "m2h2_tester:m2h2_tester_1|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[336] -to "m2h2_tester:m2h2_tester_1|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[337] -to "m2h2_tester:m2h2_tester_1|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[338] -to "m2h2_tester:m2h2_tester_1|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[339] -to "m2h2_tester:m2h2_tester_1|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[340] -to "m2h2_tester:m2h2_tester_1|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[341] -to "m2h2_tester:m2h2_tester_1|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[342] -to "m2h2_tester:m2h2_tester_1|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[343] -to "m2h2_tester:m2h2_tester_1|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[344] -to "m2h2_tester:m2h2_tester_1|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[345] -to "m2h2_tester:m2h2_tester_1|test_error_out[9]" -section_id auto_signaltap_0
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name AUTO_RAM_RECOGNITION ON
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[346] -to "m2h2_tester:m2h2_tester_2|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[347] -to "m2h2_tester:m2h2_tester_2|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[348] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[349] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[350] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[351] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[352] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[353] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[354] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[355] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[356] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[357] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[358] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[359] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[360] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[361] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[362] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[363] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[364] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[365] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[366] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[367] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[368] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[369] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[370] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[371] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[372] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[373] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[374] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[375] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[376] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[377] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[378] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[379] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[380] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[381] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[382] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[383] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[384] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[385] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[386] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[387] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[388] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[389] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[390] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[391] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[392] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[393] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[394] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[395] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[396] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[397] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[398] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[399] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[400] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[401] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[402] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[403] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[404] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[405] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[406] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[407] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[408] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[409] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[410] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[411] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[412] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[413] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[414] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[415] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[416] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[417] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[418] -to "m2h2_tester:m2h2_tester_2|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[419] -to "m2h2_tester:m2h2_tester_2|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[420] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[421] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[422] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[423] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[424] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[425] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[426] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[427] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[428] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[429] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[430] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[431] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[432] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[433] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[434] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[435] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[436] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[437] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[438] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[439] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[440] -to "m2h2_tester:m2h2_tester_2|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[441] -to "m2h2_tester:m2h2_tester_2|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[442] -to "m2h2_tester:m2h2_tester_2|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[443] -to "m2h2_tester:m2h2_tester_2|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[444] -to "m2h2_tester:m2h2_tester_2|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[445] -to "m2h2_tester:m2h2_tester_2|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[446] -to "m2h2_tester:m2h2_tester_2|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[447] -to "m2h2_tester:m2h2_tester_2|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[448] -to "m2h2_tester:m2h2_tester_2|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[449] -to "m2h2_tester:m2h2_tester_2|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[450] -to "m2h2_tester:m2h2_tester_2|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[451] -to "m2h2_tester:m2h2_tester_2|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[452] -to "m2h2_tester:m2h2_tester_2|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[453] -to "m2h2_tester:m2h2_tester_2|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[454] -to "m2h2_tester:m2h2_tester_2|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[455] -to "m2h2_tester:m2h2_tester_2|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[456] -to "m2h2_tester:m2h2_tester_2|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[457] -to "m2h2_tester:m2h2_tester_2|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[458] -to "m2h2_tester:m2h2_tester_2|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[459] -to "m2h2_tester:m2h2_tester_2|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[460] -to "m2h2_tester:m2h2_tester_2|test_error_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[461] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[462] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[463] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[464] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[465] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[466] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[467] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[468] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[469] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[470] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[471] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[472] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[473] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[474] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[475] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[476] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[477] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[478] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[479] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[480] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[481] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[482] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[483] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[484] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[485] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[486] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[487] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[488] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[489] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[490] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[491] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[492] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[493] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[494] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[495] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[496] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[497] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[498] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[499] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[500] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[501] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[502] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[503] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[504] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[505] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[506] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[507] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[508] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[509] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[510] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[511] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[512] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[513] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[514] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[515] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[516] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[517] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[518] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[519] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[520] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[521] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[522] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[523] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[524] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[525] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[526] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[527] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[528] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[529] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[530] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[531] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[532] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[533] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[534] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[535] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[536] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[537] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[538] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[539] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[540] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[541] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[542] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[543] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[544] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[545] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[546] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[547] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[548] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[549] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[550] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[551] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[552] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[553] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[554] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[555] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[556] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[557] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[558] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[559] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[560] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[561] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[562] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[563] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[564] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[565] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[566] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[567] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[568] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[569] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[570] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[571] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[572] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[573] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[574] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[575] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[576] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[577] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[578] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[579] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[580] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[581] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[582] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[583] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[584] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[585] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[586] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[587] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[588] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[589] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[590] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[591] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[592] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[593] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[594] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[595] -to "memory_to_hibi:memory_to_hibi_0|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[596] -to "memory_to_hibi:memory_to_hibi_0|hibi_false_rd_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[597] -to "memory_to_hibi:memory_to_hibi_0|hibi_false_wr_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[598] -to "memory_to_hibi:memory_to_hibi_0|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[599] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[600] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[601] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[602] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[603] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[604] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[605] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[606] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[607] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[608] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[609] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[610] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[611] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[612] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[613] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[614] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[615] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[616] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[617] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[618] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[619] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[620] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[621] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[622] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[623] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[624] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[625] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[626] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[627] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[628] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[629] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[630] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[631] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[632] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[633] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[634] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[635] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[636] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[637] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[638] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[639] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[640] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[641] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[642] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[643] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[644] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[645] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[646] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[647] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[648] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[649] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[650] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[651] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[652] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[653] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[654] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[655] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[656] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[657] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[658] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[659] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[660] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[661] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[662] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[663] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[664] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[665] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[666] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[667] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[668] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[669] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[670] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[671] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[672] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[673] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[674] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[675] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[676] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[677] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[678] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[679] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[680] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[681] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[682] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[683] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[684] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[685] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[686] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[687] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[688] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[689] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[690] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[691] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[692] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[693] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[694] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[695] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[696] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[697] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[698] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[699] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[700] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[701] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[702] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[703] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[704] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[705] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[706] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[707] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[708] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[709] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[710] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[711] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[712] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[713] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[714] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[715] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[716] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[717] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[718] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[719] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[720] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[721] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[722] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[723] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[724] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[725] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[726] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[727] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[728] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[729] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[730] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[731] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[732] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[733] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[734] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[735] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[736] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[737] -to "memory_to_hibi:memory_to_hibi_0|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[738] -to "memory_to_hibi:memory_to_hibi_0|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[739] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[740] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[741] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[742] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[743] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[744] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[745] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[746] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[747] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_data_fifo_re_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[748] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_data_fifo_re_tmp" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[749] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[750] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[751] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[752] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[753] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[754] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[755] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[756] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[757] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[758] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[759] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[760] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[761] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[762] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[763] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[764] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[765] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[766] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[767] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[768] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[769] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[770] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[771] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[772] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[773] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[774] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[775] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[776] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[777] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[778] -to "memory_to_hibi:memory_to_hibi_0|mem_init_done_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[779] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[780] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[781] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[782] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[783] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[784] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[785] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[786] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[787] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_req_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[788] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[789] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[790] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[791] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[792] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[793] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[794] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[795] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[796] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[797] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[798] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[799] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[800] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[801] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[802] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[803] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[804] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[805] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[806] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[807] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[808] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[809] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[810] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[811] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[812] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[813] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[814] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[815] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[816] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[817] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[818] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[819] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[820] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_valid_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[821] -to "memory_to_hibi:memory_to_hibi_0|mem_ready_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[822] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[823] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[824] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[825] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[826] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[827] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[828] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[829] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[830] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[831] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[832] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[833] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[834] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[835] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[836] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[837] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[838] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[839] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[840] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[841] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[842] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[843] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[844] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[845] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[846] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[847] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[848] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[849] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[850] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[851] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[852] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[853] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[854] -to "memory_to_hibi:memory_to_hibi_0|mem_wr_req_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[855] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_empty_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[856] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_full_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[857] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_reserve_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[858] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_re_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[859] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_re_tmp" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[860] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_we_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[861] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[862] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[863] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[864] -to "memory_to_hibi:memory_to_hibi_0|rw_conf_done_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[865] -to test_start -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[866] -to test_started -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[346] -to "m2h2_tester:m2h2_tester_2|hibi_av_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[347] -to "m2h2_tester:m2h2_tester_2|hibi_av_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[348] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[349] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[350] -to "m2h2_tester:m2h2_tester_2|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[351] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[352] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[353] -to "m2h2_tester:m2h2_tester_2|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[354] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[355] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[356] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[357] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[358] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[359] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[360] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[361] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[362] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[363] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[364] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[365] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[366] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[367] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[368] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[369] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[370] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[371] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[372] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[373] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[374] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[375] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[376] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[377] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[378] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[379] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[380] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[381] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[382] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[383] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[384] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[385] -to "m2h2_tester:m2h2_tester_2|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[386] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[387] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[388] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[389] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[390] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[391] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[392] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[393] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[394] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[395] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[396] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[397] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[398] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[399] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[400] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[401] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[402] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[403] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[404] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[405] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[406] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[407] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[408] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[409] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[410] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[411] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[412] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[413] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[414] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[415] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[416] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[417] -to "m2h2_tester:m2h2_tester_2|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[418] -to "m2h2_tester:m2h2_tester_2|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[419] -to "m2h2_tester:m2h2_tester_2|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[420] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[421] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[422] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[423] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[424] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[425] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[426] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[427] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[428] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[429] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[430] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[431] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[432] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[433] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[434] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[435] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[436] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[437] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[438] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[439] -to "m2h2_tester:m2h2_tester_2|mem_rw_block_cnt[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[440] -to "m2h2_tester:m2h2_tester_2|test_done_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[441] -to "m2h2_tester:m2h2_tester_2|test_error_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[442] -to "m2h2_tester:m2h2_tester_2|test_error_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[443] -to "m2h2_tester:m2h2_tester_2|test_error_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[444] -to "m2h2_tester:m2h2_tester_2|test_error_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[445] -to "m2h2_tester:m2h2_tester_2|test_error_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[446] -to "m2h2_tester:m2h2_tester_2|test_error_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[447] -to "m2h2_tester:m2h2_tester_2|test_error_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[448] -to "m2h2_tester:m2h2_tester_2|test_error_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[449] -to "m2h2_tester:m2h2_tester_2|test_error_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[450] -to "m2h2_tester:m2h2_tester_2|test_error_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[451] -to "m2h2_tester:m2h2_tester_2|test_error_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[452] -to "m2h2_tester:m2h2_tester_2|test_error_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[453] -to "m2h2_tester:m2h2_tester_2|test_error_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[454] -to "m2h2_tester:m2h2_tester_2|test_error_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[455] -to "m2h2_tester:m2h2_tester_2|test_error_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[456] -to "m2h2_tester:m2h2_tester_2|test_error_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[457] -to "m2h2_tester:m2h2_tester_2|test_error_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[458] -to "m2h2_tester:m2h2_tester_2|test_error_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[459] -to "m2h2_tester:m2h2_tester_2|test_error_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[460] -to "m2h2_tester:m2h2_tester_2|test_error_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[461] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[462] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[463] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[464] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[465] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[466] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[467] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[468] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[469] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[470] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[471] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[472] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[473] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[474] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[475] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[476] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[477] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[478] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[479] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[480] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[481] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[482] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[483] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[484] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[485] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[486] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[487] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[488] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[489] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[490] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[491] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[492] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[493] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[494] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[495] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[496] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[497] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[498] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[499] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[500] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[501] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[502] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[503] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[504] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[505] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[506] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[507] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[508] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[509] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[510] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[511] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[512] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[513] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[514] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[515] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[516] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[517] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[518] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[519] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[520] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[521] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[522] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[523] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[524] -to "memory_to_hibi:memory_to_hibi_0|hibi_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[525] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[526] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[527] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[528] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[529] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[530] -to "memory_to_hibi:memory_to_hibi_0|hibi_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[531] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[532] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[533] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[534] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[535] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[536] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[537] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[538] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[539] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[540] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[541] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[542] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[543] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[544] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[545] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[546] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[547] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[548] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[549] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[550] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[551] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[552] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[553] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[554] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[555] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[556] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[557] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[558] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[559] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[560] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[561] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[562] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[563] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[564] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[565] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[566] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[567] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[568] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[569] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[570] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[571] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[572] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[573] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[574] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[575] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[576] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[577] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[578] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[579] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[580] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[581] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[582] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[583] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[584] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[585] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[586] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[587] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[588] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[589] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[590] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[591] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[592] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[593] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[594] -to "memory_to_hibi:memory_to_hibi_0|hibi_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[595] -to "memory_to_hibi:memory_to_hibi_0|hibi_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[596] -to "memory_to_hibi:memory_to_hibi_0|hibi_false_rd_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[597] -to "memory_to_hibi:memory_to_hibi_0|hibi_false_wr_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[598] -to "memory_to_hibi:memory_to_hibi_0|hibi_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[599] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[600] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[601] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[602] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[603] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[604] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[605] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[606] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[607] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[608] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[609] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[610] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[611] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[612] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[613] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[614] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[615] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[616] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[617] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[618] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[619] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[620] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[621] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[622] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[623] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[624] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[625] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[626] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[627] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[628] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[629] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[630] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[631] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[632] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[633] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[634] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[635] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[636] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[637] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[638] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[639] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[640] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[641] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[642] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[643] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[644] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[645] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[646] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[647] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[648] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[649] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[650] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[651] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[652] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[653] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[654] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[655] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[656] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[657] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[658] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[659] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[660] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[661] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[662] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[663] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[664] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[665] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[666] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[667] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[668] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_comm_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[669] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[670] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[671] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[672] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[673] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[674] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[675] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[676] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[677] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[678] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[679] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[680] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[681] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[682] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[683] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[684] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[685] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[686] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[687] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[688] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[689] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[690] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[691] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[692] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[693] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[694] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[695] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[696] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[697] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[698] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[699] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[700] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[701] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[702] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[703] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[704] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[705] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[706] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[707] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[708] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[709] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[710] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[711] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[712] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[713] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[714] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[715] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[716] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[717] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[718] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[719] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[720] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[721] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[722] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[723] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[724] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[725] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[726] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[727] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[728] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[729] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[730] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[731] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[732] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_data_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[733] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_empty_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[734] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_full_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[735] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[736] -to "memory_to_hibi:memory_to_hibi_0|hibi_msg_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[737] -to "memory_to_hibi:memory_to_hibi_0|hibi_re_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[738] -to "memory_to_hibi:memory_to_hibi_0|hibi_we_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[739] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[740] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[741] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[742] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[743] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[744] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[745] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[746] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_cnt_r[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[747] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_data_fifo_re_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[748] -to "memory_to_hibi:memory_to_hibi_0|hibi_wr_data_fifo_re_tmp" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[749] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[750] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[751] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[752] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[753] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[754] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[755] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[756] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[757] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[758] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[759] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[760] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[761] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[762] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[763] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[764] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[765] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[766] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[767] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[768] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[769] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[770] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[771] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[772] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[773] -to "memory_to_hibi:memory_to_hibi_0|mem_addr_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[774] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[775] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[776] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[777] -to "memory_to_hibi:memory_to_hibi_0|mem_be_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[778] -to "memory_to_hibi:memory_to_hibi_0|mem_init_done_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[779] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[780] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[781] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[782] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[783] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[784] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[785] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[786] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_cnt_r[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[787] -to "memory_to_hibi:memory_to_hibi_0|mem_rd_req_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[788] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[789] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[790] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[791] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[792] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[793] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[794] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[795] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[796] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[797] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[798] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[799] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[800] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[801] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[802] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[803] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[804] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[805] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[806] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[807] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[808] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[809] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[810] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[811] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[812] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[813] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[814] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[815] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[816] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[817] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[818] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[819] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_in[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[820] -to "memory_to_hibi:memory_to_hibi_0|mem_rdata_valid_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[821] -to "memory_to_hibi:memory_to_hibi_0|mem_ready_in" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[822] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[823] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[824] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[825] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[826] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[827] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[828] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[829] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[830] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[831] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[832] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[833] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[834] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[835] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[836] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[837] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[838] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[839] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[840] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[841] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[27]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[842] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[28]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[843] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[29]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[844] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[845] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[30]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[846] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[31]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[847] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[3]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[848] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[4]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[849] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[5]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[850] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[6]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[851] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[7]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[852] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[8]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[853] -to "memory_to_hibi:memory_to_hibi_0|mem_wdata_out[9]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[854] -to "memory_to_hibi:memory_to_hibi_0|mem_wr_req_out" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[855] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_empty_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[856] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_full_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[857] -to "memory_to_hibi:memory_to_hibi_0|rd_chan_reserve_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[858] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_re_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[859] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_re_tmp" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[860] -to "memory_to_hibi:memory_to_hibi_0|ret_addr_we_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[861] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[862] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[863] -to "memory_to_hibi:memory_to_hibi_0|rw_chan_conf_index[2]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[864] -to "memory_to_hibi:memory_to_hibi_0|rw_conf_done_r" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[865] -to test_start -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[866] -to test_started -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=867" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=867" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=2625" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=20587" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=26161" -section_id auto_signaltap_0
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to ddr2_dimm_odt[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to ddr2_dimm_cs_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to ddr2_dimm_cke[0]
3912,4 → 2153,5
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr2_dimm_odt[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr2_dimm_cs_n[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr2_dimm_cke[0]
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name MISC_FILE "D:/user/matilail/funbase/opencores_lib/trunk/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/ts/a2gx_hibi_mem_dma/ddr2_sodimm.dpf"
/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/ts/a2gx_hibi_mem_dma/ddr2_sodimm.dpf
2,250 → 2,50
 
<pin_planner>
<pin_info>
<pin name="clkin_bot_p" direction="Input" source="Hierarchy Database" diff_pair_node="clkin_bot_p(n)" >
<pin name="ddr2_dimm_clk[0]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_clk_n[0]" >
</pin>
<pin name="clkin_top_p" direction="Input" source="Hierarchy Database" diff_pair_node="clkin_top_p(n)" >
<pin name="ddr2_dimm_clk_n[0]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_clk[0]" >
</pin>
<pin name="ddr2_dimm_clk[1]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_clk_n[1]" >
<pin name="ddr2_dimm_dqs[0]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[0]" >
</pin>
<pin name="ddr2_dimm_clk[0]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_clk_n[0]" >
<pin name="ddr2_dimm_dqs[1]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[1]" >
</pin>
<pin name="ddr2_dimm_clk_n[1]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_clk[1]" >
<pin name="ddr2_dimm_dqs[2]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[2]" >
</pin>
<pin name="ddr2_dimm_clk_n[0]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_clk[0]" >
<pin name="ddr2_dimm_dqs[3]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[3]" >
</pin>
<pin name="ddr2_dimm_dqs[7]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[7]" >
<pin name="ddr2_dimm_dqs[4]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[4]" >
</pin>
<pin name="ddr2_dimm_dqs[6]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[6]" >
<pin name="ddr2_dimm_dqs[5]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[5]" >
</pin>
<pin name="ddr2_dimm_dqs[5]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[5]" >
<pin name="ddr2_dimm_dqs[6]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[6]" >
</pin>
<pin name="ddr2_dimm_dqs[4]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[4]" >
<pin name="ddr2_dimm_dqs[7]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs_n[7]" >
</pin>
<pin name="ddr2_dimm_dqs[3]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[3]" >
<pin name="ddr2_dimm_dqs_n[0]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[0]" >
</pin>
<pin name="ddr2_dimm_dqs[2]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[2]" >
<pin name="ddr2_dimm_dqs_n[1]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[1]" >
</pin>
<pin name="ddr2_dimm_dqs[1]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[1]" >
<pin name="ddr2_dimm_dqs_n[2]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[2]" >
</pin>
<pin name="ddr2_dimm_dqs[0]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs_n[0]" >
<pin name="ddr2_dimm_dqs_n[3]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[3]" >
</pin>
<pin name="ddr2_dimm_dqs_n[7]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[7]" >
<pin name="ddr2_dimm_dqs_n[4]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[4]" >
</pin>
<pin name="ddr2_dimm_dqs_n[6]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[6]" >
<pin name="ddr2_dimm_dqs_n[5]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[5]" >
</pin>
<pin name="ddr2_dimm_dqs_n[5]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[5]" >
<pin name="ddr2_dimm_dqs_n[6]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[6]" >
</pin>
<pin name="ddr2_dimm_dqs_n[4]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[4]" >
<pin name="ddr2_dimm_dqs_n[7]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_dqs[7]" >
</pin>
<pin name="ddr2_dimm_dqs_n[3]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[3]" >
</pin>
<pin name="ddr2_dimm_dqs_n[2]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[2]" >
</pin>
<pin name="ddr2_dimm_dqs_n[1]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[1]" >
</pin>
<pin name="ddr2_dimm_dqs_n[0]" direction="Bidir" source="Hierarchy Database" diff_pair_node="ddr2_dimm_dqs[0]" >
</pin>
<pin name="hsma_clk_in_p1" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_clk_in_p1(n)" >
</pin>
<pin name="hsma_clk_in_p2" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_clk_in_p2(n)" >
</pin>
<pin name="hsma_clk_out_p1" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_clk_out_p1(n)" >
</pin>
<pin name="hsma_clk_out_p2" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_clk_out_p2(n)" >
</pin>
<pin name="hsma_rx_d_p[16]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[16](n)" >
</pin>
<pin name="hsma_rx_d_p[15]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[15](n)" >
</pin>
<pin name="hsma_rx_d_p[14]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[14](n)" >
</pin>
<pin name="hsma_rx_d_p[13]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[13](n)" >
</pin>
<pin name="hsma_rx_d_p[12]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[12](n)" >
</pin>
<pin name="hsma_rx_d_p[11]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[11](n)" >
</pin>
<pin name="hsma_rx_d_p[10]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[10](n)" >
</pin>
<pin name="hsma_rx_d_p[9]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[9](n)" >
</pin>
<pin name="hsma_rx_d_p[8]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[8](n)" >
</pin>
<pin name="hsma_rx_d_p[7]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[7](n)" >
</pin>
<pin name="hsma_rx_d_p[6]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[6](n)" >
</pin>
<pin name="hsma_rx_d_p[5]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[5](n)" >
</pin>
<pin name="hsma_rx_d_p[4]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[4](n)" >
</pin>
<pin name="hsma_rx_d_p[3]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[3](n)" >
</pin>
<pin name="hsma_rx_d_p[2]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[2](n)" >
</pin>
<pin name="hsma_rx_d_p[1]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[1](n)" >
</pin>
<pin name="hsma_rx_d_p[0]" direction="Input" source="Hierarchy Database" diff_pair_node="hsma_rx_d_p[0](n)" >
</pin>
<pin name="hsma_tx_d_p[16]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[16](n)" >
</pin>
<pin name="hsma_tx_d_p[15]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[15](n)" >
</pin>
<pin name="hsma_tx_d_p[14]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[14](n)" >
</pin>
<pin name="hsma_tx_d_p[13]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[13](n)" >
</pin>
<pin name="hsma_tx_d_p[12]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[12](n)" >
</pin>
<pin name="hsma_tx_d_p[11]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[11](n)" >
</pin>
<pin name="hsma_tx_d_p[10]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[10](n)" >
</pin>
<pin name="hsma_tx_d_p[9]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[9](n)" >
</pin>
<pin name="hsma_tx_d_p[8]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[8](n)" >
</pin>
<pin name="hsma_tx_d_p[7]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[7](n)" >
</pin>
<pin name="hsma_tx_d_p[6]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[6](n)" >
</pin>
<pin name="hsma_tx_d_p[5]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[5](n)" >
</pin>
<pin name="hsma_tx_d_p[4]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[4](n)" >
</pin>
<pin name="hsma_tx_d_p[3]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[3](n)" >
</pin>
<pin name="hsma_tx_d_p[2]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[2](n)" >
</pin>
<pin name="hsma_tx_d_p[1]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[1](n)" >
</pin>
<pin name="hsma_tx_d_p[0]" direction="Output" source="Hierarchy Database" diff_pair_node="hsma_tx_d_p[0](n)" >
</pin>
<pin name="clkin_ref_q1_1_p" source="Assignments" diff_pair_node="clkin_ref_q1_1_p(n)" >
</pin>
<pin name="clkin_ref_q1_2_p" source="Assignments" diff_pair_node="clkin_ref_q1_2_p(n)" >
</pin>
<pin name="clkin_ref_q2_p" source="Assignments" diff_pair_node="clkin_ref_q2_p(n)" >
</pin>
<pin name="ddr3_ck_n" source="Assignments" diff_pair_node="ddr3_ck_p" >
</pin>
<pin name="ddr3_ck_p" source="Assignments" diff_pair_node="ddr3_ck_n" >
</pin>
<pin name="hsma_clk_in_p1(n)" direction="Input" source="Assignments" diff_pair_node="hsma_clk_in_p1" >
<pin name="ddr2_dimm_clk_n[1]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_clk[1]" >
</pin>
<pin name="hsma_clk_in_p2(n)" direction="Input" source="Assignments" diff_pair_node="hsma_clk_in_p2" >
<pin name="ddr2_dimm_clk[1]" direction="Bidir" source="Assignments" diff_pair_node="ddr2_dimm_clk_n[1]" >
</pin>
<pin name="hsma_clk_out_p1(n)" direction="Output" source="Assignments" diff_pair_node="hsma_clk_out_p1" >
</pin>
<pin name="hsma_clk_out_p2(n)" direction="Output" source="Assignments" diff_pair_node="hsma_clk_out_p2" >
</pin>
<pin name="hsma_rx_d_p[0](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[0]" >
</pin>
<pin name="hsma_rx_d_p[1](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[1]" >
</pin>
<pin name="hsma_rx_d_p[2](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[2]" >
</pin>
<pin name="hsma_rx_d_p[3](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[3]" >
</pin>
<pin name="hsma_rx_d_p[4](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[4]" >
</pin>
<pin name="hsma_rx_d_p[5](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[5]" >
</pin>
<pin name="hsma_rx_d_p[6](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[6]" >
</pin>
<pin name="hsma_rx_d_p[7](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[7]" >
</pin>
<pin name="hsma_rx_d_p[8](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[8]" >
</pin>
<pin name="hsma_rx_d_p[9](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[9]" >
</pin>
<pin name="hsma_rx_d_p[10](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[10]" >
</pin>
<pin name="hsma_rx_d_p[11](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[11]" >
</pin>
<pin name="hsma_rx_d_p[12](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[12]" >
</pin>
<pin name="hsma_rx_d_p[13](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[13]" >
</pin>
<pin name="hsma_rx_d_p[14](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[14]" >
</pin>
<pin name="hsma_rx_d_p[15](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[15]" >
</pin>
<pin name="hsma_rx_d_p[16](n)" direction="Input" source="Assignments" diff_pair_node="hsma_rx_d_p[16]" >
</pin>
<pin name="hsma_tx_d_p[0](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[0]" >
</pin>
<pin name="hsma_tx_d_p[1](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[1]" >
</pin>
<pin name="hsma_tx_d_p[2](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[2]" >
</pin>
<pin name="hsma_tx_d_p[3](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[3]" >
</pin>
<pin name="hsma_tx_d_p[4](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[4]" >
</pin>
<pin name="hsma_tx_d_p[5](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[5]" >
</pin>
<pin name="hsma_tx_d_p[6](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[6]" >
</pin>
<pin name="hsma_tx_d_p[7](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[7]" >
</pin>
<pin name="hsma_tx_d_p[8](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[8]" >
</pin>
<pin name="hsma_tx_d_p[9](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[9]" >
</pin>
<pin name="hsma_tx_d_p[10](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[10]" >
</pin>
<pin name="hsma_tx_d_p[11](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[11]" >
</pin>
<pin name="hsma_tx_d_p[12](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[12]" >
</pin>
<pin name="hsma_tx_d_p[13](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[13]" >
</pin>
<pin name="hsma_tx_d_p[14](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[14]" >
</pin>
<pin name="hsma_tx_d_p[15](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[15]" >
</pin>
<pin name="hsma_tx_d_p[16](n)" direction="Output" source="Assignments" diff_pair_node="hsma_tx_d_p[16]" >
</pin>
<pin name="pcie_refclk_p" source="Assignments" diff_pair_node="pcie_refclk_p(n)" >
</pin>
<pin name="pcie_refclk_p(n)" source="Assignments" diff_pair_node="pcie_refclk_p" >
</pin>
<pin name="ddr3_dqs_n" source="Assignments" diff_pair_node="ddr3_dqs_n(n)" >
</pin>
<pin name="ddr3_dqs_p" source="Assignments" diff_pair_node="ddr3_dqs_p(n)" >
</pin>
<pin name="clkin_155_p" source="Assignments" diff_pair_node="clkin_155_p(n)" >
</pin>
<pin name="hsma_rx_p" source="Assignments" diff_pair_node="hsma_rx_p(n)" >
</pin>
<pin name="hsma_tx_p" source="Assignments" diff_pair_node="hsma_tx_p(n)" >
</pin>
<pin name="hsmb_clk_out_p1" source="Assignments" diff_pair_node="hsmb_clk_out_p1(n)" >
</pin>
<pin name="hsmb_clk_out_p2" source="Assignments" diff_pair_node="hsmb_clk_out_p2(n)" >
</pin>
<pin name="hsmb_rx_d_p" source="Assignments" diff_pair_node="hsmb_rx_d_p(n)" >
</pin>
<pin name="hsmb_rx_p" source="Assignments" diff_pair_node="hsmb_rx_p(n)" >
</pin>
<pin name="hsmb_tx_d_p" source="Assignments" diff_pair_node="hsmb_tx_d_p(n)" >
</pin>
<pin name="hsmb_tx_p" source="Assignments" diff_pair_node="hsmb_tx_p(n)" >
</pin>
<pin name="pcie_rx_n" source="Assignments" diff_pair_node="pcie_rx_n(n)" >
</pin>
<pin name="pcie_rx_p" source="Assignments" diff_pair_node="pcie_rx_p(n)" >
</pin>
<pin name="pcie_tx_n" source="Assignments" diff_pair_node="pcie_tx_n(n)" >
</pin>
<pin name="pcie_tx_p" source="Assignments" diff_pair_node="pcie_tx_p(n)" >
</pin>
<pin name="clkin_bot_p(n)" direction="Input" source="Report Database" diff_pair_node="clkin_bot_p" >
</pin>
<pin name="clkin_top_p(n)" direction="Input" source="Report Database" diff_pair_node="clkin_top_p" >
</pin>
</pin_info>
<buses>
</buses>
/TUT/ip.hwp.storage/ddrx/hibi_mem_dma.comp/2.0/hdl/hibi_mem_dma.vhd
758,7 → 758,7
rw_conf_load_data_r(RW_CONF_STARTED_L) <= '1';
when "001" =>
rw_conf_load_data_r(RW_AMOUNT_U downto RW_AMOUNT_L) <= hibi_msg_rd_data_v(RW_AMOUNT_WIDTH-1 downto 0);
rw_conf_load_data_r(RW_MEM_BE_U downto RW_MEM_BE_L) <= hibi_msg_rd_data_v(RW_AMOUNT_WIDTH + MEM_BE_WIDTH - 1 downto RW_AMOUNT_WIDTH);
 
when "010" =>
rw_conf_load_data_r(RW_ADDR_INC_U downto RW_ADDR_INC_L) <= hibi_msg_rd_data_v(RW_ADDR_INC_WIDTH-1 downto 0);
rw_conf_load_data_r(RW_ADDR_INTERVAL_U downto RW_ADDR_INTERVAL_L) <= hibi_msg_rd_data_v(RW_ADDR_INC_WIDTH + RW_ADDR_INTERVAL_WIDTH - 1
/TUT/ip.hwp.storage/ddrx/a2_ddr2_dimm_1GB.comp/2.0/alt_ddr2_a2.comp.1.0.xml
1,5 → 1,5
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 13:53:05 ma marras 7 2011-->
<!--Created by Kactus 2 document generator 11:33:10 ti marras 8 2011-->
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>ip.hwp.storage</spirit:library>
15,92 → 15,180
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_init_done</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_WR_REQ_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_write_req</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RD_REQ_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_read_req</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_ADDR_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_address</spirit:name>
<spirit:vector>
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_READY_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_ready</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RDATA_VALID_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_rdata_valid</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_WDATA_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_wdata</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_RDATA_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_rdata</spirit:name>
<spirit:vector>
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BE_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_be</spirit:name>
<spirit:name>local_burstbegin</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BURST_BEGIN_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_burstbegin</spirit:name>
<spirit:name>local_size</spirit:name>
<spirit:vector>
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BURST_SIZE_TO_ALT_DDR2</spirit:name>
<spirit:name>MEM_INIT_DONE_FROM_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_size</spirit:name>
<spirit:name>local_init_done</spirit:name>
<spirit:vector>
<spirit:left>0</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>MEM_BE_TO_ALT_DDR2</spirit:name>
<spirit:vector>
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>local_be</spirit:name>
<spirit:vector>
<spirit:left>3</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:bitsInLau>8</spirit:bitsInLau>
<spirit:endianness>little</spirit:endianness>
310,6 → 398,9
<spirit:view>
<spirit:name>rtl</spirit:name>
<spirit:envIdentifier>vhdl::</spirit:envIdentifier>
<spirit:fileSetRef>
<spirit:localName>hdlSources</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
317,6 → 408,13
<spirit:name>aux_full_rate_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
323,6 → 421,13
<spirit:name>aux_half_rate_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
329,6 → 434,13
<spirit:name>dll_reference_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
339,6 → 451,13
<spirit:left>5</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
345,6 → 464,13
<spirit:name>global_reset_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
355,6 → 481,13
<spirit:left>24</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
365,6 → 498,13
<spirit:left>31</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
371,6 → 511,13
<spirit:name>local_burstbegin</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
377,6 → 524,13
<spirit:name>local_init_done</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
387,6 → 541,13
<spirit:left>255</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
393,6 → 554,13
<spirit:name>local_rdata_valid</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
399,6 → 567,13
<spirit:name>local_read_req</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
405,6 → 580,13
<spirit:name>local_ready</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
411,6 → 593,13
<spirit:name>local_refresh_ack</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
421,6 → 610,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
431,6 → 627,13
<spirit:left>255</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
437,6 → 640,13
<spirit:name>local_write_req</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
447,6 → 657,13
<spirit:left>13</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
457,6 → 674,13
<spirit:left>2</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
463,6 → 687,13
<spirit:name>mem_cas_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
469,6 → 700,13
<spirit:name>mem_cke</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
479,6 → 717,13
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
489,6 → 734,13
<spirit:left>1</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
495,6 → 747,13
<spirit:name>mem_cs_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
505,6 → 764,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
515,6 → 781,13
<spirit:left>63</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
525,6 → 798,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
535,6 → 815,13
<spirit:left>7</spirit:left>
<spirit:right>0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic_vector</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
541,6 → 828,13
<spirit:name>mem_odt</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
547,6 → 841,13
<spirit:name>mem_ras_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
553,6 → 854,13
<spirit:name>mem_we_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
559,6 → 867,13
<spirit:name>phy_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
565,6 → 880,13
<spirit:name>pll_ref_clk</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
571,6 → 893,13
<spirit:name>reset_phy_clk_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
577,6 → 906,13
<spirit:name>reset_request_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName spirit:constrained="false">std_logic</spirit:typeName>
<spirit:typeDefinition>IEEE.std_logic_1164.all</spirit:typeDefinition>
<spirit:viewNameRef></spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
583,6 → 919,13
<spirit:name>soft_reset_n</spirit:name>
<spirit:wire spirit:allLogicalDirectionsAllowed="false">
<spirit:direction>in</spirit:direction>
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