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URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

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Rev 86 → Rev 87

/trunk/TUT/soc/led_ase_mesh1_example/1.0/led_ase_mesh1_example.designcfg.1.0.xml File deleted
/trunk/TUT/soc/led_ase_mesh1_example/1.0/led_ase_mesh1_example.1.0.xml File deleted
/trunk/TUT/soc/led_ase_mesh1_example/1.0/led_ase_mesh1_example.design.1.0.xml File deleted
/trunk/TUT/soc/led_ase_mesh1_example/1.0/vhd/led_ase_mesh1_example.structural.vhd
0,0 → 1,268
-- ***************************************************
-- File: led_ase_mesh1_example.structural.vhd
-- Creation date: 05.12.2011
-- Creation time: 10:10:34
-- Description:
-- Created by: ege
-- This file was generated with Kactus2 vhdl generator.
-- ***************************************************
library IEEE;
library std;
library work;
use work.all;
use IEEE.std_logic_1164.all;
 
entity led_ase_mesh1_example is
 
port (
 
-- Interface: clk
clk_CLK : in std_logic;
 
-- Interface: led
led_gpio_out : out std_logic;
 
-- Interface: led_1
led_1_gpio_out : out std_logic;
 
-- Interface: reset
reset_RESETn : in std_logic;
 
-- Interface: switch
switch_gpio_out : in std_logic;
 
-- Interface: switch_1
switch_1_gpio_out : in std_logic);
 
end led_ase_mesh1_example;
 
 
architecture structural of led_ase_mesh1_example is
 
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_IN : std_logic_vector(1 downto 0);
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_OUT : std_logic_vector(1 downto 0);
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_IN : std_logic_vector(1 downto 0);
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_OUT : std_logic_vector(1 downto 0);
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_IN : std_logic_vector(1 downto 0);
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_OUT : std_logic_vector(1 downto 0);
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_IN : std_logic_vector(1 downto 0);
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_OUT : std_logic_vector(1 downto 0);
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_IN : std_logic_vector(31 downto 0);
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_OUT : std_logic_vector(31 downto 0);
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_IN : std_logic_vector(31 downto 0);
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_OUT : std_logic_vector(31 downto 0);
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_IN : std_logic_vector(31 downto 0);
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_OUT : std_logic_vector(31 downto 0);
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_IN : std_logic_vector(31 downto 0);
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_OUT : std_logic_vector(31 downto 0);
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_IN : std_logic;
signal led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_OUT : std_logic;
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_IN : std_logic;
signal led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_OUT : std_logic;
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_IN : std_logic;
signal switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_OUT : std_logic;
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_IN : std_logic;
signal switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_OUT : std_logic;
 
-- Top level for 2x2 32-bit ase_mesh1 NoC.
--
--
component ase_mesh1_top4
port (
 
-- Interface: clock
clk : in std_logic;
 
-- Interface: port0
cmd0_in : in std_logic_vector(1 downto 0);
data0_in : in std_logic_vector(31 downto 0);
stall0_in : in std_logic;
cmd0_out : out std_logic_vector(1 downto 0);
data0_out : out std_logic_vector(31 downto 0);
stall0_out : out std_logic;
 
-- Interface: port1
cmd1_in : in std_logic_vector(1 downto 0);
data1_in : in std_logic_vector(31 downto 0);
stall1_in : in std_logic;
cmd1_out : out std_logic_vector(1 downto 0);
data1_out : out std_logic_vector(31 downto 0);
stall1_out : out std_logic;
 
-- Interface: port2
cmd2_in : in std_logic_vector(1 downto 0);
data2_in : in std_logic_vector(31 downto 0);
stall2_in : in std_logic;
cmd2_out : out std_logic_vector(1 downto 0);
data2_out : out std_logic_vector(31 downto 0);
stall2_out : out std_logic;
 
-- Interface: port3
cmd3_in : in std_logic_vector(1 downto 0);
data3_in : in std_logic_vector(31 downto 0);
stall3_in : in std_logic;
cmd3_out : out std_logic_vector(1 downto 0);
data3_out : out std_logic_vector(31 downto 0);
stall3_out : out std_logic;
 
-- Interface: reset
rst_n : in std_logic
 
);
end component;
 
-- Inverts led output for evey data word received.
component led_pkt_codec_mk2
port (
 
-- Interface: clk
clk : in std_logic;
 
-- Interface: led
led_out : out std_logic;
 
-- Interface: pkt_codec_mk2
cmd_in : in std_logic_vector(1 downto 0);
data_in : in std_logic_vector(31 downto 0);
stall_in : in std_logic;
cmd_out : out std_logic_vector(1 downto 0);
data_out : out std_logic_vector(31 downto 0);
stall_out : out std_logic;
 
-- Interface: reset
rst_n : in std_logic
 
);
end component;
 
-- Sends a constant addr+data pair every time a switch is toggled.
component switch_pkt_codec_mk2
generic (
target_id_g : integer := 0 -- target_id in the noc
 
);
port (
 
-- Interface: clock
clk : in std_logic;
 
-- Interface: pkt_codec_mk2
cmd_in : in std_logic_vector(1 downto 0);
data_in : in std_logic_vector(31 downto 0);
stall_in : in std_logic;
cmd_out : out std_logic_vector(1 downto 0);
data_out : out std_logic_vector(31 downto 0);
stall_out : out std_logic;
 
-- Interface: reset
rst_n : in std_logic;
 
-- Interface: switch
switch_in : in std_logic
 
);
end component;
 
-- You can write vhdl code after this tag and it is saved through the generator.
-- ##KACTUS2_BLACK_BOX_DECLARATIONS_BEGIN##
-- ##KACTUS2_BLACK_BOX_DECLARATIONS_END##
-- Stop writing your code after this tag.
 
 
begin
 
-- You can write vhdl code after this tag and it is saved through the generator.
-- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_BEGIN##
-- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_END##
-- Stop writing your code after this tag.
 
ase_mesh1_top4_1 : ase_mesh1_top4
port map (
clk => clk_CLK,
cmd0_in(1 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_IN(1 downto 0),
cmd0_out(1 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_OUT(1 downto 0),
cmd1_in(1 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_IN(1 downto 0),
cmd1_out(1 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_OUT(1 downto 0),
cmd2_in(1 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_IN(1 downto 0),
cmd2_out(1 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_OUT(1 downto 0),
cmd3_in(1 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_IN(1 downto 0),
cmd3_out(1 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_OUT(1 downto 0),
data0_in(31 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_IN(31 downto 0),
data0_out(31 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_OUT(31 downto 0),
data1_in(31 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_IN(31 downto 0),
data1_out(31 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_OUT(31 downto 0),
data2_in(31 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_IN(31 downto 0),
data2_out(31 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_OUT(31 downto 0),
data3_in(31 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_IN(31 downto 0),
data3_out(31 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_OUT(31 downto 0),
rst_n => reset_RESETn,
stall0_in => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_IN,
stall0_out => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_OUT,
stall1_in => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_IN,
stall1_out => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_OUT,
stall2_in => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_IN,
stall2_out => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_OUT,
stall3_in => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_IN,
stall3_out => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_OUT
);
 
led_pkt_codec_mk2_1 : led_pkt_codec_mk2
port map (
clk => clk_CLK,
cmd_in(1 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_OUT(1 downto 0),
cmd_out(1 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_IN(1 downto 0),
data_in(31 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_OUT(31 downto 0),
data_out(31 downto 0) => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_IN(31 downto 0),
led_out => led_1_gpio_out,
rst_n => reset_RESETn,
stall_in => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_OUT,
stall_out => led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_IN
);
 
led_pkt_codec_mk2_2 : led_pkt_codec_mk2
port map (
clk => clk_CLK,
cmd_in(1 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_OUT(1 downto 0),
cmd_out(1 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_IN(1 downto 0),
data_in(31 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_OUT(31 downto 0),
data_out(31 downto 0) => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_IN(31 downto 0),
led_out => led_gpio_out,
rst_n => reset_RESETn,
stall_in => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_OUT,
stall_out => led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_IN
);
 
switch_pkt_codec_mk2_1 : switch_pkt_codec_mk2
generic map (
target_id_g => 0
)
port map (
clk => clk_CLK,
cmd_in(1 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_OUT(1 downto 0),
cmd_out(1 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_IN(1 downto 0),
data_in(31 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_OUT(31 downto 0),
data_out(31 downto 0) => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_IN(31 downto 0),
rst_n => reset_RESETn,
stall_in => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_OUT,
stall_out => switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_IN,
switch_in => switch_gpio_out
);
 
switch_pkt_codec_mk2_2 : switch_pkt_codec_mk2
generic map (
target_id_g => 1
)
port map (
clk => clk_CLK,
cmd_in(1 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_OUT(1 downto 0),
cmd_out(1 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_IN(1 downto 0),
data_in(31 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_OUT(31 downto 0),
data_out(31 downto 0) => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_IN(31 downto 0),
rst_n => reset_RESETn,
stall_in => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_OUT,
stall_out => switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_IN,
switch_in => switch_1_gpio_out
);
 
end structural;
 
/trunk/TUT/soc/led_ase_mesh1_example/1.0/quartus/pinmap_cyclone_2_EP2C35F672C6.qsf
0,0 → 1,12
 
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
 
set_location_assignment PIN_N25 -to switch_gpio_out
set_location_assignment PIN_N26 -to switch_1_gpio_out
set_location_assignment PIN_AF23 -to led_gpio_out
set_location_assignment PIN_AE23 -to led_1_gpio_out
 
set_location_assignment PIN_N2 -to clk_CLK
set_location_assignment PIN_V2 -to reset_RESETn
/trunk/TUT/soc/led_ase_mesh1_example/1.0/ip_xact/led_ase_mesh1_example.1.0.xml
0,0 → 1,301
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 10:30:34 05.12.2011-->
<spirit:component xmlns:kactus2="http://funbase.cs.tut.fi/" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
<spirit:name>led_ase_mesh1_example</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.busdef" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="clock.absDef" spirit:version="1.0"/>
<spirit:slave/>
<spirit:connectionRequired>false</spirit:connectionRequired>
<spirit:portMaps>
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<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk_CLK</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
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<spirit:portMap>
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<spirit:portMap>
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<spirit:busType spirit:vendor="TUT" spirit:library="ip.hwp.interface" spirit:name="gpio_1bit" spirit:version="1.0"/>
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/trunk/TUT/soc/led_ase_mesh1_example/1.0/ip_xact/led_ase_mesh1_example.design.1.0.xml
0,0 → 1,389
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<kactus2:position x="430" y="360"/>
</kactus2:route>
<kactus2:route kactus2:connRef="switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2">
<kactus2:position x="330" y="150"/>
<kactus2:position x="420" y="150"/>
<kactus2:position x="420" y="150"/>
<kactus2:position x="430" y="150"/>
</kactus2:route>
<kactus2:route kactus2:connRef="led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1">
<kactus2:position x="690" y="260"/>
<kactus2:position x="600" y="260"/>
<kactus2:position x="600" y="260"/>
<kactus2:position x="590" y="260"/>
</kactus2:route>
<kactus2:route kactus2:connRef="led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0">
<kactus2:position x="690" y="140"/>
<kactus2:position x="600" y="140"/>
<kactus2:position x="600" y="140"/>
<kactus2:position x="590" y="140"/>
</kactus2:route>
</kactus2:routes>
</spirit:vendorExtensions>
</spirit:design>
/trunk/TUT/soc/led_ase_mesh1_example/1.0/ip_xact/led_ase_mesh1_example.designcfg.1.0.xml
0,0 → 1,29
<?xml version="1.0" encoding="UTF-8"?>
<!--Created by Kactus 2 document generator 11:36:46 02.12.2011-->
<spirit:designConfiguration xmlns:kactus2="http://funbase.cs.tut.fi/" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.5/index.xsd">
<spirit:vendor>TUT</spirit:vendor>
<spirit:library>soc</spirit:library>
<spirit:name>led_ase_mesh1_example.designcfg</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:designRef spirit:vendor="TUT" spirit:library="soc" spirit:name="led_ase_mesh1_example.design" spirit:version="1.0"/>
<spirit:viewConfiguration>
<spirit:instanceName>ase_mesh1_top4_1</spirit:instanceName>
<spirit:viewName>hdl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>led_pkt_codec_mk2_1</spirit:instanceName>
<spirit:viewName>hdl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>led_pkt_codec_mk2_2</spirit:instanceName>
<spirit:viewName>hdl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>switch_pkt_codec_mk2_1</spirit:instanceName>
<spirit:viewName>hdl</spirit:viewName>
</spirit:viewConfiguration>
<spirit:viewConfiguration>
<spirit:instanceName>switch_pkt_codec_mk2_2</spirit:instanceName>
<spirit:viewName>hdl</spirit:viewName>
</spirit:viewConfiguration>
</spirit:designConfiguration>
/trunk/TUT/soc/led_ase_mesh1_example/1.0/sim/create_makefile
0,0 → 1,34
# Script compiles all vhdl-files and generates a makefile for them
# This script is tested for Modelsim version 6.6a
 
.main clear
 
echo " Generating libraries for files"
echo " Adding library work"
vlib work
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.interface/led_pkt_codec_mk2/1.0/vhd/led_pkt_codec_mk2.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/ase_noc_pkg.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/ase_dring1_pkg.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/ase_mesh1_pkg.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/log2_pkg.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/fifo_mk2/1.0/vhd/ram_1clk.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.storage/fifos/fifo_mk2/1.0/vhd/fifo_2clk.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/addr_gen.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/addr_lut.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/addr_rip.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/addr_translation.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/cdc.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/pkt_codec_mk2/1.0/vhd/pkt_codec_mk2.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/ase_mesh1/1.0/vhd/ase_mesh1_router.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/ase_mesh1/1.0/vhd/ase_mesh1.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/ase_mesh1/1.0/vhd/ase_mesh1_pkt_codec.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.communication/ase_mesh1/1.0/vhd/ase_mesh1_top4.vhd
vcom -quiet -check_synthesis D:/user/ege/Svn/daci_ip/trunk/ip.hwp.interface/switch_pkt_codec_mk2/1.0/vhd/switch_pkt_codec_mk2.vhd
vcom -quiet -check_synthesis -work work D:/user/ege/Svn/daci_ip/trunk/soc/led_ase_mesh1_example/1.0/vhd/led_ase_mesh1_example.structural.vhd
 
echo " Creating a new Makefile"
 
# remove the old makefile
rm -f Makefile
vmake Makefile
echo " Script has been executed "
/trunk/TUT/soc/led_ase_mesh1_example/1.0/sim/sim.do
0,0 → 1,43
#
# Runs the simulation.
# Uses "force" command to toggle the switch signals a couple of times.
#
# Erno Salminen, Decemeber 2011
 
.main clear
#vsim -novopt work.led_ase_mesh1_example
vsim work.led_ase_mesh1_example
do all_waves.do
 
# Reset and initialize
force /clk_CLK 1 0, 0 10 -repeat 20
force /reset_RESETn 0 0, 1 50
force /switch_gpio_out 0 0
force /switch_1_gpio_out 0 0
run 600
 
 
# Toggle the switch1
# Led output gets inverted in about dozen clk cycles
force /switch_1_gpio_out 1 0, 0 50
run 600
force /switch_1_gpio_out 1 0, 0 50
run 600
force /switch_1_gpio_out 1 0, 0 50
run 800
 
 
# Toggle the other switch
force /switch_gpio_out 1 0, 0 50
run 600
force /switch_gpio_out 1 0, 0 50
run 600
force /switch_gpio_out 1 0, 0 50
run 800
 
 
# Toggle both switches
force /switch_gpio_out 1 0, 0 50
force /switch_1_gpio_out 1 0, 0 50
run 600
 
/trunk/TUT/soc/led_ase_mesh1_example/1.0/sim/all_waves.do
0,0 → 1,50
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /led_ase_mesh1_example/clk_CLK
add wave -noupdate /led_ase_mesh1_example/reset_RESETn
add wave -noupdate /led_ase_mesh1_example/switch_gpio_out
add wave -noupdate /led_ase_mesh1_example/switch_1_gpio_out
add wave -noupdate /led_ase_mesh1_example/led_gpio_out
add wave -noupdate /led_ase_mesh1_example/led_1_gpio_out
add wave -noupdate -divider Noc
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_IN
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0CMD_OUT
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_IN
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1CMD_OUT
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_IN
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2CMD_OUT
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_IN
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3CMD_OUT
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_IN
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0DATA_OUT
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_IN
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1DATA_OUT
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_IN
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2DATA_OUT
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_IN
add wave -noupdate -radix hexadecimal /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3DATA_OUT
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_IN
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port0STALL_OUT
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_IN
add wave -noupdate /led_ase_mesh1_example/led_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port1STALL_OUT
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_IN
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_1_pkt_codec_mk2_to_ase_mesh1_top4_1_port2STALL_OUT
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_IN
add wave -noupdate /led_ase_mesh1_example/switch_pkt_codec_mk2_2_pkt_codec_mk2_to_ase_mesh1_top4_1_port3STALL_OUT
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {0 ns} 0}
configure wave -namecolwidth 604
configure wave -valuecolwidth 40
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ms
update
WaveRestoreZoom {0 ns} {4624 ns}

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