URL
https://opencores.org/ocsvn/genesys_ddr2/genesys_ddr2/trunk
Subversion Repositories genesys_ddr2
Compare Revisions
- This comparison shows the changes necessary to convert path
/genesys_ddr2/trunk/bench
- from Rev 2 to Rev 3
- ↔ Reverse comparison
Rev 2 → Rev 3
/Xilinx_MIG_bench/sim/ddr2_tb_test_gen.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_user_if_top.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_tb_test_cmp.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_tb_test_data_gen.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_tb_test_addr_gen.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_tb_top.v
File deleted
/Xilinx_MIG_bench/sim/ddr2_adr_data_gen.v
File deleted
Xilinx_MIG_bench/sim
Property changes :
Deleted: bugtraq:number
## -1 +0,0 ##
-true
\ No newline at end of property
Index: Xilinx_MIG_bench
===================================================================
--- Xilinx_MIG_bench (revision 2)
+++ Xilinx_MIG_bench (nonexistent)
Xilinx_MIG_bench
Property changes :
Deleted: bugtraq:number
## -1 +0,0 ##
-true
\ No newline at end of property