URL
https://opencores.org/ocsvn/ha1588/ha1588/trunk
Subversion Repositories ha1588
Compare Revisions
- This comparison shows the changes necessary to convert path
/ha1588/trunk/sim/rtc
- from Rev 37 to Rev 38
- ↔ Reverse comparison
Rev 37 → Rev 38
/rtc_timer_tb.v
1,5 → 1,5
/* |
* $rtc_timer_tb.v |
* rtc_timer_tb.v |
* |
* Copyright (c) 2012, BABY&HW. All rights reserved. |
* |
25,11 → 25,11
|
reg rst; |
reg clk; |
wire adj_ld_done; |
wire [37:0] time_reg_ns; |
wire [47:0] time_reg_sec; |
reg period_ld; |
reg [39:0] period_in; |
reg [37:0] time_acc_modulo; |
reg adj_ld; |
reg [31:0] adj_ld_data; |
reg [39:0] period_adj; |
45,12 → 45,14
.time_reg_sec_in (time_reg_sec_in ) , |
.time_reg_ns (time_reg_ns ) , |
.time_reg_sec (time_reg_sec ) , |
.time_ptp_ns ( ) , |
.time_ptp_sec ( ) , |
.period_ld (period_ld ) , |
.period_in (period_in ) , |
.time_acc_modulo (time_acc_modulo ) , |
.adj_ld (adj_ld ) , |
.period_adj (period_adj ) , |
.adj_ld_data (adj_ld_data ) ); |
.adj_ld_data (adj_ld_data ) , |
.adj_ld_done ( ) ); |
|
|
initial begin |
81,7 → 83,6
period_ld = 1'b0; |
period_in[39:32] = 8'h00; // ns |
period_in[31: 0] = 32'h00000000; // ns fraction |
time_acc_modulo = 38'd256_000000000; |
// time load |
time_ld = 1'b0; |
time_reg_ns_in[37:8] = 30'd0; // ns |
142,7 → 143,6
end |
|
// sec+ns watchpoint |
wire [29:0] time_acc_modulo_ns_ = time_acc_modulo[37:8]; |
wire [47:0] time_reg_sec_in_ = time_reg_sec_in[47:0]; |
wire [29:0] time_reg_ns_in_ = time_reg_ns_in[37:8]; |
wire [47:0] time_reg_sec_ = time_reg_sec[47:0]; |
151,7 → 151,6
wire [ 7:0] period_adj_ns_ = period_adj[39:32]; |
wire time_reg_sec_inc_ = DUT.time_acc_48s_inc; |
// ns fraction watchpoint |
wire [ 7:0] time_acc_modulo_ns_f = time_acc_modulo[7:0]; |
wire [ 7:0] time_reg_ns_in_f = time_reg_ns_in[7:0]; |
wire [ 7:0] time_reg_ns_f = time_reg_ns[7:0]; |
wire [31:0] period_ns_f = period_in[31:0]; |
165,7 → 164,7
time_reg_ns__d1 <= time_reg_ns_; |
end |
wire [29:0] time_reg_ns__delta = (time_reg_sec__d1!=time_reg_sec_)? |
(time_acc_modulo_ns_-(time_reg_ns__d1-time_reg_ns_)): |
(DUT.time_acc_modulo/256-(time_reg_ns__d1-time_reg_ns_)): |
(time_reg_ns_-time_reg_ns__d1); |
|
// Delta-Sigma circuit watchpoint |
/wave.do
11,7 → 11,6
add wave -noupdate -format Logic /rtc_timer_tb/period_ld |
add wave -noupdate -format Literal /rtc_timer_tb/period_in |
add wave -noupdate -divider {1s modulo} |
add wave -noupdate -format Literal /rtc_timer_tb/time_acc_modulo |
add wave -noupdate -divider {time adjustment} |
add wave -noupdate -format Logic /rtc_timer_tb/adj_ld |
add wave -noupdate -format Literal /rtc_timer_tb/adj_ld_data |
23,6 → 22,7
add wave -noupdate -divider {INTERNAL Signals} |
add wave -noupdate -divider {precise time control} |
add wave -noupdate -format Literal -radix hexadecimal /rtc_timer_tb/DUT/adj_cnt |
add wave -noupdate -format Logic /rtc_timer_tb/DUT/adj_ld_done |
add wave -noupdate -format Literal -radix hexadecimal /rtc_timer_tb/DUT/time_adj |
add wave -noupdate -divider Delta-Sigma |
add wave -noupdate -format Literal /rtc_timer_tb/DUT/time_adj_08n_32f |
30,7 → 30,6
add wave -noupdate -format Literal /rtc_timer_tb/DUT/time_adj_00n_24f |
add wave -noupdate -divider {WATCHPOINT Signals} |
add wave -noupdate -divider {ns and sec} |
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/time_acc_modulo_ns_ |
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/time_reg_ns__delta |
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/time_reg_sec_in_ |
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/time_reg_ns_in_ |
40,7 → 39,6
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/period_ns_ |
add wave -noupdate -format Literal -radix unsigned /rtc_timer_tb/period_adj_ns_ |
add wave -noupdate -divider {ns fraction} |
add wave -noupdate -format Literal /rtc_timer_tb/time_acc_modulo_ns_f |
add wave -noupdate -format Literal /rtc_timer_tb/time_reg_ns_in_f |
add wave -noupdate -format Literal /rtc_timer_tb/time_reg_ns_f |
add wave -noupdate -format Literal /rtc_timer_tb/period_ns_f |
49,7 → 47,7
add wave -noupdate -divider {New Divider} |
add wave -noupdate -divider {New Divider} |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {533 ns} 0} |
WaveRestoreCursors {{Cursor 1} {476 ns} 0} |
configure wave -namecolwidth 222 |
configure wave -valuecolwidth 100 |
configure wave -justifyvalue left |
64,4 → 62,4
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {476 ns} {632 ns} |
WaveRestoreZoom {0 ns} {2100 ns} |
/sim.do
1,5 → 1,5
vlib work |
vlog -work work ../../rtl/rtc/rtc.v |
vlog -work work ../../rtl/rtc/rtc.v +initreg+0 |
vlog -work work rtc_timer_tb.v |
vsim -novopt work.rtc_timer_tb |
|