URL
https://opencores.org/ocsvn/ha1588/ha1588/trunk
Subversion Repositories ha1588
Compare Revisions
- This comparison shows the changes necessary to convert path
/ha1588/trunk/sim/top/ptp_drv_bfm
- from Rev 23 to Rev 24
- ↔ Reverse comparison
Rev 23 → Rev 24
/ptp_drv_bfm.c
32,7 → 32,7
cpu_data_i = 0x0; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x10; |
cpu_data_i = 0xA10; |
cpu_wr(cpu_addr_i, cpu_data_i); |
// LOAD RTC SEC AND NS |
cpu_addr_i = 0x00000010; |
76,7 → 76,11
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x1; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_rd(cpu_addr_i, &cpu_data_o); |
do { |
cpu_addr_i = 0x00000000; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
//printf("%08x\n", (cpu_data_o & 0x1)); |
} while ((cpu_data_o & 0x1) == 0x0); |
cpu_addr_i = 0X00000040; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
cpu_addr_i = 0X00000044; |
92,7 → 96,11
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x1; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_rd(cpu_addr_i, &cpu_data_o); |
do { |
cpu_addr_i = 0x00000000; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
//printf("%08x\n", (cpu_data_o & 0x1)); |
} while ((cpu_data_o & 0x1) == 0x0); |
cpu_addr_i = 0X00000040; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
cpu_addr_i = 0X00000044; |
102,6 → 110,50
cpu_addr_i = 0X0000004C; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
|
int i; |
// POLL TSU RX STATUS |
int rx_queue_num; |
do { |
cpu_addr_i = 0x00000004; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
rx_queue_num = cpu_data_o; |
//printf("%08x\n", rx_queue_num); |
} while (!(rx_queue_num > 0x2)); |
// READ TSU RX FIFO |
for (i=rx_queue_num; i>=0; i--) { |
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x0; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x400; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_addr_i = 0x00000050; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
cpu_addr_i = 0x00000054; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
} |
// POLL TSU TX STATUS |
int tx_queue_num; |
do { |
cpu_addr_i = 0x00000008; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
tx_queue_num = cpu_data_o; |
//printf("%08x\n", tx_queue_num); |
} while (!(tx_queue_num > 0x2)); |
// READ TSU TX FIFO |
for (i=tx_queue_num; i>=0; i--) { |
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x0; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_addr_i = 0x00000000; |
cpu_data_i = 0x100; |
cpu_wr(cpu_addr_i, cpu_data_i); |
cpu_addr_i = 0x00000058; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
cpu_addr_i = 0x0000005C; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
} |
|
// READ BACK ALL REGISTERS |
for (;;) |
{ |
108,10 → 160,10
int t; |
for (t=0; t<=0x5c; t=t+4) |
{ |
cpu_hd(10); |
|
cpu_addr_i = t; |
cpu_rd(cpu_addr_i, &cpu_data_o); |
|
cpu_hd(10); |
} |
} |
|
/ptp_drv_bfm.v
46,6 → 46,7
up_addr_o = addr; |
up_rd_o = 1'b0; |
for (i=0; i<2; i=i+1) @(posedge up_clk); |
data = up_data_rd; |
//$display("rd %08x %08x", addr, data); |
endtask |
|