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Tools

URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

Compare Revisions

This comparison shows the changes necessary to convert path
```
/ha1588
```
from Rev 28 to Rev 29
↔ Reverse comparison
Compare Path: Rev

With Path: Rev

Rev 28 → Rev 29

/trunk/rtl/tsu/tsu.v

159,6 → 159,30

   end
 end
+reg [31:0] int_data_d1;
+reg        int_valid_d1;
+reg        int_sop_d1;
+reg        int_eop_d1;
+reg [ 1:0] int_mod_d1;
+always @(posedge rst or posedge gmii_clk) begin
+  if (rst) begin
+    int_data_d1  <= 32'h00000000;
+    int_valid_d1 <= 1'b0;
+    int_sop_d1   <= 1'b0;
+    int_eop_d1   <= 1'b0;
+    int_mod_d1   <= 2'b00;
+  end
+  else begin
+    if (int_valid) begin
+      int_data_d1  <= int_data;
+      int_mod_d1   <= int_mod;
+    end
+      int_valid_d1 <= int_valid;
+      int_sop_d1   <= int_sop;
+      int_eop_d1   <= int_eop;
+  end
+end
 // ptp packet parser here
 // works at 1/4 gmii_clk frequency, needs multicycle timing constraint
 wire        ptp_found;

166,11 → 190,11

 ptp_parser parser(
   .clk(gmii_clk),
   .rst(rst),
-  .int_data(int_data),
-  .int_valid(int_valid),
-  .int_sop(int_sop),
-  .int_eop(int_eop),
-  .int_mod(int_mod),
+  .int_data(int_data_d1),
+  .int_valid(int_valid_d1),
+  .int_sop(int_sop_d1),
+  .int_eop(int_eop_d1),
+  .int_mod(int_mod_d1),
   .ptp_found(ptp_found),
   .ptp_infor(ptp_infor)
 );

177,7 → 201,7

 // ptp time stamp dcfifo
 wire q_wr_clk = gmii_clk;
-wire q_wr_en = ptp_found;
+wire q_wr_en = ptp_found && int_eop_d1;
 wire [63:0] q_wr_data = {ptp_infor, 8'd0, gmii_time_stamp};  // 20+8+36 bit
 wire [3:0] q_wrusedw;
 wire [3:0] q_rdusedw;

/trunk/rtl/tsu/ptp_parser.v

13,29 → 13,18

 );
 reg [31:0] int_data_d1;
-reg        int_valid_d1;
-reg        int_sop_d1;
-reg        int_eop_d1;
-reg [ 1:0] int_mod_d1;
 always @(posedge rst or posedge clk) begin
   if (rst) begin
     int_data_d1  <= 32'h00000000;
-    int_valid_d1 <= 1'b0;
-    int_sop_d1   <= 1'b0;
-    int_eop_d1   <= 1'b0;
-    int_mod_d1   <= 2'b00;
   end
   else begin
     if (int_valid) begin
       int_data_d1  <= int_data;
-      int_mod_d1   <= int_mod;
     end
-      int_valid_d1 <= int_valid;
-      int_sop_d1   <= int_sop;
-      int_eop_d1   <= int_eop;
   end
 end
+// packet parser: counter
 reg [ 9:0] int_cnt, bypass_ipv4_cnt, bypass_ipv6_cnt, bypass_udp_cnt, ptp_cnt;
 reg bypass_vlan, ptp_l2, bypass_ipv4, bypass_ipv6, found_udp, bypass_udp, ptp_l4, ptp_event;
 reg [ 3:0] ptp_msgid;

48,28 → 37,34

     bypass_udp_cnt <= 10'd0;
   end
   else begin
-    if (int_valid_d1 && int_sop_d1)
+    if (int_valid && int_sop)
       int_cnt <= 10'd0;
-    else if (int_valid_d1)
+    else if (int_valid)
       int_cnt <= int_cnt + 10'd1 - bypass_vlan - (bypass_ipv4 || bypass_ipv6 || bypass_udp);
-    if (int_valid_d1 && int_sop_d1)
+    if (int_valid && int_sop)
       bypass_ipv4_cnt <= 10'd0;
-    else if (int_valid_d1 && bypass_ipv4)
+    else if (int_valid && bypass_ipv4)
       bypass_ipv4_cnt <= bypass_ipv4_cnt + 10'd1;
-    if (int_valid_d1 && int_sop_d1)
+    if (int_valid && int_sop)
       bypass_ipv6_cnt <= 10'd0;
-    else if (int_valid_d1 && bypass_ipv6)
+    else if (int_valid && bypass_ipv6)
       bypass_ipv6_cnt <= bypass_ipv6_cnt + 10'd1;
-    if (int_valid_d1 && int_sop_d1)
+    if (int_valid && int_sop)
       bypass_udp_cnt <= 10'd0;
-    else if (int_valid_d1 && bypass_udp)
+    else if (int_valid && bypass_udp)
       bypass_udp_cnt <= bypass_udp_cnt + 10'd1;
+    if (int_valid && int_sop)
+      ptp_cnt <= 10'd0;
+    else if (int_valid && (ptp_l2 || (bypass_udp_cnt>=10'd2 && ptp_l4)))
+      ptp_cnt <= ptp_cnt + 10'd1;
   end
 end
+// packet parser: comparator
 always @(posedge rst or posedge clk) begin
   if (rst) begin
     bypass_vlan  <= 1'b0;

81,7 → 76,7

     ptp_l4    <= 1'b0;
     ptp_event <= 1'b0;
   end
-  else if (int_valid_d1 && int_sop_d1) begin
+  else if (int_valid && int_sop) begin
     bypass_vlan  <= 1'b0;
     bypass_ipv4  <= 1'b0;
     bypass_ipv6  <= 1'b0;

93,116 → 88,102

   end
   else begin
     // bypass vlan
-    // ether_type == cvlan
-    if      (int_valid_d1 && int_cnt==10'd3 && int_data_d1[31:16]==16'h8100)
+    if      (int_valid && int_cnt==10'd3 && int_data[31:16]==16'h8100)  // ether_type == cvlan
       bypass_vlan <= 1'b1;
-    // ether_type == svlan
-    else if (int_valid_d1 && int_cnt==10'd3 && int_data_d1[31:16]==16'h9100)
+    else if (int_valid && int_cnt==10'd3 && int_data[31:16]==16'h9100)  // ether_type == svlan
       bypass_vlan <= 1'b1;
-    else if (int_valid_d1 && int_cnt==10'd4 && int_data_d1[31:16]==16'h8100 && bypass_vlan)
+    else if (int_valid && int_cnt==10'd4 && int_data[31:16]==16'h8100 && bypass_vlan)  // svlan_type == cvlan
       bypass_vlan <= 1'b1;
-    else if (int_valid_d1 && bypass_vlan)
+    else if (int_valid && bypass_vlan)
       bypass_vlan <= 1'b0;
     // bypass ipv4
-    // ether_type == ip, ip_version == 4
-    if      (int_valid_d1 && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && bypass_ipv4_cnt==10'd0 &&
-             int_data_d1[31:16]==16'h0800 && int_data_d1[15:12]==4'h4)
+    if      (int_valid && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && bypass_ipv4_cnt==10'd0 &&
+             int_data[31:16]==16'h0800 && int_data[15:12]==4'h4)  // ether_type == ipv4, ip_version == 4
       bypass_ipv4 <= 1'b1;
-    else if (int_valid_d1 && bypass_ipv4_cnt==10'd4)
+    else if (int_valid && bypass_ipv4_cnt==10'd4)
       bypass_ipv4 <= 1'b0;
     // bypass ipv6
-    // ether_type == ip, ip_version == 6
-    if      (int_valid_d1 && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && bypass_ipv6_cnt==10'd0 &&
-             int_data_d1[31:16]==16'h86dd && int_data_d1[15:12]==4'h6)
+    if      (int_valid && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && bypass_ipv6_cnt==10'd0 &&
+             int_data[31:16]==16'h86dd && int_data[15:12]==4'h6)  // ether_type == ipv6, ip_version == 6
       bypass_ipv6 <= 1'b1;
-    else if (int_valid_d1 && bypass_ipv6_cnt==10'd9)
+    else if (int_valid && bypass_ipv6_cnt==10'd9)
       bypass_ipv6 <= 1'b0;
     // check if it is UDP
-    // ipv4_protocol == udp
-    if      (int_valid_d1 && bypass_ipv4_cnt==10'd1 && int_data_d1[ 7: 0]== 8'h11)
+    if      (int_valid && bypass_ipv4_cnt==10'd1 && int_data[ 7: 0]== 8'h11)  // ipv4_protocol == udp
       found_udp <= 1'b1;
-    // ipv6_protocol == udp
-    else if (int_valid_d1 && bypass_ipv6_cnt==10'd1 && int_data_d1[31:24]== 8'h11)
+    else if (int_valid && bypass_ipv6_cnt==10'd1 && int_data[31:24]== 8'h11)  // ipv6_protocol == udp
       found_udp <= 1'b1;
     // bypass udp
-    // ipv4_udp
-    if      (int_valid_d1 && bypass_ipv4_cnt==10'd4 && bypass_udp_cnt==10'd0 && found_udp)
+    if      (int_valid && bypass_ipv4_cnt==10'd4 && bypass_udp_cnt==10'd0 && found_udp)  // ipv4_udp
       bypass_udp <= 1'b1;
-    else if (int_valid_d1 && bypass_udp_cnt==10'd2)
-      bypass_udp <= 1'b0;
-    // ipv6_udp
-    else if (int_valid_d1 && bypass_ipv6_cnt==10'd9 && bypass_udp_cnt==10'd0 && found_udp)
+    else if (int_valid && bypass_ipv6_cnt==10'd9 && bypass_udp_cnt==10'd0 && found_udp)  // ipv6_udp
       bypass_udp <= 1'b1;
-    else if (int_valid_d1 && bypass_udp_cnt==10'd2)
+    else if (int_valid && bypass_udp_cnt==10'd2)
       bypass_udp <= 1'b0;
     // check if it is L2 PTP
-    // ether_type == ptp
-    if (int_valid_d1 && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && int_data_d1[31:16]==16'h88F7)
+    if (int_valid && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && int_data[31:16]==16'h88F7)  // ether_type == ptp
       ptp_l2 <= 1'b1;
     // check if it is L4 PTP
-    // udp_dest_port == ptp_event
-    if (int_valid_d1 && bypass_udp_cnt==10'd0 && bypass_udp &&
-       (int_data_d1[31:16]==16'h013f || int_data_d1[31:16]==16'h0140))
+    if (int_valid && bypass_udp_cnt==10'd0 && bypass_udp &&
+       (int_data[31:16]==16'h013f || int_data[31:16]==16'h0140))  // udp_dest_port == ptp_event || ptp_general
       ptp_l4 <= 1'b1;
     // check if it is PTP Event message
-    if      (int_valid_d1 && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && int_data_d1[31:16]==16'h88F7    &&
-            (int_data_d1[11: 8]== 4'h0 || int_data_d1[11:8]==4'h2))
-      // ptp_message_id == sync || delay_req
+    if      (int_valid && (int_cnt==10'd3 || bypass_vlan && int_cnt==10'd4) && int_data[31:16]==16'h88F7       &&
+            (int_data[11: 8]== 4'h0 || int_data[11:8]==4'h2))  // ptp_message_id == sync || delay_req
       ptp_event <= 1'b1;
-    else if (int_valid_d1 && (int_cnt==10'd4 || bypass_vlan && int_cnt==10'd5) && bypass_udp_cnt==10'd1 && ptp_l4 &&
-            (int_data_d1[11: 8]== 4'h0 || int_data_d1[11:8]==4'h2))
-      // ptp_message_id == sync || delay_req
+    else if (int_valid && (int_cnt==10'd4 || bypass_vlan && int_cnt==10'd5) && bypass_udp_cnt==10'd1 && ptp_l4 &&
+            (int_data[11: 8]== 4'h0 || int_data[11:8]==4'h2))  // ptp_message_id == sync || delay_req
       ptp_event <= 1'b1;
   end
 end
+// ptp message
+reg [31:0] ptp_data;
 always @(posedge rst or posedge clk) begin
   if (rst) begin
+    ptp_data  <= 32'd0;
     ptp_msgid <= 4'd0;
     ptp_seqid <= 16'd0;
   end
-  else if (int_valid_d1 && int_sop_d1) begin
+  else if (int_valid && int_sop) begin
+    ptp_data  <= 32'd0;
     ptp_msgid <= 4'd0;
     ptp_seqid <= 16'd0;
   end
   else begin
     // get PTP identification information as additional information to Timestamp
+    // ptp message body
+    if (int_valid && (ptp_l2 || (bypass_udp_cnt>=10'd2 && ptp_l4)))
+      ptp_data <= {int_data_d1[15:0], int_data[31:16]};
     // message id
-    if      (int_valid_d1 && int_cnt==10'd3 && int_data_d1[31:16]==16'h88F7)
-      ptp_msgid <=   int_data_d1[11: 8];
-    else if (int_valid_d1 && int_cnt==10'd4 && bypass_udp_cnt==10'd1 && ptp_l4)
-      ptp_msgid <=   int_data_d1[11: 8];
+    if (int_valid && ptp_cnt==10'd1)
+      ptp_msgid <=   ptp_data[27:24];
     // sequence id
-    if      (int_valid_d1 && int_cnt==10'd11 && ptp_l2)
-      ptp_seqid <=   int_data_d1[31:16];
-    else if (int_valid_d1 && int_cnt==10'd10 && ptp_l4)
-      ptp_seqid <=   int_data_d1[31:16];
+    if (int_valid && ptp_cnt==10'd8)
+      ptp_seqid <=   ptp_data[15:0];
   end
 end
+// parser output
 always @(posedge rst or posedge clk) begin
   if (rst) begin
     ptp_found <=  1'b0;
     ptp_infor <= 20'd0;
   end
-  else if (int_valid_d1 && int_sop_d1) begin
+  else if (int_valid && int_sop) begin
     ptp_found <=  1'b0;
     ptp_infor <= 20'd0;
   end
-  else if (int_valid_d1 && int_eop_d1) begin
+  else if (int_valid && ptp_cnt==10'd9) begin
     ptp_found <=  ptp_event;
-    ptp_infor <= {ptp_seqid, ptp_msgid};  // 16+4
+    ptp_infor <= {ptp_msgid, ptp_seqid};  // 4+16
   end
-  else begin
-    ptp_found <=  1'b0;
-    ptp_infor <= 20'd0;
-  end
 end
 endmodule

/trunk/par/altera/ha1588.qsf

60,4 → 60,6

set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON

set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO

set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON

set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED

set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON

set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

/trunk/par/altera/ha1588.sdc

151,6 → 151,10

 # Set Multicycle Path
 #**************************************************************
+set_multicycle_path -from [get_registers {tsu:u_rx_tsu|ptp_parser:parser|*}] -to [get_registers {tsu:u_rx_tsu|ptp_parser:parser|*}] -setup -end 4
+set_multicycle_path -from [get_registers {tsu:u_rx_tsu|ptp_parser:parser|*}] -to [get_registers {tsu:u_rx_tsu|ptp_parser:parser|*}] -hold  -end 3
+set_multicycle_path -from [get_registers {tsu:u_tx_tsu|ptp_parser:parser|*}] -to [get_registers {tsu:u_tx_tsu|ptp_parser:parser|*}] -setup -end 4
+set_multicycle_path -from [get_registers {tsu:u_tx_tsu|ptp_parser:parser|*}] -to [get_registers {tsu:u_tx_tsu|ptp_parser:parser|*}] -hold  -end 3
 #**************************************************************

/trunk/sim/top/wave.do

36,20 → 36,32

 add wave -noupdate -divider {New Divider}
 add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/rst
 add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_rst
-add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/ptp_found
-add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rx_tsu/ptp_infor
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_wr_clk
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_wr_en
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_wr_data
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_wrusedw
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_rd_clk
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_rd_en
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_rd_data
 add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rx_tsu/q_rdusedw
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rgs/rx_q_data_int
 add wave -noupdate -format Literal -radix unsigned /ha1588_tb/NIC_DRV_RX_BFM/num_rx
 add wave -noupdate -divider {New Divider}
 add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/rst
 add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_rst
-add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/ptp_found
-add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_tx_tsu/ptp_infor
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_wr_clk
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_wr_en
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_wr_data
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_wrusedw
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_rd_clk
+add wave -noupdate -format Logic /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_rd_en
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_rd_data
 add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_tx_tsu/q_rdusedw
+add wave -noupdate -format Literal /ha1588_tb/PTP_HA_DUT/u_rgs/tx_q_data_int
 add wave -noupdate -format Literal -radix unsigned /ha1588_tb/NIC_DRV_TX_BFM/num_tx
 add wave -noupdate -divider {New Divider}
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {3718000 ps} 0}
+WaveRestoreCursors {{Cursor 1} {18255448 ps} 0}
 configure wave -namecolwidth 333
 configure wave -valuecolwidth 100
 configure wave -justifyvalue left

64,4 → 76,4

configure wave -timeline 0

configure wave -timelineunits ns

update

WaveRestoreZoom {0 ps} {2026775 ps}

WaveRestoreZoom {18099011 ps} {18680581 ps}

/trunk/sim/tsu/wave.do

25,11 → 25,11

 add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_ipv6_cnt
 add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_udp_cnt
 add wave -noupdate -divider {New Divider}
-add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/int_valid_d1
-add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/int_sop_d1
-add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/int_eop_d1
-add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/int_mod_d1
-add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/int_data_d1
+add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_valid_d1
+add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_sop_d1
+add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_eop_d1
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_mod_d1
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_data_d1
 add wave -noupdate -divider {New Divider}
 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_vlan
 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_ipv4

38,16 → 38,24

 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l2
 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l4
 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_event
+add wave -noupdate -divider {New Divider}
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/int_data_d1
+add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/ptp_cnt
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_data
 add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_msgid
 add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_seqid
 add wave -noupdate -divider {New Divider}
 add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_found
 add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_infor
+add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_clk
+add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_en
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/q_wr_data
+add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/q_wrusedw
 add wave -noupdate -divider {New Divider}
 add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/BFM_RX/num_rx
 add wave -noupdate -divider {New Divider}
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 1} {341698 ps} 0}
+WaveRestoreCursors {{Cursor 1} {76206000 ps} 0}
 configure wave -namecolwidth 188
 configure wave -valuecolwidth 165
 configure wave -justifyvalue left

62,4 → 70,4

configure wave -timeline 0

configure wave -timelineunits ns

update

WaveRestoreZoom {0 ps} {247010400 ps}

WaveRestoreZoom {0 ps} {317931600 ps}