URL
https://opencores.org/ocsvn/ha1588/ha1588/trunk
Subversion Repositories ha1588
Compare Revisions
- This comparison shows the changes necessary to convert path
/ha1588
- from Rev 53 to Rev 54
- ↔ Reverse comparison
Rev 53 → Rev 54
/trunk/rtl/top/ha1588.v
37,10 → 37,12
input rx_gmii_clk, |
input rx_gmii_ctrl, |
input [7:0] rx_gmii_data, |
input rx_giga_mode, |
|
input tx_gmii_clk, |
input tx_gmii_ctrl, |
input [7:0] tx_gmii_data |
input [7:0] tx_gmii_data, |
input tx_giga_mode |
); |
|
parameter addr_is_in_word = 0; |
137,6 → 139,7
.gmii_clk(rx_gmii_clk), |
.gmii_ctrl(rx_gmii_ctrl), |
.gmii_data(rx_gmii_data), |
.giga_mode(rx_giga_mode), |
.ptp_msgid_mask(rx_q_ptp_msgid_mask), |
.rtc_timer_clk(rtc_clk), |
.rtc_timer_in(rtc_time_ptp_val), |
153,6 → 156,7
.gmii_clk(tx_gmii_clk), |
.gmii_ctrl(tx_gmii_ctrl), |
.gmii_data(tx_gmii_data), |
.giga_mode(tx_giga_mode), |
.ptp_msgid_mask(tx_q_ptp_msgid_mask), |
.rtc_timer_clk(rtc_clk), |
.rtc_timer_in(rtc_time_ptp_val), |
/trunk/rtl/tsu/tsu.v
27,6 → 27,7
input gmii_clk, |
input gmii_ctrl, |
input [7:0] gmii_data, |
input giga_mode, |
|
input [7:0] ptp_msgid_mask, |
|
40,31 → 41,148
output [127:0] q_rd_data // null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit |
); |
|
// mii to gmii converter |
reg nibble_h; |
always @(posedge rst or posedge gmii_clk) begin |
if (rst) |
nibble_h <= 1'b0; |
else if (gmii_ctrl) |
nibble_h <= !nibble_h; |
end |
|
reg gmii_ctrl_conv; |
reg [7:0] gmii_data_conv; |
always @(posedge rst or posedge gmii_clk) begin |
if (rst) begin |
gmii_ctrl_conv <= 1'b0; |
gmii_data_conv <= 8'd0; |
end |
else begin |
if (giga_mode) begin |
gmii_ctrl_conv <= gmii_ctrl; |
gmii_data_conv[7:0] <= gmii_data[7:0]; |
end |
else begin |
// 4b-8b datapath gearbox |
if (gmii_ctrl) begin |
gmii_ctrl_conv <= ( nibble_h)? 1'b1:1'b0; |
gmii_data_conv[7:4] <= ( nibble_h)? gmii_data[3:0]:gmii_data_conv[7:4]; |
gmii_data_conv[3:0] <= (!nibble_h)? gmii_data[3:0]:gmii_data_conv[3:0]; |
end |
else begin |
gmii_ctrl_conv <= 1'b0; |
gmii_data_conv[7:4] <= gmii_data_conv[7:4]; |
gmii_data_conv[3:0] <= gmii_data_conv[3:0]; |
end |
end |
end |
end |
|
// buffer gmii input |
reg gmii_ctrl_conv_d1, gmii_ctrl_conv_d2, gmii_ctrl_conv_d3, gmii_ctrl_conv_d4, |
gmii_ctrl_conv_d5, gmii_ctrl_conv_d6, gmii_ctrl_conv_d7, gmii_ctrl_conv_d8, |
gmii_ctrl_conv_d9, gmii_ctrl_conv_da; |
reg [7:0] gmii_data_conv_d1, gmii_data_conv_d2, gmii_data_conv_d3, gmii_data_conv_d4, |
gmii_data_conv_d5, gmii_data_conv_d6, gmii_data_conv_d7, gmii_data_conv_d8, |
gmii_data_conv_d9, gmii_data_conv_da; |
always @(posedge rst or posedge gmii_clk) begin |
if (rst) begin |
gmii_ctrl_conv_d1 <= 1'b0; |
gmii_ctrl_conv_d2 <= 1'b0; |
gmii_ctrl_conv_d3 <= 1'b0; |
gmii_ctrl_conv_d4 <= 1'b0; |
gmii_ctrl_conv_d5 <= 1'b0; |
gmii_ctrl_conv_d6 <= 1'b0; |
gmii_ctrl_conv_d7 <= 1'b0; |
gmii_ctrl_conv_d8 <= 1'b0; |
gmii_ctrl_conv_d9 <= 1'b0; |
gmii_ctrl_conv_da <= 1'b0; |
gmii_data_conv_d1 <= 8'd0; |
gmii_data_conv_d2 <= 8'd0; |
gmii_data_conv_d3 <= 8'd0; |
gmii_data_conv_d4 <= 8'd0; |
gmii_data_conv_d5 <= 8'd0; |
gmii_data_conv_d6 <= 8'd0; |
gmii_data_conv_d7 <= 8'd0; |
gmii_data_conv_d8 <= 8'd0; |
gmii_data_conv_d9 <= 8'd0; |
gmii_data_conv_da <= 8'd0; |
end |
else begin |
gmii_ctrl_conv_d1 <= gmii_ctrl_conv; |
gmii_ctrl_conv_d2 <= gmii_ctrl_conv_d1; |
gmii_ctrl_conv_d3 <= gmii_ctrl_conv_d2; |
gmii_ctrl_conv_d4 <= gmii_ctrl_conv_d3; |
gmii_ctrl_conv_d5 <= gmii_ctrl_conv_d4; |
gmii_ctrl_conv_d6 <= gmii_ctrl_conv_d5; |
gmii_ctrl_conv_d7 <= gmii_ctrl_conv_d6; |
gmii_ctrl_conv_d8 <= gmii_ctrl_conv_d7; |
gmii_ctrl_conv_d9 <= gmii_ctrl_conv_d8; |
gmii_ctrl_conv_da <= gmii_ctrl_conv_d9; |
gmii_data_conv_d1 <= gmii_data_conv; |
gmii_data_conv_d2 <= gmii_data_conv_d1; |
gmii_data_conv_d3 <= gmii_data_conv_d2; |
gmii_data_conv_d4 <= gmii_data_conv_d3; |
gmii_data_conv_d5 <= gmii_data_conv_d4; |
gmii_data_conv_d6 <= gmii_data_conv_d5; |
gmii_data_conv_d7 <= gmii_data_conv_d6; |
gmii_data_conv_d8 <= gmii_data_conv_d7; |
gmii_data_conv_d9 <= gmii_data_conv_d8; |
gmii_data_conv_da <= gmii_data_conv_d9; |
end |
end |
|
// choose buffered gmii input |
reg int_gmii_ctrl; |
reg int_gmii_ctrl_d1, int_gmii_ctrl_d2, int_gmii_ctrl_d3, int_gmii_ctrl_d4, int_gmii_ctrl_d5; |
reg int_gmii_ctrl_d1, int_gmii_ctrl_d2, int_gmii_ctrl_d3, int_gmii_ctrl_d4, |
int_gmii_ctrl_d5; |
reg [7:0] int_gmii_data; |
reg [7:0] int_gmii_data_d1; |
reg [7:0] int_gmii_data_d1, int_gmii_data_d2, int_gmii_data_d3, int_gmii_data_d4, |
int_gmii_data_d5; |
always @(posedge rst or posedge gmii_clk) begin |
if (rst) begin |
int_gmii_ctrl <= 1'b0; |
int_gmii_data <= 8'h00; |
int_gmii_ctrl_d1 <= 1'b0; |
int_gmii_data_d1 <= 8'h00; |
int_gmii_ctrl_d2 <= 1'b0; |
int_gmii_data_d2 <= 8'h00; |
int_gmii_ctrl_d3 <= 1'b0; |
int_gmii_data_d3 <= 8'h00; |
int_gmii_ctrl_d4 <= 1'b0; |
int_gmii_data_d4 <= 8'h00; |
int_gmii_ctrl_d5 <= 1'b0; |
int_gmii_data <= 8'h00; |
int_gmii_data_d1 <= 8'h00; |
int_gmii_data_d5 <= 8'h00; |
end |
else begin |
int_gmii_ctrl <= gmii_ctrl; |
int_gmii_ctrl_d1 <= int_gmii_ctrl; |
int_gmii_ctrl_d2 <= int_gmii_ctrl_d1; |
int_gmii_ctrl_d3 <= int_gmii_ctrl_d2; |
int_gmii_ctrl_d4 <= int_gmii_ctrl_d3; |
int_gmii_ctrl_d5 <= int_gmii_ctrl_d4; |
int_gmii_data <= gmii_data; |
int_gmii_data_d1 <= int_gmii_data; |
if (giga_mode) begin |
int_gmii_ctrl <= gmii_ctrl_conv; |
int_gmii_data <= gmii_data_conv; |
int_gmii_ctrl_d1 <= gmii_ctrl_conv_d1; |
int_gmii_data_d1 <= gmii_data_conv_d1; |
int_gmii_ctrl_d2 <= gmii_ctrl_conv_d2; |
int_gmii_data_d2 <= gmii_data_conv_d2; |
int_gmii_ctrl_d3 <= gmii_ctrl_conv_d3; |
int_gmii_data_d3 <= gmii_data_conv_d3; |
int_gmii_ctrl_d4 <= gmii_ctrl_conv_d4; |
int_gmii_data_d4 <= gmii_data_conv_d4; |
int_gmii_ctrl_d5 <= gmii_ctrl_conv_d5; |
int_gmii_data_d5 <= gmii_data_conv_d5; |
end |
else begin |
int_gmii_ctrl <= gmii_ctrl_conv; |
int_gmii_data <= gmii_data_conv; |
int_gmii_ctrl_d1 <= gmii_ctrl_conv_d2; |
int_gmii_data_d1 <= gmii_data_conv_d2; |
int_gmii_ctrl_d2 <= gmii_ctrl_conv_d4; |
int_gmii_data_d2 <= gmii_data_conv_d4; |
int_gmii_ctrl_d3 <= gmii_ctrl_conv_d6; |
int_gmii_data_d3 <= gmii_data_conv_d6; |
int_gmii_ctrl_d4 <= gmii_ctrl_conv_d8; |
int_gmii_data_d4 <= gmii_data_conv_d8; |
int_gmii_ctrl_d5 <= gmii_ctrl_conv_da; |
int_gmii_data_d5 <= gmii_data_conv_da; |
end |
end |
end |
|
140,10 → 258,12
if (rst) |
int_bcnt <= 2'd0; |
else |
if (int_gmii_ctrl_d1 | (int_bcnt!=2'd0)) |
int_bcnt <= int_bcnt + 2'd1; |
else |
int_bcnt <= 2'd0; |
if ( int_gmii_ctrl & !int_gmii_ctrl_d1) |
int_bcnt <= 2'd0; // clear on sop |
else if ( int_gmii_ctrl) |
int_bcnt <= int_bcnt + 2'd1; // increment |
else if (!int_gmii_ctrl & int_gmii_ctrl_d3 & (int_bcnt!=2'd0)) |
int_bcnt <= int_bcnt + 2'd1; // end on eop with mod |
end |
always @(posedge rst or posedge gmii_clk) begin |
if (rst) begin |
152,7 → 272,7
int_mod <= 2'd0; |
end |
else begin |
if (int_gmii_ctrl_d1) begin |
if (int_gmii_ctrl) begin |
int_data[ 7: 0] <= (int_bcnt==2'd3)? int_gmii_data_d1:int_data[ 7: 0]; |
int_data[15: 8] <= (int_bcnt==2'd2)? int_gmii_data_d1:int_data[15: 8]; |
int_data[23:16] <= (int_bcnt==2'd1)? int_gmii_data_d1:int_data[23:16]; |
159,7 → 279,7
int_data[31:24] <= (int_bcnt==2'd0)? int_gmii_data_d1:int_data[31:24]; |
end |
|
if (int_bcnt==2'd3) |
if (int_gmii_ctrl & int_bcnt==2'd3) |
int_valid <= 1'b1; |
else |
int_valid <= 1'b0; |
169,12 → 289,12
else if (!int_gmii_ctrl_d1 & int_gmii_ctrl_d2) |
int_mod <= int_bcnt; |
|
if (int_gmii_ctrl & !int_gmii_ctrl_d5 & int_bcnt==2'd3) |
if (int_gmii_ctrl_d4 & !int_gmii_ctrl_d5 & int_bcnt==2'd3) |
int_sop <= 1'b1; |
else |
int_sop <= 1'b0; |
|
if (!int_gmii_ctrl & int_bcnt==2'd3) |
if (!int_gmii_ctrl & int_gmii_ctrl_d3 & int_bcnt==2'd3) |
int_eop <= 1'b1; |
else |
int_eop <= 1'b0; |
/trunk/sim/top/ha1588_tb.v
23,6 → 23,8
|
module ha1588_tb (); |
|
parameter giga_mode = 1'b1; |
|
reg up_clk; |
wire up_wr, up_rd; |
wire [ 7:0] up_addr; |
56,6 → 58,7
.gmii_rxctrl(rx_gmii_ctrl), |
.gmii_rxdata(rx_gmii_data) |
); |
defparam NIC_DRV_RX_BFM.giga_mode = giga_mode; |
|
gmii_tx_bfm NIC_DRV_TX_BFM ( |
.gmii_txclk(tx_gmii_clk), |
62,6 → 65,7
.gmii_txctrl(tx_gmii_ctrl), |
.gmii_txdata(tx_gmii_data) |
); |
defparam NIC_DRV_TX_BFM.giga_mode = giga_mode; |
|
ptp_drv_bfm_sv PTP_DRV_BFM ( |
.up_clk(up_clk), |
88,14 → 92,16
.rx_gmii_clk(rx_gmii_clk), |
.rx_gmii_ctrl(rx_gmii_ctrl), |
.rx_gmii_data(rx_gmii_data), |
.rx_giga_mode(giga_mode), |
.tx_gmii_clk(tx_gmii_clk), |
.tx_gmii_ctrl(tx_gmii_ctrl), |
.tx_gmii_data(tx_gmii_data) |
.tx_gmii_data(tx_gmii_data), |
.tx_giga_mode(giga_mode) |
); |
|
initial begin |
ha1588_tb.PTP_DRV_BFM.up_start = 1; |
#100000000 $stop; |
ha1588_tb.PTP_DRV_BFM.up_start = 1; |
#100000000 $stop; |
end |
|
endmodule |
/trunk/sim/top/nic_drv_bfm/gmii_rx_bfm.v
27,6 → 27,7
output reg gmii_rxctrl, |
output reg [7:0] gmii_rxdata |
); |
parameter giga_mode = 1; |
|
reg gmii_rxclk_offset; |
initial begin |
43,10 → 44,13
reg [31:0] pcap_4bytes_rx; |
reg [31:0] packet_leng_rx; |
reg [ 7:0] packet_byte_rx; |
|
generate |
if (giga_mode) begin |
initial |
begin : feeder_rx |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'd0; |
gmii_rxdata = 8'd0; |
#100; |
feeder_file_rx = $fopen("nic_drv_bfm/ptpdv2_rx.pcap","rb"); |
if (feeder_file_rx == 0) |
126,6 → 130,113
gmii_rxdata = 8'h00; |
end |
end |
end |
else begin |
initial |
begin : feeder_rx |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'd0; |
#100; |
feeder_file_rx = $fopen("nic_drv_bfm/ptpdv2_rx.pcap","rb"); |
if (feeder_file_rx == 0) |
begin |
$display("Failed to open ptpdv2_rx.pcap!"); |
disable feeder_rx; |
end |
else |
begin |
// test pcap file endian |
r_rx = $fread(pcap_4bytes_rx, feeder_file_rx); |
pcap_endian_rx = (pcap_4bytes_rx == 32'ha1b2c3d4)? 1:0; |
s_rx = $fseek(feeder_file_rx, -4, 1); |
// skip pcap file header 24*8 |
s_rx = $fseek(feeder_file_rx, 24, 1); |
// read packet content |
eof_rx = 0; |
num_rx = 0; |
while (!eof_rx & !$feof(feeder_file_rx)) |
begin : fileread_loop |
// skip frame header (8+4)*8 |
start_addr_rx = $ftell(feeder_file_rx); |
s_rx = $fseek(feeder_file_rx, 8+4, 1); |
// get frame length big endian 4*8 |
r_rx = $fread(packet_leng_rx, feeder_file_rx); |
packet_leng_rx = pcap_endian_rx? |
{packet_leng_rx[31:24], packet_leng_rx[23:16], packet_leng_rx[15: 8], packet_leng_rx[ 7: 0]}: |
{packet_leng_rx[ 7: 0], packet_leng_rx[15: 8], packet_leng_rx[23:16], packet_leng_rx[31:24]}; |
// check whether end of file |
if (r_rx == 0) |
begin |
eof_rx = 1; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
disable fileread_loop; |
end |
// send ifg 96bit=12*8 |
repeat (12) |
begin |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
end |
// send frame preamble and sfd 55555555555555d5=8*8 |
repeat (7) |
begin |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
end |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'hd; |
// send frame content |
for (index_rx=0; index_rx<packet_leng_rx; index_rx=index_rx+1) |
begin |
r_rx = $fread(packet_byte_rx, feeder_file_rx); |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = packet_byte_rx[3:0]; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = packet_byte_rx[7:4]; |
// check whether end of file |
if (r_rx == 0) |
begin |
eof_rx = 1; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
disable fileread_loop; |
end |
end |
end_addr_rx = $ftell(feeder_file_rx); |
num_rx = num_rx + 1; |
end |
$fclose(feeder_file_rx); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
$fclose(feeder_file_rx); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
end |
end |
end |
endgenerate |
|
|
endmodule |
/trunk/sim/top/nic_drv_bfm/gmii_tx_bfm.v
27,6 → 27,7
output reg gmii_txctrl, |
output reg [7:0] gmii_txdata |
); |
parameter giga_mode = 1; |
|
reg gmii_txclk_offset; |
initial begin |
43,10 → 44,13
reg [31:0] pcap_4bytes_tx; |
reg [31:0] packet_leng_tx; |
reg [ 7:0] packet_byte_tx; |
|
generate |
if (giga_mode) begin |
initial |
begin : feeder_tx |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'd0; |
gmii_txdata = 8'd0; |
#100; |
feeder_file_tx = $fopen("nic_drv_bfm/ptpdv2_tx.pcap","rb"); |
if (feeder_file_tx == 0) |
126,6 → 130,110
gmii_txdata = 8'h00; |
end |
end |
end |
else begin |
initial |
begin : feeder_tx |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'd0; |
#100; |
feeder_file_tx = $fopen("nic_drv_bfm/ptpdv2_tx.pcap","rb"); |
if (feeder_file_tx == 0) |
begin |
$display("Failed to open ptpdv2_tx.pcap!"); |
disable feeder_tx; |
end |
else |
begin |
// test pcap file endian |
r_tx = $fread(pcap_4bytes_tx, feeder_file_tx); |
pcap_endian_tx = (pcap_4bytes_tx == 32'ha1b2c3d4)? 1:0; |
s_tx = $fseek(feeder_file_tx, -4, 1); |
// skip pcap file header 24*8 |
s_tx = $fseek(feeder_file_tx, 24, 1); |
// read packet content |
eof_tx = 0; |
num_tx = 0; |
while (!eof_tx & !$feof(feeder_file_tx)) |
begin : fileread_loop |
// skip frame header (8+4)*8 |
start_addr_tx = $ftell(feeder_file_tx); |
s_tx = $fseek(feeder_file_tx, 8+4, 1); |
// get frame length big endian 4*8 |
r_tx = $fread(packet_leng_tx, feeder_file_tx); |
packet_leng_tx = pcap_endian_tx? |
{packet_leng_tx[31:24], packet_leng_tx[23:16], packet_leng_tx[15: 8], packet_leng_tx[ 7: 0]}: |
{packet_leng_tx[ 7: 0], packet_leng_tx[15: 8], packet_leng_tx[23:16], packet_leng_tx[31:24]}; |
// check whether end of file |
if (r_tx == 0) |
begin |
eof_tx = 1; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
disable fileread_loop; |
end |
// send ifg 96bit=12*8 |
repeat (12) |
begin |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
end |
// send frame preamble and sfd 55555555555555d5=8*8 |
repeat (7) |
begin |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
end |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'hd; |
// send frame content |
for (index_tx=0; index_tx<packet_leng_tx; index_tx=index_tx+1) |
begin |
r_tx = $fread(packet_byte_tx, feeder_file_tx); |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = packet_byte_tx[3:0]; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = packet_byte_tx[7:4]; |
// check whether end of file |
if (r_tx == 0) |
begin |
eof_tx = 1; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
disable fileread_loop; |
end |
end |
end_addr_tx = $ftell(feeder_file_tx); |
num_tx = num_tx + 1; |
end |
$fclose(feeder_file_tx); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
end |
end |
end |
endgenerate |
|
|
endmodule |
/trunk/sim/tsu/wave.do
1,79 → 1,83
onerror {resume} |
quietly WaveActivateNextPane {} 0 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/gmii_clk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/gmii_ctrl |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/gmii_data |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_req |
add wave -noupdate -format Literal -radix hexadecimal /tsu_queue_tb/DUT_RX/rtc_time_stamp |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_ack |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_ack_clr |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/tsu_time_stamp |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_gmii_ctrl |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_gmii_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_bcnt |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_valid |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_sop |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_eop |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_mod |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/int_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_ipv4_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_ipv6_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_udp_cnt |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_valid_d1 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_sop_d1 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_eop_d1 |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_mod_d1 |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_data_d1 |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_vlan |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_mpls |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_ipv4 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_ipv6 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_udp |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l2 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l4 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_event |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/int_data_d1 |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/ptp_cnt |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_msgid |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_seqid |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_cksum |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_found |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_infor |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_clk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_en |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/q_wr_data |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/q_wrusedw |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/queue/rdclk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/queue/rdreq |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/queue/rdusedw |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/BFM_RX/num_rx |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/rx_ptp_event_cnt |
add wave -noupdate -divider {New Divider} |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {39134000 ps} 0} |
configure wave -namecolwidth 188 |
configure wave -valuecolwidth 165 |
configure wave -justifyvalue left |
configure wave -signalnamewidth 0 |
configure wave -snapdistance 10 |
configure wave -datasetprefix 0 |
configure wave -rowmargin 4 |
configure wave -childrowmargin 2 |
configure wave -gridoffset 0 |
configure wave -gridperiod 1 |
configure wave -griddelta 40 |
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {175156 ps} {398339 ps} |
onerror {resume} |
quietly WaveActivateNextPane {} 0 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/gmii_clk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/gmii_ctrl |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/gmii_data |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/nibble_h |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/gmii_ctrl_conv |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/gmii_data_conv |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_req |
add wave -noupdate -format Literal -radix hexadecimal /tsu_queue_tb/DUT_RX/rtc_time_stamp |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_ack |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/ts_ack_clr |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/tsu_time_stamp |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_gmii_ctrl |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_gmii_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_bcnt |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_valid |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_sop |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_eop |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_mod |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_valid_d1 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_sop_d1 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/int_eop_d1 |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_mod_d1 |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/int_data_d1 |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/int_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_ipv4_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_ipv6_cnt |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/bypass_udp_cnt |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_vlan |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_mpls |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_ipv4 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_ipv6 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/bypass_udp |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l2 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_l4 |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_event |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/int_data_d1 |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/parser/ptp_cnt |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_data |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_msgid |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_seqid |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_cksum |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/parser/ptp_found |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/parser/ptp_infor |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_clk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/q_wr_en |
add wave -noupdate -format Literal /tsu_queue_tb/DUT_RX/q_wr_data |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/q_wrusedw |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/queue/rdclk |
add wave -noupdate -format Logic /tsu_queue_tb/DUT_RX/queue/rdreq |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/DUT_RX/queue/rdusedw |
add wave -noupdate -divider {New Divider} |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/BFM_RX/num_rx |
add wave -noupdate -format Literal -radix unsigned /tsu_queue_tb/rx_ptp_event_cnt |
add wave -noupdate -divider {New Divider} |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {381314 ps} 0} |
configure wave -namecolwidth 188 |
configure wave -valuecolwidth 165 |
configure wave -justifyvalue left |
configure wave -signalnamewidth 0 |
configure wave -snapdistance 10 |
configure wave -datasetprefix 0 |
configure wave -rowmargin 4 |
configure wave -childrowmargin 2 |
configure wave -gridoffset 0 |
configure wave -gridperiod 1 |
configure wave -griddelta 40 |
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {384590838 ps} {384971009 ps} |
/trunk/sim/tsu/gmii_rx_bfm.v
27,6 → 27,7
output reg gmii_rxctrl, |
output reg [7:0] gmii_rxdata |
); |
parameter giga_mode = 1; |
|
reg gmii_rxclk_offset; |
initial begin |
43,10 → 44,13
reg [31:0] pcap_4bytes_rx; |
reg [31:0] packet_leng_rx; |
reg [ 7:0] packet_byte_rx; |
|
generate |
if (giga_mode) begin |
initial |
begin : feeder_rx |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'd0; |
gmii_rxdata = 8'd0; |
#100; |
feeder_file_rx = $fopen("ptpdv2_rx.pcap","rb"); |
if (feeder_file_rx == 0) |
126,6 → 130,113
gmii_rxdata = 8'h00; |
end |
end |
end |
else begin |
initial |
begin : feeder_rx |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'd0; |
#100; |
feeder_file_rx = $fopen("ptpdv2_rx.pcap","rb"); |
if (feeder_file_rx == 0) |
begin |
$display("Failed to open ptpdv2_rx.pcap!"); |
disable feeder_rx; |
end |
else |
begin |
// test pcap file endian |
r_rx = $fread(pcap_4bytes_rx, feeder_file_rx); |
pcap_endian_rx = (pcap_4bytes_rx == 32'ha1b2c3d4)? 1:0; |
s_rx = $fseek(feeder_file_rx, -4, 1); |
// skip pcap file header 24*8 |
s_rx = $fseek(feeder_file_rx, 24, 1); |
// read packet content |
eof_rx = 0; |
num_rx = 0; |
while (!eof_rx & !$feof(feeder_file_rx)) |
begin : fileread_loop |
// skip frame header (8+4)*8 |
start_addr_rx = $ftell(feeder_file_rx); |
s_rx = $fseek(feeder_file_rx, 8+4, 1); |
// get frame length big endian 4*8 |
r_rx = $fread(packet_leng_rx, feeder_file_rx); |
packet_leng_rx = pcap_endian_rx? |
{packet_leng_rx[31:24], packet_leng_rx[23:16], packet_leng_rx[15: 8], packet_leng_rx[ 7: 0]}: |
{packet_leng_rx[ 7: 0], packet_leng_rx[15: 8], packet_leng_rx[23:16], packet_leng_rx[31:24]}; |
// check whether end of file |
if (r_rx == 0) |
begin |
eof_rx = 1; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
disable fileread_loop; |
end |
// send ifg 96bit=12*8 |
repeat (12) |
begin |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
end |
// send frame preamble and sfd 55555555555555d5=8*8 |
repeat (7) |
begin |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
end |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'h5; |
@(posedge gmii_rxclk_offset) |
gmii_rxctrl = 1'b1; |
gmii_rxdata = 4'hd; |
// send frame content |
for (index_rx=0; index_rx<packet_leng_rx; index_rx=index_rx+1) |
begin |
r_rx = $fread(packet_byte_rx, feeder_file_rx); |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = packet_byte_rx[3:0]; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b1; |
gmii_rxdata = packet_byte_rx[7:4]; |
// check whether end of file |
if (r_rx == 0) |
begin |
eof_rx = 1; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
@(posedge gmii_rxclk_offset); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
disable fileread_loop; |
end |
end |
end_addr_rx = $ftell(feeder_file_rx); |
num_rx = num_rx + 1; |
end |
$fclose(feeder_file_rx); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
$fclose(feeder_file_rx); |
gmii_rxctrl = 1'b0; |
gmii_rxdata = 4'h0; |
end |
end |
end |
endgenerate |
|
|
endmodule |
/trunk/sim/tsu/gmii_tx_bfm.v
27,6 → 27,7
output reg gmii_txctrl, |
output reg [7:0] gmii_txdata |
); |
parameter giga_mode = 1; |
|
reg gmii_txclk_offset; |
initial begin |
43,10 → 44,13
reg [31:0] pcap_4bytes_tx; |
reg [31:0] packet_leng_tx; |
reg [ 7:0] packet_byte_tx; |
|
generate |
if (giga_mode) begin |
initial |
begin : feeder_tx |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'd0; |
gmii_txctrl = 1'b0; |
gmii_txdata = 8'd0; |
#100; |
feeder_file_tx = $fopen("ptpdv2_tx.pcap","rb"); |
if (feeder_file_tx == 0) |
126,6 → 130,110
gmii_txdata = 8'h00; |
end |
end |
end |
else begin |
initial |
begin : feeder_tx |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'd0; |
#100; |
feeder_file_tx = $fopen("ptpdv2_tx.pcap","rb"); |
if (feeder_file_tx == 0) |
begin |
$display("Failed to open ptpdv2_tx.pcap!"); |
disable feeder_tx; |
end |
else |
begin |
// test pcap file endian |
r_tx = $fread(pcap_4bytes_tx, feeder_file_tx); |
pcap_endian_tx = (pcap_4bytes_tx == 32'ha1b2c3d4)? 1:0; |
s_tx = $fseek(feeder_file_tx, -4, 1); |
// skip pcap file header 24*8 |
s_tx = $fseek(feeder_file_tx, 24, 1); |
// read packet content |
eof_tx = 0; |
num_tx = 0; |
while (!eof_tx & !$feof(feeder_file_tx)) |
begin : fileread_loop |
// skip frame header (8+4)*8 |
start_addr_tx = $ftell(feeder_file_tx); |
s_tx = $fseek(feeder_file_tx, 8+4, 1); |
// get frame length big endian 4*8 |
r_tx = $fread(packet_leng_tx, feeder_file_tx); |
packet_leng_tx = pcap_endian_tx? |
{packet_leng_tx[31:24], packet_leng_tx[23:16], packet_leng_tx[15: 8], packet_leng_tx[ 7: 0]}: |
{packet_leng_tx[ 7: 0], packet_leng_tx[15: 8], packet_leng_tx[23:16], packet_leng_tx[31:24]}; |
// check whether end of file |
if (r_tx == 0) |
begin |
eof_tx = 1; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
disable fileread_loop; |
end |
// send ifg 96bit=12*8 |
repeat (12) |
begin |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
end |
// send frame preamble and sfd 55555555555555d5=8*8 |
repeat (7) |
begin |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
end |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'h5; |
@(posedge gmii_txclk_offset) |
gmii_txctrl = 1'b1; |
gmii_txdata = 4'hd; |
// send frame content |
for (index_tx=0; index_tx<packet_leng_tx; index_tx=index_tx+1) |
begin |
r_tx = $fread(packet_byte_tx, feeder_file_tx); |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = packet_byte_tx[3:0]; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b1; |
gmii_txdata = packet_byte_tx[7:4]; |
// check whether end of file |
if (r_tx == 0) |
begin |
eof_tx = 1; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
@(posedge gmii_txclk_offset); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
disable fileread_loop; |
end |
end |
end_addr_tx = $ftell(feeder_file_tx); |
num_tx = num_tx + 1; |
end |
$fclose(feeder_file_tx); |
gmii_txctrl = 1'b0; |
gmii_txdata = 4'h0; |
end |
end |
end |
endgenerate |
|
|
endmodule |
/trunk/sim/tsu/tsu_queue_tb.v
23,6 → 23,8
|
module tsu_queue_tb; |
|
parameter giga_mode = 1'b1; |
|
reg rst; |
wire gmii_rxclk; |
wire gmii_rxctrl; |
69,6 → 71,7
.gmii_clk(gmii_rxclk), |
.gmii_ctrl(gmii_rxctrl), |
.gmii_data(gmii_rxdata), |
.giga_mode(giga_mode), |
|
.ptp_msgid_mask(8'b11111111), |
|
88,6 → 91,7
.gmii_rxctrl(gmii_rxctrl), |
.gmii_rxdata(gmii_rxdata) |
); |
defparam BFM_RX.giga_mode = giga_mode; |
|
|
tsu DUT_TX |
97,6 → 101,7
.gmii_clk(gmii_txclk), |
.gmii_ctrl(gmii_txctrl), |
.gmii_data(gmii_txdata), |
.giga_mode(giga_mode), |
|
.ptp_msgid_mask(8'b11111111), |
|
116,6 → 121,7
.gmii_txctrl(gmii_txctrl), |
.gmii_txdata(gmii_txdata) |
); |
defparam BFM_TX.giga_mode = giga_mode; |
|
integer rx_ptp_event_cnt, rx_ptp_mismatch_cnt; |
integer ref_file_handle_rx, return_fscanf_rx, ref_num_rx; |
157,22 → 163,20
@(posedge BFM_TX.eof_tx); |
join |
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if (rx_ptp_event_cnt == 0 || tx_ptp_event_cnt == 0) begin |
if (rx_ptp_event_cnt == 0) |
$display("RX Parser Test Fail: found 0 PTP-EVENT!"); |
if (tx_ptp_event_cnt == 0) |
$display("TX Parser Test Fail: found 0 PTP-EVENT!"); |
end |
else if (rx_ptp_mismatch_cnt > 0 || tx_ptp_mismatch_cnt > 0) begin |
if (rx_ptp_mismatch_cnt > 0) |
$display("Rx Parser Mismatch Found: RX-PTP-EVENT-MISMATCH = %d", rx_ptp_mismatch_cnt); |
if (tx_ptp_mismatch_cnt > 0) |
$display("Tx Parser Mismatch Found: TX-PTP-EVENT-MISMATCH = %d", tx_ptp_mismatch_cnt); |
end |
else begin |
$display("RX and TX Parser Test Pass:\n RX-PTP-EVENT = %d\n TX-PTP-EVENT = %d", rx_ptp_event_cnt, tx_ptp_event_cnt); |
end |
if (rx_ptp_event_cnt == 0) |
$display("RX Parser Test Fail: found 0 PTP-EVENT!\n"); |
if (tx_ptp_event_cnt == 0) |
$display("TX Parser Test Fail: found 0 PTP-EVENT!\n"); |
if (rx_ptp_mismatch_cnt > 0) |
$display("Rx Parser Mismatch Found: RX-PTP-EVENT-MISMATCH = %d\n", rx_ptp_mismatch_cnt); |
if (tx_ptp_mismatch_cnt > 0) |
$display("Tx Parser Mismatch Found: TX-PTP-EVENT-MISMATCH = %d\n", tx_ptp_mismatch_cnt); |
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if (rx_ptp_event_cnt > 0 && rx_ptp_mismatch_cnt == 0) |
$display("RX Parser Test Pass: RX-PTP-EVENT = %d\n", rx_ptp_event_cnt); |
if (tx_ptp_event_cnt > 0 && tx_ptp_mismatch_cnt == 0) |
$display("TX Parser Test Pass: TX-PTP-EVENT = %d\n", tx_ptp_event_cnt); |
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#100 $stop; |
end |
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