URL
https://opencores.org/ocsvn/ion/ion/trunk
Subversion Repositories ion
Compare Revisions
- This comparison shows the changes necessary to convert path
/ion/trunk/src
- from Rev 33 to Rev 34
- ↔ Reverse comparison
Rev 33 → Rev 34
/hello/readme.txt
1,2 → 1,7
This is your typical 'Hello World!'. It will print a welcome message to the |
serial port (19200/8/N/1). |
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See makefile for targets, etc. |
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This program can be simulated with TB1 only (separate code and data BRAMs) and |
can be built into a hardware demo. |
/hello/makefile
13,26 → 13,23
$(GCC_MIPS) -o no_os.o $(SRC_DIR)/common/no_os.c |
$(GCC_MIPS) -o hello.o hello.c |
# NOTE: Startup code (boot.o) is linked in the link script; |
$(LD_MIPS) $(LFLAGS) -Map hello.map -s -N -o hello.axf hello.o no_os.o |
$(LD_MIPS) $(LFLAGS_BARE) -Map hello.map -s -N -o hello.axf hello.o no_os.o |
-@$(DUMP_MIPS) -m mips --disassemble hello.axf > hello.lst |
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# Extract object code to be placed in code space (see link script) |
hello.code: hello |
$(COPY_MIPS) -I elf32-big -j.text -O binary hello.axf hello.code |
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# Extract object code to be placed in data space (see link script) |
hello.data: hello |
$(COPY_MIPS) -I elf32-big -j.rodata -j.data -j.bss -O binary hello.axf hello.data |
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# Create VHDL file for simulation test bench |
hello_sim: hello.code hello.data |
$(TO_VHDL) $(VHDL_FLAGS) --code hello.code --data hello.data \ |
hello_sim: hello |
$(TO_VHDL) --code hello.code --data hello.data \ |
--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \ |
-s $(SIM_LENGTH) -v $(SRC_DIR)/mips_tb1_template.vhdl \ |
-o $(TB_DIR)/mips_tb1.vhdl -e mips_tb1 |
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# Create VHDL file for hardware demo |
hello_demo: hello.code hello.data |
$(TO_VHDL) $(VHDL_FLAGS) --code hello.code --data hello.data \ |
-v $(SRC_DIR)/mips_mpu_template.vhdl |
hello_demo: hello |
$(TO_VHDL) --code hello.code --data hello.data \ |
--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \ |
-v $(SRC_DIR)/mips_mpu_template.vhdl \ |
-o $(DEMO_DIR)/mips_mpu.vhdl -e mips_mpu |
/common/makefile
3,6 → 3,14
# makefiles of all the code samples. |
# It is meant to be included and not used standalone. |
#------------------------------------------------------------------------------- |
# SYSTEM PARAMETERS |
# |
# You can define here the size and address of the memory blocks of the system, |
# though you can't change the number and type of blocks here (see |
# /vhdl/mips_cache_*.vhdl). |
# Addresses are duplicated in the linker script (ion*.lds). |
# |
#------------------------------------------------------------------------------- |
# KNOWN PROBLEMS AND WORKAROUNDS |
# |
# 1.- LINK PROBLEM IF FLAG '-G0' NOT USED |
27,11 → 35,6
# cache) and will have to be fixed for regular targets (by using a |
# standard link script or fixing mine). |
#------------------------------------------------------------------------------- |
# SYSTEM PARAMETERS |
# |
# All you can define here is the size of the VHDL RAM tables. |
# Some other system parameters are defined in the linker script (ion*.lds). |
#------------------------------------------------------------------------------- |
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### Toolchain config ########################################################### |
74,21 → 77,43
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### System parameters ########################################################## |
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# FIXME clean up parameter names |
# 'CODE_BRAM' is meant to be a small BRAM (2 to 4KB) used for bootstrapping. |
# 'DATA_BRAM' is a small BRAM connected to the data ports, used for debugging. |
# 'XRAM' is meant to be the main external RAM, either SRAM or SDRAM. |
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# Default location of code BRAM is on the reset vector address |
CODE_BRAM_ADDRESS = 0 |
# Default size of code BRAM in 32-bit words |
CODE_SIZE = 1024 |
CODE_BRAM_SIZE = 1024 |
# Default size of data BRAM in 32-bit words |
DATA_SIZE = 256 |
DATA_BRAM_SIZE = 256 |
# Default address of BRAM -- used in some simulation-only tests, see makefiles |
DATA_BRAM_ADDRESS = 0x10000 |
# Default size of data external RAM (XRAM) in 32-bit words (for simulation) |
XRAM_SIZE = 2048 |
# Default address of XRAM |
XRAM_ADDRESS = 0x80000000 |
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### Build options ############################################################## |
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# Don't use gcc builtin functions, and try to target MIPS-I architecture |
# This will prevent usage of unimplemented opcodes but will insert nops after |
# load instructions, which Ion does not need. |
# (See comment above about -G0 flag) |
CFLAGS = -O2 -Wall -c -s -fno-builtin -mips1 -G0 |
# Use project 'bare cpu' linker script and build elf-bigendian object file |
LFLAGS = -T../ion_noxram.lds -I elf32-big -eentry |
# Pass BRAM sizes to VHDL conversion script |
VHDL_FLAGS = --code_size $(CODE_SIZE) --data_size $(DATA_SIZE) |
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# For most simulations and demos we'll use these parameters |
# Set code to BRAM and use XRAM for data |
# This will only work for small programs that fit the BRAM |
LFLAGS_BOOT = -Ttext $(CODE_BRAM_ADDRESS) -Tdata $(XRAM_ADDRESS) -eentry -I elf32-big |
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# For some simulations we'll want to use TB1 which requires splitting code and |
# data. Use project 'bare cpu' linker script and build elf-bigendian objects. |
LFLAGS_BARE = -T../ion_noxram.lds -I elf32-big -eentry |
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### Project directories ######################################################## |
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# VHDL test bench directory, where VHDL output files will be created |
/ion_noxram.lds
48,7 → 48,7
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/**** Put all data, including read-only, at DATA area */ |
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.data 0x00010000 : { |
.data 0x80000000 : { |
_fdata = . ; |
* (.data); |
* (.data.*); |
/opcodes/readme.txt
15,9 → 15,10
slite opcodes.bin |
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It will build a vhdl test bench at /vhdl/tb/mips_tb1.vhdl (overwriting) that you |
can try on your VHDL simulator (the provided script and the VHDL code have some |
dependence on Modelsim, see project readme file). |
can try on your VHDL simulator with script sim_tb1.do. The provided script and |
the VHDL code have some dependence on Modelsim, see project readme file. |
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This code can't be used on real hardware (i/o is far too simple). |
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WARNING: the gnu assembler expands DIV* instructions, inserting code that |
handles division by zero. Bear that in mind when reading the listing file. |
/opcodes/makefile
3,7 → 3,7
include ../common/makefile |
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# We'll run the simulation for 2000 clock cycles |
SIM_LENGTH = 2000 |
SIM_LENGTH = 3000 |
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clean: |
-$(RM) -f *.o *.obj *.map *.lst *.hex \ |
13,13 → 13,22
$(AS_MIPS) -o opcodes.o opcodes.s |
$(LD_MIPS) -Ttext 0 -eentry -Map opcodes.map -s -N -o opcodes.axf opcodes.o |
-@$(DUMP_MIPS) -I elf32-big --disassemble opcodes.axf > opcodes.lst |
@# Dump only text segment, no .rodata on this program |
# Dump only text segment, no .rodata on this program |
$(COPY_MIPS) -I elf32-big -j .text -O binary opcodes.axf opcodes.bin |
# Dump data segment to file; will be empty but the TB2 template needs it |
$(COPY_MIPS) -I elf32-big -j .data -O binary opcodes.axf opcodes.data |
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# Create VHDL file for simulation test bench |
# Create VHDL file for simulation test bench from TB1 template |
opcodes_sim: opcodes |
$(TO_VHDL) $(VHDL_FLAGS) --code opcodes.bin \ |
$(TO_VHDL) --code opcodes.bin \ |
--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \ |
-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb0_template.vhdl \ |
-o $(TB_DIR)\\mips_tb1.vhdl -e mips_tb1 |
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# Create VHDL file for simulation test bench from TB2 template |
opcodes_sim2: opcodes |
$(TO_VHDL) --code opcodes.bin --data opcodes.data\ |
--code_size $(CODE_BRAM_SIZE) --data_size $(DATA_BRAM_SIZE) \ |
-s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \ |
-o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2 |