URL
https://opencores.org/ocsvn/ion/ion/trunk
Subversion Repositories ion
Compare Revisions
- This comparison shows the changes necessary to convert path
/ion/trunk/tools/slite/src
- from Rev 2 to Rev 5
- ↔ Reverse comparison
Rev 2 → Rev 5
/slite.c
139,7 → 139,19
|
#define MMU_ENTRIES 4 |
#define MMU_MASK (1024*4-1) |
/*----------------------------------------------------------------------------*/ |
|
/* These are flags that will be used to notify the main cycle function of any |
failed assertions in its subfunctions. */ |
#define ASRT_UNALIGNED_READ (1<<0) |
#define ASRT_UNALIGNED_WRITE (1<<1) |
|
char *assertion_messages[2] = { |
"Unaligned read", |
"Unaligned write" |
}; |
|
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/** Length of debugging jump target queue */ |
#define TRACE_BUFFER_SIZE (32) |
|
160,8 → 172,12
typedef struct { |
int load_delay_slot; |
int delay; |
unsigned int delayed_reg; |
int delayed_data; |
unsigned delayed_reg; |
int delayed_data; |
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unsigned failed_assertions; /**< assertion bitmap */ |
unsigned faulty_address; /**< addr that failed assertion */ |
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int r[32]; |
int opcode; |
int pc, pc_next, epc; |
170,7 → 186,7
int status; |
int userMode; |
int processId; |
int exceptionId; |
int exceptionId; /**< DEPRECATED, to be removed */ |
int faultAddr; |
int irqStatus; |
int skip; |
220,6 → 236,7
void dump_trace_buffer(State *s); |
void log_cycle(State *s); |
void log_read(State *s, int full_address, int word_value, int size, int log); |
void log_failed_assertions(State *s); |
|
/* Hardware simulation */ |
int mem_read(State *s, int size, unsigned int address, int log); |
294,14 → 311,26
if(address & 3){ |
printf("Unaligned access PC=0x%x address=0x%x\n", |
(int)s->pc, (int)address); |
} |
/* We don't want the program to just quit, we want to log the fault */ |
/* assert((address & 3) == 0); */ |
if((address & 3) != 0){ |
s->failed_assertions |= ASRT_UNALIGNED_READ; |
s->faulty_address = address; |
address = address & 0xfffffffc; |
} |
assert((address & 3) == 0); |
value = *(int*)ptr; |
if(s->big_endian) |
value = ntohl(value); |
break; |
case 2: |
assert((address & 1) == 0); |
case 2: |
/* We don't want the program to just quit, we want to log the fault */ |
/* assert((address & 1) == 0); */ |
if((address & 1) != 0){ |
s->failed_assertions |= ASRT_UNALIGNED_READ; |
s->faulty_address = address; |
address = address & 0xfffffffe; |
} |
value = *(unsigned short*)ptr; |
if(s->big_endian) |
value = ntohs((unsigned short)value); |
401,14 → 430,26
|
switch(size) |
{ |
case 4: |
assert((address & 3) == 0); |
case 4: |
/* We don't want the program to just quit, we want to log the fault */ |
/* assert((address & 3) == 0); */ |
if((address & 3) != 0){ |
s->failed_assertions |= ASRT_UNALIGNED_WRITE; |
s->faulty_address = address; |
address = address & (~0x03); |
} |
if(s->big_endian) |
value = htonl(value); |
*(int*)ptr = value; |
break; |
case 2: |
assert((address & 1) == 0); |
case 2: |
/* We don't want the program to just quit, we want to log the fault */ |
/* assert((address & 1) == 0); */ |
if((address & 1) != 0){ |
s->failed_assertions |= ASRT_UNALIGNED_WRITE; |
s->faulty_address = address; |
address = address & (~0x01); |
} |
if(s->big_endian) |
value = htons((unsigned short)value); |
*(short*)ptr = (unsigned short)value; |
725,6 → 766,13
s->pc_next &= ~3; |
s->skip = (lbranch == 0) | skip2; |
|
/* If there was trouble, log it */ |
if(s->failed_assertions!=0){ |
log_failed_assertions(s); |
s->failed_assertions=0; |
} |
|
|
/* if there's a delayed load pending, do it now: load reg with memory data */ |
if(s->load_delay_slot){ |
/*--- simulate real core's load interlock ---*/ |
966,8 → 1014,11
program doesn't. The endianess-conversion code has been removed. |
*/ |
|
/* Simulate a CPU reset */ |
s->pc = 0x0; |
/* Simulate a CPU reset */ |
/* FIXME cpu reset function needed */ |
s->pc = 0x0; /* reset start vector */ |
s->failed_assertions = 0; /* no failed assertions pending */ |
|
/* FIXME PC fixup at address zero has to be removed */ |
index = mem_read(s, 4, 0, 0); |
if((index & 0xffffff00) == 0x3c1c1000){ |
1066,3 → 1117,21
fclose(s->t.log); |
} |
} |
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/** Logs a message for each failed assertion, each in a line */ |
void log_failed_assertions(State *s){ |
unsigned bitmap = s->failed_assertions; |
int i = 0; |
|
/* This loop will crash the program if the message table is too short...*/ |
if(s->t.log != NULL){ |
for(i=0;i<32;i++){ |
if(bitmap & 0x1){ |
fprintf(s->t.log, "ASSERTION FAILED: [%08x] %s\n", |
s->faulty_address, |
assertion_messages[i]); |
} |
bitmap = bitmap >> 1; |
} |
} |
} |