URL
https://opencores.org/ocsvn/ion/ion/trunk
Subversion Repositories ion
Compare Revisions
- This comparison shows the changes necessary to convert path
/ion/trunk/vhdl/SoC
- from Rev 226 to Rev 233
- ↔ Reverse comparison
Rev 226 → Rev 233
/bootstrap_code_pkg.vhdl
56,7 → 56,7
|
-- Memory initialization data -------------------------------------------------- |
|
constant obj_code : t_obj_code(0 to 3678) := ( |
constant obj_code : t_obj_code(0 to 3679) := ( |
X"10", X"00", X"00", X"7c", X"00", X"00", X"00", X"00", |
X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00", |
X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00", |
505,18 → 505,19
X"00", X"00", X"00", X"00", X"30", X"42", X"00", X"02", |
X"10", X"40", X"ff", X"fc", X"3c", X"02", X"20", X"00", |
X"8c", X"42", X"00", X"00", X"03", X"e0", X"00", X"08", |
X"00", X"02", X"16", X"02", X"63", X"6f", X"6d", X"70", |
X"30", X"42", X"00", X"ff", X"63", X"6f", X"6d", X"70", |
X"69", X"6c", X"65", X"20", X"74", X"69", X"6d", X"65", |
X"3a", X"20", X"4a", X"75", X"6e", X"20", X"31", X"36", |
X"3a", X"20", X"4f", X"63", X"74", X"20", X"32", X"37", |
X"20", X"32", X"30", X"31", X"32", X"20", X"2d", X"2d", |
X"20", X"30", X"38", X"3a", X"34", X"31", X"3a", X"35", |
X"38", X"0a", X"00", X"00", X"67", X"63", X"63", X"20", |
X"20", X"30", X"30", X"3a", X"34", X"36", X"3a", X"30", |
X"34", X"0a", X"00", X"00", X"67", X"63", X"63", X"20", |
X"76", X"65", X"72", X"73", X"69", X"6f", X"6e", X"3a", |
X"20", X"20", X"34", X"2e", X"35", X"2e", X"32", X"0a", |
X"00", X"00", X"00", X"00", X"0a", X"0a", X"48", X"65", |
X"6c", X"6c", X"6f", X"20", X"57", X"6f", X"72", X"6c", |
X"64", X"21", X"0a", X"0a", X"0a", X"00", X"00", X"00", |
X"28", X"6e", X"75", X"6c", X"6c", X"29", X"00" ); |
X"28", X"6e", X"75", X"6c", X"6c", X"29", X"00", X"00" |
); |
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|
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/mips_soc.vhdl
18,7 → 18,7
------------ |
-- |
-- BOOT_BRAM_SIZE: Size of boot BRAM in 32-bit words. Can't be zero. |
-- OBJ_CODE: Bootstrap object code (mapped at 0xbfc00000). |
-- OBJECT_CODE: Bootstrap object code (mapped at 0xbfc00000). |
-- SRAM_ADDR_SIZE: Size of address bus for SRAM interface. |
-- CLOCK_FREQ: Clock rate in Hz. Used for the UART configuration. |
-- BAUD_RATE: UART baud rate. |
91,7 → 91,7
BAUD_RATE : integer := 19200; |
BOOT_BRAM_SIZE : integer := 1024; |
-- FIXME Boot BRAM can't be omitted |
OBJ_CODE : t_obj_code := default_object_code; |
OBJECT_CODE : t_obj_code := default_object_code; |
SRAM_ADDR_SIZE : integer := 17 -- < 10 to disable SRAM I/F |
-- FIXME SRAM I/F can't be disabled |
); |
158,7 → 158,7
subtype t_boot_bram_address is std_logic_vector(BOOT_BRAM_ADDR_SIZE-1 downto 0); |
-- Boot BRAM, initialized with constant object code table |
signal boot_bram : t_word_table(0 to BOOT_BRAM_SIZE-1) := |
objcode_to_wtable(OBJ_CODE, BOOT_BRAM_SIZE); |
objcode_to_wtable(OBJECT_CODE, BOOT_BRAM_SIZE); |
|
-- NOTE: 'write' signals are a remnant from a previous version, to be removed |
signal bram_rd_addr : t_boot_bram_address; |