URL
https://opencores.org/ocsvn/klc32/klc32/trunk
Subversion Repositories klc32
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- This comparison shows the changes necessary to convert path
/klc32
- from Rev 12 to Rev 13
- ↔ Reverse comparison
Rev 12 → Rev 13
/trunk/rtl/verilog/bus_error.v
0,0 → 1,35
// ============================================================================ |
// (C) 2012 Robert Finch |
// All Rights Reserved. |
// robfinch<remove>@opencores.org |
// |
// KLC32 - 32 bit CPU |
// Bus_Error.v |
// |
// This source file is free software: you can redistribute it and/or modify |
// it under the terms of the GNU Lesser General Public License as published |
// by the Free Software Foundation, either version 3 of the License, or |
// (at your option) any later version. |
// |
// This source file is distributed in the hope that it will be useful, |
// but WITHOUT ANY WARRANTY; without even the implied warranty of |
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
// GNU General Public License for more details. |
// |
// You should have received a copy of the GNU General Public License |
// along with this program. If not, see <http://www.gnu.org/licenses/>. |
// |
// ============================================================================ |
// |
|
if (cyc_o & err_i) begin |
cyc_o <= 1'b0; |
stb_o <= 1'b0; |
sel_o <= 4'b0000; |
we_o <= 1'b0; |
inta_o <= 1'b0; |
be_addr <= adr_o; |
vector <= `BUS_ERR_VECTOR; |
state <= TRAP; |
end |
|