URL
https://opencores.org/ocsvn/m1_core/m1_core/trunk
Subversion Repositories m1_core
Compare Revisions
- This comparison shows the changes necessary to convert path
/m1_core/tags/first/tests
- from Rev 3 to Rev 54
- ↔ Reverse comparison
Rev 3 → Rev 54
/mem.c
0,0 → 1,8
int main() { |
int* MY_ADDRESS = (int*)0xC1A0C1A0; |
int MY_DATA = 0xFABA1210; |
|
*(MY_ADDRESS) = MY_DATA; |
return 0; |
} |
|
/mem.hex
0,0 → 1,25
23bd0400 |
3c1fdead |
37ffbeef |
00000000 |
27bdffe8 |
afbe0010 |
03a0f021 |
3c02c1a0 |
3442c1a0 |
afc2000c |
3c02faba |
34421210 |
afc20008 |
8fc3000c |
8fc20008 |
00000000 |
ac620000 |
00001021 |
03c0e821 |
8fbe0010 |
27bd0018 |
03e00008 |
00000000 |
00000000 |
|
/mem.dump
0,0 → 1,32
|
mem.bin: file format elf32-tradlittlemips |
|
Disassembly of section .text: |
|
00000000 <main-0x10>: |
0: 23bd0400 addi sp,sp,1024 |
4: 3c1fdead lui ra,0xdead |
8: 37ffbeef ori ra,ra,0xbeef |
c: 00000000 nop |
|
00000010 <main>: |
10: 27bdffe8 addiu sp,sp,-24 |
14: afbe0010 sw s8,16(sp) |
18: 03a0f021 move s8,sp |
1c: 3c02c1a0 lui v0,0xc1a0 |
20: 3442c1a0 ori v0,v0,0xc1a0 |
24: afc2000c sw v0,12(s8) |
28: 3c02faba lui v0,0xfaba |
2c: 34421210 ori v0,v0,0x1210 |
30: afc20008 sw v0,8(s8) |
34: 8fc3000c lw v1,12(s8) |
38: 8fc20008 lw v0,8(s8) |
3c: 00000000 nop |
40: ac620000 sw v0,0(v1) |
44: 00001021 move v0,zero |
48: 03c0e821 move sp,s8 |
4c: 8fbe0010 lw s8,16(sp) |
50: 27bd0018 addiu sp,sp,24 |
54: 03e00008 jr ra |
58: 00000000 nop |
5c: 00000000 nop |
/mult.c
0,0 → 1,6
int main() { |
int a = 5; |
int b = 7; |
int c = a*b; |
return 0; |
} |
/hello.c
0,0 → 1,10
// Sample program that writes two words at a predefined address |
|
int main() { |
unsigned long* address; |
address = (unsigned long*)0x0000CAC0; |
(*address) = 0xC1A0C1A0; // First store |
address = (unsigned long*)0x0000CAC0; |
(*address) = 0xFABA1210; // Second store |
return 0; |
} |
/code.txt
0,0 → 1,55
<<<<<<< code.txt |
23bd0400 |
3c1fdead |
37ffbeef |
00000000 |
27bdffe8 |
afbe0010 |
======= |
27bdffe8 |
afbe0010 |
>>>>>>> 1.2 |
03a0f021 |
<<<<<<< code.txt |
3c02c1a0 |
3442c1a0 |
afc2000c |
3c02faba |
34421210 |
afc20008 |
8fc3000c |
8fc20008 |
00000000 |
ac620000 |
00001021 |
======= |
3402cac0 |
afc20008 |
8fc30008 |
3c02c1a0 |
3442c1a0 |
ac620000 |
3402cac0 |
afc20008 |
8fc30008 |
3c02faba |
34421210 |
ac620000 |
00001021 |
>>>>>>> 1.2 |
03c0e821 |
8fbe0010 |
27bd0018 |
03e00008 |
<<<<<<< code.txt |
======= |
00000000 |
00000000 |
>>>>>>> 1.2 |
00000000 |
00000000 |
<<<<<<< code.txt |
|
======= |
|
>>>>>>> 1.2 |
/add.c
0,0 → 1,6
int main() { |
int a = 5; |
int b = 7; |
int c = a+b; |
return 0; |
} |
/add.hex
0,0 → 1,25
23bd0400 |
3c1fdead |
37ffbeef |
00000000 |
27bdffe0 |
afbe0018 |
03a0f021 |
24020005 |
afc20010 |
24020007 |
afc2000c |
8fc30010 |
8fc2000c |
00000000 |
00621021 |
afc20008 |
00001021 |
03c0e821 |
8fbe0018 |
27bd0020 |
03e00008 |
00000000 |
00000000 |
00000000 |
|
/add.dump
0,0 → 1,32
|
add.bin: file format elf32-tradlittlemips |
|
Disassembly of section .text: |
|
00000000 <main-0x10>: |
0: 23bd0400 addi sp,sp,1024 |
4: 3c1fdead lui ra,0xdead |
8: 37ffbeef ori ra,ra,0xbeef |
c: 00000000 nop |
|
00000010 <main>: |
10: 27bdffe0 addiu sp,sp,-32 |
14: afbe0018 sw s8,24(sp) |
18: 03a0f021 move s8,sp |
1c: 24020005 li v0,5 |
20: afc20010 sw v0,16(s8) |
24: 24020007 li v0,7 |
28: afc2000c sw v0,12(s8) |
2c: 8fc30010 lw v1,16(s8) |
30: 8fc2000c lw v0,12(s8) |
34: 00000000 nop |
38: 00621021 addu v0,v1,v0 |
3c: afc20008 sw v0,8(s8) |
40: 00001021 move v0,zero |
44: 03c0e821 move sp,s8 |
48: 8fbe0018 lw s8,24(sp) |
4c: 27bd0020 addiu sp,sp,32 |
50: 03e00008 jr ra |
54: 00000000 nop |
58: 00000000 nop |
5c: 00000000 nop |
/fact.c
0,0 → 1,11
int fact_f(int n) { |
if(n==1) return 1; |
else return n*fact_f(n-1); |
} |
|
int main() { |
int num = 5; |
int fact = fact_f(num); |
return 0; |
} |
|