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URL https://opencores.org/ocsvn/mjpeg-decoder/mjpeg-decoder/trunk

Subversion Repositories mjpeg-decoder

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  • This comparison shows the changes necessary to convert path 
    /mjpeg-decoder/trunk/mjpeg/TestApp_Peripheral
    from Rev 2 to Rev 4
    ↔ Reverse comparison
  •

Rev 2 → Rev 4

/src/TestApp_Peripheral.c
0,0 → 1,85
#include "xparameters.h"
#include "stdio.h"
#include "xio.h"
 
 
int main (void) {
int i,go=0;
//Xuint32 * lena = (Xuint32*)XPAR_DDR_512MB_64MX64_RANK2_ROW13_COL10_CL2_5_MEM0_BASEADDR;
// fflush(stdout);
printf("Feedback - start\r\n");
XIo_Out32(0x50000004, 0x00000002);
while (go!=100){
printf("Stop PPC: .... 100\n");
printf("Go: ............ 1\n");
printf("No Go: ......... 2\n");
printf("Burst: ......... 3\n");
printf("No Burst: ...... 4\n");
printf("Reset: ......... 5\n");
printf("Switch 0 On: ... 6\n");
printf("Switch 0 Off: .. 7\n");
printf("Switch 1 On: ... 8\n");
printf("Switch 1 Off: .. 9\n");
printf("Switch 2 On: .. 10\n");
printf("Switch 2 Off: . 11\n");
printf("Switch 3 On: .. 12\n");
printf("Switch 3 Off: . 13\n");
printf("Pause On: ..... 14\n");
printf("Pause Off: .... 15\n");
printf("Next Frame: ... 16\n");
printf("Faster: ....... 17\n");
printf("Slower: ....... 18\n");
scanf("%d",&go);
if(go==1) XIo_Out32(0x50000004, 0x00000001);
if(go==2) XIo_Out32(0x50000004, 0x00000002);
if(go==3) XIo_Out32(0x50000004, 0x00000003);
if(go==4) XIo_Out32(0x50000004, 0x00000004);
if(go==5) XIo_Out32(0x50000004, 0x00000005);
if(go==6) XIo_Out32(0x50000004, 0x00000006);
if(go==7) XIo_Out32(0x50000004, 0x00000007);
if(go==8) XIo_Out32(0x50000004, 0x00000008);
if(go==9) XIo_Out32(0x50000004, 0x00000009);
if(go==10) XIo_Out32(0x50000004, 0x0000000A);
if(go==11) XIo_Out32(0x50000004, 0x0000000B);
if(go==12) XIo_Out32(0x50000004, 0x0000000C);
if(go==13) XIo_Out32(0x50000004, 0x0000000D);
if(go==14) XIo_Out32(0x50000004, 0x0000000E);
if(go==15) XIo_Out32(0x50000004, 0x0000000F);
if(go==16) XIo_Out32(0x50000004, 0x00000010);
if(go==17) XIo_Out32(0x50000004, 0x00000011);
if(go==18) XIo_Out32(0x50000004, 0x00000012);
printf("Feedback - go: %X\r\n",go);
}
//printf("Feedback - running\r\n");
//while (1) {
// Free the OPB-Bus
//XIo_Out32(0x50000004, 0x00000002);
//sleep(1);
// give Feedback
//i=XIo_In32(0x50000008);
//printf("Feedback - i: %X bzw. %d\r\n",i,i);
// Take back Bus
//XIo_Out32(0x50000004, 0x00000001);
//sleep(1);
// stop (go -> '0')
//if(i==2) {
// XIo_Out32(0x50000004, 0x00000002);
//}
//}
return 0;
}
/src/TestApp_Peripheral_LinkScr.ld
0,0 → 1,198
/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: Xilinx EDK 8.2.02EDK_Im_Sp2.4 */
/* */
/* Copyright (c) 2004 Xilinx, Inc. All rights reserved. */
/* */
/* Description : PowerPC405 Linker Script */
/* */
/*******************************************************************/
 
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000;
 
/* Define Memories in the system */
 
MEMORY
{
DDR_512MB_64Mx64_rank2_row13_col10_cl2_5_C_MEM0_BASEADDR : ORIGIN = 0x00000000, LENGTH = 0x10000000
DDR_512MB_64Mx64_rank2_row13_col10_cl2_5_C_MEM1_BASEADDR : ORIGIN = 0x10000000, LENGTH = 0x10000000
plb_bram_if_cntlr_1 : ORIGIN = 0xFFFE0000, LENGTH = 0x00020000
}
 
/* Specify the default entry point to the program */
 
ENTRY(_boot)
STARTUP(boot.o)
 
/* Define the sections, and where they are mapped in memory */
 
SECTIONS
{
.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > plb_bram_if_cntlr_1
 
.init : {
KEEP (*(.init))
} > plb_bram_if_cntlr_1
 
.fini : {
KEEP (*(.fini))
} > plb_bram_if_cntlr_1
 
.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > plb_bram_if_cntlr_1
 
.sdata2 : {
__sdata2_start = .;
*(.sdata2)
*(.gnu.linkonce.s2.*)
__sdata2_end = .;
} > plb_bram_if_cntlr_1
 
.sbss2 : {
__sbss2_start = .;
*(.sbss2)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > plb_bram_if_cntlr_1
 
.data : {
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__data_end = .;
} > plb_bram_if_cntlr_1
 
.got : {
*(.got)
} > plb_bram_if_cntlr_1
 
.got1 : {
*(.got1)
} > plb_bram_if_cntlr_1
 
.got2 : {
*(.got2)
} > plb_bram_if_cntlr_1
 
.ctors : {
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > plb_bram_if_cntlr_1
 
.dtors : {
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > plb_bram_if_cntlr_1
 
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > plb_bram_if_cntlr_1
 
.eh_frame : {
*(.eh_frame)
} > plb_bram_if_cntlr_1
 
.jcr : {
*(.jcr)
} > plb_bram_if_cntlr_1
 
.gcc_except_table : {
*(.gcc_except_table)
} > plb_bram_if_cntlr_1
 
.sdata : {
__sdata_start = .;
*(.sdata)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > plb_bram_if_cntlr_1
 
.sbss : {
__sbss_start = .;
*(.sbss)
*(.gnu.linkonce.sb.*)
*(.scommon)
__sbss_end = .;
} > plb_bram_if_cntlr_1
 
.tdata : {
__tdata_start = .;
*(.tdata)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > plb_bram_if_cntlr_1
 
.tbss : {
__tbss_start = .;
*(.tbss)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > plb_bram_if_cntlr_1
 
.bss : {
__bss_start = .;
*(.bss)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > plb_bram_if_cntlr_1
 
.boot0 : {
__boot0_start = .;
*(.boot0)
__boot0_end = .;
} > plb_bram_if_cntlr_1
 
.boot 0xFFFFFFFC : {
__boot_start = .;
*(.boot)
__boot_end = .;
}
 
/* Generate Stack and Heap Sections */
 
.stack : {
_stack_end = .;
. += _STACK_SIZE;
. = ALIGN(16);
__stack = .;
} > plb_bram_if_cntlr_1
 
.heap : {
. = ALIGN(16);
_heap_start = .;
. += _HEAP_SIZE;
. = ALIGN(16);
_heap_end = .;
} > plb_bram_if_cntlr_1
 
}
 

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