URL
https://opencores.org/ocsvn/mod_mult_exp/mod_mult_exp/trunk
Subversion Repositories mod_mult_exp
Compare Revisions
- This comparison shows the changes necessary to convert path
/mod_mult_exp/trunk/sim
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/rtl_sim/bin/Makefile
4,10 → 4,10
|
PLATFORM=xc3s500e-fg320-5 |
|
XILINX_DIR="D:/Programy/Xilinx/14.2/ISE_DS/ISE/bin/nt64/" |
FUSE=$(XILINX_DIR)"unwrapped/fuse.exe" |
XILINX_DIR="c:/Xilinx/14.2/ISE_DS/ISE/bin/nt64/" |
FUSE=$(XILINX_DIR)"fuse.exe" |
VHPCOMP=$(XILINX_DIR)"vhpcomp.exe" |
PATH=${XILINX}/bin/${SYSOP}:/cygdrive/D/Programy/Xilinx/14.2/ISE_DS/ISE/sysgen/bin/nt64/:/cygdrive/D/Programy/Xilinx/14.2/ISE_DS/ISE/lib/nt64/ |
PATH=${XILINX}/bin/${SYSOP}:/cygdrive/C/Xilinx/14.2/ISE_DS/ISE/sysgen/bin/nt64/:/cygdrive/C/Xilinx/14.2/ISE_DS/ISE/lib/nt64/ |
|
clean: |
$(RM) ./isim |
20,7 → 20,7
|
exports: |
export DISPLAY=:0 |
export XILINX=D:/Programy/Xilinx/14.2/ISE_DS/ISE |
export XILINX=C:/Xilinx/14.2/ISE_DS/ISE |
export SYSOP=nt64 |
export PATH=${XILINX}/bin/${SYSOP} |
export LD_LIBRARY_PATH=${XILINX}/lib/${SYSOP} |
64,3 → 64,17
|
run_ModExp512: exports ModExp512 |
"./ModExp512bitTB_isim_beh.exe" -intstyle ise -tclbatch isim.cmd -wdb "./ModExp512bitTB_isim_beh.wdb" |
|
ModExpComm512bitTB: exports |
$(VHPCOMP) -work isim_temp -intstyle ise -prj ./ModExpComm512bitTB_stx_beh.prj |
$(FUSE) -intstyle ise -incremental -o ModExpComm512bitTB_isim_beh.exe -prj ./ModExpComm512bitTB_beh.prj work.ModExpComm512bitTB |
|
run_ModExpComm512bitTB: exports ModExpComm512bitTB |
"./ModExpComm512bitTB_isim_beh.exe" -intstyle ise -tclbatch isim.cmd -wdb "./ModExpComm512bitTB_isim_beh.wdb" |
|
ShiftRegTB: exports |
$(VHPCOMP) -work isim_temp -intstyle ise -prj ./ShiftRegTB_stx_beh.prj |
$(FUSE) -intstyle ise -incremental -o ShiftRegTB_isim_beh.exe -prj ./ShiftRegTB_beh.prj work.ShiftRegTB |
|
run_ShiftRegTB: exports ShiftRegTB |
"./ShiftRegTB_isim_beh.exe" -intstyle ise -tclbatch isim.cmd -wdb "./ShiftRegTB_isim_beh.wdb" |
/rtl_sim/bin/ModExpComm512bitTB_beh.prj
0,0 → 1,17
vhdl work "../../../rtl/vhdl/mod_exp/blockMemory512/blockMemory.vhd" |
vhdl work "../../../rtl/vhdl/commons/properties.vhd" |
vhdl work "../../../rtl/vhdl/mod_mult/ModMultIter_SM.vhd" |
vhdl work "../../../rtl/vhdl/commons/MontMult4inMux.vhd" |
vhdl work "../../../rtl/vhdl/mod_mult/ModularMultiplierIterative.vhd" |
vhdl work "../../../rtl/vhdl/mod_exp/ModExpSM.vhd" |
vhdl work "../../../rtl/vhdl/commons/Reg.vhd" |
vhdl work "../../../rtl/vhdl/commons/counter.vhd" |
vhdl work "../../../rtl/vhdl/mod_exp/ModExp.vhd" |
vhdl work "../../../rtl/vhdl/communication/ModExpDataCtrlSM.vhd" |
vhdl work "../../../rtl/vhdl/commons/ShiftReg.vhd" |
vhdl work "../../../rtl/vhdl/commons/RS232RefComp.vhd" |
vhdl work "../../../rtl/vhdl/commons/dcms.vhd" |
vhdl work "../../../rtl/vhdl/commons/AsyncMux.vhd" |
vhdl work "../../../rtl/vhdl/communication/ModExpComm.vhd" |
vhdl work "../../../bench/vhdl/commons/txt_util.vhd" |
vhdl work "../../../bench/vhdl/communication/ModExpComm512bitTB.vhd" |
/rtl_sim/bin/ModExpComm512bitTB_stx_beh.prj
0,0 → 1,17
vhdl isim_temp "../../../rtl/vhdl/mod_exp/blockMemory512/blockMemory.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/properties.vhd" |
vhdl isim_temp "../../../rtl/vhdl/mod_mult/ModMultIter_SM.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/MontMult4inMux.vhd" |
vhdl isim_temp "../../../rtl/vhdl/mod_mult/ModularMultiplierIterative.vhd" |
vhdl isim_temp "../../../rtl/vhdl/mod_exp/ModExpSM.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/Reg.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/counter.vhd" |
vhdl isim_temp "../../../rtl/vhdl/mod_exp/ModExp.vhd" |
vhdl isim_temp "../../../rtl/vhdl/communication/ModExpDataCtrlSM.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/ShiftReg.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/RS232RefComp.vhd" |
vhdl work "../../../rtl/vhdl/commons/dcms.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/AsyncMux.vhd" |
vhdl isim_temp "../../../rtl/vhdl/communication/ModExpComm.vhd" |
vhdl isim_temp "../../../bench/vhdl/commons/txt_util.vhd" |
vhdl isim_temp "../../../bench/vhdl/communication/ModExpComm512bitTB.vhd" |
/rtl_sim/bin/ShiftRegTB_beh.prj
0,0 → 1,3
vhdl work "../../../rtl/vhdl/commons/properties.vhd" |
vhdl work "../../../rtl/vhdl/commons/ShiftReg.vhd" |
vhdl work "../../../bench/vhdl/commons/ShiftRegTB.vhd" |
/rtl_sim/bin/ShiftRegTB_stx_beh.prj
0,0 → 1,3
vhdl isim_temp "../../../rtl/vhdl/commons/properties.vhd" |
vhdl isim_temp "../../../rtl/vhdl/commons/ShiftReg.vhd" |
vhdl isim_temp "../../../bench/vhdl/commons/ShiftRegTB.vhd" |
/rtl_sim/bin/testData512bit/Base.txt
0,0 → 1,640
10101000 |
|
|
|
1 |
|
1 |
|
1 |
|
10100001 |
1 |
|
|
|
|
1 |
|
1 |
|
11100001 |
1 |
|
|
|
|
1 |
1 |
1 |
1 |
10110111 |
1 |
1 |
1 |
|
1 |
1 |
|
1 |
1 |
11000010 |
|
1 |
|
|
|
|
1 |
1 |
|
01010100 |
|
|
1 |
|
1 |
|
1 |
|
|
11000000 |
|
|
|
|
|
|
1 |
1 |
1 |
01010110 |
|
1 |
1 |
|
1 |
|
1 |
|
1 |
01110001 |
1 |
|
|
|
1 |
1 |
1 |
|
1 |
10101110 |
|
1 |
1 |
1 |
|
1 |
|
1 |
|
01110010 |
|
1 |
|
|
1 |
1 |
1 |
|
1 |
11011010 |
|
1 |
|
1 |
1 |
|
1 |
1 |
|
10111101 |
1 |
|
1 |
1 |
1 |
1 |
|
1 |
1 |
01001010 |
|
1 |
|
1 |
|
|
1 |
|
|
00100011 |
1 |
1 |
|
|
|
1 |
|
|
|
01110111 |
1 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
00001011 |
1 |
1 |
|
1 |
|
|
|
|
|
00110001 |
1 |
|
|
|
1 |
1 |
|
|
|
10101000 |
|
|
|
1 |
|
1 |
|
1 |
|
11110001 |
1 |
|
|
|
1 |
1 |
1 |
1 |
|
11101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
|
01001110 |
|
1 |
1 |
1 |
|
|
1 |
|
1 |
10111010 |
|
1 |
|
1 |
1 |
1 |
|
1 |
|
10000011 |
1 |
1 |
|
|
|
|
|
1 |
|
10100010 |
|
1 |
|
|
|
1 |
|
1 |
|
10011010 |
|
1 |
|
1 |
1 |
|
|
1 |
1 |
10110010 |
|
1 |
|
|
1 |
1 |
|
1 |
1 |
11110010 |
|
1 |
|
|
1 |
1 |
1 |
1 |
|
11111000 |
|
|
|
1 |
1 |
1 |
1 |
1 |
|
01001111 |
1 |
1 |
1 |
1 |
|
|
1 |
|
|
10010011 |
1 |
1 |
|
|
1 |
|
|
1 |
1 |
10101010 |
|
1 |
|
1 |
|
1 |
|
1 |
1 |
11000010 |
|
1 |
|
|
|
|
1 |
1 |
|
00100101 |
1 |
|
1 |
|
|
1 |
|
|
|
10001010 |
|
1 |
|
1 |
|
|
|
1 |
|
00010101 |
1 |
|
1 |
|
1 |
|
|
|
|
10111010 |
|
1 |
|
1 |
1 |
1 |
|
1 |
|
01111110 |
|
1 |
1 |
1 |
1 |
1 |
1 |
|
1 |
00111011 |
1 |
1 |
|
1 |
1 |
1 |
|
|
|
10101010 |
|
1 |
|
1 |
|
1 |
|
1 |
1 |
01010000 |
|
|
|
|
1 |
|
1 |
|
1 |
11100010 |
|
1 |
|
|
|
1 |
1 |
1 |
1 |
10111011 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
01011101 |
1 |
|
1 |
1 |
1 |
|
1 |
|
|
00011111 |
1 |
1 |
1 |
1 |
1 |
|
|
|
|
00100101 |
1 |
|
1 |
|
|
1 |
|
|
|
10101101 |
1 |
|
1 |
1 |
|
1 |
|
1 |
|
00100100 |
|
|
1 |
|
|
1 |
|
|
1 |
11010010 |
|
1 |
|
|
1 |
|
1 |
1 |
1 |
10100111 |
1 |
1 |
1 |
|
|
1 |
|
1 |
|
11000110 |
|
1 |
1 |
|
|
|
1 |
1 |
1 |
01101110 |
|
1 |
1 |
1 |
|
1 |
1 |
|
|
01101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
|
1 |
00010011 |
1 |
1 |
|
|
1 |
|
|
|
|
11110000 |
|
|
|
|
1 |
1 |
1 |
1 |
1 |
10000000 |
|
|
|
|
|
|
|
1 |
|
11100110 |
|
1 |
1 |
|
|
1 |
1 |
1 |
|
10100100 |
|
|
1 |
|
|
1 |
|
1 |
|
01000011 |
1 |
1 |
|
|
|
|
1 |
|
|
11001100 |
|
|
1 |
1 |
|
|
1 |
1 |
1 |
10000111 |
1 |
1 |
1 |
|
|
|
|
1 |
1 |
10010011 |
1 |
1 |
|
|
1 |
|
|
1 |
1 |
11010001 |
1 |
|
|
|
1 |
|
1 |
1 |
1 |
11001110 |
|
1 |
1 |
1 |
|
|
1 |
1 |
|
/rtl_sim/bin/testData512bit/Exponent.txt
0,0 → 1,640
00010111 |
1 |
1 |
1 |
|
1 |
|
|
|
1 |
11011100 |
|
|
1 |
1 |
1 |
|
1 |
1 |
|
00000101 |
1 |
|
1 |
|
|
|
|
|
1 |
00010100 |
|
|
1 |
|
1 |
|
|
|
1 |
01000011 |
1 |
1 |
|
|
|
|
1 |
|
|
10000101 |
1 |
|
1 |
|
|
|
|
1 |
|
01111110 |
|
1 |
1 |
1 |
1 |
1 |
1 |
|
1 |
11111000 |
|
|
|
1 |
1 |
1 |
1 |
1 |
|
10011111 |
1 |
1 |
1 |
1 |
1 |
|
|
1 |
1 |
01101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
|
1 |
01010010 |
|
1 |
|
|
1 |
|
1 |
|
|
11110101 |
1 |
|
1 |
|
1 |
1 |
1 |
1 |
1 |
01011001 |
1 |
|
|
1 |
1 |
|
1 |
|
1 |
00111010 |
|
1 |
|
1 |
1 |
1 |
|
|
1 |
00000110 |
|
1 |
1 |
|
|
|
|
|
1 |
11110100 |
|
|
1 |
|
1 |
1 |
1 |
1 |
|
01110110 |
|
1 |
1 |
|
1 |
1 |
1 |
|
|
10111011 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
01000101 |
1 |
|
1 |
|
|
|
1 |
|
|
00111010 |
|
1 |
|
1 |
1 |
1 |
|
|
1 |
10101001 |
1 |
|
|
1 |
|
1 |
|
1 |
1 |
01101100 |
|
|
1 |
1 |
|
1 |
1 |
|
1 |
11000110 |
|
1 |
1 |
|
|
|
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
00001110 |
|
1 |
1 |
1 |
|
|
|
|
|
01010101 |
1 |
|
1 |
|
1 |
|
1 |
|
1 |
01011100 |
|
|
1 |
1 |
1 |
|
1 |
|
1 |
00110110 |
|
1 |
1 |
|
1 |
1 |
|
|
1 |
10111000 |
|
|
|
1 |
1 |
1 |
|
1 |
1 |
10010001 |
1 |
|
|
|
1 |
|
|
1 |
|
00011110 |
|
1 |
1 |
1 |
1 |
|
|
|
1 |
11101101 |
1 |
|
1 |
1 |
|
1 |
1 |
1 |
1 |
00111111 |
1 |
1 |
1 |
1 |
1 |
1 |
|
|
1 |
00011000 |
|
|
|
1 |
1 |
|
|
|
1 |
01101100 |
|
|
1 |
1 |
|
1 |
1 |
|
1 |
10101111 |
1 |
1 |
1 |
1 |
|
1 |
|
1 |
1 |
00100111 |
1 |
1 |
1 |
|
|
1 |
|
|
1 |
10001010 |
|
1 |
|
1 |
|
|
|
1 |
|
11111101 |
1 |
|
1 |
1 |
1 |
1 |
1 |
1 |
|
11011101 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
1 |
01000100 |
|
|
1 |
|
|
|
1 |
|
1 |
10100100 |
|
|
1 |
|
|
1 |
|
1 |
|
10000011 |
1 |
1 |
|
|
|
|
|
1 |
|
00001010 |
|
1 |
|
1 |
|
|
|
|
1 |
00010111 |
1 |
1 |
1 |
|
1 |
|
|
|
1 |
10111011 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
11001001 |
1 |
|
|
1 |
|
|
1 |
1 |
1 |
11001000 |
|
|
|
1 |
|
|
1 |
1 |
|
01111010 |
|
1 |
|
1 |
1 |
1 |
1 |
|
|
10011101 |
1 |
|
1 |
1 |
1 |
|
|
1 |
|
10010001 |
1 |
|
|
|
1 |
|
|
1 |
|
00101001 |
1 |
|
|
1 |
|
1 |
|
|
|
01010011 |
1 |
1 |
|
|
1 |
|
1 |
|
1 |
01010100 |
|
|
1 |
|
1 |
|
1 |
|
|
01010101 |
1 |
|
1 |
|
1 |
|
1 |
|
1 |
11011101 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
1 |
10001110 |
|
1 |
1 |
1 |
|
|
|
1 |
1 |
00000001 |
1 |
|
|
|
|
|
|
|
|
10110010 |
|
1 |
|
|
1 |
1 |
|
1 |
1 |
00111100 |
|
|
1 |
1 |
1 |
1 |
|
|
1 |
00010100 |
|
|
1 |
|
1 |
|
|
|
1 |
10001110 |
|
1 |
1 |
1 |
|
|
|
1 |
1 |
00111010 |
|
1 |
|
1 |
1 |
1 |
|
|
1 |
00010110 |
|
1 |
1 |
|
1 |
|
|
|
|
/rtl_sim/bin/testData512bit/Modulus.txt
0,0 → 1,640
00001111 |
1 |
1 |
1 |
1 |
|
|
|
|
1 |
01001010 |
|
1 |
|
1 |
|
|
1 |
|
|
01011001 |
1 |
|
|
1 |
1 |
|
1 |
|
1 |
00101110 |
|
1 |
1 |
1 |
|
1 |
|
|
1 |
00101101 |
1 |
|
1 |
1 |
|
1 |
|
|
1 |
10011101 |
1 |
|
1 |
1 |
1 |
|
|
1 |
|
01101000 |
|
|
|
1 |
|
1 |
1 |
|
|
10000100 |
|
|
1 |
|
|
|
|
1 |
1 |
11011110 |
|
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
00110111 |
1 |
1 |
1 |
|
1 |
1 |
|
|
|
11011100 |
|
|
1 |
1 |
1 |
|
1 |
1 |
|
00010001 |
1 |
|
|
|
1 |
|
|
|
1 |
10100010 |
|
1 |
|
|
|
1 |
|
1 |
|
11010001 |
1 |
|
|
|
1 |
|
1 |
1 |
1 |
01000011 |
1 |
1 |
|
|
|
|
1 |
|
|
10010101 |
1 |
|
1 |
|
1 |
|
|
1 |
1 |
01000011 |
1 |
1 |
|
|
|
|
1 |
|
|
10001000 |
|
|
|
1 |
|
|
|
1 |
1 |
11001001 |
1 |
|
|
1 |
|
|
1 |
1 |
1 |
01000111 |
1 |
1 |
1 |
|
|
|
1 |
|
1 |
10100000 |
|
|
|
|
|
1 |
|
1 |
1 |
10101000 |
|
|
|
1 |
|
1 |
|
1 |
|
01001111 |
1 |
1 |
1 |
1 |
|
|
1 |
|
|
11111100 |
|
|
1 |
1 |
1 |
1 |
1 |
1 |
1 |
00010100 |
|
|
1 |
|
1 |
|
|
|
1 |
11010011 |
1 |
1 |
|
|
1 |
|
1 |
1 |
|
01110001 |
1 |
|
|
|
1 |
1 |
1 |
|
1 |
10011011 |
1 |
1 |
|
1 |
1 |
|
|
1 |
|
10100111 |
1 |
1 |
1 |
|
|
1 |
|
1 |
|
11010001 |
1 |
|
|
|
1 |
|
1 |
1 |
1 |
01010001 |
1 |
|
|
|
1 |
|
1 |
|
|
10111100 |
|
|
1 |
1 |
1 |
1 |
|
1 |
|
11000001 |
1 |
|
|
|
|
|
1 |
1 |
|
10000111 |
1 |
1 |
1 |
|
|
|
|
1 |
1 |
10011010 |
|
1 |
|
1 |
1 |
|
|
1 |
1 |
01001000 |
|
|
|
1 |
|
|
1 |
|
1 |
11101011 |
1 |
1 |
|
1 |
|
1 |
1 |
1 |
1 |
10111000 |
|
|
|
1 |
1 |
1 |
|
1 |
1 |
01001110 |
|
1 |
1 |
1 |
|
|
1 |
|
1 |
01110111 |
1 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
01101000 |
|
|
|
1 |
|
1 |
1 |
|
|
11011000 |
|
|
|
1 |
1 |
|
1 |
1 |
1 |
00011110 |
|
1 |
1 |
1 |
1 |
|
|
|
1 |
01110000 |
|
|
|
|
1 |
1 |
1 |
|
|
11110111 |
1 |
1 |
1 |
|
1 |
1 |
1 |
1 |
|
10110000 |
|
|
|
|
1 |
1 |
|
1 |
|
10001101 |
1 |
|
1 |
1 |
|
|
|
1 |
1 |
10101011 |
1 |
1 |
|
1 |
|
1 |
|
1 |
|
01011010 |
|
1 |
|
1 |
1 |
|
1 |
|
1 |
10000101 |
1 |
|
1 |
|
|
|
|
1 |
|
10101000 |
|
|
|
1 |
|
1 |
|
1 |
|
10100101 |
1 |
|
1 |
|
|
1 |
|
1 |
1 |
01100111 |
1 |
1 |
1 |
|
|
1 |
1 |
|
|
10101001 |
1 |
|
|
1 |
|
1 |
|
1 |
1 |
01101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
|
1 |
01010010 |
|
1 |
|
|
1 |
|
1 |
|
|
00000111 |
1 |
1 |
1 |
|
|
|
|
|
|
01000000 |
|
|
|
|
|
|
1 |
|
|
11110101 |
1 |
|
1 |
|
1 |
1 |
1 |
1 |
1 |
01001011 |
1 |
1 |
|
1 |
|
|
1 |
|
1 |
00111101 |
1 |
|
1 |
1 |
1 |
1 |
|
|
|
00110010 |
|
1 |
|
|
1 |
1 |
|
|
|
00111011 |
1 |
1 |
|
1 |
1 |
1 |
|
|
|
11011110 |
|
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
/rtl_sim/bin/testData512bit/Residuum.txt
0,0 → 1,640
00111100 |
|
|
1 |
1 |
1 |
1 |
|
|
1 |
01011001 |
1 |
|
|
1 |
1 |
|
1 |
|
1 |
11011010 |
|
1 |
|
1 |
1 |
|
1 |
1 |
|
00010101 |
1 |
|
1 |
|
1 |
|
|
|
|
10110100 |
|
|
1 |
|
1 |
1 |
|
1 |
1 |
01000011 |
1 |
1 |
|
|
|
|
1 |
|
|
01101010 |
|
1 |
|
1 |
|
1 |
1 |
|
1 |
11110101 |
1 |
|
1 |
|
1 |
1 |
1 |
1 |
1 |
00000111 |
1 |
1 |
1 |
|
|
|
|
|
|
01010010 |
|
1 |
|
|
1 |
|
1 |
|
|
11100001 |
1 |
|
|
|
|
1 |
1 |
1 |
1 |
11110001 |
1 |
|
|
|
1 |
1 |
1 |
1 |
|
10100001 |
1 |
|
|
|
|
1 |
|
1 |
|
01111011 |
1 |
1 |
|
1 |
1 |
1 |
1 |
|
1 |
10011010 |
|
1 |
|
1 |
1 |
|
|
1 |
1 |
00101001 |
1 |
|
|
1 |
|
1 |
|
|
|
11110000 |
|
|
|
|
1 |
1 |
1 |
1 |
1 |
00010000 |
|
|
|
|
1 |
|
|
|
|
10100111 |
1 |
1 |
1 |
|
|
1 |
|
1 |
|
10010001 |
1 |
|
|
|
1 |
|
|
1 |
|
11010011 |
1 |
1 |
|
|
1 |
|
1 |
1 |
|
00011000 |
|
|
|
1 |
1 |
|
|
|
1 |
00001011 |
1 |
1 |
|
1 |
|
|
|
|
|
00110101 |
1 |
|
1 |
|
1 |
1 |
|
|
1 |
10011111 |
1 |
1 |
1 |
1 |
1 |
|
|
1 |
1 |
11101110 |
|
1 |
1 |
1 |
|
1 |
1 |
1 |
1 |
00110001 |
1 |
|
|
|
1 |
1 |
|
|
|
00101001 |
1 |
|
|
1 |
|
1 |
|
|
|
11001100 |
|
|
1 |
1 |
|
|
1 |
1 |
1 |
11010100 |
|
|
1 |
|
1 |
|
1 |
1 |
1 |
10010000 |
|
|
|
|
1 |
|
|
1 |
1 |
11011101 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
1 |
10011010 |
|
1 |
|
1 |
1 |
|
|
1 |
1 |
11100110 |
|
1 |
1 |
|
|
1 |
1 |
1 |
|
01100000 |
|
|
|
|
|
1 |
1 |
|
1 |
11010011 |
1 |
1 |
|
|
1 |
|
1 |
1 |
|
01011101 |
1 |
|
1 |
1 |
1 |
|
1 |
|
|
10001001 |
1 |
|
|
1 |
|
|
|
1 |
|
11001011 |
1 |
1 |
|
1 |
|
|
1 |
1 |
|
00011100 |
|
|
1 |
1 |
1 |
|
|
|
|
10001000 |
|
|
|
1 |
|
|
|
1 |
1 |
01000010 |
|
1 |
|
|
|
|
1 |
|
1 |
00001100 |
|
|
1 |
1 |
|
|
|
|
1 |
11101000 |
|
|
|
1 |
|
1 |
1 |
1 |
1 |
10000000 |
|
|
|
|
|
|
|
1 |
|
00000100 |
|
|
1 |
|
|
|
|
|
|
11101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
1 |
|
10111011 |
1 |
1 |
|
1 |
1 |
1 |
|
1 |
1 |
10101010 |
|
1 |
|
1 |
|
1 |
|
1 |
1 |
10010100 |
|
|
1 |
|
1 |
|
|
1 |
|
11100000 |
|
|
|
|
|
1 |
1 |
1 |
|
00110110 |
|
1 |
1 |
|
1 |
1 |
|
|
1 |
10101101 |
1 |
|
1 |
1 |
|
1 |
|
1 |
|
00010010 |
|
1 |
|
|
1 |
|
|
|
1 |
01111010 |
|
1 |
|
1 |
1 |
1 |
1 |
|
|
10100111 |
1 |
1 |
1 |
|
|
1 |
|
1 |
|
11101101 |
1 |
|
1 |
1 |
|
1 |
1 |
1 |
1 |
00110110 |
|
1 |
1 |
|
1 |
1 |
|
|
1 |
10101100 |
|
|
1 |
1 |
|
1 |
|
1 |
1 |
10001110 |
|
1 |
1 |
1 |
|
|
|
1 |
1 |
01010001 |
1 |
|
|
|
1 |
|
1 |
|
|
01101111 |
1 |
1 |
1 |
1 |
|
1 |
1 |
|
1 |
10100110 |
|
1 |
1 |
|
|
1 |
|
1 |
1 |
00100000 |
|
|
|
|
|
1 |
|
|
|
/rtl_sim/bin/testData512bit/Result.txt
0,0 → 1,21
Generated result file: |
Base: |
10831972010009692284864743082963908985928244572237504978567815597954452424901701848115907348099319027887255346705501542390228546770547307022309796259930536 in decimal |
ced19387cc43a4e680f0136f6ec6a7d224ad251f5dbbe250aa3b7eba158a25c2aa934ff8f2b29aa283ba4eeff1a8310b77234abdda72ae7156c054c2b7e1a1a8 in hex |
|
Modulus: |
11639194216848075599002265489360912001411488135138961225285267565441921553320210324625995654671521634712013831000392536053201786146999373798311679376312847 in decimal |
de3b323d4bf54007526fa967a5a8855aab8db0f7701ed868774eb8eb489a87c1bc51d1a79b71d314fc4fa8a047c988439543d1a211dc37de84689d2d2e594a0f in hex |
|
Exponent: |
1164213079911476522452523716613118512153792329806743382289257300977572318091588414675225325908322428116294194315992613761814533537627230020523566408522775 in decimal |
163a8e143cb2018edd55545329919d7ac8c9bb170a83a444ddfd8a27af6c183fed1e91b8365c550effc66ca93a45bb76f4063a59f5526f9ff87e85431405dc17 in hex |
|
Residuum: |
1710026381007983649390259627245755642172838934666512596966326197048317423109472713444486555154343967450576033188072022772979735585191761951832684734601532 in decimal |
20a66f518eac36eda77a12ad36e094aabbef0480e80c42881ccb895dd360e69add90d4cc2931ee9f350b18d391a710f0299a7ba1f1e15207f56a43b415da593c in hex |
|
Expected result: |
10215434590127773452736997130423262496733403688918174389107454937571941952783927288073293172190106158494574006191363817891568897784169824931779958064171842 in decimal |
c30c01107478845324720b6a680fa53034b26a2bc58fceb3b8de8edb00abe2c17557cc9865fdbc1b9fc7700daa41c63c8480235342dba66d9601f1141abe4b42 in hex |
|
rtl_sim/bin/testData512bit
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property