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Rev 1 → Rev 2

/assembler/assembler.py
0,0 → 1,229
#!/usr/bin/python
 
import sys
import re
 
tipo1=['ldi','ldm','stm', 'adi']
tipo2=['cmp','add','sub','and','oor','xor']
tipo3=['jmp','jpz','jnz','jpc','jnc','csr', 'csz', 'cnz', 'csc', 'cnc']
tipo4=['sl0','sl1','sr0','sr1','rrl','rrr', 'not']
tipo5=['ret', 'nop']
#instruccion opcode
opcodes={}
opcodes['ldi']=2;
opcodes['ldm']=3;
opcodes['stm']=4;
opcodes['cmp']=5;
opcodes['add']=6;
opcodes['sub']=7;
opcodes['and']=8;
opcodes['oor']=9;
opcodes['xor']=10;
opcodes['jmp']=11;
opcodes['jpz']=12;
opcodes['jnz']=13;
opcodes['jpc']=14;
opcodes['jnc']=15;
opcodes['csr']=16;
opcodes['ret']=17;
opcodes['adi']=18;
opcodes['csz']=19;
opcodes['cnz']=20;
opcodes['csc']=21;
opcodes['cnc']=22;
opcodes['sl0']=23;
opcodes['sl1']=24;
opcodes['sr0']=25;
opcodes['sr1']=26;
opcodes['rrl']=27;
opcodes['rrr']=28;
opcodes['not']=29;
opcodes['nop']=30;
 
 
 
def verify_args(line):
if len(line)>1:
line_split=line.split()
opcode=line_split[0]
if opcode in tipo1+tipo2+tipo4:
args=re.findall(r'r(\d+)',line)
else:
return 'invalid command'
if not opcode in tipo1+tipo2+tipo3+tipo4+tipo5:
return 'invalid command'
else:
if opcode in tipo1:
arg2=line.split(',')
direccion=arg2[1]
if len(args)!=1 :
return 'incorrect number of arguments'
else:
if int(args[0])<0 or int(args[0])>7:
return 'arg1 out of range (0-7)'
else:
if int(direccion)<0 or int(direccion)>255:
return 'addr out of range (0-255)'
else:
return 'ok'
if opcode in tipo2:
if len(args)!=2:
return 'incorrect number of arguments'
else:
if int(args[0])<0 or int(args[0])>7:
return 'arg1 out of range (0-7)'
else:
if int(args[1])<0 or int(args[1])>7:
return 'arg2 out of range (0-7)'
else:
return 'ok'
if opcode in tipo3:
addr=line_split[1]
if len(line_split)!=2:
return 'incorrect argument'
else:
if int(addr)<0 or int(addr)>2048:
return 'addr out of range (0-2048)'
else:
return 'ok'
if opcode in tipo4:
if len(args)!=2 :
return 'incorrect number of arguments'
else:
if int(args[1])<0 or int(args[1])>7:
return 'arg1 out of range (0-7)'
else:
return 'ok'
if opcode in tipo5:
return 'ok'
 
def extract_info(file,flag):
tags={}
f=open(file,'rU')
text=f.read()
f.close()
text=text.lower()
#para quitar los saltos de linea '\n' '\t' al final del archivo
while text[-1]=='\n' or text[-1]=='\t' or text[-1]=='\s' or text[-1]=='\r':
text=text[:-1]
lines=text.split('\n')
line_number=0
lines2=[]
for line in lines:
if len(line)!=0:
line_split=line.split()
opcode=line_split[0]
if not opcode in tipo1+tipo2+tipo3+tipo4+tipo5:
if not opcode in tags:
tags[opcode]=line_number
line=' '.join(line_split[1:])
line='\t'+line
else:
print 'label used more than once'
lines2.append(line)
line_number+=1
text2='\n'.join(lines2)
##parte que se encarga de reemplazar los tags en las direcciones
for tags_elements in tags.keys():
line2=text2.split(tags_elements)
text2=str(tags[tags_elements]).join(line2)
lines=text2.split('\n')
error_line=0
text_asm=''
for line in lines:
erro=verify_args(line)
if erro!='ok':
print 'error in line:',error_line
print line, '->', erro,'\n'
else:
line_split=line.split()
opcode=line_split[0]
if opcode in tipo1+tipo2+tipo4:
args=re.findall(r'r(\d+)',line)
if opcode in tipo1:
arg2=line.split(',')
direccion=arg2[1]
dato=(opcodes[opcode]<<11) | (int(args[0])<<8) | int(direccion)
text_asm+= '%X' % dato + '\n'
if opcode in tipo2:
dato=(opcodes[opcode]<<11) | (int(args[0])<<8) | (int(args[1])<<5)
text_asm+= '%X' % dato + '\n'
if opcode in tipo3:
addr=line_split[1]
dato=(opcodes[opcode]<<11) | int(addr)
text_asm+= '%X' % dato + '\n'
if opcode in tipo4:
dato=(opcodes[opcode]<<11) | (int(args[1])<<8)
text_asm+= '%X' % dato + '\n'
if opcode in tipo5:
dato=(opcodes[opcode]<<11)
text_asm+= '%X' % dato + '\n'
error_line+=1
line_show=text2.split('\n')
line_text=text_asm.split('\n')
if flag:
print 'addr inst\t\t\t\tasm\n'
for i in range(len(line_show)):
esp=4-len(line_text[i])
val=''
while esp:
esp-=1
val+=' '
ntabs=5-len(str(i))
tab=' '
etab=''
ctabs=0
while ctabs<ntabs:
ctabs+=1
etab+=tab
print str(i)+etab+line_text[i]+val+'\t'+line_show[i]
line_zero=''
 
for i in range(2048-len(line_show)):
line_zero=line_zero+'0000\n'
text_asm+=line_zero
return text_asm
 
def main():
args = sys.argv[1:]
if not args:
print 'uso: ./assembler.py [-s] archivo.asm'
sys.exit(1)
show = False
if args[0] == '-s':
show = True
del args[0]
text=extract_info(args[0],show)
outf = open('instructions.mem', 'w')
outf.write(text)
outf.close()
 
 
if __name__ == '__main__':
main()
/assembler/video_pong.asm
0,0 → 1,408
ldi r0,0
csr negro
ldi r1,25
stm r1,21
stm r1,22
ldi r1,5
stm r1,11
ldi r1,75
stm r1,12
stm r0,5
stm r0,6
ldi r1,1
stm r0,8
stm r1,9
punto ldi r1,40
stm r1,10
ldi r1,30
stm r1,20
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
csr dbl
inicio csr marca
csr vermarc
csr negro
csr marca
ldm r2,21
ldm r5,32
ldi r6,1
and r6,r5
ldi r7,2
and r7,r5
sr0 r7
csr moli
stm r2,21
ldm r2,22
ldm r5,32
ldi r6,4
and r6,r5
sr0 r6
sr0 r6
ldi r7,8
and r7,r5
sr0 r7
sr0 r7
sr0 r7
csr moli
stm r2,22
csr cobo
csr mobo
ldm r1,11
ldm r2,21
ldi r4,7
csr lineav
ldm r1,12
ldm r2,22
ldi r4,7
csr lineav
csr bola
csr delay
csr delay
csr delay
csr delay
ldi r7,1
stm r7,128
stm r0,128
jmp inicio
delay ldi r1,0
ldi r2,0
ldi r3,255
pat04 cmp r1,r3
jpz pat03
pat02 cmp r2,r3
jpz pat01
adi r2,1
jmp pat02
pat01 adi r1,1
ldi r2,0
jmp pat04
pat03 ret
bola ldm r1,10
ldm r2,20
ldi r4,7
stm r1,32
stm r2,64
stm r4,96
csr we
ret
mobo ldm r1,10
ldm r2,20
ldm r3,8
ldm r4,9
ldi r5,1
cmp r3,r5
jpz comp12
sub r2,r5
jmp comp13
comp12 adi r2,1
comp13 cmp r4,r5
jnz comp14
adi r1,1
jmp comp15
comp14 sub r1,r5
comp15 stm r1,10
stm r2,20
ret
cobo ldm r1,10
ldm r2,20
ldi r3,78
ldi r4,58
ldi r7,2
cmp r1,r7
jnz comp04
ldm r6,6
adi r6,1
stm r6,6
ldi r6,1
stm r6,9
jmp punto
comp04 cmp r1,r3
jnz comp05
ldm r6,5
adi r6,1
stm r6,5
stm r0,9
jmp punto
comp05 cmp r2,r7
jnz comp06
ldi r6,1
stm r6,8
comp06 cmp r2,r4
jnz comp07
stm r0,8
comp07 ldm r3,11
ldm r4,21
adi r3,1
cmp r1,r3
jnz comp08
cmp r2,r4
jpz comp09
adi r4,1
cmp r2,r4
jpz comp09
adi r4,1
cmp r2,r4
jpz comp09
adi r4,1
cmp r2,r4
jpz comp09
adi r4,1
cmp r2,r4
jpz comp09
adi r4,1
cmp r2,r4
jnz comp08
comp09 ldi r6,1
stm r6,9
comp08 ldm r3,12
ldi r6,1
ldm r4,22
sub r4,r6
cmp r1,r3
jnz comp10
cmp r2,r4
jpz comp11
adi r4,1
cmp r2,r4
jpz comp11
adi r4,1
cmp r2,r4
jpz comp11
adi r4,1
cmp r2,r4
jpz comp11
adi r4,1
cmp r2,r4
jpz comp11
adi r4,1
cmp r2,r4
jnz comp10
comp11 stm r0,9
comp10 ret
moli ldi r3,1
ldi r4,55
ldi r5,2
cmp r6,r3
jnz comp03
cmp r2,r3
jpz finmol
sub r2,r5
comp03 cmp r7,r3
jnz finmol
cmp r2,r4
jpz finmol
add r2,r5
finmol ret
marca ldm r5,5
ldi r1,19
ldi r2,5
ldi r4,6
csr impnum
ldm r5,6
ldi r1,57
ldi r2,5
csr impnum
ret
vermarc ldm r1,5
ldm r2,6
ldi r3,6
cmp r1,r3
jnz comp01
ldm r1,12
ldm r2,22
ldi r4,4
csr lineav
gana1 jmp gana1
comp01 ldi r3,6
cmp r2,r3
jnz comp02
ldm r1,11
ldm r2,21
ldi r4,4
csr lineav
gana2 jmp gana2
comp02 ret
lineav ldi r3,5
add r3,r2
con cmp r2,r3
jnc ter
stm r2, 64
stm r1, 32
stm r4, 96
csr we
adi r2,1
jmp con
ter ret
negro ldi r7,1
stm r7,160
stm r0,96
ldi r1,80
ldi r2,60
ldi r3,0
ldi r4,0
nextc cmp r4,r1
jpz inc_fil
stm r3,64
stm r4,32
adi r4,1
jmp nextc
inc_fil ldi r4,0
cmp r3,r2
jpz fneg
adi r3,1
jmp nextc
fneg stm r0,160
ret
we ldi r7,1
stm r7,160
ldi r7,0
stm r7,160
ret
dbl csr delay
csr delay
csr delay
ldm r1,11
ldm r2,21
ldi r4,2
csr lineav
ldm r1,12
ldm r2,22
ldi r4,2
csr lineav
csr bola
ret
segh ldi r3,3
add r3,r1
pon1 cmp r1,r3
jpz mer1
stm r2, 64
stm r1, 32
stm r4, 96
csr we
adi r1,1
jmp pon1
mer1 ldi r3,3
sub r1,r3
ret
segv ldi r3,3
add r3,r2
pon2 cmp r2,r3
jpz mer2
stm r2, 64
stm r1, 32
stm r4, 96
csr we
adi r2,1
jmp pon2
mer2 ldi r3,3
sub r2,r3
ret
sega csr segh
ret
segb ldi r7,2
add r1,r7
csr segv
ldi r7,2
sub r1,r7
ret
segc ldi r7,2
add r1,r7
add r2,r7
csr segv
ldi r7,2
sub r1,r7
sub r2,r7
ret
segd ldi r7,4
adi r2,4
csr segh
ldi r7,4
sub r2,r7
ret
sege ldi r7,2
adi r2,2
csr segv
ldi r7,2
sub r2,r7
ret
segf csr segv
ret
segg ldi r7,2
adi r2,2
csr segh
ldi r7,2
sub r2,r7
ret
impnum ldi r7,1
cmp r5,r7
jpz num01
ldi r7,4
cmp r5,r7
jpz num01
csr sega
num01 ldi r7,5
cmp r5,r7
jpz num02
ldi r7,6
cmp r5,r7
jpz num02
csr segb
num02 ldi r7,2
cmp r5,r7
jpz num03
csr segc
num03 ldi r7,1
cmp r5,r7
jpz num04
ldi r7,4
cmp r5,r7
jpz num04
ldi r7,7
cmp r5,r7
jpz num04
csr segd
num04 ldi r7,0
cmp r5,r7
jpz num05
ldi r7,2
cmp r5,r7
jpz num05
ldi r7,6
cmp r5,r7
jpz num05
ldi r7,8
cmp r5,r7
jnz num06
num05 csr sege
num06 ldi r7,1
cmp r5,r7
jpz num07
ldi r7,2
cmp r5,r7
jpz num07
ldi r7,3
cmp r5,r7
jpz num07
ldi r7,7
cmp r5,r7
jpz num07
csr segf
num07 ldi r7,0
cmp r5,r7
jpz num08
ldi r7,1
cmp r5,r7
jpz num08
csr segg
num08 ret
/assembler/example.asm
0,0 → 1,22
csr negro
end jmp end
 
negro stm r0,32
ldi r1,80
ldi r2,60
ldi r3,0
ldi r4,0
nextc cmp r4,r1
jpz inc_fil
stm r3,64
stm r4,32
adi r4,1
jmp nextc
inc_fil ldi r4,0
cmp r3,r2
jpz fneg
adi r3,1
jmp nextc
fneg ret
 
 

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