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URL https://opencores.org/ocsvn/neo430/neo430/trunk

Subversion Repositories neo430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neo430/trunk
    from Rev 153 to Rev 154
    Reverse comparison

Rev 153 → Rev 154

/README.md
70,7 → 70,7
## Differences to TI's Original MSP430(TM) Processors
 
- Completely different processor modules with different functionality
- Maximum of 32kB instruction memory and 28kB data memory
- Up to 48kB instruction memory and 12kB data memory
- Specific memory map – included NEO430 linker script and compilation script required
- Custom binary executable format
- Only 4 CPU interrupt channels (instead of 16)
/doc/NEO430.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/rtl/core/neo430_application_image.vhd
36,7 → 36,7
000025 => x"4036",
000026 => x"0284",
000027 => x"4037",
000028 => x"8008",
000028 => x"c008",
000029 => x"9506",
000030 => x"2404",
000031 => x"45b7",
/rtl/core/neo430_boot_rom.vhd
22,7 → 22,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 20.01.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
78,6 → 78,10
-- -----------------------------------------------------------------------------
mem_file_access: process(clk_i)
begin
-- check max size --
if (boot_size_c > 2*1024) then
assert false report "Boot ROM size out of range! Max 2kB!" severity error;
end if;
if rising_edge(clk_i) then
rden <= rden_i and acc_en;
if (acc_en = '1') then -- reduce switching activity when not accessed
/rtl/core/neo430_bootloader_image.vhd
61,13 → 61,13
000050 => x"4030",
000051 => x"f04a",
000052 => x"5392",
000053 => x"8004",
000053 => x"c004",
000054 => x"e392",
000055 => x"ffae",
000056 => x"1300",
000057 => x"120a",
000058 => x"421c",
000059 => x"8002",
000059 => x"c002",
000060 => x"403a",
000061 => x"f038",
000062 => x"930c",
359,7 → 359,7
000348 => x"f6d1",
000349 => x"1287",
000350 => x"4392",
000351 => x"8002",
000351 => x"c002",
000352 => x"5321",
000353 => x"4030",
000354 => x"f5b2",
384,10 → 384,10
000373 => x"4382",
000374 => x"ffe8",
000375 => x"4382",
000376 => x"8002",
000376 => x"c002",
000377 => x"40b2",
000378 => x"f068",
000379 => x"8000",
000379 => x"c000",
000380 => x"4382",
000381 => x"ffaa",
000382 => x"4392",
447,7 → 447,7
000436 => x"4382",
000437 => x"ffb2",
000438 => x"4382",
000439 => x"8004",
000439 => x"c004",
000440 => x"d032",
000441 => x"4000",
000442 => x"d232",
491,7 → 491,7
000480 => x"f732",
000481 => x"128a",
000482 => x"4037",
000483 => x"8004",
000483 => x"c004",
000484 => x"4036",
000485 => x"f210",
000486 => x"4035",
/rtl/core/neo430_dmem.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 29.01.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
73,9 → 73,13
-- -----------------------------------------------------------------------------
dmem_file_access: process(clk_i)
begin
-- check max size --
if (DMEM_SIZE > 12*1024) then
assert false report "D-mem size out of range! Max 12kB!" severity error;
end if;
if rising_edge(clk_i) then
rden <= rden_i and acc_en;
if (acc_en = '1') then
if (acc_en = '1') then -- reduce switching activity when not accessed
if (wren_i(0) = '1') then -- write low byte
dmem_file_l(addr) <= data_i(07 downto 0);
end if;
/rtl/core/neo430_imem.vhd
24,7 → 24,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 27.04.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
104,9 → 104,13
-- -----------------------------------------------------------------------------
imem_file_access: process(clk_i)
begin
-- check max size --
if (IMEM_SIZE > 48*1024) then
assert false report "I-mem size out of range! Max 48kB!" severity error;
end if;
if rising_edge(clk_i) then
rden <= rden_i and acc_en;
if (acc_en = '1') then
if (acc_en = '1') then -- reduce switching activity when not accessed
if (IMEM_AS_ROM = false) then -- implement IMEM as RAM
if (wren_i(0) = '1') and (upen_i = '1') then
imem_file_ram_l(addr) <= data_i(07 downto 0);
/rtl/core/neo430_package.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 22.06.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
30,7 → 30,7
 
-- Processor Hardware Version -------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(15 downto 0) := x"0184"; -- no touchy!
constant hw_version_c : std_ulogic_vector(15 downto 0) := x"0185"; -- no touchy!
 
-- Danger Zone! ---------------------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
62,7 → 62,7
constant imem_base_c : std_ulogic_vector(15 downto 0) := x"0000"; -- base address, fixed!
 
-- Main Memory: DMEM(RAM) --
constant dmem_base_c : std_ulogic_vector(15 downto 0) := x"8000"; -- base address, fixed!
constant dmem_base_c : std_ulogic_vector(15 downto 0) := x"C000"; -- base address, fixed!
 
-- Boot ROM --
constant boot_base_c : std_ulogic_vector(15 downto 0) := x"F000"; -- bootloader base address, fixed!
/rtl/core/neo430_top.vhd
44,7 → 44,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 29.06.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
59,8 → 59,8
generic (
-- general configuration --
CLOCK_SPEED : natural := 100000000; -- main clock in Hz
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE : std_ulogic_vector(15 downto 0) := x"0000"; -- custom user code
-- module configuration --
/rtl/top_templates/neo430_test.vhd
23,7 → 23,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 24.04.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
60,8 → 60,8
generic map (
-- general configuration --
CLOCK_SPEED => 100000000, -- main clock in Hz
IMEM_SIZE => 4*1024, -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE => 2*1024, -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE => 4*1024, -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE => 2*1024, -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE => x"CAFE", -- custom user code
-- module configuration --
/rtl/top_templates/neo430_top_avm.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 24.04.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
33,8 → 33,8
generic (
-- general configuration --
CLOCK_SPEED : natural := 100000000; -- main clock in Hz
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE : std_logic_vector(15 downto 0) := x"0000"; -- custom user code
-- module configuration --
139,8 → 139,8
generic map (
-- general configuration --
CLOCK_SPEED => CLOCK_SPEED, -- main clock in Hz
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE => usrcode_c, -- custom user code
-- module configuration --
/rtl/top_templates/neo430_top_axi4lite.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 03.08.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
33,8 → 33,8
generic (
-- general configuration --
CLOCK_SPEED : natural := 100000000; -- main clock in Hz
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE : std_logic_vector(15 downto 0) := x"0000"; -- custom user code
-- module configuration --
54,6 → 54,9
IMEM_AS_ROM : boolean := false -- implement IMEM as read-only memory? (default=false)
);
port (
-- global control --
clk_i : in std_logic; -- global clock, rising edge
rst_i : in std_logic; -- global reset, async, low-active
-- GPIO --
gpio_o : out std_logic_vector(15 downto 0); -- parallel output
gpio_i : in std_logic_vector(15 downto 0); -- parallel input
115,6 → 118,8
signal wb_core : wb_bus_t;
 
-- other signals for conversion --
signal clk_i_int : std_ulogic;
signal rst_i_int : std_ulogic;
signal gpio_o_int : std_ulogic_vector(15 downto 0);
signal gpio_i_int : std_ulogic_vector(15 downto 0);
signal pwm_o_int : std_ulogic_vector(02 downto 0);
129,11 → 134,12
constant usrcode_c : std_ulogic_vector(15 downto 0) := std_ulogic_vector(USER_CODE);
 
-- AXI arbiter --
signal read_trans : std_ulogic;
signal write_trans : std_ulogic;
signal pending_rd : std_ulogic; -- pending read transfer
signal pending_wr : std_ulogic; -- pending write transfer
signal adr_valid : std_ulogic;
signal read_trans : std_ulogic;
signal write_trans : std_ulogic;
signal pending_rd : std_ulogic; -- pending read transfer
signal pending_wr : std_ulogic; -- pending write transfer
signal adr_valid : std_ulogic;
signal axi_resp_ok : std_ulogic;
 
begin
 
143,8 → 149,8
generic map (
-- general configuration --
CLOCK_SPEED => CLOCK_SPEED, -- main clock in Hz
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE => usrcode_c, -- custom user code
-- module configuration --
196,6 → 202,8
 
-- Output Type Conversion ---------------------------------------------------
-- -----------------------------------------------------------------------------
clk_i_int <= std_ulogic(clk_i);
rst_i_int <= std_ulogic(rst_i);
gpio_i_int <= std_ulogic_vector(gpio_i);
uart_rxd_i_int <= std_ulogic(uart_rxd_i);
spi_miso_i_int <= std_ulogic(spi_miso_i);
222,12 → 230,11
begin
if rising_edge(m_axi_aclk) then
if (wb_core.cyc = '0') then
pending_rd <= '0';
pending_wr <= '0';
adr_valid <= '0';
m_axi_bready <= '0';
pending_rd <= '0';
pending_wr <= '0';
adr_valid <= '0';
else
-- read/write address valid --
-- address valid?
if ((wb_core.cyc and wb_core.stb) = '1') then
adr_valid <= '1';
elsif (m_axi_awready = '1') or (m_axi_arready = '1') then
245,12 → 252,6
elsif (m_axi_wready = '1') then
pending_wr <= '0';
end if;
-- write response channel -
if (write_trans = '1') then
m_axi_bready <= '1';
elsif (m_axi_bvalid = '1') then
m_axi_bready <= '0';
end if;
end if;
end if;
end process axi_arbiter;
257,24 → 258,29
 
-- Acknowledge Wishbone transfer --
wb_core.ack <= (pending_rd and std_ulogic(m_axi_rvalid)) or -- read transfer
(pending_wr and std_ulogic(m_axi_wready)); -- write transfer
(pending_wr and std_ulogic(m_axi_wready)) or -- write transfer
(axi_resp_ok and m_axi_bvalid); -- response channel
 
-- Read Address Channel --
m_axi_araddr <= std_logic_vector(wb_core.adr);
m_axi_arvalid <= std_logic(adr_valid) and std_logic(pending_rd);
m_axi_arvalid <= adr_valid;
 
-- Read Data Channel --
wb_core.di <= std_ulogic_vector(m_axi_rdata);
m_axi_rready <= std_logic(pending_rd);
m_axi_rready <= (not adr_valid) and pending_rd;
 
-- Write Address Channel --
m_axi_awaddr <= std_logic_vector(wb_core.adr);
m_axi_awvalid <= std_logic(adr_valid) and std_logic(pending_wr);
m_axi_awvalid <= adr_valid;
 
-- Write Data Channel --
m_axi_wdata <= std_logic_vector(wb_core.do);
m_axi_wstrb <= std_logic_vector(wb_core.sel);
m_axi_wvalid <= std_logic(pending_wr);
m_axi_wvalid <= (not adr_valid) and std_logic(pending_wr);
 
-- Write Response Channel --
axi_resp_ok <= '1' when (m_axi_rresp = "00") else '0';
m_axi_bready <= wb_core.cyc;
 
 
end neo430_top_axi4lite_rtl;
/rtl/top_templates/neo430_top_std_logic.vhd
19,7 → 19,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hannover, Germany 24.04.2018 #
-- # Stephan Nolting, Hannover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
33,8 → 33,8
generic (
-- general configuration --
CLOCK_SPEED : natural := 100000000; -- main clock in Hz
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE : natural := 4*1024; -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE : natural := 2*1024; -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE : std_logic_vector(15 downto 0) := x"0000"; -- custom user code
-- module configuration --
118,8 → 118,8
generic map (
-- general configuration --
CLOCK_SPEED => CLOCK_SPEED, -- main clock in Hz
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE => IMEM_SIZE, -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE => DMEM_SIZE, -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE => usrcode_c, -- custom user code
-- module configuration --
/sim/neo430_tb.vhd
22,7 → 22,7
-- # You should have received a copy of the GNU Lesser General Public License along with this #
-- # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
-- # ********************************************************************************************* #
-- # Stephan Nolting, Hanover, Germany 17.05.2018 #
-- # Stephan Nolting, Hanover, Germany 09.08.2018 #
-- #################################################################################################
 
library ieee;
86,8 → 86,8
generic map (
-- general configuration --
CLOCK_SPEED => f_clk_c, -- main clock in Hz
IMEM_SIZE => 4*1024, -- internal IMEM size in bytes, max 32kB (default=4kB)
DMEM_SIZE => 2*1024, -- internal DMEM size in bytes, max 28kB (default=2kB)
IMEM_SIZE => 4*1024, -- internal IMEM size in bytes, max 48kB (default=4kB)
DMEM_SIZE => 2*1024, -- internal DMEM size in bytes, max 12kB (default=2kB)
-- additional configuration --
USER_CODE => x"4788", -- custom user code
-- module configuration --
/sw/common/neo430_linker_script.x
19,7 → 19,7
/* # You should have received a copy of the GNU Lesser General Public License along with this # */
/* # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html # */
/* # ********************************************************************************************* # */
/* # Stephan Nolting, Hannover, Germany 22.04.2017 # */
/* # Stephan Nolting, Hannover, Germany 09.08.2018 # */
/* ################################################################################################# */
 
OUTPUT_ARCH(msp430)
29,7 → 29,7
MEMORY
{
rom (rx) : ORIGIN = 0x0000, LENGTH = 0x1000
ram (rwx) : ORIGIN = 0x8008, LENGTH = 0x0800 - 8
ram (rwx) : ORIGIN = 0xC008, LENGTH = 0x0800 - 8
}
 
/* Final executable layout */
/sw/example/trng_test/main.c
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from http://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 04.07.2018 #
// # Stephan Nolting, Hannover, Germany 03.08.2018 #
// #################################################################################################
 
 
37,12 → 37,16
* ------------------------------------------------------------ */
int main(void) {
 
char input_buffer[10];
uint16_t data;
uint32_t num, eternal;
 
// setup UART
neo430_uart_set_baud(BAUD_RATE);
USI_CT = (1<<USI_CT_EN);
 
// intro text
_neo430_printf("\nTrue Random Number Generator (TRNG) test program\n\n");
_neo430_printf("\nTrue Random Number Generator (TRNG) test program\n");
 
// check if TRNG unit was synthesized, exit if no TRNG controller is available
if (!(SYS_FEATURES & (1<<SYS_TRNG_EN))) {
50,16 → 54,34
return 1;
}
 
neo430_gpio_port_set(0); // clear GPIO output port
 
while(1) {
_neo430_printf("\nEnter number (8 hex chars) of displayed random numbers (0=infinite): 0x");
neo430_uart_scan(input_buffer, 8+1, 1);
num = neo430_hexstr_to_uint(input_buffer, 8);
if (num == 0)
eternal = 1;
else
eternal = 0;
 
// wait for any key
_neo430_printf("\n\nPress any key to start/stop\n\n");
_neo430_printf("\nPress any key to start/stop.\n\n");
while(!neo430_uart_char_received());
 
// intro header
_neo430_printf("#==============================================\n");
_neo430_printf("# generator NEO430TRNG\n");
_neo430_printf("#==============================================\n");
_neo430_printf("type: d\n");
_neo430_printf("count: %l\n", num);
_neo430_printf("numbit: 8\n");
 
neo430_trng_enable();
while(1) {
uint16_t d = (uint16_t)neo430_trng_get_byte();
_neo430_printf("%u, ", d);
neo430_gpio_port_set(d);
while (num-- || eternal) {
data = (uint16_t)neo430_trng_get_byte();
neo430_gpio_port_set(data & 1); // output LSB
_neo430_printf("%u\n", data);
 
// stop?
if (neo430_uart_char_received()) { // any key input?
/sw/lib/neo430/neo430.h
23,7 → 23,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 24.04.2018 #
// # Stephan Nolting, Hannover, Germany 09.08.2018 #
// #################################################################################################
 
#ifndef neo430_h
49,7 → 49,7
// ----------------------------------------------------------------------------
// Start of data memory (DMEN)
// ----------------------------------------------------------------------------
#define DMEM_ADDR_BASE 0x8000
#define DMEM_ADDR_BASE 0xC000
 
 
// ----------------------------------------------------------------------------
/sw/lib/neo430/neo430_usart.h
19,7 → 19,7
// # You should have received a copy of the GNU Lesser General Public License along with this #
// # source; if not, download it from https://www.gnu.org/licenses/lgpl-3.0.en.html #
// # ********************************************************************************************* #
// # Stephan Nolting, Hannover, Germany 03.08.2018 #
// # Stephan Nolting, Hannover, Germany 08.08.2018 #
// #################################################################################################
 
#ifndef neo430_usart_h
248,7 → 248,7
length--;
}
}
else if (c == '\r') // ENTER
else if (c == '\r') // carriage return
break;
else if ((c >= ' ') && (c <= '~') && (length < (max_size-1))) {
if (echo) {

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