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147,8 → 147,8
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.Internal Memories |
[IMPORTANT] |
For a _general_ first setup (technology-independent) use the _default_ memory architectures for the internal memories |
(IMEM and DMEM). These are located in `rtl/core/mem`, so **make sure to add the files from `rtl/core/mem` to your project, too**. + |
For a _general_ first setup (technology-independent) use the `*.default.vhd` memory architectures for the internal memories |
(IMEM and DMEM). These are located in `rtl/core/mem` so make sure to add the files to your project, too. + |
+ |
If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the |
default memory architectures by optimized platform-specific memory architectures. **Example:** The `setups/radiant/UPduino_v3` |
380,9 → 380,11
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[start=1] |
. Connect the primary UART (UART0) interface of your FPGA board to a serial port of your host computer. |
. Start a terminal program. In this tutorial, I am using TeraTerm for Windows. You can download it fore free |
from https://ttssh2.osdn.jp/index.html.en |
. Start a terminal program. In this tutorial, I am using TeraTerm for Windows. You can download it for free |
from https://ttssh2.osdn.jp/index.html.en . On Linux you could use GTKTerm, which you can get here |
https://github.com/Jeija/gtkterm.git (or install via your package manager). |
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[NOTE] |
_Any_ terminal program that can connect to a serial port should work. However, make sure the program |
can transfer data in _raw_ byte mode without any protocol overhead around it. |