URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/rtl
- from Rev 66 to Rev 67
- ↔ Reverse comparison
Rev 66 → Rev 67
/core/neorv32_application_image.vhd
1,6 → 1,6
-- The NEORV32 RISC-V Processor, https://github.com/stnolting/neorv32 |
-- Auto-generated memory init file (for APPLICATION) from source file <blink_led/main.bin> |
-- Size: 3352 bytes |
-- Size: 3468 bytes |
|
library ieee; |
use ieee.std_logic_1164.all; |
67,7 → 67,7
00000053 => x"00158593", |
00000054 => x"ff5ff06f", |
00000055 => x"00001597", |
00000056 => x"c3c58593", |
00000056 => x"cb058593", |
00000057 => x"80000617", |
00000058 => x"f1c60613", |
00000059 => x"80000697", |
114,15 → 114,15
00000100 => x"b0050513", |
00000101 => x"00112623", |
00000102 => x"088000ef", |
00000103 => x"738000ef", |
00000103 => x"780000ef", |
00000104 => x"00050c63", |
00000105 => x"6e8000ef", |
00000105 => x"730000ef", |
00000106 => x"00001537", |
00000107 => x"a8050513", |
00000107 => x"ac850513", |
00000108 => x"134000ef", |
00000109 => x"020000ef", |
00000110 => x"00001537", |
00000111 => x"a5c50513", |
00000111 => x"aa450513", |
00000112 => x"124000ef", |
00000113 => x"00c12083", |
00000114 => x"00100513", |
133,12 → 133,12
00000119 => x"00000593", |
00000120 => x"00112623", |
00000121 => x"00812423", |
00000122 => x"6fc000ef", |
00000122 => x"744000ef", |
00000123 => x"00000513", |
00000124 => x"00150413", |
00000125 => x"00000593", |
00000126 => x"0ff57513", |
00000127 => x"6e8000ef", |
00000127 => x"730000ef", |
00000128 => x"0c800513", |
00000129 => x"164000ef", |
00000130 => x"00040513", |
157,7 → 157,7
00000143 => x"00151593", |
00000144 => x"00078513", |
00000145 => x"00060493", |
00000146 => x"768000ef", |
00000146 => x"7b0000ef", |
00000147 => x"01051513", |
00000148 => x"000017b7", |
00000149 => x"01055513", |
238,11 → 238,11
00000224 => x"02912223", |
00000225 => x"03212023", |
00000226 => x"01312e23", |
00000227 => x"624000ef", |
00000227 => x"66c000ef", |
00000228 => x"00c12603", |
00000229 => x"00000693", |
00000230 => x"00000593", |
00000231 => x"57c000ef", |
00000231 => x"5c4000ef", |
00000232 => x"00050413", |
00000233 => x"00058993", |
00000234 => x"f95ff0ef", |
331,7 → 331,7
00000317 => x"30200073", |
00000318 => x"00001737", |
00000319 => x"00279793", |
00000320 => x"a9c70713", |
00000320 => x"ae470713", |
00000321 => x"00e787b3", |
00000322 => x"0007a783", |
00000323 => x"00078067", |
342,7 → 342,7
00000328 => x"f8f764e3", |
00000329 => x"00001737", |
00000330 => x"00279793", |
00000331 => x"acc70713", |
00000331 => x"b1470713", |
00000332 => x"00e787b3", |
00000333 => x"0007a783", |
00000334 => x"00078067", |
415,7 → 415,7
00000401 => x"00050913", |
00000402 => x"00001537", |
00000403 => x"00912a23", |
00000404 => x"b4050513", |
00000404 => x"b8850513", |
00000405 => x"000014b7", |
00000406 => x"00812c23", |
00000407 => x"01312623", |
422,7 → 422,7
00000408 => x"00112e23", |
00000409 => x"01c00413", |
00000410 => x"c7dff0ef", |
00000411 => x"d0848493", |
00000411 => x"d7c48493", |
00000412 => x"ffc00993", |
00000413 => x"008957b3", |
00000414 => x"00f7f793", |
443,9 → 443,9
00000429 => x"00812423", |
00000430 => x"00912223", |
00000431 => x"b55ff0ef", |
00000432 => x"18050463", |
00000432 => x"1c050863", |
00000433 => x"00001537", |
00000434 => x"b4450513", |
00000434 => x"b8c50513", |
00000435 => x"c19ff0ef", |
00000436 => x"34202473", |
00000437 => x"00900713", |
457,398 → 457,427
00000443 => x"0087ee63", |
00000444 => x"00001737", |
00000445 => x"00241793", |
00000446 => x"cd870713", |
00000446 => x"d4c70713", |
00000447 => x"00e787b3", |
00000448 => x"0007a783", |
00000449 => x"00078067", |
00000450 => x"800007b7", |
00000451 => x"00b78713", |
00000452 => x"12e40663", |
00000453 => x"02876663", |
00000452 => x"14e40e63", |
00000453 => x"02876a63", |
00000454 => x"00378713", |
00000455 => x"10e40463", |
00000455 => x"12e40c63", |
00000456 => x"00778793", |
00000457 => x"10f40663", |
00000457 => x"12f40e63", |
00000458 => x"00001537", |
00000459 => x"ca450513", |
00000459 => x"cec50513", |
00000460 => x"bb5ff0ef", |
00000461 => x"00040513", |
00000462 => x"f05ff0ef", |
00000463 => x"0380006f", |
00000464 => x"ff07c793", |
00000465 => x"00f407b3", |
00000466 => x"00f00713", |
00000467 => x"fcf76ee3", |
00000468 => x"00001537", |
00000469 => x"c9450513", |
00000470 => x"b8dff0ef", |
00000471 => x"00048513", |
00000472 => x"b6dff0ef", |
00000473 => x"0100006f", |
00000474 => x"00001537", |
00000475 => x"b4c50513", |
00000476 => x"b75ff0ef", |
00000477 => x"00001537", |
00000478 => x"cbc50513", |
00000479 => x"b69ff0ef", |
00000480 => x"34002573", |
00000481 => x"eb9ff0ef", |
00000482 => x"00001537", |
00000483 => x"cc450513", |
00000484 => x"b55ff0ef", |
00000485 => x"34302573", |
00000486 => x"ea5ff0ef", |
00000487 => x"00812403", |
00000488 => x"00c12083", |
00000489 => x"00412483", |
00000490 => x"00001537", |
00000491 => x"cd050513", |
00000492 => x"01010113", |
00000493 => x"b31ff06f", |
00000494 => x"00001537", |
00000495 => x"b6c50513", |
00000496 => x"fb1ff06f", |
00000497 => x"00001537", |
00000498 => x"b8850513", |
00000499 => x"fa5ff06f", |
00000500 => x"00001537", |
00000501 => x"b9c50513", |
00000502 => x"f99ff06f", |
00000503 => x"00001537", |
00000504 => x"ba850513", |
00000505 => x"f8dff06f", |
00000463 => x"00100793", |
00000464 => x"08f40c63", |
00000465 => x"0280006f", |
00000466 => x"ff07c793", |
00000467 => x"00f407b3", |
00000468 => x"00f00713", |
00000469 => x"fcf76ae3", |
00000470 => x"00001537", |
00000471 => x"cdc50513", |
00000472 => x"b85ff0ef", |
00000473 => x"00048513", |
00000474 => x"b65ff0ef", |
00000475 => x"ffd47413", |
00000476 => x"00500793", |
00000477 => x"06f40263", |
00000478 => x"00001537", |
00000479 => x"d3050513", |
00000480 => x"b65ff0ef", |
00000481 => x"34002573", |
00000482 => x"eb5ff0ef", |
00000483 => x"00001537", |
00000484 => x"d3850513", |
00000485 => x"b51ff0ef", |
00000486 => x"34302573", |
00000487 => x"ea1ff0ef", |
00000488 => x"00812403", |
00000489 => x"00c12083", |
00000490 => x"00412483", |
00000491 => x"00001537", |
00000492 => x"d4450513", |
00000493 => x"01010113", |
00000494 => x"b2dff06f", |
00000495 => x"00001537", |
00000496 => x"b9450513", |
00000497 => x"b21ff0ef", |
00000498 => x"fb1ff06f", |
00000499 => x"00001537", |
00000500 => x"bb450513", |
00000501 => x"b11ff0ef", |
00000502 => x"f7c02783", |
00000503 => x"0a07d463", |
00000504 => x"0017f793", |
00000505 => x"08078a63", |
00000506 => x"00001537", |
00000507 => x"bc050513", |
00000508 => x"f81ff06f", |
00000507 => x"d0450513", |
00000508 => x"fd5ff06f", |
00000509 => x"00001537", |
00000510 => x"bd450513", |
00000511 => x"f75ff06f", |
00000510 => x"bd050513", |
00000511 => x"fc9ff06f", |
00000512 => x"00001537", |
00000513 => x"bf050513", |
00000514 => x"f69ff06f", |
00000513 => x"be450513", |
00000514 => x"fbdff06f", |
00000515 => x"00001537", |
00000516 => x"c0450513", |
00000517 => x"f5dff06f", |
00000516 => x"bf050513", |
00000517 => x"fb1ff06f", |
00000518 => x"00001537", |
00000519 => x"c2450513", |
00000520 => x"f51ff06f", |
00000519 => x"c0850513", |
00000520 => x"fb5ff06f", |
00000521 => x"00001537", |
00000522 => x"c4450513", |
00000523 => x"f45ff06f", |
00000522 => x"c1c50513", |
00000523 => x"f99ff06f", |
00000524 => x"00001537", |
00000525 => x"c6050513", |
00000526 => x"f39ff06f", |
00000525 => x"c3850513", |
00000526 => x"f9dff06f", |
00000527 => x"00001537", |
00000528 => x"c7850513", |
00000529 => x"f2dff06f", |
00000530 => x"00c12083", |
00000531 => x"00812403", |
00000532 => x"00412483", |
00000533 => x"01010113", |
00000534 => x"00008067", |
00000535 => x"01f00793", |
00000536 => x"02a7e263", |
00000537 => x"800007b7", |
00000538 => x"00078793", |
00000539 => x"00251513", |
00000540 => x"00a78533", |
00000541 => x"6ac00793", |
00000542 => x"00f52023", |
00000543 => x"00000513", |
00000544 => x"00008067", |
00000545 => x"00100513", |
00000546 => x"00008067", |
00000547 => x"ff010113", |
00000548 => x"00112623", |
00000549 => x"00812423", |
00000550 => x"00912223", |
00000551 => x"43000793", |
00000552 => x"30579073", |
00000553 => x"00000413", |
00000554 => x"01d00493", |
00000555 => x"00040513", |
00000556 => x"00140413", |
00000557 => x"0ff47413", |
00000558 => x"fa5ff0ef", |
00000559 => x"fe9418e3", |
00000560 => x"00c12083", |
00000561 => x"00812403", |
00000562 => x"00412483", |
00000563 => x"01010113", |
00000528 => x"c4c50513", |
00000529 => x"f81ff06f", |
00000530 => x"00001537", |
00000531 => x"c6c50513", |
00000532 => x"f75ff06f", |
00000533 => x"00001537", |
00000534 => x"c8c50513", |
00000535 => x"f69ff06f", |
00000536 => x"00001537", |
00000537 => x"ca850513", |
00000538 => x"f5dff06f", |
00000539 => x"00001537", |
00000540 => x"cc050513", |
00000541 => x"f51ff06f", |
00000542 => x"00001537", |
00000543 => x"d1450513", |
00000544 => x"f45ff06f", |
00000545 => x"00001537", |
00000546 => x"d2450513", |
00000547 => x"f39ff06f", |
00000548 => x"00c12083", |
00000549 => x"00812403", |
00000550 => x"00412483", |
00000551 => x"01010113", |
00000552 => x"00008067", |
00000553 => x"01f00793", |
00000554 => x"02a7e263", |
00000555 => x"800007b7", |
00000556 => x"00078793", |
00000557 => x"00251513", |
00000558 => x"00a78533", |
00000559 => x"6ac00793", |
00000560 => x"00f52023", |
00000561 => x"00000513", |
00000562 => x"00008067", |
00000563 => x"00100513", |
00000564 => x"00008067", |
00000565 => x"fe802503", |
00000566 => x"01055513", |
00000567 => x"00157513", |
00000568 => x"00008067", |
00000569 => x"fc000793", |
00000570 => x"00a7a423", |
00000571 => x"00b7a623", |
00000572 => x"00008067", |
00000573 => x"00050613", |
00000574 => x"00000513", |
00000575 => x"0015f693", |
00000576 => x"00068463", |
00000577 => x"00c50533", |
00000578 => x"0015d593", |
00000579 => x"00161613", |
00000580 => x"fe0596e3", |
00000581 => x"00008067", |
00000582 => x"00050313", |
00000583 => x"ff010113", |
00000584 => x"00060513", |
00000585 => x"00068893", |
00000586 => x"00112623", |
00000587 => x"00030613", |
00000588 => x"00050693", |
00000589 => x"00000713", |
00000590 => x"00000793", |
00000591 => x"00000813", |
00000592 => x"0016fe13", |
00000593 => x"00171e93", |
00000594 => x"000e0c63", |
00000595 => x"01060e33", |
00000596 => x"010e3833", |
00000597 => x"00e787b3", |
00000598 => x"00f807b3", |
00000599 => x"000e0813", |
00000600 => x"01f65713", |
00000601 => x"0016d693", |
00000602 => x"00eee733", |
00000603 => x"00161613", |
00000604 => x"fc0698e3", |
00000605 => x"00058663", |
00000606 => x"f7dff0ef", |
00000607 => x"00a787b3", |
00000608 => x"00088a63", |
00000609 => x"00030513", |
00000610 => x"00088593", |
00000611 => x"f69ff0ef", |
00000612 => x"00f507b3", |
00000613 => x"00c12083", |
00000614 => x"00080513", |
00000615 => x"00078593", |
00000616 => x"01010113", |
00000617 => x"00008067", |
00000618 => x"06054063", |
00000619 => x"0605c663", |
00000620 => x"00058613", |
00000621 => x"00050593", |
00000622 => x"fff00513", |
00000623 => x"02060c63", |
00000624 => x"00100693", |
00000625 => x"00b67a63", |
00000626 => x"00c05863", |
00000627 => x"00161613", |
00000628 => x"00169693", |
00000629 => x"feb66ae3", |
00000630 => x"00000513", |
00000631 => x"00c5e663", |
00000632 => x"40c585b3", |
00000633 => x"00d56533", |
00000634 => x"0016d693", |
00000635 => x"00165613", |
00000636 => x"fe0696e3", |
00000637 => x"00008067", |
00000638 => x"00008293", |
00000639 => x"fb5ff0ef", |
00000640 => x"00058513", |
00000641 => x"00028067", |
00000642 => x"40a00533", |
00000643 => x"00b04863", |
00000644 => x"40b005b3", |
00000645 => x"f9dff06f", |
00000646 => x"40b005b3", |
00000647 => x"00008293", |
00000648 => x"f91ff0ef", |
00000649 => x"40a00533", |
00000650 => x"00028067", |
00000651 => x"00008293", |
00000652 => x"0005ca63", |
00000653 => x"00054c63", |
00000654 => x"f79ff0ef", |
00000655 => x"00058513", |
00000656 => x"00028067", |
00000657 => x"40b005b3", |
00000658 => x"fe0558e3", |
00000659 => x"40a00533", |
00000660 => x"f61ff0ef", |
00000661 => x"40b00533", |
00000662 => x"00028067", |
00000663 => x"6f727245", |
00000664 => x"4e202172", |
00000665 => x"5047206f", |
00000666 => x"75204f49", |
00000667 => x"2074696e", |
00000668 => x"746e7973", |
00000669 => x"69736568", |
00000670 => x"2164657a", |
00000671 => x"0000000a", |
00000672 => x"6e696c42", |
00000673 => x"676e696b", |
00000674 => x"44454c20", |
00000675 => x"6d656420", |
00000676 => x"7270206f", |
00000677 => x"6172676f", |
00000678 => x"00000a6d", |
00000679 => x"0000053c", |
00000680 => x"00000548", |
00000681 => x"00000554", |
00000682 => x"00000560", |
00000683 => x"0000056c", |
00000684 => x"00000574", |
00000685 => x"0000057c", |
00000686 => x"00000584", |
00000687 => x"0000058c", |
00000688 => x"000004a8", |
00000689 => x"000004a8", |
00000690 => x"00000594", |
00000691 => x"0000059c", |
00000692 => x"000004a8", |
00000693 => x"000004a8", |
00000694 => x"000004a8", |
00000695 => x"000005a4", |
00000696 => x"000004a8", |
00000697 => x"000004a8", |
00000698 => x"000004a8", |
00000699 => x"000005ac", |
00000700 => x"000004a8", |
00000701 => x"000004a8", |
00000702 => x"000004a8", |
00000703 => x"000004a8", |
00000704 => x"000005b4", |
00000705 => x"000005bc", |
00000706 => x"000005c4", |
00000707 => x"000005cc", |
00000708 => x"000005d4", |
00000709 => x"000005dc", |
00000710 => x"000005e4", |
00000711 => x"000005ec", |
00000712 => x"000005f4", |
00000713 => x"000005fc", |
00000714 => x"00000604", |
00000715 => x"0000060c", |
00000716 => x"00000614", |
00000717 => x"0000061c", |
00000718 => x"00000624", |
00000719 => x"0000062c", |
00000720 => x"00007830", |
00000721 => x"4554523c", |
00000722 => x"0000203e", |
00000723 => x"74736e49", |
00000724 => x"74637572", |
00000725 => x"206e6f69", |
00000726 => x"72646461", |
00000727 => x"20737365", |
00000728 => x"6173696d", |
00000729 => x"6e67696c", |
00000730 => x"00006465", |
00000731 => x"74736e49", |
00000732 => x"74637572", |
00000733 => x"206e6f69", |
00000734 => x"65636361", |
00000735 => x"66207373", |
00000736 => x"746c7561", |
00000737 => x"00000000", |
00000738 => x"656c6c49", |
00000739 => x"206c6167", |
00000740 => x"74736e69", |
00000741 => x"74637572", |
00000742 => x"006e6f69", |
00000743 => x"61657242", |
00000744 => x"696f706b", |
00000745 => x"0000746e", |
00000746 => x"64616f4c", |
00000747 => x"64646120", |
00000748 => x"73736572", |
00000749 => x"73696d20", |
00000750 => x"67696c61", |
00000751 => x"0064656e", |
00000752 => x"64616f4c", |
00000753 => x"63636120", |
00000754 => x"20737365", |
00000755 => x"6c756166", |
00000756 => x"00000074", |
00000757 => x"726f7453", |
00000758 => x"64612065", |
00000759 => x"73657264", |
00000760 => x"696d2073", |
00000761 => x"696c6173", |
00000762 => x"64656e67", |
00000763 => x"00000000", |
00000764 => x"726f7453", |
00000765 => x"63612065", |
00000766 => x"73736563", |
00000767 => x"75616620", |
00000768 => x"0000746c", |
00000769 => x"69766e45", |
00000770 => x"6d6e6f72", |
00000771 => x"20746e65", |
00000772 => x"6c6c6163", |
00000773 => x"6f726620", |
00000774 => x"2d55206d", |
00000775 => x"65646f6d", |
00000776 => x"00000000", |
00000777 => x"69766e45", |
00000778 => x"6d6e6f72", |
00000779 => x"20746e65", |
00000780 => x"6c6c6163", |
00000781 => x"6f726620", |
00000782 => x"2d4d206d", |
00000783 => x"65646f6d", |
00000784 => x"00000000", |
00000785 => x"6863614d", |
00000786 => x"20656e69", |
00000787 => x"74666f73", |
00000788 => x"65726177", |
00000789 => x"746e6920", |
00000790 => x"75727265", |
00000791 => x"00007470", |
00000792 => x"6863614d", |
00000793 => x"20656e69", |
00000794 => x"656d6974", |
00000795 => x"6e692072", |
00000796 => x"72726574", |
00000797 => x"00747075", |
00000798 => x"6863614d", |
00000799 => x"20656e69", |
00000800 => x"65747865", |
00000801 => x"6c616e72", |
00000802 => x"746e6920", |
00000803 => x"75727265", |
00000804 => x"00007470", |
00000805 => x"74736146", |
00000806 => x"746e6920", |
00000807 => x"75727265", |
00000808 => x"00207470", |
00000809 => x"6e6b6e55", |
00000810 => x"206e776f", |
00000811 => x"70617274", |
00000812 => x"75616320", |
00000813 => x"203a6573", |
00000814 => x"00000000", |
00000815 => x"50204020", |
00000816 => x"00003d43", |
00000817 => x"544d202c", |
00000818 => x"3d4c4156", |
00000819 => x"00000000", |
00000820 => x"522f3c20", |
00000821 => x"003e4554", |
00000822 => x"00000768", |
00000823 => x"000007b8", |
00000824 => x"000007c4", |
00000825 => x"000007d0", |
00000826 => x"000007dc", |
00000827 => x"000007e8", |
00000828 => x"000007f4", |
00000829 => x"00000800", |
00000830 => x"0000080c", |
00000831 => x"00000728", |
00000832 => x"00000728", |
00000833 => x"00000818", |
00000834 => x"33323130", |
00000835 => x"37363534", |
00000836 => x"42413938", |
00000837 => x"46454443" |
00000565 => x"ff010113", |
00000566 => x"00112623", |
00000567 => x"00812423", |
00000568 => x"00912223", |
00000569 => x"43000793", |
00000570 => x"30579073", |
00000571 => x"00000413", |
00000572 => x"01d00493", |
00000573 => x"00040513", |
00000574 => x"00140413", |
00000575 => x"0ff47413", |
00000576 => x"fa5ff0ef", |
00000577 => x"fe9418e3", |
00000578 => x"00c12083", |
00000579 => x"00812403", |
00000580 => x"00412483", |
00000581 => x"01010113", |
00000582 => x"00008067", |
00000583 => x"fe802503", |
00000584 => x"01055513", |
00000585 => x"00157513", |
00000586 => x"00008067", |
00000587 => x"fc000793", |
00000588 => x"00a7a423", |
00000589 => x"00b7a623", |
00000590 => x"00008067", |
00000591 => x"00050613", |
00000592 => x"00000513", |
00000593 => x"0015f693", |
00000594 => x"00068463", |
00000595 => x"00c50533", |
00000596 => x"0015d593", |
00000597 => x"00161613", |
00000598 => x"fe0596e3", |
00000599 => x"00008067", |
00000600 => x"00050313", |
00000601 => x"ff010113", |
00000602 => x"00060513", |
00000603 => x"00068893", |
00000604 => x"00112623", |
00000605 => x"00030613", |
00000606 => x"00050693", |
00000607 => x"00000713", |
00000608 => x"00000793", |
00000609 => x"00000813", |
00000610 => x"0016fe13", |
00000611 => x"00171e93", |
00000612 => x"000e0c63", |
00000613 => x"01060e33", |
00000614 => x"010e3833", |
00000615 => x"00e787b3", |
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00000619 => x"0016d693", |
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00000621 => x"00161613", |
00000622 => x"fc0698e3", |
00000623 => x"00058663", |
00000624 => x"f7dff0ef", |
00000625 => x"00a787b3", |
00000626 => x"00088a63", |
00000627 => x"00030513", |
00000628 => x"00088593", |
00000629 => x"f69ff0ef", |
00000630 => x"00f507b3", |
00000631 => x"00c12083", |
00000632 => x"00080513", |
00000633 => x"00078593", |
00000634 => x"01010113", |
00000635 => x"00008067", |
00000636 => x"06054063", |
00000637 => x"0605c663", |
00000638 => x"00058613", |
00000639 => x"00050593", |
00000640 => x"fff00513", |
00000641 => x"02060c63", |
00000642 => x"00100693", |
00000643 => x"00b67a63", |
00000644 => x"00c05863", |
00000645 => x"00161613", |
00000646 => x"00169693", |
00000647 => x"feb66ae3", |
00000648 => x"00000513", |
00000649 => x"00c5e663", |
00000650 => x"40c585b3", |
00000651 => x"00d56533", |
00000652 => x"0016d693", |
00000653 => x"00165613", |
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00000656 => x"00008293", |
00000657 => x"fb5ff0ef", |
00000658 => x"00058513", |
00000659 => x"00028067", |
00000660 => x"40a00533", |
00000661 => x"00b04863", |
00000662 => x"40b005b3", |
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00000667 => x"40a00533", |
00000668 => x"00028067", |
00000669 => x"00008293", |
00000670 => x"0005ca63", |
00000671 => x"00054c63", |
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00000675 => x"40b005b3", |
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00000678 => x"f61ff0ef", |
00000679 => x"40b00533", |
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00000681 => x"6f727245", |
00000682 => x"4e202172", |
00000683 => x"5047206f", |
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00000685 => x"2074696e", |
00000686 => x"746e7973", |
00000687 => x"69736568", |
00000688 => x"2164657a", |
00000689 => x"0000000a", |
00000690 => x"6e696c42", |
00000691 => x"676e696b", |
00000692 => x"44454c20", |
00000693 => x"6d656420", |
00000694 => x"7270206f", |
00000695 => x"6172676f", |
00000696 => x"00000a6d", |
00000697 => x"0000053c", |
00000698 => x"00000548", |
00000699 => x"00000554", |
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00000703 => x"0000057c", |
00000704 => x"00000584", |
00000705 => x"0000058c", |
00000706 => x"000004a8", |
00000707 => x"000004a8", |
00000708 => x"00000594", |
00000709 => x"0000059c", |
00000710 => x"000004a8", |
00000711 => x"000004a8", |
00000712 => x"000004a8", |
00000713 => x"000005a4", |
00000714 => x"000004a8", |
00000715 => x"000004a8", |
00000716 => x"000004a8", |
00000717 => x"000005ac", |
00000718 => x"000004a8", |
00000719 => x"000004a8", |
00000720 => x"000004a8", |
00000721 => x"000004a8", |
00000722 => x"000005b4", |
00000723 => x"000005bc", |
00000724 => x"000005c4", |
00000725 => x"000005cc", |
00000726 => x"000005d4", |
00000727 => x"000005dc", |
00000728 => x"000005e4", |
00000729 => x"000005ec", |
00000730 => x"000005f4", |
00000731 => x"000005fc", |
00000732 => x"00000604", |
00000733 => x"0000060c", |
00000734 => x"00000614", |
00000735 => x"0000061c", |
00000736 => x"00000624", |
00000737 => x"0000062c", |
00000738 => x"00007830", |
00000739 => x"4554523c", |
00000740 => x"0000203e", |
00000741 => x"74736e49", |
00000742 => x"74637572", |
00000743 => x"206e6f69", |
00000744 => x"72646461", |
00000745 => x"20737365", |
00000746 => x"6173696d", |
00000747 => x"6e67696c", |
00000748 => x"00006465", |
00000749 => x"74736e49", |
00000750 => x"74637572", |
00000751 => x"206e6f69", |
00000752 => x"65636361", |
00000753 => x"66207373", |
00000754 => x"746c7561", |
00000755 => x"00000000", |
00000756 => x"656c6c49", |
00000757 => x"206c6167", |
00000758 => x"74736e69", |
00000759 => x"74637572", |
00000760 => x"006e6f69", |
00000761 => x"61657242", |
00000762 => x"696f706b", |
00000763 => x"0000746e", |
00000764 => x"64616f4c", |
00000765 => x"64646120", |
00000766 => x"73736572", |
00000767 => x"73696d20", |
00000768 => x"67696c61", |
00000769 => x"0064656e", |
00000770 => x"64616f4c", |
00000771 => x"63636120", |
00000772 => x"20737365", |
00000773 => x"6c756166", |
00000774 => x"00000074", |
00000775 => x"726f7453", |
00000776 => x"64612065", |
00000777 => x"73657264", |
00000778 => x"696d2073", |
00000779 => x"696c6173", |
00000780 => x"64656e67", |
00000781 => x"00000000", |
00000782 => x"726f7453", |
00000783 => x"63612065", |
00000784 => x"73736563", |
00000785 => x"75616620", |
00000786 => x"0000746c", |
00000787 => x"69766e45", |
00000788 => x"6d6e6f72", |
00000789 => x"20746e65", |
00000790 => x"6c6c6163", |
00000791 => x"6f726620", |
00000792 => x"2d55206d", |
00000793 => x"65646f6d", |
00000794 => x"00000000", |
00000795 => x"69766e45", |
00000796 => x"6d6e6f72", |
00000797 => x"20746e65", |
00000798 => x"6c6c6163", |
00000799 => x"6f726620", |
00000800 => x"2d4d206d", |
00000801 => x"65646f6d", |
00000802 => x"00000000", |
00000803 => x"6863614d", |
00000804 => x"20656e69", |
00000805 => x"74666f73", |
00000806 => x"65726177", |
00000807 => x"746e6920", |
00000808 => x"75727265", |
00000809 => x"00007470", |
00000810 => x"6863614d", |
00000811 => x"20656e69", |
00000812 => x"656d6974", |
00000813 => x"6e692072", |
00000814 => x"72726574", |
00000815 => x"00747075", |
00000816 => x"6863614d", |
00000817 => x"20656e69", |
00000818 => x"65747865", |
00000819 => x"6c616e72", |
00000820 => x"746e6920", |
00000821 => x"75727265", |
00000822 => x"00007470", |
00000823 => x"74736146", |
00000824 => x"746e6920", |
00000825 => x"75727265", |
00000826 => x"00207470", |
00000827 => x"6e6b6e55", |
00000828 => x"206e776f", |
00000829 => x"70617274", |
00000830 => x"75616320", |
00000831 => x"203a6573", |
00000832 => x"00000000", |
00000833 => x"49545b20", |
00000834 => x"554f454d", |
00000835 => x"52455f54", |
00000836 => x"00005d52", |
00000837 => x"45445b20", |
00000838 => x"45434956", |
00000839 => x"5252455f", |
00000840 => x"0000005d", |
00000841 => x"4d505b20", |
00000842 => x"52455f50", |
00000843 => x"00005d52", |
00000844 => x"50204020", |
00000845 => x"00003d43", |
00000846 => x"544d202c", |
00000847 => x"3d4c4156", |
00000848 => x"00000000", |
00000849 => x"522f3c20", |
00000850 => x"003e4554", |
00000851 => x"000007bc", |
00000852 => x"000007cc", |
00000853 => x"000007f4", |
00000854 => x"00000800", |
00000855 => x"0000080c", |
00000856 => x"00000818", |
00000857 => x"00000824", |
00000858 => x"00000830", |
00000859 => x"0000083c", |
00000860 => x"00000728", |
00000861 => x"00000728", |
00000862 => x"00000848", |
00000863 => x"33323130", |
00000864 => x"37363534", |
00000865 => x"42413938", |
00000866 => x"46454443" |
); |
|
end neorv32_application_image; |
/core/neorv32_gptmr.vhd
0,0 → 1,218
-- ################################################################################################# |
-- # << NEORV32 - General Purpose Timer (GPTMR) >> # |
-- # ********************************************************************************************* # |
-- # 32-bit timer with configurable clock prescaler. The timer fires an interrupt whenever the # |
-- # counter register value reaches the programmed threshold value. The timer can operate in # |
-- # single-shot mode (count until it reaches THRESHOLD and stop) or in continuous mode (count # |
-- # until it reaches THRESHOLD and auto-reset). # |
-- # ********************************************************************************************* # |
-- # BSD 3-Clause License # |
-- # # |
-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
-- # # |
-- # Redistribution and use in source and binary forms, with or without modification, are # |
-- # permitted provided that the following conditions are met: # |
-- # # |
-- # 1. Redistributions of source code must retain the above copyright notice, this list of # |
-- # conditions and the following disclaimer. # |
-- # # |
-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # |
-- # conditions and the following disclaimer in the documentation and/or other materials # |
-- # provided with the distribution. # |
-- # # |
-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # |
-- # endorse or promote products derived from this software without specific prior written # |
-- # permission. # |
-- # # |
-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # |
-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # |
-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # |
-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # |
-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # |
-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # |
-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # |
-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # |
-- # OF THE POSSIBILITY OF SUCH DAMAGE. # |
-- # ********************************************************************************************* # |
-- # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # |
-- ################################################################################################# |
|
library ieee; |
use ieee.std_logic_1164.all; |
use ieee.numeric_std.all; |
|
library neorv32; |
use neorv32.neorv32_package.all; |
|
entity neorv32_gptmr is |
port ( |
-- host access -- |
clk_i : in std_ulogic; -- global clock line |
addr_i : in std_ulogic_vector(31 downto 0); -- address |
rden_i : in std_ulogic; -- read enable |
wren_i : in std_ulogic; -- write enable |
data_i : in std_ulogic_vector(31 downto 0); -- data in |
data_o : out std_ulogic_vector(31 downto 0); -- data out |
ack_o : out std_ulogic; -- transfer acknowledge |
-- clock generator -- |
clkgen_en_o : out std_ulogic; -- enable clock generator |
clkgen_i : in std_ulogic_vector(07 downto 0); |
-- interrupt -- |
irq_o : out std_ulogic -- transmission done interrupt |
); |
end neorv32_gptmr; |
|
architecture neorv32_gptmr_rtl of neorv32_gptmr is |
|
-- IO space: module base address -- |
constant hi_abb_c : natural := index_size_f(io_size_c)-1; -- high address boundary bit |
constant lo_abb_c : natural := index_size_f(gptmr_size_c); -- low address boundary bit |
|
-- control register -- |
constant ctrl_en_c : natural := 0; -- r/w: timer enable |
constant ctrl_prsc0_c : natural := 1; -- r/w: clock prescaler select bit 0 |
constant ctrl_prsc1_c : natural := 2; -- r/w: clock prescaler select bit 1 |
constant ctrl_prsc2_c : natural := 3; -- r/w: clock prescaler select bit 2 |
constant ctrl_mode_c : natural := 4; -- r/w: mode (0=single-shot, 1=continuous) |
constant ctrl_alarm_c : natural := 5; -- r/c: alarm flag (interrupt), cleared by writing zero |
-- |
signal ctrl : std_ulogic_vector(4 downto 0); |
|
-- access control -- |
signal acc_en : std_ulogic; -- module access enable |
signal addr : std_ulogic_vector(31 downto 0); -- access address |
signal wren : std_ulogic; -- word write enable |
signal rden : std_ulogic; -- read enable |
|
-- clock generator -- |
signal gptmr_clk_en : std_ulogic; |
|
-- timer core -- |
type timer_t is record |
count : std_ulogic_vector(31 downto 0); -- counter register |
thres : std_ulogic_vector(31 downto 0); -- threshold value |
match : std_ulogic; -- count == thres |
cnt_we : std_ulogic; -- write access to count |
end record; |
signal timer : timer_t; |
|
-- interrupt generator -- |
type irq_t is record |
pending : std_ulogic; -- pending interrupt request |
detect : std_ulogic_vector(1 downto 0); -- rising-edge detector |
clearn : std_ulogic; -- clear/ack IRQ request, active-low |
end record; |
signal irq : irq_t; |
|
begin |
|
-- Access Control ------------------------------------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
acc_en <= '1' when (addr_i(hi_abb_c downto lo_abb_c) = gptmr_base_c(hi_abb_c downto lo_abb_c)) else '0'; |
addr <= gptmr_base_c(31 downto lo_abb_c) & addr_i(lo_abb_c-1 downto 2) & "00"; -- word aligned |
wren <= acc_en and wren_i; |
rden <= acc_en and rden_i; |
|
|
-- Read/Write Access ---------------------------------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
rw_access: process(clk_i) |
begin |
if rising_edge(clk_i) then |
-- bus access acknowledge -- |
ack_o <= rden or wren; |
|
-- write access -- |
irq.clearn <= '1'; |
timer.cnt_we <= '0'; |
if (wren = '1') then |
if (addr = gptmr_ctrl_addr_c) then -- control register |
ctrl(ctrl_en_c) <= data_i(ctrl_en_c); |
ctrl(ctrl_prsc0_c) <= data_i(ctrl_prsc0_c); |
ctrl(ctrl_prsc1_c) <= data_i(ctrl_prsc1_c); |
ctrl(ctrl_prsc2_c) <= data_i(ctrl_prsc2_c); |
ctrl(ctrl_mode_c) <= data_i(ctrl_mode_c); |
irq.clearn <= data_i(ctrl_alarm_c); |
end if; |
if (addr = gptmr_thres_addr_c) then -- threshold register |
timer.thres <= data_i; |
end if; |
if (addr = gptmr_count_addr_c) then -- counter register |
timer.cnt_we <= '1'; |
end if; |
end if; |
|
-- read access -- |
data_o <= (others => '0'); |
if (rden = '1') then |
case addr(3 downto 2) is |
when "00" => -- control register |
data_o(ctrl_en_c) <= ctrl(ctrl_en_c); |
data_o(ctrl_prsc0_c) <= ctrl(ctrl_prsc0_c); |
data_o(ctrl_prsc1_c) <= ctrl(ctrl_prsc1_c); |
data_o(ctrl_prsc2_c) <= ctrl(ctrl_prsc2_c); |
data_o(ctrl_mode_c) <= ctrl(ctrl_mode_c); |
data_o(ctrl_alarm_c) <= irq.pending; |
when "01" => -- threshold register |
data_o <= timer.thres; |
when others => -- counter register |
data_o <= timer.count; |
end case; |
end if; |
end if; |
end process rw_access; |
|
-- clock generator enable -- |
clkgen_en_o <= ctrl(ctrl_en_c); |
|
-- clock select -- |
gptmr_clk_en <= clkgen_i(to_integer(unsigned(ctrl(ctrl_prsc2_c downto ctrl_prsc0_c)))); |
|
|
-- Timer Core ----------------------------------------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
timer_core: process(clk_i) |
begin |
if rising_edge(clk_i) then |
if (timer.cnt_we = '1') then -- write access |
timer.count <= data_i; |
elsif (ctrl(ctrl_en_c) = '1') then -- enabled |
if (timer.match = '1') then |
if (ctrl(ctrl_mode_c) = '1') then -- reset counter if continuous mode |
timer.count <= (others => '0'); |
end if; |
else |
timer.count <= std_ulogic_vector(unsigned(timer.count) + 1); |
end if; |
end if; |
end if; |
end process timer_core; |
|
-- counter = threshold? -- |
timer.match <= '1' when (timer.count = timer.thres) else '0'; |
|
|
-- Interrupt Generator -------------------------------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
irq_generator: process(clk_i) |
begin |
if rising_edge(clk_i) then |
if (ctrl(ctrl_en_c) = '0') then |
irq.detect <= "00"; |
irq.pending <= '0'; |
else |
irq.detect <= irq.detect(0) & timer.match; |
if (irq.detect = "01") then -- rising edge |
irq.pending <= '1'; |
elsif (irq.clearn = '0') then |
irq.pending <= '0'; |
end if; |
end if; |
end if; |
end process irq_generator; |
|
-- IRQ request to CPU -- |
irq_o <= irq.pending; |
|
|
end neorv32_gptmr_rtl; |
/core/neorv32_package.vhd
64,7 → 64,7
-- Architecture Constants (do not modify!) ------------------------------------------------ |
-- ------------------------------------------------------------------------------------------- |
constant data_width_c : natural := 32; -- native data path width - do not change! |
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060300"; -- no touchy! |
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060301"; -- no touchy! |
constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off! |
|
-- External Interface Types --------------------------------------------------------------- |
207,9 → 207,13
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff40"; -- base address |
--constant reserved_size_c : natural := 8*4; -- module's address space size in bytes |
|
-- reserved -- |
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff60"; -- base address |
--constant reserved_size_c : natural := 4*4; -- module's address space size in bytes |
-- General Purpose Timer (GPTMR) -- |
constant gptmr_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff60"; -- base address |
constant gptmr_size_c : natural := 4*4; -- module's address space size in bytes |
constant gptmr_ctrl_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff60"; |
constant gptmr_thres_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff64"; |
constant gptmr_count_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff68"; |
--constant gptmr_reserve_addr_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff6c"; |
|
-- reserved -- |
--constant reserved_base_c : std_ulogic_vector(data_width_c-1 downto 0) := x"ffffff70"; -- base address |
970,7 → 974,8
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits |
IO_NEOLED_EN : boolean := false; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_TX_FIFO : natural := 1 -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- Global control -- |
1911,6 → 1916,26
); |
end component; |
|
-- Component: General Purpose Timer (GPTMR) ----------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
component neorv32_gptmr |
port ( |
-- host access -- |
clk_i : in std_ulogic; -- global clock line |
addr_i : in std_ulogic_vector(31 downto 0); -- address |
rden_i : in std_ulogic; -- read enable |
wren_i : in std_ulogic; -- write enable |
data_i : in std_ulogic_vector(31 downto 0); -- data in |
data_o : out std_ulogic_vector(31 downto 0); -- data out |
ack_o : out std_ulogic; -- transfer acknowledge |
-- clock generator -- |
clkgen_en_o : out std_ulogic; -- enable clock generator |
clkgen_i : in std_ulogic_vector(07 downto 0); |
-- interrupt -- |
irq_o : out std_ulogic -- transmission done interrupt |
); |
end component; |
|
-- Component: System Configuration Information Memory (SYSINFO) --------------------------- |
-- ------------------------------------------------------------------------------------------- |
component neorv32_sysinfo |
1961,7 → 1986,8
IO_CFS_EN : boolean; -- implement custom functions subsystem (CFS)? |
IO_SLINK_EN : boolean; -- implement stream link interface? |
IO_NEOLED_EN : boolean; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_XIRQ_NUM_CH : natural -- number of external interrupt (XIRQ) channels to implement |
IO_XIRQ_NUM_CH : natural; -- number of external interrupt (XIRQ) channels to implement |
IO_GPTMR_EN : boolean -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- host access -- |
/core/neorv32_sysinfo.vhd
90,7 → 90,8
IO_CFS_EN : boolean; -- implement custom functions subsystem (CFS)? |
IO_SLINK_EN : boolean; -- implement stream link interface? |
IO_NEOLED_EN : boolean; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_XIRQ_NUM_CH : natural -- number of external interrupt (XIRQ) channels to implement |
IO_XIRQ_NUM_CH : natural; -- number of external interrupt (XIRQ) channels to implement |
IO_GPTMR_EN : boolean -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- host access -- |
180,8 → 181,9
sysinfo_mem(2)(26) <= bool_to_ulogic_f(IO_UART1_EN); -- secondary universal asynchronous receiver/transmitter (UART1) implemented? |
sysinfo_mem(2)(27) <= bool_to_ulogic_f(IO_NEOLED_EN); -- NeoPixel-compatible smart LED interface (NEOLED) implemented? |
sysinfo_mem(2)(28) <= bool_to_ulogic_f(boolean(IO_XIRQ_NUM_CH > 0)); -- external interrupt controller (XIRQ) implemented? |
sysinfo_mem(2)(29) <= bool_to_ulogic_f(IO_GPTMR_EN); -- general purpose timer (GPTMR) implemented? |
-- |
sysinfo_mem(2)(31 downto 29) <= (others => '0'); -- reserved |
sysinfo_mem(2)(31 downto 30) <= (others => '0'); -- reserved |
|
-- SYSINFO(3): Cache configuration -- |
sysinfo_mem(3)(03 downto 00) <= std_ulogic_vector(to_unsigned(index_size_f(ICACHE_BLOCK_SIZE), 4)) when (ICACHE_EN = true) else (others => '0'); -- i-cache: log2(block_size_in_bytes) |
/core/neorv32_top.vhd
133,7 → 133,8
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits |
IO_NEOLED_EN : boolean := false; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_TX_FIFO : natural := 1 -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- Global control -- |
246,7 → 247,7
signal clk_div : std_ulogic_vector(11 downto 0); |
signal clk_div_ff : std_ulogic_vector(11 downto 0); |
signal clk_gen : std_ulogic_vector(07 downto 0); |
signal clk_gen_en : std_ulogic_vector(07 downto 0); |
signal clk_gen_en : std_ulogic_vector(08 downto 0); |
-- |
signal wdt_cg_en : std_ulogic; |
signal uart0_cg_en : std_ulogic; |
256,6 → 257,7
signal pwm_cg_en : std_ulogic; |
signal cfs_cg_en : std_ulogic; |
signal neoled_cg_en : std_ulogic; |
signal gptmr_cg_en : std_ulogic; |
|
-- bus interface -- |
type bus_interface_t is record |
308,7 → 310,7
|
-- module response bus - device ID -- |
type resp_bus_id_t is (RESP_BUSKEEPER, RESP_IMEM, RESP_DMEM, RESP_BOOTROM, RESP_WISHBONE, RESP_GPIO, RESP_MTIME, RESP_UART0, RESP_UART1, RESP_SPI, |
RESP_TWI, RESP_PWM, RESP_WDT, RESP_TRNG, RESP_CFS, RESP_NEOLED, RESP_SYSINFO, RESP_OCD, RESP_SLINK, RESP_XIRQ); |
RESP_TWI, RESP_PWM, RESP_WDT, RESP_TRNG, RESP_CFS, RESP_NEOLED, RESP_SYSINFO, RESP_OCD, RESP_SLINK, RESP_XIRQ, RESP_GPTMR); |
|
-- module response bus -- |
type resp_bus_t is array (resp_bus_id_t) of resp_bus_entry_t; |
329,6 → 331,7
signal slink_tx_irq : std_ulogic; |
signal slink_rx_irq : std_ulogic; |
signal xirq_irq : std_ulogic; |
signal gptmr_irq : std_ulogic; |
|
-- misc -- |
signal mtime_time : std_ulogic_vector(63 downto 0); -- current system time from MTIME |
352,6 → 355,7
cond_sel_string_f(io_slink_en_c, "SLINK ", "") & |
cond_sel_string_f(IO_NEOLED_EN, "NEOLED ", "") & |
cond_sel_string_f(boolean(XIRQ_NUM_CH > 0), "XIRQ ", "") & |
cond_sel_string_f(IO_GPTMR_EN, "GPTMR ", "") & |
"" |
severity note; |
|
425,6 → 429,7
clk_gen_en(5) <= pwm_cg_en; |
clk_gen_en(6) <= cfs_cg_en; |
clk_gen_en(7) <= neoled_cg_en; |
clk_gen_en(8) <= gptmr_cg_en; |
-- actual clock generator -- |
if (or_reduce_f(clk_gen_en) = '1') then |
clk_div <= std_ulogic_vector(unsigned(clk_div) + 1); |
539,8 → 544,8
fast_irq(09) <= neoled_irq; -- NEOLED buffer free |
fast_irq(10) <= slink_rx_irq; -- SLINK RX interrupt |
fast_irq(11) <= slink_tx_irq; -- SLINK TX interrupt |
fast_irq(12) <= gptmr_irq; -- general purpose timer |
-- |
fast_irq(12) <= '0'; -- reserved |
fast_irq(13) <= '0'; -- reserved |
fast_irq(14) <= '0'; -- reserved |
fast_irq(15) <= '0'; -- LOWEST PRIORITY - reserved |
1348,6 → 1353,37
end generate; |
|
|
-- General Purpose Timer (GPTMR) ---------------------------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
neorv32_gptmr_inst_true: |
if (IO_GPTMR_EN = true) generate |
neorv32_gptmr_inst: neorv32_gptmr |
port map ( |
-- host access -- |
clk_i => clk_i, -- global clock line |
addr_i => p_bus.addr, -- address |
rden_i => io_rden, -- read enable |
wren_i => io_wren, -- write enable |
data_i => p_bus.wdata, -- data in |
data_o => resp_bus(RESP_GPTMR).rdata, -- data out |
ack_o => resp_bus(RESP_GPTMR).ack, -- transfer acknowledge |
-- clock generator -- |
clkgen_en_o => gptmr_cg_en, -- enable clock generator |
clkgen_i => clk_gen, |
-- interrupt -- |
irq_o => gptmr_irq -- transmission done interrupt |
); |
resp_bus(RESP_GPTMR).err <= '0'; -- no access error possible |
end generate; |
|
neorv32_gptmr_inst_false: |
if (IO_GPTMR_EN = false) generate |
resp_bus(RESP_GPTMR) <= resp_bus_entry_terminate_c; |
gptmr_cg_en <= '0'; |
gptmr_irq <= '0'; |
end generate; |
|
|
-- System Configuration Information Memory (SYSINFO) -------------------------------------- |
-- ------------------------------------------------------------------------------------------- |
neorv32_sysinfo_inst: neorv32_sysinfo |
1398,7 → 1434,8
IO_CFS_EN => IO_CFS_EN, -- implement custom functions subsystem (CFS)? |
IO_SLINK_EN => io_slink_en_c, -- implement stream link interface? |
IO_NEOLED_EN => IO_NEOLED_EN, -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_XIRQ_NUM_CH => XIRQ_NUM_CH -- number of external interrupt (XIRQ) channels to implement |
IO_XIRQ_NUM_CH => XIRQ_NUM_CH, -- number of external interrupt (XIRQ) channels to implement |
IO_GPTMR_EN => IO_GPTMR_EN -- implement general purpose timer (GPTMR)? |
) |
port map ( |
-- host access -- |
/system_integration/neorv32_ProcessorTop_stdlogic.vhd
113,7 → 113,8
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0); -- custom CFS configuration generic |
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits |
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_EN : boolean := true; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- Global control -- |
338,7 → 339,8
IO_CFS_CONFIG => IO_CFS_CONFIG_INT, -- custom CFS configuration generic |
IO_CFS_IN_SIZE => IO_CFS_IN_SIZE, -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE => IO_CFS_OUT_SIZE, -- size of CFS output conduit in bits |
IO_NEOLED_EN => IO_NEOLED_EN -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_EN => IO_NEOLED_EN, -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_GPTMR_EN => IO_GPTMR_EN -- implement general purpose timer (GPTMR)? |
) |
port map ( |
-- Global control -- |
/system_integration/neorv32_SystemTop_AvalonMM.vhd
124,7 → 124,8
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits |
IO_NEOLED_EN : boolean := false; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_TX_FIFO : natural := 1 -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- Global control -- |
317,7 → 318,9
IO_CFS_IN_SIZE => IO_CFS_IN_SIZE, |
IO_CFS_OUT_SIZE => IO_CFS_OUT_SIZE, |
IO_NEOLED_EN => IO_NEOLED_EN, |
IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO) |
IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO, |
IO_GPTMR_EN => IO_GPTMR_EN |
) |
port map ( |
-- Global control -- |
clk_i => clk_i, |
/system_integration/neorv32_SystemTop_axi4lite.vhd
109,7 → 109,8
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits |
IO_NEOLED_EN : boolean := true; -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_TX_FIFO : natural := 1 -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_NEOLED_TX_FIFO : natural := 1; -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_GPTMR_EN : boolean := false -- implement general purpose timer (GPTMR)? |
); |
port ( |
-- ------------------------------------------------------------ |
341,7 → 342,8
IO_CFS_IN_SIZE => IO_CFS_IN_SIZE, -- size of CFS input conduit in bits |
IO_CFS_OUT_SIZE => IO_CFS_OUT_SIZE, -- size of CFS output conduit in bits |
IO_NEOLED_EN => IO_NEOLED_EN, -- implement NeoPixel-compatible smart LED interface (NEOLED)? |
IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_NEOLED_TX_FIFO => IO_NEOLED_TX_FIFO, -- NEOLED TX FIFO depth, 1..32k, has to be a power of two |
IO_GPTMR_EN => IO_GPTMR_EN -- implement general purpose timer (GPTMR)? |
) |
port map ( |
-- Global control -- |