OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neorv32/trunk/sw/bootloader
    from Rev 65 to Rev 66
    Reverse comparison

Rev 65 → Rev 66

/bootloader.c
411,6 → 411,7
char c = PRINT_GETC();
PRINT_PUTC(c); // echo
PRINT_TEXT("\n");
while (neorv32_uart0_tx_busy());
 
if (c == 'r') { // restart bootloader
asm volatile ("li t0, %[input_i]; jr t0" : : [input_i] "i" (BOOTLOADER_BASE_ADDRESS)); // jump to beginning of boot ROM
492,7 → 493,7
**************************************************************************/
void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
 
uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
register uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
 
// Machine timer interrupt
if (cause == TRAP_CODE_MTI) { // raw exception code for MTI
514,10 → 515,10
 
// Anything else (that was not expected); output exception notifier and try to resume
else {
uint32_t epc = neorv32_cpu_csr_read(CSR_MEPC);
register uint32_t epc = neorv32_cpu_csr_read(CSR_MEPC);
#if (UART_EN != 0)
if (neorv32_uart0_available()) {
PRINT_TEXT("\n[EXC ");
PRINT_TEXT("\n[ERR ");
PRINT_XNUM(cause); // MCAUSE
PRINT_PUTC(' ');
PRINT_XNUM(epc); // MEPC
552,8 → 553,7
PRINT_TEXT("Loading... ");
 
// flash checks
if ((neorv32_spi_available() == 0) || // check if SPI is available at all
(spi_flash_read_1st_id() == 0x00)) { // check if flash ready (or available at all)
if (spi_flash_read_1st_id() == 0x00) { // check if flash ready (or available at all)
system_error(ERROR_FLASH);
}
}
613,7 → 613,7
// info and prompt
PRINT_TEXT("Write ");
PRINT_XNUM(size);
PRINT_TEXT(" bytes to SPI flash @ ");
PRINT_TEXT(" bytes to SPI flash @0x");
PRINT_XNUM(addr);
PRINT_TEXT("? (y/n) ");
 

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