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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neorv32/trunk/sw/common
    from Rev 21 to Rev 22
    Reverse comparison

Rev 21 → Rev 22

/bootloader_neorv32.ld File deleted
/bootloader_crt0.S File deleted
/crt0.S
87,13 → 87,11
// *********************************************************
// Setup global pointer
// *********************************************************
#ifndef __BOOTLOADER_START_CODE__
__crt0_global_pointer_init:
.option push
.option norelax
la gp, __global_pointer$
.option pop
#endif
 
 
// *********************************************************
109,7 → 107,6
// Devices, that are not implemented, will cause a store access fault
// which is captured but actually ignored due to the dummy handler.
// *********************************************************
#ifndef __BOOTLOADER_START_CODE__
__crt0_reset_io:
li x11, IO_BEGIN // start of processor-internal IO region
 
117,13 → 114,11
sw zero, 0(x11)
addi x11, x11, 4
bne zero, x11, __crt0_reset_io_loop
#endif
 
 
// *********************************************************
// Clear .bss section (byte-wise)
// *********************************************************
#ifndef __BOOTLOADER_START_CODE__
__crt0_clear_bss:
la x11, __crt0_bss_start
la x12, __crt0_bss_end
135,13 → 130,11
j __crt0_clear_bss_loop
 
__crt0_clear_bss_loop_end:
#endif
 
 
// *********************************************************
// Copy initialized .data section from ROM to RAM (byte-wise)
// *********************************************************
#ifndef __BOOTLOADER_START_CODE__
__crt0_copy_data:
la x11, __crt0_copy_data_src_begin // start of data area (copy source)
la x12, __crt0_copy_data_dst_begin // start of data area (copy destination)
156,7 → 149,6
j __crt0_copy_data_loop
 
__crt0_copy_data_loop_end:
#endif
 
 
// *********************************************************
/neorv32.ld
53,7 → 53,8
/* ************************************************* */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 16*1024
/* rom section: first value of ORIGIN/LENGHT: bootloader ROM; second value of ORIGIN/LENGHT: IMEM */
rom (rx) : ORIGIN = DEFINED(make_bootloader) ? 0xFFFF0000 : 0x00000000, LENGTH = DEFINED(make_bootloader) ? 4*1024 : 16*1024
ram (rwx) : ORIGIN = 0x80000000, LENGTH = 8*1024
}
/* ************************************************* */
95,8 → 96,6
PROVIDE(__text_start = .);
PROVIDE(__textstart = .);
 
 
 
PROVIDE_HIDDEN (__rela_iplt_start = .);
*(.rela.iplt)
PROVIDE_HIDDEN (__rela_iplt_end = .);
103,7 → 102,7
 
*(.rela.plt)
 
KEEP(*(.text.boot)); /* keep start-up code */
KEEP(*(.text.boot)); /* keep start-up code at the beginning of rom */
 
KEEP (*(SORT_NONE(.init)))
 
172,7 → 171,6
} > rom
 
 
 
/* initialized read/write data, accessed in RAM, placed in ROM, copied during boot */
.jcr : { KEEP (*(.jcr)) }
.data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }
188,7 → 186,6
*(.data .data.* .gnu.linkonce.d.*)
SORT(CONSTRUCTORS)
 
 
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
209,7 → 206,6
} > ram AT > rom
 
 
 
/* zero/non-initialized read/write data placed in RAM */
.sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
223,7 → 219,6
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
 
 
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
244,7 → 239,6
} > ram
 
 
 
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
289,7 → 283,6
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
 
 
 
/* Provide further symbols for neorv32 crt0.elf */
PROVIDE(__crt0_bss_start = __bss_start);
PROVIDE(__crt0_bss_end = __BSS_END__);

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