URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
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- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/example/demo_gptmr
- from Rev 69 to Rev 72
- ↔ Reverse comparison
Rev 69 → Rev 72
/main.c
3,7 → 3,7
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
58,7 → 58,7
/**********************************************************************//** |
* This program blinks an LED at GPIO.output(0) at 1Hz using the general purpose timer interrupt. |
* |
* @note This program requires the GPTMR unit to be synthesized. |
* @note This program requires the GPTMR unit to be synthesized (and UART0 and GPIO). |
* |
* @return Should not return; |
**************************************************************************/ |
67,13 → 67,13
// capture all exceptions and give debug info via UART |
neorv32_rte_setup(); |
|
// init UART at default baud rate, no parity bits, ho hw flow control |
// init UART at default baud rate, no parity bits, no HW flow control |
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE); |
|
|
// check if GPTMR unit is implemented at all |
if (neorv32_gptmr_available() == 0) { |
neorv32_uart0_print("General purpose timer not implemented!\n"); |
neorv32_uart0_print("ERROR! General purpose timer not implemented!\n"); |
return 1; |
} |
|
89,18 → 89,18
// install GPTMR interrupt handler |
neorv32_rte_exception_install(GPTMR_RTE_ID, gptmr_firq_handler); |
|
// configure timer for 1Hz in continuous mode |
uint32_t soc_clock = NEORV32_SYSINFO.CLK; |
soc_clock = soc_clock / 2; // divide by two as we are using the 1/2 clock prescaler |
neorv32_gptmr_setup(CLK_PRSC_2, 1, soc_clock); |
// configure timer for 1Hz ticks in continuous mode (with clock divisor = 8) |
neorv32_gptmr_setup(CLK_PRSC_8, 1, NEORV32_SYSINFO.CLK / (8 * 2)); |
|
// enable interrupt |
neorv32_cpu_irq_enable(GPTMR_FIRQ_ENABLE); // enable GPTRM FIRQ channel |
neorv32_cpu_irq_enable(GPTMR_FIRQ_ENABLE); // enable GPTMR FIRQ channel |
neorv32_cpu_eint(); // enable global interrupt flag |
|
|
// do nothing, wait for interrupt |
while(1); |
// go to sleep mode and wait for interrupt |
while(1) { |
neorv32_cpu_sleep(); |
} |
|
return 0; |
} |
115,6 → 115,6
|
neorv32_cpu_csr_write(CSR_MIP, 1<<GPTMR_FIRQ_PENDING); // clear/ack pending FIRQ |
|
neorv32_uart0_putc('.'); // send tick symbol via UART |
neorv32_uart0_putc('.'); // send tick symbol via UART0 |
neorv32_gpio_pin_toggle(0); // toggle output port bit 0 |
} |