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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /neorv32/trunk/sw/example
    from Rev 8 to Rev 11
    ↔ Reverse comparison
  •

Rev 8 → Rev 11

/cpu_test/main.c
119,6 → 119,12
int cnt_ok = 0;
int cnt_test = 0;
 
union {
uint64_t uint64;
uint32_t uint32[sizeof(uint64_t)/2];
} cpu_systime;
 
 
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
return 0;
139,6 → 145,7
neorv32_uart_setup(BAUD_RATE, 0, 0);
 
 
neorv32_mtime_set_time(0);
// set CMP of machine system timer MTIME to max to prevent an IRQ
uint64_t mtime_cmp_max = 0xFFFFFFFFFFFFFFFFL;
neorv32_mtime_set_timecmp(mtime_cmp_max);
146,11 → 153,14
// intro
neorv32_uart_printf("\n\n------ CPU TEST ------\n\n");
 
// show project credits
neorv32_rte_print_credits();
 
// show full HW config report
neorv32_rte_print_hw_config();
 
// intro2
neorv32_uart_printf("\n\nNEORV32 exceptions and interrupts test program\n\n");
neorv32_uart_printf("\n\nStarting tests...\n\n");
 
// install exception handler functions
int install_err = 0;
197,8 → 207,72
 
 
// ----------------------------------------------------------
// Test counter CSR access for mcycle[h]
// ----------------------------------------------------------
neorv32_uart_printf("MCYCLE[H]: ");
cnt_test++;
 
neorv32_cpu_csr_write(CSR_MCYCLE, 0x1BCD1234);
neorv32_cpu_csr_write(CSR_MCYCLEH, 0x22334455);
 
if (((neorv32_cpu_csr_read(CSR_MCYCLE) & 0xffff0000L) == 0x1BCD0000) &&
(neorv32_cpu_csr_read(CSR_MCYCLEH) == 0x22334455)) {
neorv32_uart_printf("ok\n");
cnt_ok++;
}
else {
neorv32_uart_printf("fail\n");
cnt_fail++;
}
 
 
// ----------------------------------------------------------
// Test counter CSR access for minstret[h]
// ----------------------------------------------------------
neorv32_uart_printf("MINSTRET[H]: ");
cnt_test++;
 
neorv32_cpu_csr_write(CSR_MINSTRET, 0x11224499);
neorv32_cpu_csr_write(CSR_MINSTRETH, 0x00110011);
 
if (((neorv32_cpu_csr_read(CSR_MINSTRET) & 0xffff0000L) == 0x11220000) &&
(neorv32_cpu_csr_read(CSR_MINSTRETH) == 0x00110011)) {
neorv32_uart_printf("ok\n");
cnt_ok++;
}
else {
neorv32_uart_printf("fail\n");
cnt_fail++;
}
 
 
// ----------------------------------------------------------
// Test time[h] (must be == MTIME)
// ----------------------------------------------------------
neorv32_uart_printf("TIME[H]: ");
cnt_test++;
 
cpu_systime.uint32[0] = neorv32_cpu_csr_read(CSR_TIME);
cpu_systime.uint32[1] = neorv32_cpu_csr_read(CSR_TIMEH);
cpu_systime.uint64 &= 0xFFFFFFFFFFFF0000LL;
 
uint64_t mtime_systime = neorv32_mtime_get_time() & 0xFFFFFFFFFFFF0000LL;
 
if (cpu_systime.uint64 == mtime_systime) {
neorv32_uart_printf("ok\n");
cnt_ok++;
}
else {
neorv32_uart_printf("fail\n");
cnt_fail++;
}
 
 
// ----------------------------------------------------------
// Test fence instructions - make sure CPU does not crash here and throws no exception
// a more complex test is provided by the RISC-V compliance test
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("FENCE(.I): ");
cnt_test++;
asm volatile ("fence");
212,12 → 286,12
neorv32_uart_printf("ok\n");
cnt_ok++;
}
exception_handler_answer = 0;
 
 
// ----------------------------------------------------------
// Unaligned instruction address
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC I_ALIGN: ");
 
// skip if C-mode is not implemented
237,11 → 311,10
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
}
else {
neorv32_uart_printf("skipped (no EXC I_ALIGN possible in C-mode)\n");
neorv32_uart_printf("skipped (not possible when C-EXT enabled)\n");
}
 
 
248,6 → 321,7
// ----------------------------------------------------------
// Instruction access fault
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC I_ACC: ");
cnt_test++;
 
263,7 → 337,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
270,6 → 343,7
// ----------------------------------------------------------
// Illegal instruction
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC I_ILLEG: ");
cnt_test++;
 
291,7 → 365,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
298,6 → 371,7
// ----------------------------------------------------------
// Breakpoint instruction
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC BREAK: ");
cnt_test++;
 
312,7 → 386,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
319,6 → 392,7
// ----------------------------------------------------------
// Unaligned load address
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC L_ALIGN: ");
cnt_test++;
 
334,7 → 408,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
341,6 → 414,7
// ----------------------------------------------------------
// Load access fault
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC L_ACC: ");
cnt_test++;
 
356,7 → 430,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
363,6 → 436,7
// ----------------------------------------------------------
// Unaligned store address
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC S_ALIGN: ");
cnt_test++;
 
378,7 → 452,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
385,6 → 458,7
// ----------------------------------------------------------
// Store access fault
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC S_ACC: ");
cnt_test++;
 
400,7 → 474,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
407,6 → 480,7
// ----------------------------------------------------------
// Environment call
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("EXC ENVCALL: ");
cnt_test++;
 
421,7 → 495,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
428,6 → 501,7
// ----------------------------------------------------------
// Machine software interrupt
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("IRQ MSI: ");
cnt_test++;
 
443,7 → 517,6
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
450,6 → 523,7
// ----------------------------------------------------------
// Machine timer interrupt (MTIME)
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("IRQ MTI: ");
cnt_test++;
 
471,13 → 545,16
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
// no more mtime interrupts
neorv32_mtime_set_timecmp(-1);
 
 
// ----------------------------------------------------------
// Machine external interrupt (via CLIC)
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("IRQ MEI: ");
cnt_test++;
 
499,10 → 576,36
neorv32_uart_printf("fail\n");
cnt_fail++;
}
exception_handler_answer = 0;
#endif
 
 
// ----------------------------------------------------------
// Test WFI ("sleep") instructions
// ----------------------------------------------------------
exception_handler_answer = 0;
neorv32_uart_printf("WFI: ");
cnt_test++;
 
// program timer to wake up
neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + 1000);
 
// put CPU into sleep mode
asm volatile ("wfi");
 
if (exception_handler_answer != ANSWER_MTI) {
neorv32_uart_printf("fail\n");
cnt_fail++;
}
else {
neorv32_uart_printf("ok\n");
cnt_ok++;
}
 
 
 
 
 
 
// error report
neorv32_uart_printf("\n\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);
 

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