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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

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  • This comparison shows the changes necessary to convert path 
    /neorv32/trunk/sw/example
    from Rev 22 to Rev 23
    ↔ Reverse comparison
  •

Rev 22 → Rev 23

/blink_led/blink_led_in_asm.S
0,0 → 1,37
.file "blink_led_in_asm.S"
.section .text
.balign 4
.global blink_led_asm
 
blink_led_asm:
 
/* base address of GPIO controller's output port is passed as argument (in a0)*/
sw zero, 0(a0) /* clear output port */
 
li t1, 0 /* initialize counter */
 
 
blink_loop:
andi t1, t1, 255 /* apply 8-bit mask */
sw t1, 0(a0) /* output current counter value */
addi t1, t1, 1 /* increment counter */
 
jal ra, blink_delay /* call delay function */
 
j blink_loop
 
 
blink_delay:
li t2, 0xfffff /* delay time */
 
blink_delay_loop:
beq t2, zero, blink_delay_end
addi t2, t2, -1
nop
nop
j blink_delay_loop
 
blink_delay_end:
ret
 
.end
/blink_led/main.c
48,10 → 48,18
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200
/** Use the custom ASM version for blinking the LEDs if != 0 */
#define USE_ASM_VERSION 0
/**@}*/
 
 
/**********************************************************************//**
* ASM function to blink LEDs (if enabled)
**************************************************************************/
extern void blink_led_asm(uint32_t gpio_out_addr);
 
 
/**********************************************************************//**
* Main function; shows an incrementing 8-bit counter on GPIO.output(7:0).
*
* @note This program requires the GPIO controller to be synthesized (the UART is optional).
76,6 → 84,10
// say hello
neorv32_uart_print("Blinking LED demo program\n");
 
 
// use C version of LED blinking
#if (USE_ASM_VERSION == 0)
 
neorv32_gpio_port_set(0); // clear gpio output put
 
int cnt = 0;
85,5 → 97,11
neorv32_cpu_delay_ms(200); // wait 200ms using busy wait
}
 
// use ASM version of LED blinking (file: blink_led_in_asm.S)
#else
 
blink_led_asm((uint32_t)(&GPIO_OUTPUT));
 
#endif
return 0;
}
/cpu_test/main.c
604,7 → 604,7
 
 
// ----------------------------------------------------------
// Fast interrupt
// Fast interrupt channel 0 (WDT)
// ----------------------------------------------------------
exception_handler_answer = 0xFFFFFFFF;
neorv32_uart_printf("FIRQ0 (WDT): ");
631,7 → 631,7
test_fail();
}
#endif
// no more mtime interrupts
// no more WDT interrupts
neorv32_wdt_disable();
}
else {
640,6 → 640,128
 
 
// ----------------------------------------------------------
// Fast interrupt channel 2 (UART)
// ----------------------------------------------------------
exception_handler_answer = 0xFFFFFFFF;
neorv32_uart_printf("FIRQ2 (UART): ");
 
if (neorv32_uart_available()) {
cnt_test++;
 
// wait for UART to finish transmitting
while(neorv32_uart_tx_busy());
 
// enable UART TX done IRQ
UART_CT |= (1 << UART_CT_TX_IRQ);
 
// trigger UART TX IRQ
UART_DATA = 0; // we need to access the raw HW here, since >DEVNULL_UART_OVERRIDE< might be active
 
// wait for UART to finish transmitting
while(neorv32_uart_tx_busy());
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
 
#if (DETAILED_EXCEPTION_DEBUG==0)
if (exception_handler_answer == TRAP_CODE_FIRQ_2) {
test_ok();
}
else {
test_fail();
}
#endif
// wait for UART to finish transmitting
while(neorv32_uart_tx_busy());
 
// disable UART TX done IRQ
UART_CT &= ~(1 << UART_CT_TX_IRQ);
}
else {
neorv32_uart_printf("skipped (UART not implemented)\n");
}
 
 
// ----------------------------------------------------------
// Fast interrupt channel 3 (SPI)
// ----------------------------------------------------------
exception_handler_answer = 0xFFFFFFFF;
neorv32_uart_printf("FIRQ3 (SPI): ");
 
if (neorv32_spi_available()) {
cnt_test++;
 
// configure SPI, enable transfer-done IRQ
neorv32_spi_setup(CLK_PRSC_2, 0, 0, 0, 1);
 
// trigger SPI IRQ
neorv32_spi_trans(0);
while(neorv32_spi_busy()); // wait for current transfer to finish
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
 
#if (DETAILED_EXCEPTION_DEBUG==0)
if (exception_handler_answer == TRAP_CODE_FIRQ_3) {
test_ok();
}
else {
test_fail();
}
#endif
// disable SPI
neorv32_spi_disable();
}
else {
neorv32_uart_printf("skipped (SPI not implemented)\n");
}
 
 
// ----------------------------------------------------------
// Fast interrupt channel 3 (TWI)
// ----------------------------------------------------------
exception_handler_answer = 0xFFFFFFFF;
neorv32_uart_printf("FIRQ3 (TWI): ");
 
if (neorv32_twi_available()) {
cnt_test++;
 
// configure TWI, fastest clock, transfer-done IRQ enable
neorv32_twi_setup(CLK_PRSC_2, 1);
 
// trigger TWI IRQ
neorv32_twi_trans(0);
neorv32_twi_generate_stop();
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
asm volatile("nop");
 
#if (DETAILED_EXCEPTION_DEBUG==0)
if (exception_handler_answer == TRAP_CODE_FIRQ_3) {
test_ok();
}
else {
test_fail();
}
#endif
// disable TWI
neorv32_twi_disable();
}
else {
neorv32_uart_printf("skipped (TWI not implemented)\n");
}
 
 
// ----------------------------------------------------------
// Test WFI ("sleep") instructions, wakeup via MTIME
// ----------------------------------------------------------
exception_handler_answer = 0xFFFFFFFF;
886,8 → 1008,8
exe_cycles.uint64 = neorv32_cpu_get_cycle();
exe_instr.uint64 = neorv32_cpu_get_instret();
 
neorv32_uart_printf("\n\nExecuted instructions: 0x%x_%x\n", exe_instr.uint32[1], exe_instr.uint32[0]);
neorv32_uart_printf( "Clock cycles: 0x%x_%x\n", exe_cycles.uint32[1], exe_cycles.uint32[0]);
neorv32_uart_printf("\n\nExecuted instructions: %u\n", exe_instr.uint32[0]);
neorv32_uart_printf( "Required clock cycles: %u\n", exe_cycles.uint32[0]);
 
neorv32_uart_printf("\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);
 
/demo_trng/main.c
64,8 → 64,9
uint8_t lucky_numbers_5of50[5];
uint8_t lucky_numbers_2of10[2];
 
uint8_t i, j, tmp;
uint16_t trng_data;
int err;
uint8_t i, j, probe;
uint8_t trng_data;
unsigned int num_samples;
 
// check if UART unit is implemented at all
73,7 → 74,6
return 0;
}
 
 
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
91,11 → 91,8
return 0;
}
 
// configure TRNG with defaul GARO tap mask
neorv32_uart_printf("Configuring TRNG...\n");
uint16_t trng_tap_config = neorv32_trng_find_tap_mask();
neorv32_uart_printf("TRNG: Using tap mask: 0x%x ", (uint32_t)trng_tap_config);
neorv32_trng_setup(trng_tap_config);
// enable TRNG
neorv32_trng_enable();
 
while(1) {
 
113,11 → 110,12
if (cmd == 'n') {
num_samples = 0;
while(1) {
if (neorv32_trng_get(&trng_data)) {
neorv32_uart_printf("\nTRNG error!\n");
err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("\nTRNG error (%i)!\n", err);
break;
}
neorv32_uart_printf("%u ", (uint32_t)(trng_data & 0xFF));
neorv32_uart_printf("%u ", (uint32_t)(trng_data));
num_samples++;
if (neorv32_uart_char_received()) { // abort when key pressed
neorv32_uart_printf("\nPrinted samples: %u", num_samples);
128,7 → 126,7
 
// print lucky numbers
if (cmd == 'l') {
// reset array
// reset arrays
for (i=0; i<5; i++) {
lucky_numbers_5of50[i] = 0;
}
138,45 → 136,57
// get numbers
i = 0;
while (i<5) {
if (neorv32_trng_get(&trng_data)) {
neorv32_uart_printf("\nTRNG error!\n");
err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("\nTRNG error (%i)!\n", err);
break;
}
// valid range?
tmp = (uint8_t)(trng_data & 0xff);
if ((tmp == 0) || (tmp > 50)) {
if ((trng_data == 0) || (trng_data > 50)) {
continue;
}
// already sampled?
probe = 0;
for (j=0; j<5; j++) {
if (lucky_numbers_5of50[j] == tmp) {
continue;
if (lucky_numbers_5of50[j] == trng_data) {
probe++;
}
}
lucky_numbers_5of50[i] = tmp;
i++;
if (probe) {
continue;
}
else {
lucky_numbers_5of50[i] = trng_data;
i++;
}
}
 
// get numbers part 2
i = 0;
while (i<2) {
if (neorv32_trng_get(&trng_data)) {
neorv32_uart_printf("\nTRNG error!\n");
err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("\nTRNG error (%i)!\n", err);
break;
}
// valid range?
tmp = (uint8_t)(trng_data & 0xff);
if ((tmp == 0) || (tmp > 10)) {
if ((trng_data == 0) || (trng_data > 10)) {
continue;
}
// already sampled?
probe = 0;
for (j=0; j<2; j++) {
if (lucky_numbers_2of10[j] == tmp) {
continue;
if (lucky_numbers_2of10[j] == trng_data) {
probe++;
}
}
lucky_numbers_2of10[i] = tmp;
i++;
if (probe) {
continue;
}
else {
lucky_numbers_2of10[i] = trng_data;
i++;
}
}
 
// output
/game_of_life/main.c
106,7 → 106,7
int u = 0, cell = 0, n = 0;
int x, y;
int trng_available = 0;
uint16_t trng_data;
uint8_t trng_data;
 
 
// initialize universe
123,9 → 123,8
 
// check if TRNG was synthesized
if (neorv32_trng_available()) {
uint16_t trng_tap_config = neorv32_trng_find_tap_mask();
neorv32_trng_setup(trng_tap_config);
neorv32_uart_printf("\nTRNG detected (tap mask 0x%x). Using TRNG for universe initialization.\n", (uint32_t)trng_tap_config);
neorv32_uart_printf("\nTRNG detected. Using TRNG for universe initialization.\n");
neorv32_trng_enable();
trng_available = 1;
}
 
140,11 → 139,17
for (x=0; x<NUM_CELLS_X/8; x++) {
for (y=0; y<NUM_CELLS_Y; y++) {
if (trng_available) {
if (neorv32_trng_get(&trng_data)) {
neorv32_uart_printf("TRNG error!\n");
return 1;
while (1) {
int err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("TRNG error (%i)! Restarting TRNG...\n", err);
continue;
}
else {
break;
}
}
universe[0][x][y] = (uint8_t)trng_data; // use data from TRNG
universe[0][x][y] = trng_data; // use data from TRNG
}
else {
universe[0][x][y] = (uint8_t)xorshift32(); // use data from PRNG

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