URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/example
- from Rev 29 to Rev 30
- ↔ Reverse comparison
Rev 29 → Rev 30
/cpu_test/main.c
311,9 → 311,9
|
|
// ---------------------------------------------------------- |
// Test time[h] (must be == MTIME) |
// Test time (must be == MTIME.TIME) |
// ---------------------------------------------------------- |
neorv32_uart_printf("TIME[H]: "); |
neorv32_uart_printf("TIME: "); |
cnt_test++; |
|
cpu_systime.uint64 = neorv32_cpu_get_systime(); |
322,7 → 322,7
// compute difference |
mtime_systime = mtime_systime - cpu_systime.uint64; |
|
if (mtime_systime < 100) { // diff should be pretty small |
if (mtime_systime < 4096) { // diff should be pretty small depending on bus latency |
test_ok(); |
} |
else { |
391,7 → 391,7
|
|
// ---------------------------------------------------------- |
// Write-access to read-only CSR (must not trigger an exception) |
// Write-access to read-only CSR |
// ---------------------------------------------------------- |
exception_handler_answer = 0xFFFFFFFF; |
neorv32_uart_printf("Rd-only CSR: "); |
398,20 → 398,32
|
cnt_test++; |
|
neorv32_cpu_csr_write(CSR_CYCLE, 0); // cycle CSR is read-only |
neorv32_cpu_csr_write(CSR_TIME, 0); // time CSR is read-only |
|
if (neorv32_cpu_csr_read(CSR_CYCLE) < 100) { |
neorv32_uart_printf("[CSR update error!] "); |
} |
|
#if (DETAILED_EXCEPTION_DEBUG==0) |
if (exception_handler_answer == TRAP_CODE_I_ILLEGAL) { |
test_fail(); |
test_ok(); |
} |
else if (neorv32_cpu_csr_read(CSR_CYCLE) < 100) { |
else { |
test_fail(); |
} |
else if (exception_handler_answer == 0xFFFFFFFF) { |
#endif |
|
|
// ---------------------------------------------------------- |
// No "real" CSR write access (because rs1 = r0) |
// ---------------------------------------------------------- |
exception_handler_answer = 0xFFFFFFFF; |
neorv32_uart_printf("NotWrite CSR: "); |
|
cnt_test++; |
|
// time CSR is read-only, but no actual write is performed because rs1=r0 |
// -> should cause no exception |
asm volatile("csrrs zero, time, zero"); |
|
#if (DETAILED_EXCEPTION_DEBUG==0) |
if (exception_handler_answer == 0xFFFFFFFF) { |
test_ok(); |
} |
else { |
742,6 → 754,12
// wait for UART to finish transmitting |
while(neorv32_uart_tx_busy()); |
|
// backup current UART configuration |
uint32_t uart_ct_backup = UART_CT; |
|
// disable UART sim_mode if it is enabled |
UART_CT &= ~(1 << UART_CT_SIM_MODE); |
|
// enable UART TX done IRQ |
UART_CT |= (1 << UART_CT_TX_IRQ); |
|
757,6 → 775,12
asm volatile("nop"); |
asm volatile("nop"); |
|
// wait for UART to finish transmitting |
while(neorv32_uart_tx_busy()); |
|
// re-enable UART sim_mode if it was enabled and disable UART TX done IRQ |
UART_CT = uart_ct_backup; |
|
#if (DETAILED_EXCEPTION_DEBUG==0) |
if (exception_handler_answer == TRAP_CODE_FIRQ_2) { |
test_ok(); |
765,11 → 789,6
test_fail(); |
} |
#endif |
// wait for UART to finish transmitting |
while(neorv32_uart_tx_busy()); |
|
// disable UART TX done IRQ |
UART_CT &= ~(1 << UART_CT_TX_IRQ); |
} |
else { |
neorv32_uart_printf("skipped (UART not implemented)\n"); |
974,7 → 993,7
break; |
} |
} |
neorv32_uart_printf("Regions: %u\n", i); |
neorv32_uart_printf("Max regions: %u\n", i); |
|
|
// check granulartiy |
1029,13 → 1048,13
|
// Test access to protected region |
// --------------------------------------------- |
neorv32_uart_printf("Creating protected page (NAPOT, 64k) @ 0xFFFFA000, (!x, !w, r)...\n"); |
neorv32_uart_printf("Creating protected page (NAPOT, 64kB) @ 0xFFFFA000, [!x, !w, r]...\n"); |
neorv32_cpu_csr_write(CSR_PMPADDR0, 0xffffdfff); // 64k area @ 0xFFFFA000 |
neorv32_cpu_csr_write(CSR_PMPCFG0, 0b00011001); // NAPOT, read permission, NO write and execute permissions |
|
|
// ------ LOAD: should work ------ |
neorv32_uart_printf("U-mode (!X,!W,R) load test: "); |
neorv32_uart_printf("U-mode [!X,!W,R] load test: "); |
cnt_test++; |
exception_handler_answer = 0xFFFFFFFF; |
|
1061,7 → 1080,7
|
|
// ------ STORE: should fail ------ |
neorv32_uart_printf("U-mode (!X,!W,R) store test: "); |
neorv32_uart_printf("U-mode [!X,!W,R] store test: "); |
cnt_test++; |
exception_handler_answer = 0xFFFFFFFF; |
|