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  • This comparison shows the changes necessary to convert path 
    /neorv32/trunk/sw/example
    from Rev 66 to Rev 67
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  •

Rev 66 → Rev 67

/demo_gptmr/main.c
0,0 → 1,120
// #################################################################################################
// # << NEORV32 - General Purpose Timer (GPTMR) Demo Program >> #
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
// # #
// # 1. Redistributions of source code must retain the above copyright notice, this list of #
// # conditions and the following disclaimer. #
// # #
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
// # conditions and the following disclaimer in the documentation and/or other materials #
// # provided with the distribution. #
// # #
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
// # endorse or promote products derived from this software without specific prior written #
// # permission. #
// # #
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
// # OF THE POSSIBILITY OF SUCH DAMAGE. #
// # ********************************************************************************************* #
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
// #################################################################################################
 
 
/**********************************************************************//**
* @file demo_gptmr/main.c
* @author Stephan Nolting
* @brief Simple GPTMR usage example.
**************************************************************************/
 
#include <neorv32.h>
 
 
/**********************************************************************//**
* @name User configuration
**************************************************************************/
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200
/**@}*/
 
 
// Prototypes
void gptmr_firq_handler(void);
 
 
/**********************************************************************//**
* This program blinks an LED at GPIO.output(0) at 1Hz using the general purpose timer interrupt.
*
* @note This program requires the GPTMR unit to be synthesized.
*
* @return Should not return;
**************************************************************************/
int main() {
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
 
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
 
 
// check if GPTMR unit is implemented at all
if (neorv32_gptmr_available() == 0) {
neorv32_uart0_print("General purpose timer not implemented!\n");
return 1;
}
 
// Intro
neorv32_uart0_print("General purpose timer (GPTMR) demo Program.\n"
"Toggles GPIO.output(0) at 1Hz using the GPTMR interrupt.\n\n");
 
 
// clear GPIO output port
neorv32_gpio_port_set(0);
 
 
// install GPTMR interrupt handler
neorv32_rte_exception_install(GPTMR_RTE_ID, gptmr_firq_handler);
 
// configure timer for 1Hz in continuous mode
uint32_t soc_clock = NEORV32_SYSINFO.CLK;
soc_clock = soc_clock / 2; // divide by two as we are using the 1/2 clock prescaler
neorv32_gptmr_setup(CLK_PRSC_2, 1, soc_clock);
 
// enable interrupt
neorv32_cpu_irq_enable(GPTMR_FIRQ_ENABLE); // enable GPTRM FIRQ channel
neorv32_cpu_eint(); // enable global interrupt flag
 
 
// do nothing, wait for interrupt
while(1);
 
return 0;
}
 
 
/**********************************************************************//**
* GPTMR FIRQ handler.
*
* @warning This function has to be of type "void xyz(void)" and must not use any interrupt attributes!
**************************************************************************/
void gptmr_firq_handler(void) {
 
neorv32_gptmr_ack_irq(); // IRQ acknowledge / clear pending alarm interrupt
 
neorv32_uart0_putc('.'); // send tick symbol via UART
neorv32_gpio_pin_toggle(0); // toggle output port bit 0
}
/demo_gptmr/makefile
0,0 → 1,39
#################################################################################################
# << NEORV32 - Application Makefile >> #
# ********************************************************************************************* #
# Make sure to add the RISC-V GCC compiler's bin folder to your PATH environment variable. #
# ********************************************************************************************* #
# BSD 3-Clause License #
# #
# Copyright (c) 2021, Stephan Nolting. All rights reserved. #
# #
# Redistribution and use in source and binary forms, with or without modification, are #
# permitted provided that the following conditions are met: #
# #
# 1. Redistributions of source code must retain the above copyright notice, this list of #
# conditions and the following disclaimer. #
# #
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
# conditions and the following disclaimer in the documentation and/or other materials #
# provided with the distribution. #
# #
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
# endorse or promote products derived from this software without specific prior written #
# permission. #
# #
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
# OF THE POSSIBILITY OF SUCH DAMAGE. #
# ********************************************************************************************* #
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
/processor_check/main.c
201,6 → 201,9
// test intro
PRINT_STANDARD("\nStarting tests.\n\n");
 
// sync (test)
asm volatile ("fence.i");
 
// enable global interrupts
neorv32_cpu_eint();
 
445,26 → 448,6
 
 
// ----------------------------------------------------------
// Test FENCE.I instruction (instruction buffer / i-cache clear & reload)
// if Zifencei is not implemented FENCE.I should execute as NOP
// ----------------------------------------------------------
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
PRINT_STANDARD("[%i] FENCE.I: ", cnt_test);
 
cnt_test++;
 
asm volatile ("fence.i");
 
// make sure there was no exception (and that the cpu did not crash...)
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
test_ok();
}
else {
test_fail();
}
 
 
// ----------------------------------------------------------
// Illegal CSR access (CSR not implemented)
// ----------------------------------------------------------
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
1311,10 → 1294,45
}
 
 
// ----------------------------------------------------------
// Fast interrupt channel 12 (GPTMR)
// ----------------------------------------------------------
if (neorv32_slink_available()) {
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
PRINT_STANDARD("[%i] FIRQ12 (GPTMR): ", cnt_test);
 
cnt_test++;
 
// enable GPTMR FIRQ
neorv32_cpu_irq_enable(CSR_MIE_FIRQ12E);
 
// configure timer IRQ for one-shot mode after 2*4 clock cycles
neorv32_gptmr_setup(CLK_PRSC_2, 0, 4);
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
asm volatile("nop");
 
// disable GPTMR interrupt
neorv32_cpu_irq_disable(CSR_MIE_FIRQ12E);
 
// check if RX FIFO fires IRQ
if (neorv32_cpu_csr_read(CSR_MCAUSE) == TRAP_CODE_FIRQ_12) {
test_ok();
}
else {
test_fail();
}
 
// disable GPTMR
neorv32_gptmr_disable();
}
 
 
//// ----------------------------------------------------------
//// Fast interrupt channel 12..15 (reserved)
//// Fast interrupt channel 13..15 (reserved)
//// ----------------------------------------------------------
//PRINT_STANDARD("[%i] FIRQ12..15: ", cnt_test);
//PRINT_STANDARD("[%i] FIRQ13..15: ", cnt_test);
//PRINT_STANDARD("skipped (n.a.)\n");
 
 

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