OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

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  • This comparison shows the changes necessary to convert path 
    /neorv32/trunk/sw/example
    from Rev 67 to Rev 68
    ↔ Reverse comparison
  •

Rev 67 → Rev 68

/hex_viewer/main.c File deleted
/hex_viewer/makefile File deleted
/bitmanip_test/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/blink_led/main.c
93,7 → 93,7
// use ASM version of LED blinking (file: blink_led_in_asm.S)
#ifdef USE_ASM_VERSION
 
blink_led_asm((uint32_t)(&GPIO_OUTPUT));
blink_led_asm((uint32_t)(&NEORV32_GPIO.OUTPUT_LO));
 
// use C version of LED blinking
#else
/blink_led/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/bus_explorer/main.c
0,0 → 1,436
// #################################################################################################
// # << NEORV32 - Bus Explorer - Processor Memory Space Inspector >> #
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
// # #
// # 1. Redistributions of source code must retain the above copyright notice, this list of #
// # conditions and the following disclaimer. #
// # #
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
// # conditions and the following disclaimer in the documentation and/or other materials #
// # provided with the distribution. #
// # #
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
// # endorse or promote products derived from this software without specific prior written #
// # permission. #
// # #
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
// # OF THE POSSIBILITY OF SUCH DAMAGE. #
// # ********************************************************************************************* #
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
// #################################################################################################
 
 
/**********************************************************************//**
* @file bus_explorer/main.c
* @author Stephan Nolting
* @brief Interactive memory inspector.
**************************************************************************/
 
#include <neorv32.h>
#include <string.h>
 
 
/**********************************************************************//**
* @name User configuration
**************************************************************************/
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200
/**@}*/
 
// Global variables
char access_size;
 
// Prototypes
void read_memory(void);
void setup_access(void);
void write_memory(void);
void atomic_cas(void);
void dump_memory(void);
uint32_t hexstr_to_uint(char *buffer, uint8_t length);
void aux_print_hex_byte(uint8_t byte);
 
 
/**********************************************************************//**
* This program provides an interactive console to read/write memory.
*
* @note This program requires the UART to be synthesized.
*
* @return 0 if execution was successful
**************************************************************************/
int main() {
 
char buffer[8];
int length = 0;
 
access_size = 0;
 
// check if UART unit is implemented at all
if (neorv32_uart0_available() == 0) {
return 1;
}
 
 
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
 
// disable global interrupts
neorv32_cpu_dint();
 
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
 
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
 
// intro
neorv32_uart0_printf("\n<<< NEORV32 Bus Explorer >>>\n\n");
 
// info
neorv32_uart0_printf("This program allows to read/write/dump memory space by hand.\n"
"Type 'help' to see the help menu.\n\n");
 
// Main menu
for (;;) {
neorv32_uart0_printf("BUS_EXPLORER:> ");
length = neorv32_uart0_scan(buffer, 8, 1);
neorv32_uart0_printf("\n");
 
if (!length) // nothing to be done
continue;
 
// decode input and execute command
if (!strcmp(buffer, "help")) {
neorv32_uart0_printf("Available commands:\n"
" help - show this text\n"
" setup - configure memory access width (byte,half,word)\n"
" read - read from address (byte,half,word)\n"
" write - write to address (byte,half,word)\n"
" atomic - perform atomic LR/SC access (word-only)\n"
" dump - dump several bytes/halfs/words from base address\n");
}
 
else if (!strcmp(buffer, "setup")) {
setup_access();
}
 
else if (!strcmp(buffer, "read")) {
read_memory();
}
 
else if (!strcmp(buffer, "atomic")) {
atomic_cas();
}
 
else if (!strcmp(buffer, "write")) {
write_memory();
}
 
else if (!strcmp(buffer, "dump")) {
dump_memory();
}
 
else {
neorv32_uart0_printf("Invalid command. Type 'help' to see all commands.\n");
}
}
 
return 0;
}
 
 
/**********************************************************************//**
* Configure memory access size
**************************************************************************/
void setup_access(void) {
 
neorv32_uart0_printf("Select data size (press 'x' to abort):\n"
" 'b' - byte, 8-bit, unsigned\n"
" 'h' - half-word, 16-bit, unsigned\n"
" 'w' - word, 32-bit, unsigned\n");
 
while(1) {
neorv32_uart0_printf("selection: ");
char tmp = neorv32_uart0_getc();
neorv32_uart0_putc(tmp);
if ((tmp == 'b') || (tmp == 'h') || (tmp == 'w')) {
access_size = tmp;
neorv32_uart0_printf("\n");
return;
}
else if (tmp == 'x') {
neorv32_uart0_printf("\n");
return;
}
else {
neorv32_uart0_printf("Invalid selection!\n");
}
}
}
 
 
/**********************************************************************//**
* Read from memory address
**************************************************************************/
void read_memory(void) {
 
char terminal_buffer[16];
 
if (access_size == 0) {
neorv32_uart0_printf("Configure data size using 'setup' first.\n");
return;
}
 
// enter address
neorv32_uart0_printf("Enter address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
register uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
// perform read access
neorv32_uart0_printf("\n[0x%x] = ", mem_address);
 
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
 
uint8_t mem_data_b = 0;
uint16_t mem_data_h = 0;
uint32_t mem_data_w = 0;
if (access_size == 'b') { mem_data_b = (uint32_t)neorv32_cpu_load_unsigned_byte(mem_address); }
if (access_size == 'h') { mem_data_h = (uint32_t)neorv32_cpu_load_unsigned_half(mem_address); }
if (access_size == 'w') { mem_data_w = (uint32_t)neorv32_cpu_load_unsigned_word(mem_address); }
 
// show memory content if there was no exception
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
neorv32_uart0_printf("0x");
if (access_size == 'b') {
aux_print_hex_byte(mem_data_b);
}
if (access_size == 'h') {
aux_print_hex_byte((uint8_t)(mem_data_h >> 8));
aux_print_hex_byte((uint8_t)(mem_data_h >> 0));
}
if (access_size == 'w') {
aux_print_hex_byte((uint8_t)(mem_data_w >> 24));
aux_print_hex_byte((uint8_t)(mem_data_w >> 16));
aux_print_hex_byte((uint8_t)(mem_data_w >> 8));
aux_print_hex_byte((uint8_t)(mem_data_w >> 0));
}
}
 
neorv32_uart0_printf("\n");
}
 
 
/**********************************************************************//**
* Write to memory address
**************************************************************************/
void write_memory(void) {
 
char terminal_buffer[16];
 
if (access_size == 0) {
neorv32_uart0_printf("Configure data size using 'setup' first.\n");
return;
}
 
// enter address
neorv32_uart0_printf("Enter address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
// enter data
uint8_t mem_data_b = 0;
uint16_t mem_data_h = 0;
uint32_t mem_data_w = 0;
if (access_size == 'b') {
neorv32_uart0_printf("\nEnter data (2 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 2+1, 1); // 2 hex chars for address plus '\0'
mem_data_b = (uint8_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
}
if (access_size == 'h') {
neorv32_uart0_printf("\nEnter data (4 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 4+1, 1); // 4 hex chars for address plus '\0'
mem_data_h = (uint16_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
}
if (access_size == 'w') {
neorv32_uart0_printf("\nEnter data (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
mem_data_w = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
}
 
// perform write access
if (access_size == 'b') { neorv32_cpu_store_unsigned_byte(mem_address, mem_data_b); }
if (access_size == 'h') { neorv32_cpu_store_unsigned_half(mem_address, mem_data_h); }
if (access_size == 'w') { neorv32_cpu_store_unsigned_word(mem_address, mem_data_w); }
 
neorv32_uart0_printf("\n");
}
 
 
/**********************************************************************//**
* Perform atomic compare-and-swap operation, always 32-bit
**************************************************************************/
void atomic_cas(void) {
 
char terminal_buffer[16];
uint32_t mem_address, rdata, wdata, status;
 
if ((neorv32_cpu_csr_read(CSR_MISA) & (1<<CSR_MISA_A)) != 0) {
 
// enter memory address
neorv32_uart0_printf("Enter memory address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
// enter desired value
neorv32_uart0_printf("\nEnter new value @0x%x (8 hex chars): 0x", mem_address);
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
wdata = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
rdata = neorv32_cpu_load_reservate_word(mem_address); // make reservation
status = neorv32_cpu_store_conditional(mem_address, wdata);
 
// status
neorv32_uart0_printf("\nOld data: 0x%x\n", rdata);
if (status == 0) {
neorv32_uart0_printf("Atomic access successful!\n");
neorv32_uart0_printf("New data: 0x%x\n", neorv32_cpu_load_unsigned_word(mem_address));
}
else {
neorv32_uart0_printf("Atomic access failed!\n");
}
}
else {
neorv32_uart0_printf("Atomic operations not implemented/enabled!\n");
}
}
 
 
/**********************************************************************//**
* Read several bytes/halfs/word from memory base address
**************************************************************************/
void dump_memory(void) {
 
char terminal_buffer[16];
 
if (access_size == 0) {
neorv32_uart0_printf("Configure data size using 'setup' first.\n");
return;
}
 
// enter base address
neorv32_uart0_printf("Enter base address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
neorv32_uart0_printf("\nPress key to start dumping. Press any key to abort.\n");
 
neorv32_uart0_getc(); // wait for key
 
// perform read accesses
while(neorv32_uart0_char_received() == 0) {
 
neorv32_uart0_printf("[0x%x] = ", mem_address);
 
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
 
uint8_t mem_data_b = 0;
uint16_t mem_data_h = 0;
uint32_t mem_data_w = 0;
if (access_size == 'b') { mem_data_b = (uint32_t)neorv32_cpu_load_unsigned_byte(mem_address); }
if (access_size == 'h') { mem_data_h = (uint32_t)neorv32_cpu_load_unsigned_half(mem_address); }
if (access_size == 'w') { mem_data_w = (uint32_t)neorv32_cpu_load_unsigned_word(mem_address); }
 
// show memory content if there was no exception
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
neorv32_uart0_printf("0x");
if (access_size == 'b') {
aux_print_hex_byte(mem_data_b);
}
if (access_size == 'h') {
aux_print_hex_byte((uint8_t)(mem_data_h >> 8));
aux_print_hex_byte((uint8_t)(mem_data_h >> 0));
}
if (access_size == 'w') {
aux_print_hex_byte((uint8_t)(mem_data_w >> 24));
aux_print_hex_byte((uint8_t)(mem_data_w >> 16));
aux_print_hex_byte((uint8_t)(mem_data_w >> 8));
aux_print_hex_byte((uint8_t)(mem_data_w >> 0));
}
neorv32_uart0_printf("\n");
}
else {
break;
}
 
if (access_size == 'b') {
mem_address += 1;
}
else if (access_size == 'h') {
mem_address += 2;
}
else if (access_size == 'w') {
mem_address += 4;
}
 
}
neorv32_uart0_char_received_get(); // clear UART rx buffer
neorv32_uart0_printf("\n");
}
 
 
/**********************************************************************//**
* Helper function to convert N hex chars string into uint32_T
*
* @param[in,out] buffer Pointer to array of chars to convert into number.
* @param[in,out] length Length of the conversion string.
* @return Converted number.
**************************************************************************/
uint32_t hexstr_to_uint(char *buffer, uint8_t length) {
 
uint32_t res = 0, d = 0;
char c = 0;
 
while (length--) {
c = *buffer++;
 
if ((c >= '0') && (c <= '9'))
d = (uint32_t)(c - '0');
else if ((c >= 'a') && (c <= 'f'))
d = (uint32_t)((c - 'a') + 10);
else if ((c >= 'A') && (c <= 'F'))
d = (uint32_t)((c - 'A') + 10);
else
d = 0;
 
res = res + (d << (length*4));
}
 
return res;
}
 
 
/**********************************************************************//**
* Print HEX byte.
*
* @param[in] byte Byte to be printed as 2-cahr hex value.
**************************************************************************/
void aux_print_hex_byte(uint8_t byte) {
 
static const char symbols[] = "0123456789abcdef";
 
neorv32_uart0_putc(symbols[(byte >> 4) & 0x0f]);
neorv32_uart0_putc(symbols[(byte >> 0) & 0x0f]);
}
/bus_explorer/makefile
0,0 → 1,40
#################################################################################################
# << NEORV32 - Application Makefile >> #
# ********************************************************************************************* #
# Make sure to add the RISC-V GCC compiler's bin folder to your PATH environment variable. #
# ********************************************************************************************* #
# BSD 3-Clause License #
# #
# Copyright (c) 2021, Stephan Nolting. All rights reserved. #
# #
# Redistribution and use in source and binary forms, with or without modification, are #
# permitted provided that the following conditions are met: #
# #
# 1. Redistributions of source code must retain the above copyright notice, this list of #
# conditions and the following disclaimer. #
# #
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
# conditions and the following disclaimer in the documentation and/or other materials #
# provided with the distribution. #
# #
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
# endorse or promote products derived from this software without specific prior written #
# permission. #
# #
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
# OF THE POSSIBILITY OF SUCH DAMAGE. #
# ********************************************************************************************* #
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include $(NEORV32_HOME)/sw/common/common.mk
/coremark/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_freeRTOS/makefile
138,7 → 138,7
 
 
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
# Include central makefile
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_gptmr/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_neopixel/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_pwm/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_spi/main.c
0,0 → 1,366
// #################################################################################################
// # << NEORV32 - SPI Bus Explorer Demo Program >> #
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
// # #
// # 1. Redistributions of source code must retain the above copyright notice, this list of #
// # conditions and the following disclaimer. #
// # #
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
// # conditions and the following disclaimer in the documentation and/or other materials #
// # provided with the distribution. #
// # #
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
// # endorse or promote products derived from this software without specific prior written #
// # permission. #
// # #
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
// # OF THE POSSIBILITY OF SUCH DAMAGE. #
// # ********************************************************************************************* #
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
// #################################################################################################
 
 
/**********************************************************************//**
* @file demo_spi/main.c
* @author Stephan Nolting
* @brief SPI bus explorer (execute SPI transactions by hand).
**************************************************************************/
 
#include <neorv32.h>
#include <string.h>
 
 
/**********************************************************************//**
* @name User configuration
**************************************************************************/
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200
/**@}*/
 
 
// Global variables
uint32_t spi_configured;
uint32_t spi_size; // data quantity in bytes
 
// Prototypes
void spi_cs(uint32_t type);
void spi_trans(void);
void spi_setup(void);
uint32_t hexstr_to_uint(char *buffer, uint8_t length);
void aux_print_hex_byte(uint8_t byte);
 
 
/**********************************************************************//**
* This program provides an interactive console to communicate with SPI devices.
*
* @note This program requires the UART and the SPI to be synthesized.
*
* @return Irrelevant.
**************************************************************************/
int main() {
 
char buffer[8];
int length = 0;
 
 
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
 
// init UART0 at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
 
 
// check if UART0 unit is implemented at all
if (neorv32_uart0_available() == 0) {
return 1;
}
 
// intro
neorv32_uart0_printf("\n<<< SPI Bus Explorer >>>\n\n");
 
// check if SPI unit is implemented at all
if (neorv32_spi_available() == 0) {
neorv32_uart0_printf("No SPI unit implemented.");
return 1;
}
 
 
// info
neorv32_uart0_printf("This program allows to create SPI transfers by hand.\n"
"Type 'help' to see the help menu.\n\n");
 
// disable and reset SPI module
NEORV32_SPI.CTRL = 0;
spi_configured = 0; // SPI not configured yet
spi_size = 0;
 
 
// Main menu
for (;;) {
neorv32_uart0_printf("SPI_EXPLORER:> ");
length = neorv32_uart0_scan(buffer, 8, 1);
neorv32_uart0_printf("\n");
 
if (!length) // nothing to be done
continue;
 
// decode input and execute command
if (!strcmp(buffer, "help")) {
neorv32_uart0_printf("Available commands:\n"
" help - show this text\n"
" setup - configure SPI module\n"
" cs-en - enable CS line (set low)\n"
" cs-dis - disable CS line (set high)\n"
" trans - execute a transmission (write & read to/from SPI)\n"
"\n"
"Configure the SPI module using 'setup'. Enable a certain module using 'cs-en',\n"
"then transfer data using 'trans' and disable the module again using 'cs-dis'.\n\n");
}
else if (!strcmp(buffer, "setup")) {
spi_setup();
}
else if (!strcmp(buffer, "cs-en")) {
spi_cs(1);
}
else if (!strcmp(buffer, "cs-dis")) {
spi_cs(0);
}
else if (!strcmp(buffer, "trans")) {
spi_trans();
}
else {
neorv32_uart0_printf("Invalid command. Type 'help' to see all commands.\n");
}
}
 
return 0;
}
 
 
/**********************************************************************//**
* Enable or disable chip-select line
*
* @param[in] type 0=disable, 1=enable
**************************************************************************/
void spi_cs(uint32_t type) {
 
char terminal_buffer[2];
uint8_t channel;
 
if (type) {
neorv32_uart0_printf("Select chip-select line to enable (set low) [0..7]: ");
}
else {
neorv32_uart0_printf("Select chip-select line to disable (set high) [0..7]: ");
}
 
while (1) {
neorv32_uart0_scan(terminal_buffer, 2, 1); // 1 hex char plus '\0'
channel = (uint8_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
if (channel > 7) {
neorv32_uart0_printf("\nInvalid channel selection!\n");
return;
}
else {
neorv32_uart0_printf("\n");
break;
}
}
 
if (type) {
neorv32_spi_cs_en(channel);
}
else {
neorv32_spi_cs_dis(channel);
}
}
 
 
/**********************************************************************//**
* SPI data transfer
**************************************************************************/
void spi_trans(void) {
 
char terminal_buffer[9];
 
if (spi_configured == 0) {
neorv32_uart0_printf("SPI module not configured yet! Use 'setup' to configure SPI module.\n");
return;
}
 
neorv32_uart0_printf("Enter TX data (%u hex chars): 0x", spi_size);
neorv32_uart0_scan(terminal_buffer, spi_size*2+1, 1);
uint32_t tx_data = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
 
uint32_t rx_data = neorv32_spi_trans(tx_data);
 
if (spi_size == 1) {
neorv32_uart0_printf("\nTX data: 0x");
aux_print_hex_byte((uint8_t)(tx_data));
neorv32_uart0_printf("\nRX data: 0x");
aux_print_hex_byte((uint8_t)(rx_data));
neorv32_uart0_printf("\n");
}
else if (spi_size == 2) {
neorv32_uart0_printf("\nTX data: 0x");
aux_print_hex_byte((uint8_t)(tx_data >> 8));
aux_print_hex_byte((uint8_t)(tx_data));
neorv32_uart0_printf("\nRX data: 0x");
aux_print_hex_byte((uint8_t)(rx_data >> 8));
aux_print_hex_byte((uint8_t)(rx_data));
neorv32_uart0_printf("\n");
}
else if (spi_size == 3) {
neorv32_uart0_printf("\nTX data: 0x");
aux_print_hex_byte((uint8_t)(tx_data >> 16));
aux_print_hex_byte((uint8_t)(tx_data >> 8));
aux_print_hex_byte((uint8_t)(tx_data));
neorv32_uart0_printf("\nRX data: 0x");
aux_print_hex_byte((uint8_t)(rx_data >> 16));
aux_print_hex_byte((uint8_t)(rx_data >> 8));
aux_print_hex_byte((uint8_t)(rx_data));
neorv32_uart0_printf("\n");
}
else {
neorv32_uart0_printf("\nTX data: 0x%x\n", tx_data);
neorv32_uart0_printf("RX data: 0x%x\n", rx_data);
}
}
 
 
/**********************************************************************//**
* Configure SPI module
**************************************************************************/
void spi_setup(void) {
 
char terminal_buffer[9];
uint8_t spi_prsc, clk_phase, clk_pol, data_size;
uint32_t tmp;
 
// ---- SPI clock ----
 
while (1) {
neorv32_uart0_printf("Select SPI clock prescaler (0..7): ");
neorv32_uart0_scan(terminal_buffer, 2, 1);
tmp = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
if (tmp > 8) {
neorv32_uart0_printf("\nInvalid selection!\n");
}
else {
spi_prsc = (uint8_t)tmp;
break;
}
}
 
uint32_t div = 0;
switch (spi_prsc) {
case 0: div = 2 * 2; break;
case 1: div = 2 * 4; break;
case 2: div = 2 * 8; break;
case 3: div = 2 * 64; break;
case 4: div = 2 * 128; break;
case 5: div = 2 * 1024; break;
case 6: div = 2 * 2048; break;
case 7: div = 2 * 4096; break;
default: div = 0; break;
}
uint32_t clock = NEORV32_SYSINFO.CLK / div;
neorv32_uart0_printf("\n+ New SPI clock speed = %u Hz\n", clock);
 
// ---- SPI clock mode ----
 
while (1) {
neorv32_uart0_printf("Select SPI clock mode (0..3): ");
neorv32_uart0_scan(terminal_buffer, 2, 1);
tmp = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
if (tmp > 4) {
neorv32_uart0_printf("\nInvalid selection!\n");
}
else {
clk_pol = (uint8_t)((tmp >> 1) & 1);
clk_phase = (uint8_t)(tmp & 1);
break;
}
}
neorv32_uart0_printf("\n+ New SPI clock mode = %u\n", tmp);
 
// ---- SPI transfer data quantity ----
 
while (1) {
neorv32_uart0_printf("Select SPI data transfer size in bytes (1,2,3,4): ");
neorv32_uart0_scan(terminal_buffer, 2, 1);
tmp = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
if ( (tmp < 1) || (tmp > 4)) {
neorv32_uart0_printf("\nInvalid selection!\n");
}
else {
data_size = (uint8_t)(tmp - 1);
break;
}
}
neorv32_uart0_printf("\n+ New SPI data size = %u-byte(s)\n\n", tmp);
 
neorv32_spi_setup(spi_prsc, clk_phase, clk_pol, data_size);
spi_configured = 1; // SPI is configured now
spi_size = tmp;
}
 
 
/**********************************************************************//**
* Helper function to convert N hex chars string into uint32_T
*
* @param[in,out] buffer Pointer to array of chars to convert into number.
* @param[in,out] length Length of the conversion string.
* @return Converted number.
**************************************************************************/
uint32_t hexstr_to_uint(char *buffer, uint8_t length) {
 
uint32_t res = 0, d = 0;
char c = 0;
 
while (length--) {
c = *buffer++;
 
if ((c >= '0') && (c <= '9'))
d = (uint32_t)(c - '0');
else if ((c >= 'a') && (c <= 'f'))
d = (uint32_t)((c - 'a') + 10);
else if ((c >= 'A') && (c <= 'F'))
d = (uint32_t)((c - 'A') + 10);
else
d = 0;
 
res = res + (d << (length*4));
}
 
return res;
}
 
 
/**********************************************************************//**
* Print HEX byte.
*
* @param[in] byte Byte to be printed as 2-cahr hex value.
**************************************************************************/
void aux_print_hex_byte(uint8_t byte) {
 
static const char symbols[] = "0123456789abcdef";
 
neorv32_uart0_putc(symbols[(byte >> 4) & 0x0f]);
neorv32_uart0_putc(symbols[(byte >> 0) & 0x0f]);
}
/demo_spi/makefile
0,0 → 1,40
#################################################################################################
# << NEORV32 - Application Makefile >> #
# ********************************************************************************************* #
# Make sure to add the RISC-V GCC compiler's bin folder to your PATH environment variable. #
# ********************************************************************************************* #
# BSD 3-Clause License #
# #
# Copyright (c) 2021, Stephan Nolting. All rights reserved. #
# #
# Redistribution and use in source and binary forms, with or without modification, are #
# permitted provided that the following conditions are met: #
# #
# 1. Redistributions of source code must retain the above copyright notice, this list of #
# conditions and the following disclaimer. #
# #
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
# conditions and the following disclaimer in the documentation and/or other materials #
# provided with the distribution. #
# #
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
# endorse or promote products derived from this software without specific prior written #
# permission. #
# #
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
# OF THE POSSIBILITY OF SUCH DAMAGE. #
# ********************************************************************************************* #
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include $(NEORV32_HOME)/sw/common/common.mk
/demo_trng/main.c
82,7 → 82,7
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
 
// intro
neorv32_uart0_printf("\n--- TRNG Demo ---\n\n");
neorv32_uart0_printf("\n<<< NEORV32 TRNG Demo >>>\n");
 
// check if TRNG unit is implemented at all
if (neorv32_trng_available() == 0) {
92,13 → 92,14
 
// enable TRNG
neorv32_trng_enable();
neorv32_cpu_delay_ms(100); // TRNG "warm up"
 
while(1) {
 
// main menu
neorv32_uart0_printf("\nCommands:\n"
" n: Print 8-bit random numbers (abort by pressing any key)\n"
" h: Generate and print histogram\n");
" n: Print 8-bit random numbers (abort by pressing any key)\n"
" h: Generate and print histogram\n");
 
neorv32_uart0_printf("CMD:> ");
char cmd = neorv32_uart0_getc();
/demo_trng/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_twi/main.c
57,6 → 57,7
void set_speed(void);
void send_twi(void);
uint32_t hexstr_to_uint(char *buffer, uint8_t length);
void print_hex_byte(uint8_t data);
 
 
/**********************************************************************//**
104,8 → 105,8
neorv32_uart0_printf("This program allows to create TWI transfers by hand.\n"
"Type 'help' to see the help menu.\n\n");
 
// configure TWI, second slowest clock, no clock-stretching
neorv32_twi_setup(CLK_PRSC_2048, 0);
// configure TWI, second slowest clock
neorv32_twi_setup(CLK_PRSC_2048);
 
// no active bus session yet
bus_claimed = 0;
219,7 → 220,9
neorv32_twi_generate_stop();
 
if (twi_ack == 0) {
neorv32_uart0_printf("+ Found device at write-address 0x%x\n", (uint32_t)(2*i));
neorv32_uart0_printf(" + Found device at write-address 0x");
print_hex_byte(2*i);
neorv32_uart0_printf("\n");
num_devices++;
}
}
242,8 → 245,9
neorv32_uart0_scan(terminal_buffer, 3, 1); // 2 hex chars for address plus '\0'
uint8_t tmp = (uint8_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
uint8_t res = neorv32_twi_trans(tmp);
neorv32_uart0_printf("\nRX data: 0x%x\n", (uint32_t)neorv32_twi_get_data());
neorv32_uart0_printf("Response: ");
neorv32_uart0_printf("\n RX data: 0x");
print_hex_byte((uint8_t)neorv32_twi_get_data());
neorv32_uart0_printf("\n Response: ");
if (res == 0)
neorv32_uart0_printf("ACK\n");
else
253,7 → 257,7
 
 
/**********************************************************************//**
* Helper function to convert N hex chars string into uint32_T
* Helper function to convert N hex chars string into uint32_t
*
* @param[in,out] buffer Pointer to array of chars to convert into number.
* @param[in,out] length Length of the conversion string.
280,4 → 284,19
}
 
return res;
}
}
 
 
/**********************************************************************//**
* Print byte as hex chars via UART0.
*
* @param data 8-bit data to be printed as two hex chars.
**************************************************************************/
void print_hex_byte(uint8_t data) {
 
static const char symbols[] = "0123456789abcdef";
 
neorv32_uart0_putc(symbols[(data >> 4) & 15]);
neorv32_uart0_putc(symbols[(data >> 0) & 15]);
}
 
/demo_twi/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_wdt/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/demo_xirq/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/dhrystone/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/floating_point_test/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/game_of_life/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/hello_world/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk
/processor_check/main.c
483,26 → 483,26
}
 
 
// ----------------------------------------------------------
// No "real" CSR write access (because rs1 = r0)
// ----------------------------------------------------------
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
PRINT_STANDARD("[%i] Read-only CSR 'no-write' (rs1=0) access: ", cnt_test);
//// ----------------------------------------------------------
//// No "real" CSR write access (because rs1 = r0)
//// ----------------------------------------------------------
//neorv32_cpu_csr_write(CSR_MCAUSE, 0);
//PRINT_STANDARD("[%i] Read-only CSR 'no-write' (rs1=0) access: ", cnt_test);
//
//cnt_test++;
//
//// time CSR is read-only, but no actual write is performed because rs1=r0
//// -> should cause no exception
//asm volatile("csrrs zero, time, zero");
//
//if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
// test_ok();
//}
//else {
// test_fail();
//}
 
cnt_test++;
 
// time CSR is read-only, but no actual write is performed because rs1=r0
// -> should cause no exception
asm volatile("csrrs zero, time, zero");
 
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
test_ok();
}
else {
test_fail();
}
 
 
// ----------------------------------------------------------
// Unaligned instruction address
// ----------------------------------------------------------
1124,10 → 1124,11
// configure SPI
neorv32_spi_setup(CLK_PRSC_2, 0, 0, 0);
 
// enable fast interrupt
neorv32_cpu_irq_enable(CSR_MIE_FIRQ6E);
 
// trigger SPI IRQ
neorv32_spi_trans(0);
// enable fast interrupt
neorv32_cpu_irq_enable(CSR_MIE_FIRQ6E);
while(neorv32_spi_busy()); // wait for current transfer to finish
 
// wait some time for the IRQ to arrive the CPU
1155,14 → 1156,14
 
cnt_test++;
 
// configure TWI, fastest clock, no peripheral clock stretching
neorv32_twi_setup(CLK_PRSC_2, 0);
// configure TWI, fastest clock
neorv32_twi_setup(CLK_PRSC_2);
 
// enable TWI FIRQ
neorv32_cpu_irq_enable(CSR_MIE_FIRQ7E);
 
// trigger TWI IRQ
neorv32_twi_generate_start();
neorv32_twi_trans(0);
neorv32_twi_generate_stop();
neorv32_cpu_irq_enable(CSR_MIE_FIRQ7E);
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
1224,9 → 1225,37
// ----------------------------------------------------------
// Fast interrupt channel 9 (NEOLED)
// ----------------------------------------------------------
PRINT_STANDARD("[%i] FIRQ9 (NEOLED): skipped\n", cnt_test);
if (neorv32_neoled_available()) {
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
PRINT_STANDARD("[%i] FIRQ9 (NEOLED): ", cnt_test);
 
cnt_test++;
 
// enable fast interrupt
neorv32_cpu_irq_enable(CSR_MIE_FIRQ9E);
 
// configure NEOLED
neorv32_neoled_setup(CLK_PRSC_2, 0, 0, 0);
 
// send dummy data
neorv32_neoled_write_nonblocking(0);
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
neorv32_cpu_irq_disable(CSR_MIE_FIRQ9E);
 
if (neorv32_cpu_csr_read(CSR_MCAUSE) == TRAP_CODE_FIRQ_9) {
test_ok();
}
else {
test_fail();
}
 
// no more NEOLED interrupts
neorv32_neoled_disable();
}
 
 
// ----------------------------------------------------------
// Fast interrupt channel 10 & 11 (SLINK)
// ----------------------------------------------------------
1236,13 → 1265,13
 
cnt_test++;
 
// enable SLINK
neorv32_slink_enable();
 
// configure SLINK IRQs
neorv32_slink_tx_irq_config(0, SLINK_IRQ_ENABLE, SLINK_IRQ_TX_NOT_FULL);
neorv32_slink_rx_irq_config(0, SLINK_IRQ_ENABLE, SLINK_IRQ_RX_NOT_EMPTY);
 
// enable SLINK
neorv32_slink_enable();
 
// enable SLINK FIRQs
neorv32_cpu_irq_enable(CSR_MIE_FIRQ10E);
neorv32_cpu_irq_enable(CSR_MIE_FIRQ11E);
1306,8 → 1335,8
// enable GPTMR FIRQ
neorv32_cpu_irq_enable(CSR_MIE_FIRQ12E);
 
// configure timer IRQ for one-shot mode after 2*4 clock cycles
neorv32_gptmr_setup(CLK_PRSC_2, 0, 4);
// configure timer IRQ for one-shot mode after 2*3 clock cycles
neorv32_gptmr_setup(CLK_PRSC_2, 0, 3);
 
// wait some time for the IRQ to arrive the CPU
asm volatile("nop");
/processor_check/makefile
34,6 → 34,7
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
#################################################################################################
 
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../../..
 
include ../../common/common.mk
include $(NEORV32_HOME)/sw/common/common.mk

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