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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /neorv32/trunk/sw/lib/source
    from Rev 62 to Rev 63
    Reverse comparison

Rev 62 → Rev 63

/neorv32_cpu.c
332,7 → 332,7
uint32_t neorv32_cpu_pmp_get_num_regions(void) {
 
// PMP implemented at all?
if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_PMP)) == 0) {
if ((SYSINFO_CPU & (1<<SYSINFO_CPU_PMP)) == 0) {
return 0;
}
 
597,7 → 597,7
uint32_t neorv32_cpu_hpm_get_counters(void) {
 
// HPMs implemented at all?
if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_HPM)) == 0) {
if ((SYSINFO_CPU & (1<<SYSINFO_CPU_HPM)) == 0) {
return 0;
}
 
680,7 → 680,7
uint32_t neorv32_cpu_hpm_get_size(void) {
 
// HPMs implemented at all?
if ((neorv32_cpu_csr_read(CSR_MZEXT) & (1<<CSR_MZEXT_HPM)) == 0) {
if ((SYSINFO_CPU & (1<<SYSINFO_CPU_HPM)) == 0) {
return 0;
}
 
710,26 → 710,3
return size;
}
 
 
/**********************************************************************//**
* Check if certain Z* extension is available
*
* @param[in] flag_id Index of the Z-extension to check from #NEORV32_CSR_MZEXT_enum
* @return 0 if extension is NOT available, != 0 if extension is available.
**************************************************************************/
int neorv32_cpu_check_zext(uint8_t flag_id) {
 
// check if out of range
if (flag_id > 31) {
return 0;
}
 
uint32_t mask = (uint32_t)(1 << flag_id);
if ((neorv32_cpu_csr_read(CSR_MZEXT) & mask) == 0) {
return 0;
}
else {
return 1;
}
}
 
/neorv32_rte.c
277,8 → 277,7
 
// Processor - general stuff
neorv32_uart0_printf("\n=== << General >> ===\n"
"Clock: %u Hz\n"
"User ID: 0x%x\n", SYSINFO_CLK, SYSINFO_USER_CODE);
"Clock speed: %u Hz\n", SYSINFO_CLK);
neorv32_uart0_printf("Full HW reset: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_HW_RESET));
neorv32_uart0_printf("Boot Config.: Boot ");
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_BOOTLOADER)) {
330,31 → 329,41
}
}
// Z* CPU extensions (from custom "mzext" CSR)
tmp = neorv32_cpu_csr_read(CSR_MZEXT);
if (tmp & (1<<CSR_MZEXT_ZICSR)) {
// Z* CPU extensions
tmp = SYSINFO_CPU;
if (tmp & (1<<SYSINFO_CPU_ZICSR)) {
neorv32_uart0_printf("Zicsr ");
}
if (tmp & (1<<CSR_MZEXT_ZIFENCEI)) {
if (tmp & (1<<SYSINFO_CPU_ZIFENCEI)) {
neorv32_uart0_printf("Zifencei ");
}
if (tmp & (1<<CSR_MZEXT_ZMMUL)) {
if (tmp & (1<<SYSINFO_CPU_ZMMUL)) {
neorv32_uart0_printf("Zmmul ");
}
if (tmp & (1<<SYSINFO_CPU_ZBB)) {
neorv32_uart0_printf("Zbb ");
}
 
if (tmp & (1<<CSR_MZEXT_ZFINX)) {
if (tmp & (1<<SYSINFO_CPU_ZFINX)) {
neorv32_uart0_printf("Zfinx ");
}
if (tmp & (1<<CSR_MZEXT_ZXNOCNT)) {
if (tmp & (1<<SYSINFO_CPU_ZXNOCNT)) {
neorv32_uart0_printf("Zxnocnt(!) ");
}
if (tmp & (1<<CSR_MZEXT_ZXSCNT)) {
if (tmp & (1<<SYSINFO_CPU_ZXSCNT)) {
neorv32_uart0_printf("Zxscnt(!) ");
}
if (tmp & (1<<CSR_MZEXT_DEBUGMODE)) {
if (tmp & (1<<SYSINFO_CPU_DEBUGMODE)) {
neorv32_uart0_printf("Debug-Mode ");
}
 
if (tmp & (1<<SYSINFO_CPU_FASTMUL)) {
neorv32_uart0_printf("FAST_MUL ");
}
if (tmp & (1<<SYSINFO_CPU_FASTSHIFT)) {
neorv32_uart0_printf("FAST_SHIFT ");
}
 
// check physical memory protection
neorv32_uart0_printf("\nPMP: ");
uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
/neorv32_wdt.c
112,7 → 112,7
**************************************************************************/
void neorv32_wdt_reset(void) {
 
WDT_CT = (1 << WDT_CT_RESET);
WDT_CT = WDT_CT | (1 << WDT_CT_RESET);
}
 
 

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