URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/lib/source
- from Rev 70 to Rev 71
- ↔ Reverse comparison
Rev 70 → Rev 71
/neorv32_cpu.c
3,7 → 3,7
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
148,7 → 148,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
register uint32_t tmp1, tmp2, tmp3; |
177,7 → 177,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
cycles.uint64 = value; |
199,7 → 199,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
register uint32_t tmp1, tmp2, tmp3; |
228,7 → 228,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
cycles.uint64 = value; |
250,7 → 250,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
register uint32_t tmp1, tmp2, tmp3; |
/neorv32_gpio.c
3,7 → 3,7
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
143,7 → 143,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} data; |
|
data.uint64 = port_data; |
161,7 → 161,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} data; |
|
data.uint32[0] = NEORV32_GPIO.INPUT_LO; |
/neorv32_mtime.c
3,7 → 3,7
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
72,7 → 72,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
cycles.uint64 = time; |
95,7 → 95,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
uint32_t tmp1, tmp2, tmp3; |
127,7 → 127,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
cycles.uint64 = timecmp; |
147,7 → 147,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} cycles; |
|
cycles.uint32[0] = NEORV32_MTIME.TIMECMP_LO; |
/neorv32_rte.c
323,7 → 323,7
else { |
neorv32_uart0_printf("unknown"); |
} |
|
|
// CPU extensions |
neorv32_uart0_printf("\nISA extensions: "); |
tmp = neorv32_cpu_csr_read(CSR_MISA); |
358,10 → 358,12
if (tmp & (1<<SYSINFO_CPU_ZXSCNT)) { |
neorv32_uart0_printf("Zxscnt(!) "); |
} |
|
if (tmp & (1<<SYSINFO_CPU_DEBUGMODE)) { |
neorv32_uart0_printf("Debug "); |
} |
|
// CPU extension options |
neorv32_uart0_printf("\nExtension options: "); |
if (tmp & (1<<SYSINFO_CPU_FASTMUL)) { |
neorv32_uart0_printf("FAST_MUL "); |
} |
582,10 → 584,8
return; // cannot output anything if UART0 is not implemented |
} |
|
neorv32_uart0_print("The NEORV32 RISC-V Processor\n" |
"(c) 2021, Stephan Nolting\n" |
"BSD 3-Clause License\n" |
"https://github.com/stnolting/neorv32\n\n"); |
neorv32_uart0_print("The NEORV32 RISC-V Processor, https://github.com/stnolting/neorv32\n" |
"(c) 2022 by Stephan Nolting, BSD 3-Clause License\n\n"); |
} |
|
|
648,7 → 648,7
"\n" |
"BSD 3-Clause License\n" |
"\n" |
"Copyright (c) 2021, Stephan Nolting. All rights reserved.\n" |
"Copyright (c) 2022, Stephan Nolting. All rights reserved.\n" |
"\n" |
"Redistribution and use in source and binary forms, with or without modification, are\n" |
"permitted provided that the following conditions are met:\n" |
/neorv32_xip.c
197,7 → 197,7
|
union { |
uint64_t uint64; |
uint32_t uint32[sizeof(uint64_t)/2]; |
uint32_t uint32[sizeof(uint64_t)/sizeof(uint32_t)]; |
} data; |
|
data.uint64 = *rtx_data; |