URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
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- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw/lib
- from Rev 15 to Rev 16
- ↔ Reverse comparison
Rev 15 → Rev 16
/include/neorv32.h
36,7 → 36,6
/**********************************************************************//** |
* @file neorv32.h |
* @author Stephan Nolting |
* @date 30 May 2020 |
* |
* @brief Main NEORV32 core library file. |
* |
141,7 → 140,7
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/**********************************************************************//** |
* CPU <b>misa</b> CSR (r/w): Machine instruction set extensions (RISC-V spec.) |
* CPU <b>misa</b> CSR (r/-): Machine instruction set extensions (RISC-V spec.) |
**************************************************************************/ |
enum NEORV32_CPU_MISA_enum { |
CPU_MISA_C_EXT = 2, /**< CPU misa CSR (2): C: Compressed instructions CPU extension available (r/-)*/ |
150,7 → 149,6
CPU_MISA_M_EXT = 12, /**< CPU misa CSR (12): M: Multiplier/divider CPU extension available (r/-)*/ |
CPU_MISA_U_EXT = 20, /**< CPU misa CSR (20): U: User mode CPU extension available (r/-)*/ |
CPU_MISA_X_EXT = 23, /**< CPU misa CSR (23): X: Non-standard CPU extension available (r/-) */ |
CPU_MISA_Z_EXT = 25, /**< CPU misa CSR (25): Z: Privileged architecture CPU extension(s) available (r/-) */ |
CPU_MISA_MXL_LO_EXT = 30, /**< CPU misa CSR (30): MXL.lo: CPU data width (r/-) */ |
CPU_MISA_MXL_HI_EXT = 31 /**< CPU misa CSR (31): MXL.Hi: CPU data width (r/-) */ |
}; |
/source/neorv32_cpu.c
242,6 → 242,7
* Switch from privilege mode MACHINE to privilege mode USER. |
* |
* @note This function requires the U extension to be implemented. |
* @note Maybe you should do a fencei after this. |
**************************************************************************/ |
void __attribute__((naked)) neorv32_cpu_goto_user_mode(void) { |
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