URL
https://opencores.org/ocsvn/neorv32/neorv32/trunk
Subversion Repositories neorv32
Compare Revisions
- This comparison shows the changes necessary to convert path
/neorv32/trunk/sw
- from Rev 48 to Rev 49
- ↔ Reverse comparison
Rev 48 → Rev 49
/example/demo_nco/main.c
0,0 → 1,355
// ################################################################################################# |
// # << NEORV32 - Numerically-controller oscillator (NCO) demo >> # |
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
// # # |
// # 1. Redistributions of source code must retain the above copyright notice, this list of # |
// # conditions and the following disclaimer. # |
// # # |
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # |
// # conditions and the following disclaimer in the documentation and/or other materials # |
// # provided with the distribution. # |
// # # |
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # |
// # endorse or promote products derived from this software without specific prior written # |
// # permission. # |
// # # |
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # |
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # |
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # |
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # |
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # |
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # |
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # |
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # |
// # OF THE POSSIBILITY OF SUCH DAMAGE. # |
// # ********************************************************************************************* # |
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # |
// ################################################################################################# |
|
|
/**********************************************************************//** |
* @file demo_nco/main.c |
* @author Stephan Nolting |
* @brief Interactive NCO configuration program. |
**************************************************************************/ |
|
#include <neorv32.h> |
#include <string.h> |
|
|
/**********************************************************************//** |
* @name User configuration |
**************************************************************************/ |
/**@{*/ |
/** UART BAUD rate */ |
#define BAUD_RATE 19200 |
/**@}*/ |
|
|
// Prototypes |
void nco_setup(void); |
void nco_show_config(uint8_t channel); |
uint32_t hexstr_to_uint(char *buffer, uint8_t length); |
|
|
/**********************************************************************//** |
* Demo program to configure the NCO via an interactive UART terminal. |
* |
* @note This program requires the NCO and the UART modules. |
* |
* @return Irrelevant. |
**************************************************************************/ |
int main() { |
|
char buffer[8]; |
int length = 0; |
|
// setup run-time environment for interrupts and exceptions |
neorv32_rte_setup(); |
|
// init UART at default baud rate, no parity bits |
neorv32_uart_setup(BAUD_RATE, 0b00); |
|
// check available hardware extensions and compare with compiler flags |
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch |
|
|
// check if NCO unit is implemented at all |
if (neorv32_nco_available() == 0) { |
neorv32_uart_printf("ERROR! NCO unit not synthesized!\n"); |
return 0; |
} |
|
// say hello |
neorv32_uart_printf("Interactive NCO configuration console.\n"); |
|
|
// clear NCO |
neorv32_nco_disable(); // disable NCO |
neorv32_nco_set_tuning(0, 0); // set tuning word of channel 0 to zero |
neorv32_nco_set_tuning(1, 0); // set tuning word of channel 1 to zero |
neorv32_nco_set_tuning(2, 0); // set tuning word of channel 2 to zero |
neorv32_nco_enable(); // globally enable NCO |
|
|
// info |
neorv32_uart_printf("This program allows configure each NCO channel.\n" |
"Type 'help' to see the help menu.\n\n"); |
|
// Main menu |
for (;;) { |
neorv32_uart_printf("NCO:> "); |
length = neorv32_uart_scan(buffer, 8, 1); |
neorv32_uart_printf("\n"); |
|
if (!length) // nothing to be done |
continue; |
|
// decode input and execute command |
if (!strcmp(buffer, "help")) { |
neorv32_uart_printf("Available commands:\n" |
" help - show this text\n" |
" setup - configure NCO channel\n" |
" info - show current NCO configuration\n" |
" on - disable NCO globally\n" |
" off - enable NCO globally\n"); |
} |
|
else if (!strcmp(buffer, "setup")) { |
nco_setup(); |
} |
|
else if (!strcmp(buffer, "info")) { |
nco_show_config(0); |
nco_show_config(1); |
nco_show_config(2); |
} |
|
else if (!strcmp(buffer, "on")) { |
neorv32_nco_enable(); |
neorv32_uart_printf("NCO enabled.\n"); |
} |
|
else if (!strcmp(buffer, "off")) { |
neorv32_nco_disable(); |
neorv32_uart_printf("NCO disabled.\n"); |
} |
|
else { |
neorv32_uart_printf("Invalid command. Type 'help' to see all commands.\n"); |
} |
} |
|
return 0; |
} |
|
|
|
/**********************************************************************//** |
* Configure NCO channel dialog |
**************************************************************************/ |
void nco_setup(void) { |
|
char terminal_buffer[16]; |
|
// get channel number |
neorv32_uart_printf("Enter channel number (0,1,2): "); |
neorv32_uart_scan(terminal_buffer, 1+1, 1); // 1 hex char plus '\0' |
uint32_t nco_channel = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_channel > 3) { |
neorv32_uart_printf("\nInvalid channel.\n"); |
return; |
} |
|
|
// get clock prescaler |
neorv32_uart_printf("\nEnter clock prescaler (0..7): "); |
neorv32_uart_scan(terminal_buffer, 1+1, 1); // 1 hex char plus '\0' |
uint32_t nco_prsc = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_prsc > 7) { |
neorv32_uart_printf("\nInvalid prescaler.\n"); |
return; |
} |
|
|
// get idle polarity |
neorv32_uart_printf("\nEnter idle polarity (0/1): "); |
neorv32_uart_scan(terminal_buffer, 1+1, 1); // 1 hex char plus '\0' |
uint32_t nco_idle_pol = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_idle_pol > 1) { |
neorv32_uart_printf("\nInvalid polarity.\n"); |
return; |
} |
|
|
// get mode |
neorv32_uart_printf("\nEnter mode (0/1): "); |
neorv32_uart_scan(terminal_buffer, 1+1, 1); // 1 hex char plus '\0' |
uint32_t nco_mode = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_mode > 1) { |
neorv32_uart_printf("\nInvalid mode.\n"); |
return; |
} |
|
// get pulse length |
uint32_t nco_pulse = 0; |
if (nco_mode) { |
neorv32_uart_printf("\nEnter pulse length (0..7): "); |
neorv32_uart_scan(terminal_buffer, 1+1, 1); // 1 hex char plus '\0' |
nco_pulse = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_pulse > 7) { |
neorv32_uart_printf("\nInvalid pulse length.\n"); |
return; |
} |
} |
|
|
// get tuning word |
neorv32_uart_printf("\nEnter tuing word (5 hex chars): 0x"); |
neorv32_uart_scan(terminal_buffer, 5+1, 1); // 5 hex chars plus '\0' |
uint32_t nco_tuning_word = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer)); |
if (nco_tuning_word > 0xffffff) { |
neorv32_uart_printf("\nTuning word out of range.\n"); |
return; |
} |
|
|
// set configuration |
neorv32_nco_setup((uint8_t)nco_channel, (uint8_t)nco_mode, (uint8_t)nco_idle_pol, 1, (uint8_t)nco_prsc, (uint8_t)nco_pulse); // always set output_enable |
neorv32_nco_set_tuning((uint8_t)nco_channel, nco_tuning_word); |
|
neorv32_uart_printf("\nDone.\n"); |
|
// show new configuration |
nco_show_config((uint8_t)nco_channel); |
} |
|
|
/**********************************************************************//** |
* Show channel configuration. |
* |
* @param[in] channel Channel number (0,1,2). |
**************************************************************************/ |
void nco_show_config(uint8_t channel) { |
|
channel &= 0x03; |
neorv32_uart_printf("---------------------------\n"); |
neorv32_uart_printf("NCO channel %u configuration\n", (uint32_t)channel); |
neorv32_uart_printf("---------------------------\n"); |
|
uint32_t ctrl = NCO_CT; |
ctrl >>= channel * NCO_CHX_WIDTH; |
|
// mode |
uint32_t nco_mode = ctrl >> (NCO_CT_CH0_MODE + channel * NCO_CHX_WIDTH); |
nco_mode &= 0x01; |
neorv32_uart_printf("Mode: "); |
if (nco_mode == 0) { |
neorv32_uart_printf("Fixed 50:50 duty cycle mode\n"); |
} |
else { |
neorv32_uart_printf("Pulse mode\n"); |
} |
|
// idle polarity |
uint32_t nco_idle_pol = ctrl >> (NCO_CT_CH0_IDLE_POL + channel * NCO_CHX_WIDTH); |
nco_idle_pol &= 0x01; |
neorv32_uart_printf("Idle polarity: "); |
if (nco_idle_pol == 1) { |
neorv32_uart_printf("High\n"); |
} |
else { |
neorv32_uart_printf("Low\n"); |
} |
|
// clock prescaler |
uint32_t nco_clock_sel = ctrl >> (NCO_CT_CH0_PRSC0 + channel * NCO_CHX_WIDTH); |
nco_clock_sel &= 0x07; |
neorv32_uart_printf("Clock: "); |
uint32_t nco_clock_prsc; |
switch (nco_clock_sel) { |
case 0: nco_clock_prsc = 2; break; |
case 1: nco_clock_prsc = 4; break; |
case 2: nco_clock_prsc = 8; break; |
case 3: nco_clock_prsc = 64; break; |
case 4: nco_clock_prsc = 128; break; |
case 5: nco_clock_prsc = 1024; break; |
case 6: nco_clock_prsc = 2048; break; |
case 7: nco_clock_prsc = 4096; break; |
default: nco_clock_prsc = 0; break; |
} |
neorv32_uart_printf("f_main / %u = %u Hz\n", nco_clock_prsc, SYSINFO_CLK/nco_clock_prsc); |
|
// pulse length prescaler |
uint32_t nco_pulse_sel = 0; |
uint32_t nco_pulse = 0; |
if (nco_mode == 1) { |
nco_pulse_sel = ctrl >> (NCO_CT_CH0_PULSE0 + channel * NCO_CHX_WIDTH); |
nco_pulse_sel &= 0x07; |
neorv32_uart_printf("Pulse length: "); |
switch (nco_pulse_sel) { |
case 0: nco_pulse = 2; break; |
case 1: nco_pulse = 4; break; |
case 2: nco_pulse = 8; break; |
case 3: nco_pulse = 16; break; |
case 4: nco_pulse = 32; break; |
case 5: nco_pulse = 64; break; |
case 6: nco_pulse = 128; break; |
case 7: nco_pulse = 256; break; |
default: nco_pulse = 0; break; |
} |
neorv32_uart_printf("%u NCO clock cycles\n", nco_pulse); |
} |
|
// tuning word |
uint32_t nco_tuning_word = 0; |
if (channel == 0) {nco_tuning_word = NCO_TUNE_CH0;} |
if (channel == 1) {nco_tuning_word = NCO_TUNE_CH1;} |
if (channel == 2) {nco_tuning_word = NCO_TUNE_CH2;} |
neorv32_uart_printf("Tuning word: %u\n", nco_tuning_word); |
|
// output frequency (integer only) |
uint64_t freq = (uint64_t)SYSINFO_CLK; |
freq = freq * nco_tuning_word; |
freq = freq / nco_clock_prsc; |
freq = freq >> 22; |
neorv32_uart_printf("Output frequency (integer part only): %u Hz\n", (uint32_t)freq); |
} |
|
|
/**********************************************************************//** |
* Helper function to convert N hex chars string into uint32_T |
* |
* @param[in,out] buffer Pointer to array of chars to convert into number. |
* @param[in,out] length Length of the conversion string. |
* @return Converted number. |
**************************************************************************/ |
uint32_t hexstr_to_uint(char *buffer, uint8_t length) { |
|
uint32_t res = 0, d = 0; |
char c = 0; |
|
while (length--) { |
c = *buffer++; |
|
if ((c >= '0') && (c <= '9')) |
d = (uint32_t)(c - '0'); |
else if ((c >= 'a') && (c <= 'f')) |
d = (uint32_t)((c - 'a') + 10); |
else if ((c >= 'A') && (c <= 'F')) |
d = (uint32_t)((c - 'A') + 10); |
else |
d = 0; |
|
res = res + (d << (length*4)); |
} |
|
return res; |
} |
|
/example/demo_nco/makefile
0,0 → 1,338
################################################################################################# |
# << NEORV32 - Application Makefile >> # |
# ********************************************************************************************* # |
# Make sure to add the riscv GCC compiler's bin folder to your PATH environment variable. # |
# ********************************************************************************************* # |
# BSD 3-Clause License # |
# # |
# Copyright (c) 2020, Stephan Nolting. All rights reserved. # |
# # |
# Redistribution and use in source and binary forms, with or without modification, are # |
# permitted provided that the following conditions are met: # |
# # |
# 1. Redistributions of source code must retain the above copyright notice, this list of # |
# conditions and the following disclaimer. # |
# # |
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of # |
# conditions and the following disclaimer in the documentation and/or other materials # |
# provided with the distribution. # |
# # |
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to # |
# endorse or promote products derived from this software without specific prior written # |
# permission. # |
# # |
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # |
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # |
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # |
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # |
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # |
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # |
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # |
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # |
# OF THE POSSIBILITY OF SUCH DAMAGE. # |
# ********************************************************************************************* # |
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # |
################################################################################################# |
|
|
# ***************************************************************************** |
# USER CONFIGURATION |
# ***************************************************************************** |
# User's application sources (*.c, *.cpp, *.s, *.S); add additional files here |
APP_SRC ?= $(wildcard ./*.c) $(wildcard ./*.s) $(wildcard ./*.cpp) $(wildcard ./*.S) |
|
# User's application include folders (don't forget the '-I' before each entry) |
APP_INC ?= -I . |
# User's application include folders - for assembly files only (don't forget the '-I' before each entry) |
ASM_INC ?= -I . |
|
# Optimization |
EFFORT ?= -Os |
|
# Compiler toolchain |
RISCV_TOOLCHAIN ?= riscv32-unknown-elf |
|
# CPU architecture and ABI |
MARCH ?= -march=rv32i |
MABI ?= -mabi=ilp32 |
|
# User flags for additional configuration (will be added to compiler flags) |
USER_FLAGS ?= |
|
# Serial port for executable upload via bootloer |
COM_PORT ?= /dev/ttyUSB0 |
|
# Relative or absolute path to the NEORV32 home folder |
NEORV32_HOME ?= ../../.. |
# ***************************************************************************** |
|
|
|
# ----------------------------------------------------------------------------- |
# NEORV32 framework |
# ----------------------------------------------------------------------------- |
# Path to NEORV32 linker script and startup file |
NEORV32_COM_PATH = $(NEORV32_HOME)/sw/common |
# Path to main NEORV32 library include files |
NEORV32_INC_PATH = $(NEORV32_HOME)/sw/lib/include |
# Path to main NEORV32 library source files |
NEORV32_SRC_PATH = $(NEORV32_HOME)/sw/lib/source |
# Path to NEORV32 executable generator |
NEORV32_EXG_PATH = $(NEORV32_HOME)/sw/image_gen |
# Path to NEORV32 core rtl folder |
NEORV32_RTL_PATH = $(NEORV32_HOME)/rtl/core |
# Marker file to check for NEORV32 home folder |
NEORV32_HOME_MARKER = $(NEORV32_INC_PATH)/neorv32.h |
|
# Core libraries (peripheral and CPU drivers) |
CORE_SRC = $(wildcard $(NEORV32_SRC_PATH)/*.c) |
# Application start-up code |
CORE_SRC += $(NEORV32_COM_PATH)/crt0.S |
|
# Linker script |
LD_SCRIPT = $(NEORV32_COM_PATH)/neorv32.ld |
|
# Main output files |
APP_EXE = neorv32_exe.bin |
APP_ASM = main.asm |
APP_IMG = neorv32_application_image.vhd |
BOOT_IMG = neorv32_bootloader_image.vhd |
|
|
# ----------------------------------------------------------------------------- |
# Sources and objects |
# ----------------------------------------------------------------------------- |
# Define all sources |
SRC = $(APP_SRC) |
SRC += $(CORE_SRC) |
|
# Define all object files |
OBJ = $(SRC:%=%.o) |
|
|
# ----------------------------------------------------------------------------- |
# Tools and flags |
# ----------------------------------------------------------------------------- |
# Compiler tools |
CC = $(RISCV_TOOLCHAIN)-gcc |
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump |
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy |
SIZE = $(RISCV_TOOLCHAIN)-size |
|
# Host native compiler |
CC_X86 = g++ -Wall -O -g |
|
# NEORV32 executable image generator |
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen |
|
# Compiler & linker flags |
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles |
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc |
# This accelerates instruction fetch after branches when C extension is enabled (irrelevant when C extension is disabled) |
CC_OPTS += -falign-functions=4 -falign-labels=4 -falign-loops=4 -falign-jumps=4 |
CC_OPTS += $(USER_FLAGS) |
|
|
# ----------------------------------------------------------------------------- |
# Application output definitions |
# ----------------------------------------------------------------------------- |
.PHONY: check info help elf_info clean clean_all bootloader |
.DEFAULT_GOAL := help |
|
# 'compile' is still here for compatibility |
exe: $(APP_ASM) $(APP_EXE) |
compile: $(APP_ASM) $(APP_EXE) |
install: $(APP_ASM) $(APP_IMG) |
all: $(APP_ASM) $(APP_EXE) $(APP_IMG) |
|
# Check if making bootloader |
# Use different base address and legth for instruction memory/"rom" (BOOTMEM instead of IMEM) |
# Also define "make_bootloader" for crt0.S |
target bootloader: CC_OPTS += -Wl,--defsym=make_bootloader=1 -Dmake_bootloader |
|
|
# ----------------------------------------------------------------------------- |
# Image generator targets |
# ----------------------------------------------------------------------------- |
# install/compile tools |
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.cpp |
@echo Compiling $(IMAGE_GEN) |
@$(CC_X86) $< -o $(IMAGE_GEN) |
|
|
# ----------------------------------------------------------------------------- |
# General targets: Assemble, compile, link, dump |
# ----------------------------------------------------------------------------- |
# Compile app *.s sources (assembly) |
%.s.o: %.s |
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@ |
|
# Compile app *.S sources (assembly + C pre-processor) |
%.S.o: %.S |
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@ |
|
# Compile app *.c sources |
%.c.o: %.c |
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@ |
|
# Compile app *.cpp sources |
%.cpp.o: %.cpp |
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@ |
|
# Link object files and show memory utilization |
main.elf: $(OBJ) |
@$(CC) $(CC_OPTS) -T $(LD_SCRIPT) $(OBJ) -o $@ |
@echo "Memory utilization:" |
@$(SIZE) main.elf |
|
# Assembly listing file (for debugging) |
$(APP_ASM): main.elf |
@$(OBJDUMP) -d -S -z $< > $@ |
|
# Generate final executable from .text + .rodata + .data (in THIS order!) |
main.bin: main.elf $(APP_ASM) |
@$(OBJCOPY) -I elf32-little $< -j .text -O binary text.bin |
@$(OBJCOPY) -I elf32-little $< -j .rodata -O binary rodata.bin |
@$(OBJCOPY) -I elf32-little $< -j .data -O binary data.bin |
@cat text.bin rodata.bin data.bin > $@ |
@rm -f text.bin rodata.bin data.bin |
|
|
# ----------------------------------------------------------------------------- |
# Application targets: Generate binary executable, install (as VHDL file) |
# ----------------------------------------------------------------------------- |
# Generate NEORV32 executable image for upload via bootloader |
$(APP_EXE): main.bin $(IMAGE_GEN) |
@set -e |
@$(IMAGE_GEN) -app_bin $< $@ $(shell basename $(CURDIR)) |
@echo "Executable ($(APP_EXE)) size in bytes:" |
@wc -c < $(APP_EXE) |
|
# Generate NEORV32 executable VHDL boot image |
$(APP_IMG): main.bin $(IMAGE_GEN) |
@set -e |
@$(IMAGE_GEN) -app_img $< $@ $(shell basename $(CURDIR)) |
@echo "Installing application image to $(NEORV32_RTL_PATH)/$(APP_IMG)" |
@cp $(APP_IMG) $(NEORV32_RTL_PATH)/. |
|
|
# ----------------------------------------------------------------------------- |
# Bootloader targets |
# ----------------------------------------------------------------------------- |
# Create and install bootloader VHDL init image |
$(BOOT_IMG): main.bin $(IMAGE_GEN) |
@set -e |
@$(IMAGE_GEN) -bld_img $< $(BOOT_IMG) $(shell basename $(CURDIR)) |
@echo "Installing bootloader image to $(NEORV32_RTL_PATH)/$(BOOT_IMG)" |
@cp $(BOOT_IMG) $(NEORV32_RTL_PATH)/. |
|
# Just an alias that |
bootloader: $(BOOT_IMG) |
|
|
# ----------------------------------------------------------------------------- |
# Check toolchain |
# ----------------------------------------------------------------------------- |
check: $(IMAGE_GEN) |
@echo "---------------- Check: NEORV32_HOME folder ----------------" |
ifneq ($(shell [ -e $(NEORV32_HOME_MARKER) ] && echo 1 || echo 0 ), 1) |
$(error NEORV32_HOME folder not found!) |
endif |
@echo "NEORV32_HOME: $(NEORV32_HOME)" |
@echo "---------------- Check: $(CC) ----------------" |
@$(CC) -v |
@echo "---------------- Check: $(OBJDUMP) ----------------" |
@$(OBJDUMP) -V |
@echo "---------------- Check: $(OBJCOPY) ----------------" |
@$(OBJCOPY) -V |
@echo "---------------- Check: $(SIZE) ----------------" |
@$(SIZE) -V |
@echo "---------------- Check: NEORV32 image_gen ----------------" |
@$(IMAGE_GEN) -help |
@echo "---------------- Check: Native GCC ----------------" |
@$(CC_X86) -v |
@echo |
@echo "Toolchain check OK" |
|
|
# ----------------------------------------------------------------------------- |
# Upload executable via serial port to bootloader |
# ----------------------------------------------------------------------------- |
upload: $(APP_EXE) |
@sh $(NEORV32_EXG_PATH)/uart_upload.sh $(COM_PORT) $(APP_EXE) |
|
|
# ----------------------------------------------------------------------------- |
# Show configuration |
# ----------------------------------------------------------------------------- |
info: |
@echo "---------------- Info: Project ----------------" |
@echo "Project folder: $(shell basename $(CURDIR))" |
@echo "Source files: $(APP_SRC)" |
@echo "Include folder(s): $(APP_INC)" |
@echo "ASM include folder(s): $(ASM_INC)" |
@echo "---------------- Info: NEORV32 ----------------" |
@echo "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)" |
@echo "IMAGE_GEN: $(IMAGE_GEN)" |
@echo "Core source files:" |
@echo "$(CORE_SRC)" |
@echo "Core include folder:" |
@echo "$(NEORV32_INC_PATH)" |
@echo "---------------- Info: Objects ----------------" |
@echo "Project object files:" |
@echo "$(OBJ)" |
@echo "---------------- Info: RISC-V CPU ----------------" |
@echo "MARCH: $(MARCH)" |
@echo "MABI: $(MABI)" |
@echo "---------------- Info: Toolchain ----------------" |
@echo "Toolchain: $(RISCV_TOLLCHAIN)" |
@echo "CC: $(CC)" |
@echo "OBJDUMP: $(OBJDUMP)" |
@echo "OBJCOPY: $(OBJCOPY)" |
@echo "SIZE: $(SIZE)" |
@echo "---------------- Info: Compiler Libraries ----------------" |
@echo "LIBGCC:" |
@$(CC) -print-libgcc-file-name |
@echo "SEARCH-DIRS:" |
@$(CC) -print-search-dirs |
@echo "---------------- Info: Flags ----------------" |
@echo "USER_FLAGS: $(USER_FLAGS)" |
@echo "CC_OPTS: $(CC_OPTS)" |
@echo "---------------- Info: Host Native GCC Flags ----------------" |
@echo "CC_X86: $(CC_X86)" |
|
|
# ----------------------------------------------------------------------------- |
# Show final ELF details (just for debugging) |
# ----------------------------------------------------------------------------- |
elf_info: main.elf |
@$(OBJDUMP) -x main.elf |
|
|
# ----------------------------------------------------------------------------- |
# Help |
# ----------------------------------------------------------------------------- |
help: |
@echo "<<< NEORV32 Application Makefile >>>" |
@echo "Make sure to add the bin folder of RISC-V GCC to your PATH variable." |
@echo "Targets:" |
@echo " help - show this text" |
@echo " check - check toolchain" |
@echo " info - show makefile/toolchain configuration" |
@echo " exe - compile and generate <neorv32_exe.bin> executable for upload via bootloader" |
@echo " install - compile, generate and install VHDL IMEM boot image (for application)" |
@echo " all - compile and generate <neorv32_exe.bin> executable for upload via bootloader and generate and install VHDL IMEM boot image (for application)" |
@echo " clean - clean up project" |
@echo " clean_all - clean up project, core libraries and image generator" |
@echo " bootloader - compile, generate and install VHDL BOOTROM boot image (for bootloader only!)" |
@echo " upload - upload <neorv32_exe.bin> executable via serial port <COM_PORT> to bootloader" |
|
|
# ----------------------------------------------------------------------------- |
# Clean up |
# ----------------------------------------------------------------------------- |
clean: |
@rm -f *.elf *.o *.bin *.out *.asm *.vhd |
|
clean_all: clean |
@rm -f $(OBJ) $(IMAGE_GEN) |
/lib/include/neorv32.h
853,6 → 853,62
|
|
/**********************************************************************//** |
* @name IO Device: Numerically-Controlled Oscillator (NCO) |
**************************************************************************/ |
/**@{*/ |
/** NCO control register (r/w) */ |
#define NCO_CT (*(IO_REG32 0xFFFFFFC0UL)) // r/w: control register |
/** NCO channel 0 tuning word (r/w) */ |
#define NCO_TUNE_CH0 (*(IO_REG32 0xFFFFFFC4UL)) // r/w: tuning word channel 0 |
/** NCO channel 1 tuning word (r/w) */ |
#define NCO_TUNE_CH1 (*(IO_REG32 0xFFFFFFC8UL)) // r/w: tuning word channel 1 |
/** NCO channel 2 tuning word (r/w) */ |
#define NCO_TUNE_CH2 (*(IO_REG32 0xFFFFFFCCUL)) // r/w: tuning word channel 2 |
|
/** NCO control register bits */ |
enum NEORV32_NCO_CT_enum { |
NCO_CT_EN = 0, /**< NCO control register(0) (r/w): NCO global enable */ |
// channel 0 |
NCO_CT_CH0_MODE = 1, /**< NCO control register(1) - channel 0 (r/w): Output mode (0=fixed 50% duty cycle; 1=pulse mode) */ |
NCO_CT_CH0_IDLE_POL = 2, /**< NCO control register(2) - channel 0 (r/w): Output idle polarity (0=low, 1=high) */ |
NCO_CT_CH0_OE = 3, /**< NCO control register(3) - channel 0 (r/w): Enable processor output pin */ |
NCO_CT_CH0_OUTPUT = 4, /**< NCO control register(4) - channel 0 (r/-): Current channel output state */ |
NCO_CT_CH0_PRSC0 = 5, /**< NCO control register(5) - channel 0 (r/w): Clock prescaler select bit 0 */ |
NCO_CT_CH0_PRSC1 = 6, /**< NCO control register(6) - channel 0 (r/w): Clock prescaler select bit 1 */ |
NCO_CT_CH0_PRSC2 = 7, /**< NCO control register(7) - channel 0 (r/w): Clock prescaler select bit 2 */ |
NCO_CT_CH0_PULSE0 = 8, /**< NCO control register(8) - channel 0 (r/w): Pulse-mode: Pulse length select bit 0 */ |
NCO_CT_CH0_PULSE1 = 9, /**< NCO control register(9) - channel 0 (r/w): Pulse-mode: Pulse length select bit 1 */ |
NCO_CT_CH0_PULSE2 = 10, /**< NCO control register(10) - channel 0 (r/w): Pulse-mode: Pulse length select bit 2 */ |
// channel 1 |
NCO_CT_CH1_MODE = 11, /**< NCO control register(11) - channel 1 (r/w): Output mode (0=fixed 50% duty cycle; 1=pulse mode) */ |
NCO_CT_CH1_IDLE_POL = 12, /**< NCO control register(12) - channel 1 (r/w): Output idle polarity (0=low, 1=high) */ |
NCO_CT_CH1_OE = 13, /**< NCO control register(13) - channel 1 (r/w): Enable processor output pin */ |
NCO_CT_CH1_OUTPUT = 14, /**< NCO control register(14) - channel 1 (r/-): Current channel output state */ |
NCO_CT_CH1_PRSC0 = 15, /**< NCO control register(15) - channel 1 (r/w): Clock prescaler select bit 0 */ |
NCO_CT_CH1_PRSC1 = 16, /**< NCO control register(16) - channel 1 (r/w): Clock prescaler select bit 1 */ |
NCO_CT_CH1_PRSC2 = 17, /**< NCO control register(17) - channel 1 (r/w): Clock prescaler select bit 2 */ |
NCO_CT_CH1_PULSE0 = 18, /**< NCO control register(18) - channel 1 (r/w): Pulse-mode: Pulse length select bit 0 */ |
NCO_CT_CH1_PULSE1 = 19, /**< NCO control register(19) - channel 1 (r/w): Pulse-mode: Pulse length select bit 1 */ |
NCO_CT_CH1_PULSE2 = 20, /**< NCO control register(20) - channel 1 (r/w): Pulse-mode: Pulse length select bit 2 */ |
// channel 2 |
NCO_CT_CH2_MODE = 21, /**< NCO control register(21) - channel 2 (r/w): Output mode (0=fixed 50% duty cycle; 1=pulse mode) */ |
NCO_CT_CH2_IDLE_POL = 22, /**< NCO control register(22) - channel 2 (r/w): Output idle polarity (0=low, 1=high) */ |
NCO_CT_CH2_OE = 23, /**< NCO control register(23) - channel 2 (r/w): Enable processor output pin */ |
NCO_CT_CH2_OUTPUT = 24, /**< NCO control register(24) - channel 2 (r/-): Current channel output state */ |
NCO_CT_CH2_PRSC0 = 25, /**< NCO control register(25) - channel 2 (r/w): Clock prescaler select bit 0 */ |
NCO_CT_CH2_PRSC1 = 26, /**< NCO control register(26) - channel 2 (r/w): Clock prescaler select bit 1 */ |
NCO_CT_CH2_PRSC2 = 27, /**< NCO control register(27) - channel 2 (r/w): Clock prescaler select bit 2 */ |
NCO_CT_CH2_PULSE0 = 28, /**< NCO control register(28) - channel 2 (r/w): Pulse-mode: Pulse length select bit 0 */ |
NCO_CT_CH2_PULSE1 = 29, /**< NCO control register(29) - channel 2 (r/w): Pulse-mode: Pulse length select bit 1 */ |
NCO_CT_CH2_PULSE2 = 20 /**< NCO control register(30) - channel 2 (r/w): Pulse-mode: Pulse length select bit 2 */ |
}; |
|
/** Size of one "channel entry" in control register in bits */ |
#define NCO_CHX_WIDTH 10 // Size of one "channel entry" in control register in bits |
/**@}*/ |
|
|
/**********************************************************************//** |
* @name IO Device: System Configuration Info Memory (SYSINFO) |
**************************************************************************/ |
/**@{*/ |
894,7 → 950,8
SYSINFO_FEATURES_IO_PWM = 21, /**< SYSINFO_FEATURES (21) (r/-): Pulse-width modulation unit implemented when 1 (via IO_PWM_EN generic) */ |
SYSINFO_FEATURES_IO_WDT = 22, /**< SYSINFO_FEATURES (22) (r/-): Watchdog timer implemented when 1 (via IO_WDT_EN generic) */ |
SYSINFO_FEATURES_IO_CFS = 23, /**< SYSINFO_FEATURES (23) (r/-): Custom functions subsystem implemented when 1 (via IO_CFS_EN generic) */ |
SYSINFO_FEATURES_IO_TRNG = 24 /**< SYSINFO_FEATURES (24) (r/-): True random number generator implemented when 1 (via IO_TRNG_EN generic) */ |
SYSINFO_FEATURES_IO_TRNG = 24, /**< SYSINFO_FEATURES (24) (r/-): True random number generator implemented when 1 (via IO_TRNG_EN generic) */ |
SYSINFO_FEATURES_IO_NCO = 25 /**< SYSINFO_FEATURES (25) (r/-): Numerically-controlled oscillator implemented when 1 (via IO_NCO_EN generic) */ |
}; |
|
/**********************************************************************//** |
936,6 → 993,7
#include "neorv32_cfs.h" |
#include "neorv32_gpio.h" |
#include "neorv32_mtime.h" |
#include "neorv32_nco.h" |
#include "neorv32_pwm.h" |
#include "neorv32_spi.h" |
#include "neorv32_trng.h" |
/lib/include/neorv32_nco.h
0,0 → 1,55
// ################################################################################################# |
// # << NEORV32: neorv32_nco.h - Numerically-Controlled Oscillator (NCO) HW Driver >> # |
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
// # # |
// # 1. Redistributions of source code must retain the above copyright notice, this list of # |
// # conditions and the following disclaimer. # |
// # # |
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # |
// # conditions and the following disclaimer in the documentation and/or other materials # |
// # provided with the distribution. # |
// # # |
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # |
// # endorse or promote products derived from this software without specific prior written # |
// # permission. # |
// # # |
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # |
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # |
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # |
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # |
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # |
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # |
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # |
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # |
// # OF THE POSSIBILITY OF SUCH DAMAGE. # |
// # ********************************************************************************************* # |
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # |
// ################################################################################################# |
|
|
/**********************************************************************//** |
* @file neorv32_nco.h |
* @author Stephan Nolting |
* @brief Numerically-Controlled Oscillator (NCO) HW driver header file. |
* |
* @note These functions should only be used if the NCO unit was synthesized (IO_NCO_EN = true). |
**************************************************************************/ |
|
#ifndef neorv32_nco_h |
#define neorv32_nco_h |
|
// prototypes |
int neorv32_nco_available(void); |
void neorv32_nco_enable(void); |
void neorv32_nco_disable(void); |
void neorv32_nco_setup(uint8_t channel, uint8_t mode, uint8_t idle_pol, uint8_t oe, uint8_t prsc, uint8_t pulse); |
void neorv32_nco_set_tuning(uint8_t channel, uint32_t tune); |
uint32_t neorv32_nco_get_output(uint8_t channel); |
|
#endif // neorv32_nco_h |
/lib/source/neorv32_nco.c
0,0 → 1,171
// ################################################################################################# |
// # << NEORV32: neorv32_nco.c - Numerically-Controlled Oscillator (NCO) HW Driver >> # |
// # ********************************************************************************************* # |
// # BSD 3-Clause License # |
// # # |
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. # |
// # # |
// # Redistribution and use in source and binary forms, with or without modification, are # |
// # permitted provided that the following conditions are met: # |
// # # |
// # 1. Redistributions of source code must retain the above copyright notice, this list of # |
// # conditions and the following disclaimer. # |
// # # |
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # |
// # conditions and the following disclaimer in the documentation and/or other materials # |
// # provided with the distribution. # |
// # # |
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # |
// # endorse or promote products derived from this software without specific prior written # |
// # permission. # |
// # # |
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # |
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # |
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # |
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # |
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # |
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # |
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # |
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # |
// # OF THE POSSIBILITY OF SUCH DAMAGE. # |
// # ********************************************************************************************* # |
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # |
// ################################################################################################# |
|
|
/**********************************************************************//** |
* @file neorv32_nco.c |
* @author Stephan Nolting |
* @brief Numerically-Controlled Oscillator (NCO) HW driver source file. |
* |
* @note These functions should only be used if the NCO unit was synthesized (IO_NCO_EN = true). |
**************************************************************************/ |
|
#include "neorv32.h" |
#include "neorv32_nco.h" |
|
|
/**********************************************************************//** |
* Check if NCO unit was synthesized. |
* |
* @return 0 if NCO was not synthesized, 1 if NCO is available. |
**************************************************************************/ |
int neorv32_nco_available(void) { |
|
if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_NCO)) { |
return 1; |
} |
else { |
return 0; |
} |
} |
|
|
/**********************************************************************//** |
* Enable NCO (global). |
**************************************************************************/ |
void neorv32_nco_enable(void) { |
|
NCO_CT |= (1<<NCO_CT_EN); |
} |
|
|
/**********************************************************************//** |
* Disable NCO (global). |
**************************************************************************/ |
void neorv32_nco_disable(void) { |
|
NCO_CT &= ~(1<<NCO_CT_EN); |
} |
|
|
/**********************************************************************//** |
* Configure NCO channel. The NCO control register bits are listed in #NEORV32_NCO_CT_enum. |
* |
* @param[in] channel Channel number (0,1,2). |
* @param[in] mode Operation mode: 0=normal (50% duty cycle), 1=pulse-mode. |
* @param[in] idle_pol Idle polarity (0 or 1). |
* @param[in] oe Enable output to processor top pin when set. |
* @param[in] prsc Clock select / clock prescaler, see #NEORV32_CLOCK_PRSC_enum. |
* @param[in] pulse Select pulse length (in clock-prescaler cycles) for pulse-mode. See data sheet. |
**************************************************************************/ |
void neorv32_nco_setup(uint8_t channel, uint8_t mode, uint8_t idle_pol, uint8_t oe, uint8_t prsc, uint8_t pulse) { |
|
uint32_t ctrl = NCO_CT; // get current config |
|
// operation mode |
uint32_t mode_int = (uint32_t)(mode & 0x01); |
mode_int = mode_int << NCO_CT_CH0_MODE; |
|
// idle polarity |
uint32_t idle_pol_int = (uint32_t)(idle_pol & 0x01); |
idle_pol_int = idle_pol_int << NCO_CT_CH0_IDLE_POL; |
|
// output enable |
uint32_t oe_int = (uint32_t)(oe & 0x01); |
oe_int = oe_int << NCO_CT_CH0_OE; |
|
// clock select / prescaler |
uint32_t prsc_int = (uint32_t)(prsc & 0x07); |
prsc_int = prsc_int << NCO_CT_CH0_PRSC0; |
|
// pulse mode: pulse length select |
uint32_t pulse_int = (uint32_t)(pulse & 0x07); |
pulse_int = pulse_int << NCO_CT_CH0_PULSE0; |
|
// construct control word |
uint32_t config = mode_int | idle_pol_int | oe_int | prsc_int | pulse_int; |
|
// mask and align to selected channel |
uint32_t mask_clr = (1<<NCO_CHX_WIDTH)-1; |
mask_clr = mask_clr << NCO_CT_CH0_MODE; |
mask_clr = mask_clr << ( NCO_CHX_WIDTH * (channel & 0x03) ); |
config = config << ( NCO_CHX_WIDTH * (channel & 0x03) ); |
|
ctrl &= ~mask_clr; // clear old configuration |
ctrl |= config; // set new configuration |
|
// update NCO control register |
NCO_CT = ctrl; |
} |
|
|
/**********************************************************************//** |
* Set tuning word of NCO channel. |
* |
* @param[in] channel Channel number (0,1,2). |
* @param[in] tune Tuning word. |
**************************************************************************/ |
void neorv32_nco_set_tuning(uint8_t channel, uint32_t tune) { |
|
uint8_t channel_int = channel & 0x03; |
if (channel_int == 0) { |
NCO_TUNE_CH0 = tune; |
} |
else if (channel_int == 1) { |
NCO_TUNE_CH1 = tune; |
} |
else if (channel_int == 2) { |
NCO_TUNE_CH2 = tune; |
} |
} |
|
|
/**********************************************************************//** |
* Get current output state of NCO channel. |
* |
* @param[in] channel Channel number (0,1,2). |
* @return Current output state (0 or 1). |
**************************************************************************/ |
uint32_t neorv32_nco_get_output(uint8_t channel) { |
|
uint8_t shift = NCO_CT_CH0_OUTPUT + NCO_CHX_WIDTH*(channel & 0x03); // insulate OUTPUT bit of selected channel |
uint32_t mask = 1 << shift; |
|
if (NCO_CT & mask) { |
return 1; |
} |
else { |
return 0; |
} |
} |
/lib/source/neorv32_rte.c
269,10 → 269,16
int i; |
char c; |
|
neorv32_uart_printf("\n\n<< Hardware Configuration Overview >>\n"); |
neorv32_uart_printf("\n\n<<< Processor Configuration Overview >>>\n"); |
|
// Processor - general stuff |
neorv32_uart_printf("\n=== << General >> ===\n"); |
neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK); |
neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE); |
|
|
// CPU configuration |
neorv32_uart_printf("\n---- Central Processing Unit ----\n"); |
neorv32_uart_printf("\n=== << CPU >> ===\n"); |
|
// ID |
neorv32_uart_printf("Hart ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MHARTID)); |
285,7 → 291,7
neorv32_uart_printf(" (NEORV32)"); |
} |
|
// HW version |
// hardware version |
neorv32_uart_printf("\nImplementation ID: 0x%x (", neorv32_cpu_csr_read(CSR_MIMPID)); |
neorv32_rte_print_hw_version(); |
neorv32_uart_printf(")\n"); |
353,14 → 359,8
neorv32_uart_printf("HPM Counters: %u\n", neorv32_cpu_hpm_get_counters()); |
|
|
// Misc - system |
neorv32_uart_printf("\n\n---- Processor - General ----\n"); |
neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK); |
neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE); |
|
|
// Memory configuration |
neorv32_uart_printf("\n---- Processor - Memory Configuration ----\n"); |
neorv32_uart_printf("\n=== << Memory Configuration >> ===\n"); |
|
neorv32_uart_printf("Instr. base address: 0x%x\n", SYSINFO_ISPACE_BASE); |
neorv32_uart_printf("Internal IMEM: "); |
424,7 → 424,7
} |
|
// peripherals |
neorv32_uart_printf("\n\n---- Processor - Peripherals ----\n"); |
neorv32_uart_printf("\n=== << Peripherals >> ===\n"); |
|
tmp = SYSINFO_FEATURES; |
|
454,6 → 454,9
|
neorv32_uart_printf("CFS - "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFS)); |
|
neorv32_uart_printf("NCO - "); |
__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_NCO)); |
} |
|
|