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URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

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    /neorv32
    from Rev 18 to Rev 19
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Rev 18 → Rev 19

/trunk/docs/NEORV32.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/rtl/core/neorv32_bootloader_image.vhd
983,7 → 983,7
00000972 => x"4c420a0a",
00000973 => x"203a5644",
00000974 => x"20677541",
00000975 => x"32203320",
00000975 => x"32203620",
00000976 => x"0a303230",
00000977 => x"3a565748",
00000978 => x"00002020",
/trunk/rtl/core/neorv32_cpu.vhd
53,7 → 53,6
entity neorv32_cpu is
generic (
-- General --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
HW_THREAD_ID : std_ulogic_vector(31 downto 0):= (others => '0'); -- hardware thread id
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0):= (others => '0'); -- cpu boot address
-- RISC-V CPU Extensions --
63,6 → 62,9
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
136,6 → 138,7
-- co-processor interface --
signal cp0_data, cp1_data : std_ulogic_vector(data_width_c-1 downto 0);
signal cp0_valid, cp1_valid : std_ulogic;
signal cp0_start, cp1_start : std_ulogic;
 
-- pmp interface --
signal pmp_addr : pmp_addr_if_t;
287,8 → 290,10
add_o => alu_add, -- OPA + OPB
res_o => alu_res, -- ALU result
-- co-processor interface --
cp0_start_o => cp0_start, -- trigger co-processor 0
cp0_data_i => cp0_data, -- co-processor 0 result
cp0_valid_i => cp0_valid, -- co-processor 0 result valid
cp1_start_o => cp1_start, -- trigger co-processor 1
cp1_data_i => cp1_data, -- co-processor 1 result
cp1_valid_i => cp1_valid, -- co-processor 1 result valid
-- status --
301,6 → 306,9
neorv32_cpu_cp_muldiv_inst_true:
if (CPU_EXTENSION_RISCV_M = true) generate
neorv32_cpu_cp_muldiv_inst: neorv32_cpu_cp_muldiv
generic map (
FAST_MUL_EN => FAST_MUL_EN -- use DSPs for faster multiplication
)
port map (
-- global control --
clk_i => clk_i, -- global clock, rising edge
307,6 → 315,7
rstn_i => rstn_i, -- global reset, low-active, async
ctrl_i => ctrl, -- main control bus
-- data input --
start_i => cp0_start, -- trigger operation
rs1_i => rs1, -- rf source 1
rs2_i => rs2, -- rf source 2
-- result and status --
/trunk/rtl/core/neorv32_cpu_alu.vhd
61,8 → 61,10
add_o : out std_ulogic_vector(data_width_c-1 downto 0); -- OPA + OPB
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- ALU result
-- co-processor interface --
cp0_start_o : out std_ulogic; -- trigger co-processor 0
cp0_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 0 result
cp0_valid_i : in std_ulogic; -- co-processor 0 result valid
cp1_start_o : out std_ulogic; -- trigger co-processor 1
cp1_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 1 result
cp1_valid_i : in std_ulogic; -- co-processor 1 result valid
-- status --
93,18 → 95,22
cmd_ff : std_ulogic;
start : std_ulogic;
run : std_ulogic;
halt : std_ulogic;
cnt : std_ulogic_vector(4 downto 0);
sreg : std_ulogic_vector(data_width_c-1 downto 0);
end record;
signal shifter : shifter_t;
 
-- co-processor interface --
signal cp_cmd_ff : std_ulogic;
signal cp_run : std_ulogic;
signal cp_start : std_ulogic;
signal cp_busy : std_ulogic;
signal cp_rb_ff0 : std_ulogic;
signal cp_rb_ff1 : std_ulogic;
-- co-processor arbiter and interface --
type cp_ctrl_t is record
cmd_ff : std_ulogic;
busy : std_ulogic;
start : std_ulogic;
halt : std_ulogic;
rb_ff0 : std_ulogic;
rb_ff1 : std_ulogic;
end record;
signal cp_ctrl : cp_ctrl_t;
 
begin
 
124,7 → 130,7
when "01" => opb <= imm_i;
when others => opb <= rs1_i;
end case;
-- opc (second operand for comparison (and SUB)) --
-- opc (second operand for comparison and SUB) --
if (ctrl_i(ctrl_alu_opc_mux_c) = '0') then
opc <= imm_i;
else
195,47 → 201,50
end process shifter_unit;
 
-- is shift operation? --
shifter.cmd <= '1' when (ctrl_i(ctrl_alu_cmd2_c downto ctrl_alu_cmd0_c) = alu_cmd_shift_c) else '0';
shifter.cmd <= '1' when (ctrl_i(ctrl_alu_cmd2_c downto ctrl_alu_cmd0_c) = alu_cmd_shift_c) and (ctrl_i(ctrl_cp_use_c) = '0') else '0';
shifter.start <= '1' when (shifter.cmd = '1') and (shifter.cmd_ff = '0') else '0';
 
-- shift operation running? --
shifter.run <= '1' when (or_all_f(shifter.cnt) = '1') or (shifter.start = '1') else '0';
shifter.run <= '1' when (or_all_f(shifter.cnt) = '1') or (shifter.start = '1') else '0';
shifter.halt <= '1' when (or_all_f(shifter.cnt(shifter.cnt'left downto 1)) = '1') or (shifter.start = '1') else '0';
 
 
-- Coprocessor Interface ------------------------------------------------------------------
-- Coprocessor Arbiter --------------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
cp_interface: process(rstn_i, clk_i)
cp_arbiter: process(rstn_i, clk_i)
begin
if (rstn_i = '0') then
cp_cmd_ff <= '0';
cp_busy <= '0';
cp_rb_ff0 <= '0';
cp_rb_ff1 <= '0';
cp_ctrl.cmd_ff <= '0';
cp_ctrl.busy <= '0';
cp_ctrl.rb_ff0 <= '0';
cp_ctrl.rb_ff1 <= '0';
elsif rising_edge(clk_i) then
if (CPU_EXTENSION_RISCV_M = true) then -- FIXME add second cp (floating point stuff?)
cp_cmd_ff <= ctrl_i(ctrl_cp_use_c);
cp_rb_ff0 <= '0';
cp_rb_ff1 <= cp_rb_ff0;
if (cp_start = '1') then
cp_busy <= '1';
elsif ((cp0_valid_i or cp1_valid_i) = '1') then
cp_busy <= '0';
cp_rb_ff0 <= '1';
if (CPU_EXTENSION_RISCV_M = true) then
cp_ctrl.cmd_ff <= ctrl_i(ctrl_cp_use_c);
cp_ctrl.rb_ff0 <= '0';
cp_ctrl.rb_ff1 <= cp_ctrl.rb_ff0;
if (cp_ctrl.start = '1') then
cp_ctrl.busy <= '1';
elsif ((cp0_valid_i or cp1_valid_i) = '1') then -- cp computation done?
cp_ctrl.busy <= '0';
cp_ctrl.rb_ff0 <= '1';
end if;
else -- no co-processors implemented
cp_cmd_ff <= '0';
cp_busy <= '0';
cp_rb_ff0 <= '0';
cp_rb_ff1 <= '0';
cp_ctrl.cmd_ff <= '0';
cp_ctrl.busy <= '0';
cp_ctrl.rb_ff0 <= '0';
cp_ctrl.rb_ff1 <= '0';
end if;
end if;
end process cp_interface;
end process cp_arbiter;
 
-- is co-processor operation? --
cp_start <= '1' when (ctrl_i(ctrl_cp_use_c) = '1') and (cp_cmd_ff = '0') else '0';
cp_ctrl.start <= '1' when (ctrl_i(ctrl_cp_use_c) = '1') and (cp_ctrl.cmd_ff = '0') else '0';
cp0_start_o <= '1' when (cp_ctrl.start = '1') and (ctrl_i(ctrl_cp_id_msb_c downto ctrl_cp_id_lsb_c) = cp_sel_muldiv_c) else '0'; -- MULDIV CP
cp1_start_o <= '0'; -- not yet implemented
 
-- co-processor operation running? --
cp_run <= cp_busy or cp_start;
cp_ctrl.halt <= cp_ctrl.busy or cp_ctrl.start;
 
 
-- ALU Function Select --------------------------------------------------------------------
258,8 → 267,8
 
-- ALU Result -----------------------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
wait_o <= shifter.run or cp_run; -- wait until iterative units have completed
res_o <= (cp0_data_i or cp1_data_i) when (cp_rb_ff1 = '1') else alu_res; -- FIXME
wait_o <= shifter.halt or cp_ctrl.halt; -- wait until iterative units have completed
res_o <= (cp0_data_i or cp1_data_i) when (cp_ctrl.rb_ff1 = '1') else alu_res; -- FIXME
 
 
end neorv32_cpu_cpu_rtl;
/trunk/rtl/core/neorv32_cpu_control.vhd
151,6 → 151,7
type execute_engine_state_t is (SYS_WAIT, DISPATCH, TRAP, EXECUTE, ALU_WAIT, BRANCH, LOADSTORE_0, LOADSTORE_1, LOADSTORE_2, CSR_ACCESS);
type execute_engine_t is record
state : execute_engine_state_t;
state_prev : execute_engine_state_t;
state_nxt : execute_engine_state_t;
i_reg : std_ulogic_vector(31 downto 0);
i_reg_nxt : std_ulogic_vector(31 downto 0);
326,7 → 327,7
-- instruction prefetch buffer interface --
ipb.we <= '0';
ipb.clear <= '0';
ipb.wdata <= '0' & fetch_engine.i_buf2(33 downto 32) & '0' & fetch_engine.i_buf2(31 downto 0);
ipb.wdata <= (others => '0');
ipb.waddr <= fetch_engine.pc_real(data_width_c-1 downto 1) & '0';
 
-- state machine --
388,7 → 389,7
fetch_engine.pc_real_add <= std_ulogic_vector(to_unsigned(4, data_width_c));
fetch_engine.pc_fetch_add <= std_ulogic_vector(to_unsigned(4, data_width_c));
fetch_engine.state_nxt <= IFETCH_0;
else -- uncompressed
else -- compressed
ipb.wdata <= ci_illegal & fetch_engine.i_buf(33 downto 32) & '1' & ci_instr32;
fetch_engine.pc_fetch_add <= std_ulogic_vector(to_unsigned(2, data_width_c));
fetch_engine.pc_real_add <= std_ulogic_vector(to_unsigned(2, data_width_c));
528,10 → 529,11
execute_engine_fsm_sync: process(clk_i)
begin
if rising_edge(clk_i) then
execute_engine.i_reg <= execute_engine.i_reg_nxt;
execute_engine.is_ci <= execute_engine.is_ci_nxt;
execute_engine.is_jump <= execute_engine.is_jump_nxt;
-- control signals --
execute_engine.state_prev <= execute_engine.state;
execute_engine.i_reg <= execute_engine.i_reg_nxt;
execute_engine.is_ci <= execute_engine.is_ci_nxt;
execute_engine.is_jump <= execute_engine.is_jump_nxt;
--
ctrl <= ctrl_nxt;
end if;
end process execute_engine_fsm_sync;
687,7 → 689,7
ctrl_nxt(ctrl_alu_cmd2_c downto ctrl_alu_cmd0_c) <= alu_operation_v; -- actual ALU operation
ctrl_nxt(ctrl_rf_in_mux_msb_c downto ctrl_rf_in_mux_lsb_c) <= "00"; -- RF input = ALU result
-- multi cycle alu operation? --
if (alu_operation_v = alu_cmd_shift_c) or -- shift operation
if (alu_operation_v = alu_cmd_shift_c) or -- shift operation?
((CPU_EXTENSION_RISCV_M = true) and (execute_engine.i_reg(instr_opcode_msb_c downto instr_opcode_lsb_c) = opcode_alu_c) and
(execute_engine.i_reg(instr_funct7_lsb_c) = '1')) then -- MULDIV?
execute_engine.state_nxt <= ALU_WAIT;
701,7 → 703,6
ctrl_nxt(ctrl_cp_use_c) <= '1'; -- use CP
end if;
 
 
when opcode_lui_c | opcode_auipc_c => -- load upper immediate (add to PC)
-- ------------------------------------------------------------
ctrl_nxt(ctrl_rf_clear_rs1_c) <= '1'; -- force RS1 = r0 (only relevant for LUI)
839,11 → 840,16
ctrl_nxt(ctrl_rf_wb_en_c) <= '1'; -- valid RF write-back
execute_engine.state_nxt <= DISPATCH; -- FIXME should be SYS_WAIT? have another cycle to let side-effects kick in
 
when ALU_WAIT => -- wait for multi-cycle ALU operation to finish
when ALU_WAIT => -- wait for multi-cycle ALU operation (shifter or CP) to finish
-- ------------------------------------------------------------
ctrl_nxt(ctrl_alu_cmd2_c downto ctrl_alu_cmd0_c) <= alu_operation_v; -- actual ALU operation
ctrl_nxt(ctrl_alu_cmd2_c downto ctrl_alu_cmd0_c) <= alu_cmd_shift_c;
ctrl_nxt(ctrl_rf_in_mux_msb_c downto ctrl_rf_in_mux_lsb_c) <= "00"; -- RF input = ALU result
ctrl_nxt(ctrl_rf_wb_en_c) <= '1'; -- valid RF write-back (permanent write-back)
-- cp access? --
if (CPU_EXTENSION_RISCV_M = true) and (execute_engine.i_reg(instr_funct7_lsb_c) = '1') then -- MULDIV?
ctrl_nxt(ctrl_cp_use_c) <= '1'; -- use CP
end if;
-- wait for result --
if (alu_wait_i = '0') then
execute_engine.state_nxt <= DISPATCH;
end if;
1620,9 → 1626,9
 
-- machine information registers --
when x"f11" => -- R/-: mvendorid
csr_rdata_o <= (others => '0'); -- not yet assigned for NEORV32
csr_rdata_o <= (others => '0'); -- not available for NEORV32
when x"f12" => -- R/-: marchid
csr_rdata_o <= (others => '0'); -- not yet assigned for NEORV32
csr_rdata_o <= (others => '0'); -- not available for NEORV32
when x"f13" => -- R/-: mimpid - implementation ID / NEORV32: version
csr_rdata_o <= hw_version_c;
when x"f14" => -- R/-: mhartid - hardware thread ID
1694,7 → 1700,7
if (csr.we = '1') and (execute_engine.i_reg(31 downto 20) = x"b02") then -- write access
csr.minstret(31 downto 0) <= csr_wdata_i;
csr.minstret(32) <= '0';
elsif (execute_engine.state_nxt /= EXECUTE) and (execute_engine.state = EXECUTE) then -- automatic update
elsif (execute_engine.state_prev /= EXECUTE) and (execute_engine.state = EXECUTE) then -- automatic update
csr.minstret <= std_ulogic_vector(unsigned(csr.minstret) + 1);
end if;
 
/trunk/rtl/core/neorv32_cpu_cp_muldiv.vhd
44,6 → 44,9
use neorv32.neorv32_package.all;
 
entity neorv32_cpu_cp_muldiv is
generic (
FAST_MUL_EN : boolean := false -- use DSPs for faster multiplication
);
port (
-- global control --
clk_i : in std_ulogic; -- global clock, rising edge
50,6 → 53,7
rstn_i : in std_ulogic; -- global reset, low-active, async
ctrl_i : in std_ulogic_vector(ctrl_width_c-1 downto 0); -- main control bus
-- data input --
start_i : in std_ulogic; -- trigger operation
rs1_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 1
rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
-- result and status --
60,8 → 64,8
 
architecture neorv32_cpu_cp_muldiv_rtl of neorv32_cpu_cp_muldiv is
 
-- configuration - still experimental --
constant FAST_MUL_EN : boolean := false; -- use DSPs for faster multiplication
-- advanced configuration --
constant dsp_add_reg_stage_c : boolean := false; -- add another register stage to DSP-based multiplication for timing-closure
 
-- controller --
type state_t is (IDLE, DECODE, INIT_OPX, INIT_OPY, PROCESSING, FINALIZE, COMPLETED);
89,10 → 93,10
signal mul_do_add : std_ulogic_vector(data_width_c downto 0);
signal mul_sign_cycle : std_ulogic;
signal mul_p_sext : std_ulogic;
signal mul_op_x : std_ulogic_vector(32 downto 0);
signal mul_op_y : std_ulogic_vector(32 downto 0);
signal mul_buf_ff0 : std_ulogic_vector(65 downto 0);
signal mul_buf_ff1 : std_ulogic_vector(65 downto 0);
signal mul_op_x : signed(32 downto 0); -- for using DSPs
signal mul_op_y : signed(32 downto 0); -- for using DSPs
signal mul_buf_ff : signed(65 downto 0); -- for using DSPs
signal mul_buf2_ff : signed(65 downto 0); -- for using DSPs
 
begin
 
118,10 → 122,10
-- FSM --
case state is
when IDLE =>
opx <= rs1_i;
opy <= rs2_i;
cp_op <= ctrl_i(ctrl_cp_cmd2_c downto ctrl_cp_cmd0_c);
if (ctrl_i(ctrl_cp_use_c) = '1') and (ctrl_i(ctrl_cp_id_msb_c downto ctrl_cp_id_lsb_c) = cp_sel_muldiv_c) then
opx <= rs1_i;
opy <= rs2_i;
if (start_i = '1') then
cp_op <= ctrl_i(ctrl_cp_cmd2_c downto ctrl_cp_cmd0_c);
state <= DECODE;
end if;
 
148,7 → 152,7
if (FAST_MUL_EN = false) then
cnt <= "11111";
else
cnt <= "00101"; -- FIXME
cnt <= "00001";
end if;
start <= '1';
state <= PROCESSING;
208,12 → 212,16
end if;
else -- use direct approach using (several!) DSP blocks
if (start = '1') then
mul_op_x <= (opx(opx'left) and opx_is_signed) & opx;
mul_op_y <= (opy(opy'left) and opy_is_signed) & opy;
mul_op_x <= signed((opx(opx'left) and opx_is_signed) & opx);
mul_op_y <= signed((opy(opy'left) and opy_is_signed) & opy);
end if;
mul_buf_ff0 <= std_ulogic_vector(signed(mul_op_x) * signed(mul_op_y));
mul_buf_ff1 <= mul_buf_ff0;
mul_product <= mul_buf_ff1(63 downto 0); -- let the register balancing do the magic here
mul_buf_ff <= mul_op_x * mul_op_y;
if (dsp_add_reg_stage_c = true) then -- add another reg stage?
mul_buf2_ff <= mul_buf_ff;
mul_product <= std_ulogic_vector(mul_buf2_ff(63 downto 0)); -- let the register balancing do the magic here
else
mul_product <= std_ulogic_vector(mul_buf_ff(63 downto 0)); -- let the register balancing do the magic here
end if;
end if;
end if;
end process multiplier_core;
/trunk/rtl/core/neorv32_package.vhd
41,7 → 41,7
-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant data_width_c : natural := 32; -- data width - FIXED!
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01030600"; -- no touchy!
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01030605"; -- no touchy!
constant pmp_max_r_c : natural := 8; -- max PMP regions
 
-- Helper Functions -----------------------------------------------------------------------
386,7 → 386,6
-- General --
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
BOOTLOADER_USE : boolean := true; -- implement processor-internal bootloader?
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
395,6 → 394,9
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
469,7 → 471,6
component neorv32_cpu
generic (
-- General --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
HW_THREAD_ID : std_ulogic_vector(31 downto 0):= (others => '0'); -- hardware thread id
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0):= (others => '0'); -- cpu boot address
-- RISC-V CPU Extensions --
479,6 → 480,9
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
630,8 → 634,10
add_o : out std_ulogic_vector(data_width_c-1 downto 0); -- OPA + OPB
res_o : out std_ulogic_vector(data_width_c-1 downto 0); -- ALU result
-- co-processor interface --
cp0_start_o : out std_ulogic; -- trigger co-processor 0
cp0_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 0 result
cp0_valid_i : in std_ulogic; -- co-processor 0 result valid
cp1_start_o : out std_ulogic; -- trigger co-processor 1
cp1_data_i : in std_ulogic_vector(data_width_c-1 downto 0); -- co-processor 1 result
cp1_valid_i : in std_ulogic; -- co-processor 1 result valid
-- status --
642,6 → 648,9
-- Component: CPU Co-Processor MULDIV -----------------------------------------------------
-- -------------------------------------------------------------------------------------------
component neorv32_cpu_cp_muldiv
generic (
FAST_MUL_EN : boolean := false -- use DSPs for faster multiplication
);
port (
-- global control --
clk_i : in std_ulogic; -- global clock, rising edge
648,6 → 657,7
rstn_i : in std_ulogic; -- global reset, low-active, async
ctrl_i : in std_ulogic_vector(ctrl_width_c-1 downto 0); -- main control bus
-- data input --
start_i : in std_ulogic; -- trigger operation
rs1_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 1
rs2_i : in std_ulogic_vector(data_width_c-1 downto 0); -- rf source 2
-- result and status --
/trunk/rtl/core/neorv32_top.vhd
50,7 → 50,6
-- General --
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
BOOTLOADER_USE : boolean := true; -- implement processor-internal bootloader?
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
59,6 → 58,9
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
328,9 → 330,8
neorv32_cpu_inst: neorv32_cpu
generic map (
-- General --
CSR_COUNTERS_USE => CSR_COUNTERS_USE, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
HW_THREAD_ID => (others => '0'), -- hardware thread id
CPU_BOOT_ADDR => boot_addr_c, -- cpu boot address
HW_THREAD_ID => (others => '0'), -- hardware thread id
CPU_BOOT_ADDR => boot_addr_c, -- cpu boot address
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C => CPU_EXTENSION_RISCV_C, -- implement compressed extension?
CPU_EXTENSION_RISCV_E => CPU_EXTENSION_RISCV_E, -- implement embedded RF extension?
338,6 → 339,9
CPU_EXTENSION_RISCV_U => CPU_EXTENSION_RISCV_U, -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr => CPU_EXTENSION_RISCV_Zicsr, -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei => CPU_EXTENSION_RISCV_Zifencei, -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE => CSR_COUNTERS_USE, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN => FAST_MUL_EN, -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE => PMP_USE, -- implement PMP?
PMP_NUM_REGIONS => PMP_NUM_REGIONS, -- number of regions (max 8)
/trunk/rtl/top_templates/neorv32_test_setup.vhd
71,7 → 71,6
-- General --
CLOCK_FREQUENCY => 100000000, -- clock frequency of clk_i in Hz
BOOTLOADER_USE => true, -- implement processor-internal bootloader?
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE => x"00000000", -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C => true, -- implement compressed extension?
80,6 → 79,9
CPU_EXTENSION_RISCV_U => false, -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE => false, -- implement PMP?
PMP_NUM_REGIONS => 4, -- number of regions (max 16)
/trunk/sim/vivado/neorv32_tb_behav.wcfg
12,15 → 12,15
</db_ref>
</db_ref_list>
<zoom_setting>
<ZoomStartTime time="2254750fs"></ZoomStartTime>
<ZoomEndTime time="2357051fs"></ZoomEndTime>
<Cursor1Time time="2305000fs"></Cursor1Time>
<ZoomStartTime time="1400100fs"></ZoomStartTime>
<ZoomEndTime time="1609501fs"></ZoomEndTime>
<Cursor1Time time="1435000fs"></Cursor1Time>
</zoom_setting>
<column_width_setting>
<NameColumnWidth column_width="203"></NameColumnWidth>
<ValueColumnWidth column_width="96"></ValueColumnWidth>
<ValueColumnWidth column_width="72"></ValueColumnWidth>
</column_width_setting>
<WVObjectSize size="131" />
<WVObjectSize size="95" />
<wvobject type="divider" fp_name="divider273">
<obj_property name="label">CPU: Control.FETCH</obj_property>
<obj_property name="DisplayName">label</obj_property>
79,38 → 79,6
<obj_property name="ElementShortName">alu_wait_i</obj_property>
<obj_property name="ObjectShortName">alu_wait_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/instr_i" type="array">
<obj_property name="ElementShortName">instr_i[31:0]</obj_property>
<obj_property name="ObjectShortName">instr_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/cmp_i" type="array">
<obj_property name="ElementShortName">cmp_i[1:0]</obj_property>
<obj_property name="ObjectShortName">cmp_i[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/alu_add_i" type="array">
<obj_property name="ElementShortName">alu_add_i[31:0]</obj_property>
<obj_property name="ObjectShortName">alu_add_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/imm_o" type="array">
<obj_property name="ElementShortName">imm_o[31:0]</obj_property>
<obj_property name="ObjectShortName">imm_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_wdata_i" type="array">
<obj_property name="ElementShortName">csr_wdata_i[31:0]</obj_property>
<obj_property name="ObjectShortName">csr_wdata_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/csr_rdata_o" type="array">
<obj_property name="ElementShortName">csr_rdata_o[31:0]</obj_property>
<obj_property name="ObjectShortName">csr_rdata_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/mtime_irq_i" type="logic">
<obj_property name="ElementShortName">mtime_irq_i</obj_property>
<obj_property name="ObjectShortName">mtime_irq_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/mar_i" type="array">
<obj_property name="ElementShortName">mar_i[31:0]</obj_property>
<obj_property name="ObjectShortName">mar_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/ma_load_i" type="logic">
<obj_property name="ElementShortName">ma_load_i</obj_property>
<obj_property name="ObjectShortName">ma_load_i</obj_property>
127,10 → 95,6
<obj_property name="ElementShortName">be_store_i</obj_property>
<obj_property name="ObjectShortName">be_store_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/ctrl" type="array">
<obj_property name="ElementShortName">ctrl[49:0]</obj_property>
<obj_property name="ObjectShortName">ctrl[49:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/ctrl_o" type="array">
<obj_property name="ElementShortName">ctrl_o[49:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_o[49:0]</obj_property>
143,18 → 107,6
<obj_property name="ElementShortName">ci_illegal</obj_property>
<obj_property name="ObjectShortName">ci_illegal</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/fetch_pc_o" type="array">
<obj_property name="ElementShortName">fetch_pc_o[31:0]</obj_property>
<obj_property name="ObjectShortName">fetch_pc_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/curr_pc_o" type="array">
<obj_property name="ElementShortName">curr_pc_o[31:0]</obj_property>
<obj_property name="ObjectShortName">curr_pc_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/next_pc_o" type="array">
<obj_property name="ElementShortName">next_pc_o[31:0]</obj_property>
<obj_property name="ObjectShortName">next_pc_o[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/illegal_instruction" type="logic">
<obj_property name="ElementShortName">illegal_instruction</obj_property>
<obj_property name="ObjectShortName">illegal_instruction</obj_property>
175,93 → 127,7
<obj_property name="ElementShortName">execute_engine</obj_property>
<obj_property name="ObjectShortName">execute_engine</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.state" type="other">
<obj_property name="ElementShortName">.state</obj_property>
<obj_property name="ObjectShortName">.state</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.state_nxt" type="other">
<obj_property name="ElementShortName">.state_nxt</obj_property>
<obj_property name="ObjectShortName">.state_nxt</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.i_reg" type="array">
<obj_property name="ElementShortName">.i_reg[31:0]</obj_property>
<obj_property name="ObjectShortName">.i_reg[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.i_reg_nxt" type="array">
<obj_property name="ElementShortName">.i_reg_nxt[31:0]</obj_property>
<obj_property name="ObjectShortName">.i_reg_nxt[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.is_ci" type="logic">
<obj_property name="ElementShortName">.is_ci</obj_property>
<obj_property name="ObjectShortName">.is_ci</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.is_ci_nxt" type="logic">
<obj_property name="ElementShortName">.is_ci_nxt</obj_property>
<obj_property name="ObjectShortName">.is_ci_nxt</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.is_jump" type="logic">
<obj_property name="ElementShortName">.is_jump</obj_property>
<obj_property name="ObjectShortName">.is_jump</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.is_jump_nxt" type="logic">
<obj_property name="ElementShortName">.is_jump_nxt</obj_property>
<obj_property name="ObjectShortName">.is_jump_nxt</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.branch_taken" type="logic">
<obj_property name="ElementShortName">.branch_taken</obj_property>
<obj_property name="ObjectShortName">.branch_taken</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.pc" type="array">
<obj_property name="ElementShortName">.pc[31:0]</obj_property>
<obj_property name="ObjectShortName">.pc[31:0]</obj_property>
<obj_property name="CustomSignalColor">#FFFFFF</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.pc_nxt" type="array">
<obj_property name="ElementShortName">.pc_nxt[31:0]</obj_property>
<obj_property name="ObjectShortName">.pc_nxt[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.next_pc" type="array">
<obj_property name="ElementShortName">.next_pc[31:0]</obj_property>
<obj_property name="ObjectShortName">.next_pc[31:0]</obj_property>
<obj_property name="CustomSignalColor">#FFFFFF</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.last_pc" type="array">
<obj_property name="ElementShortName">.last_pc[31:0]</obj_property>
<obj_property name="ObjectShortName">.last_pc[31:0]</obj_property>
<obj_property name="CustomSignalColor">#FFFFFF</obj_property>
<obj_property name="UseCustomSignalColor">true</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.sleep" type="logic">
<obj_property name="ElementShortName">.sleep</obj_property>
<obj_property name="ObjectShortName">.sleep</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/execute_engine.sleep_nxt" type="logic">
<obj_property name="ElementShortName">.sleep_nxt</obj_property>
<obj_property name="ObjectShortName">.sleep_nxt</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/CPU_EXTENSION_RISCV_C" type="other">
<obj_property name="ElementShortName">CPU_EXTENSION_RISCV_C</obj_property>
<obj_property name="ObjectShortName">CPU_EXTENSION_RISCV_C</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/CPU_EXTENSION_RISCV_E" type="other">
<obj_property name="ElementShortName">CPU_EXTENSION_RISCV_E</obj_property>
<obj_property name="ObjectShortName">CPU_EXTENSION_RISCV_E</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/CPU_EXTENSION_RISCV_M" type="other">
<obj_property name="ElementShortName">CPU_EXTENSION_RISCV_M</obj_property>
<obj_property name="ObjectShortName">CPU_EXTENSION_RISCV_M</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/CPU_EXTENSION_RISCV_Zicsr" type="other">
<obj_property name="ElementShortName">CPU_EXTENSION_RISCV_Zicsr</obj_property>
<obj_property name="ObjectShortName">CPU_EXTENSION_RISCV_Zicsr</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_control_inst/CPU_EXTENSION_RISCV_Zifencei" type="other">
<obj_property name="ElementShortName">CPU_EXTENSION_RISCV_Zifencei</obj_property>
<obj_property name="ObjectShortName">CPU_EXTENSION_RISCV_Zifencei</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider139">
<obj_property name="label">CPU: Control.TRAP</obj_property>
<obj_property name="DisplayName">label</obj_property>
340,6 → 206,14
<obj_property name="ElementShortName">opc[31:0]</obj_property>
<obj_property name="ObjectShortName">opc[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_alu_inst/shifter" type="array">
<obj_property name="ElementShortName">shifter</obj_property>
<obj_property name="ObjectShortName">shifter</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_alu_inst/cp_ctrl" type="array">
<obj_property name="ElementShortName">cp_ctrl</obj_property>
<obj_property name="ObjectShortName">cp_ctrl</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider367">
<obj_property name="label">CPU: BUS_UNIT</obj_property>
<obj_property name="DisplayName">label</obj_property>
427,7 → 301,6
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_bus_inst/pmp" type="array">
<obj_property name="ElementShortName">pmp</obj_property>
<obj_property name="ObjectShortName">pmp</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_bus_inst/pmp_addr_i" type="array">
<obj_property name="ElementShortName">pmp_addr_i[0:7][33:0]</obj_property>
454,41 → 327,13
<obj_property name="ObjectShortName">st_pmp_fault</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">BUS_CROSSBAR</obj_property>
<obj_property name="label">CPU: MULDIV CP</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">BUS_SWITCH I</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">BUS_SWITCH D</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider298">
<obj_property name="label">CPU: MULDIC CP</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/clk_i" type="logic">
<obj_property name="ElementShortName">clk_i</obj_property>
<obj_property name="ObjectShortName">clk_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/rstn_i" type="logic">
<obj_property name="ElementShortName">rstn_i</obj_property>
<obj_property name="ObjectShortName">rstn_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/ctrl_i" type="array">
<obj_property name="ElementShortName">ctrl_i[49:0]</obj_property>
<obj_property name="ObjectShortName">ctrl_i[49:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/rs1_i" type="array">
<obj_property name="ElementShortName">rs1_i[31:0]</obj_property>
<obj_property name="ObjectShortName">rs1_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/rs2_i" type="array">
<obj_property name="ElementShortName">rs2_i[31:0]</obj_property>
<obj_property name="ObjectShortName">rs2_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/res_o" type="array">
<obj_property name="ElementShortName">res_o[31:0]</obj_property>
<obj_property name="ObjectShortName">res_o[31:0]</obj_property>
501,15 → 346,6
<obj_property name="ElementShortName">state</obj_property>
<obj_property name="ObjectShortName">state</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/cnt" type="array">
<obj_property name="ElementShortName">cnt[4:0]</obj_property>
<obj_property name="ObjectShortName">cnt[4:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/cp_op" type="array">
<obj_property name="ElementShortName">cp_op[2:0]</obj_property>
<obj_property name="ObjectShortName">cp_op[2:0]</obj_property>
<obj_property name="Radix">BINARYRADIX</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/start" type="logic">
<obj_property name="ElementShortName">start</obj_property>
<obj_property name="ObjectShortName">start</obj_property>
526,58 → 362,14
<obj_property name="ElementShortName">opy[31:0]</obj_property>
<obj_property name="ObjectShortName">opy[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/opx_is_signed" type="logic">
<obj_property name="ElementShortName">opx_is_signed</obj_property>
<obj_property name="ObjectShortName">opx_is_signed</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/opy_is_signed" type="logic">
<obj_property name="ElementShortName">opy_is_signed</obj_property>
<obj_property name="ObjectShortName">opy_is_signed</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/div_res_corr" type="logic">
<obj_property name="ElementShortName">div_res_corr</obj_property>
<obj_property name="ObjectShortName">div_res_corr</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/remainder" type="array">
<obj_property name="ElementShortName">remainder[31:0]</obj_property>
<obj_property name="ObjectShortName">remainder[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/quotient" type="array">
<obj_property name="ElementShortName">quotient[31:0]</obj_property>
<obj_property name="ObjectShortName">quotient[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/div_sub" type="array">
<obj_property name="ElementShortName">div_sub[32:0]</obj_property>
<obj_property name="ObjectShortName">div_sub[32:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/div_sign_comp_in" type="array">
<obj_property name="ElementShortName">div_sign_comp_in[31:0]</obj_property>
<obj_property name="ObjectShortName">div_sign_comp_in[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/div_sign_comp" type="array">
<obj_property name="ElementShortName">div_sign_comp[31:0]</obj_property>
<obj_property name="ObjectShortName">div_sign_comp[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/div_res" type="array">
<obj_property name="ElementShortName">div_res[31:0]</obj_property>
<obj_property name="ObjectShortName">div_res[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/mul_product" type="array">
<obj_property name="ElementShortName">mul_product[63:0]</obj_property>
<obj_property name="ObjectShortName">mul_product[63:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/mul_do_add" type="array">
<obj_property name="ElementShortName">mul_do_add[32:0]</obj_property>
<obj_property name="ObjectShortName">mul_do_add[32:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/mul_sign_cycle" type="logic">
<obj_property name="ElementShortName">mul_sign_cycle</obj_property>
<obj_property name="ObjectShortName">mul_sign_cycle</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_cpu_inst/neorv32_cpu_cp_muldiv_inst_true/neorv32_cpu_cp_muldiv_inst/mul_p_sext" type="logic">
<obj_property name="ElementShortName">mul_p_sext</obj_property>
<obj_property name="ObjectShortName">mul_p_sext</obj_property>
</wvobject>
<wvobject type="divider" fp_name="divider238">
<obj_property name="label">IO: MTIME</obj_property>
<obj_property name="DisplayName">label</obj_property>
594,28 → 386,24
<obj_property name="ElementShortName">mtime_lo[32:0]</obj_property>
<obj_property name="ObjectShortName">mtime_lo[32:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/mtime_lo_msb_ff" type="logic">
<obj_property name="ElementShortName">mtime_lo_msb_ff</obj_property>
<obj_property name="ObjectShortName">mtime_lo_msb_ff</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/mtime_hi" type="array">
<obj_property name="ElementShortName">mtime_hi[31:0]</obj_property>
<obj_property name="ObjectShortName">mtime_hi[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/cmp_lo" type="logic">
<obj_property name="ElementShortName">cmp_lo</obj_property>
<obj_property name="ObjectShortName">cmp_lo</obj_property>
<wvobject type="divider" fp_name="divider238">
<obj_property name="label">IO: DEVNULL</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/cmp_lo_ff" type="logic">
<obj_property name="ElementShortName">cmp_lo_ff</obj_property>
<obj_property name="ObjectShortName">cmp_lo_ff</obj_property>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_devnull_inst_true/neorv32_devnull_inst/wren_i" type="logic">
<obj_property name="ElementShortName">wren_i</obj_property>
<obj_property name="ObjectShortName">wren_i</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/cmp_hi" type="logic">
<obj_property name="ElementShortName">cmp_hi</obj_property>
<obj_property name="ObjectShortName">cmp_hi</obj_property>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_devnull_inst_true/neorv32_devnull_inst/data_i" type="array">
<obj_property name="ElementShortName">data_i[31:0]</obj_property>
<obj_property name="ObjectShortName">data_i[31:0]</obj_property>
</wvobject>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_mtime_inst_true/neorv32_mtime_inst/cmp_match_ff" type="logic">
<obj_property name="ElementShortName">cmp_match_ff</obj_property>
<obj_property name="ObjectShortName">cmp_match_ff</obj_property>
<wvobject fp_name="/neorv32_tb/neorv32_top_inst/neorv32_devnull_inst_true/neorv32_devnull_inst/acc_en" type="logic">
<obj_property name="ElementShortName">acc_en</obj_property>
<obj_property name="ObjectShortName">acc_en</obj_property>
</wvobject>
</wave_config>
/trunk/sim/neorv32_tb.vhd
128,7 → 128,6
-- General --
CLOCK_FREQUENCY => f_clock_nat_c, -- clock frequency of clk_i in Hz
BOOTLOADER_USE => false, -- implement processor-internal bootloader?
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE => x"19880704", -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C => true, -- implement compressed extension?
137,6 → 136,9
CPU_EXTENSION_RISCV_U => true, -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE => true, -- implement PMP?
PMP_NUM_REGIONS => 4, -- number of regions (max 16)
/trunk/sw/bootloader/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../..
# *****************************************************************************
 
82,16 → 78,14
 
 
# -----------------------------------------------------------------------------
# Add NEORV32 sources to input SRCs
# NEORV32 core sources
# -----------------------------------------------------------------------------
APP_SRC += $(wildcard $(NEORV32_SRC_PATH)/*.c)
CORE_SRC = $(wildcard $(NEORV32_SRC_PATH)/*.c)
 
 
# -----------------------------------------------------------------------------
# Make defaults
# -----------------------------------------------------------------------------
.SUFFIXES:
.PHONY: all
.DEFAULT_GOAL := help
 
 
106,7 → 100,8
all: $(APP_ASM) $(APP_EXE) neorv32_application_image.vhd
 
# define all object files
OBJ = $(APP_SRC:.c=.o)
OBJ = $(APP_SRC:.c=.o)
OBJ += $(CORE_SRC:.c=.o)
 
 
# -----------------------------------------------------------------------------
114,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
122,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
167,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
213,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
238,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
248,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
259,13 → 242,18
# -----------------------------------------------------------------------------
info:
@echo "---------------- Info: Project ----------------"
@echo "Project: $(shell basename $(CURDIR))"
@echo "Project source files: $(APP_SRC)"
@echo "Project include folders: $(NEORV32_INC_PATH) $(APP_INC)"
@echo "Project object files: $(OBJ)"
@echo "Project folder: $(shell basename $(CURDIR))"
@echo "Source files: $(APP_SRC)"
@echo "Include folder(s): $(APP_INC)"
@echo "---------------- Info: NEORV32 ----------------"
@echo "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)"
@echo "IMAGE_GEN: $(IMAGE_GEN)"
@echo "Core source files:"
@echo "$(CORE_SRC)"
@echo "Core include folder:"
@echo "$(NEORV32_INC_PATH)"
@echo "Project object files:"
@echo "$(OBJ)"
@echo "---------------- Info: RISC-V CPU ----------------"
@echo "MARCH: $(MARCH)"
@echo "MABI: $(MABI)"
272,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/common/crt0.S
68,34 → 68,15
addi x7, x6, 0
addi x8, x7, 0
addi x9, x8, 0
addi x10, x9, 0
addi x11, x10, 0
addi x12, x11, 0
addi x13, x12, 0
addi x14, x13, 0
//addi x10, x9, 0
//addi x11, x10, 0
//addi x12, x11, 0
//addi x13, x12, 0
//addi x14, x13, 0
addi x15, x14, 0
 
// the following registers do not exist in rv32e
// "__RISCV_EMBEDDED_CPU__" is automatically defined by the makefiles when
// compiling for a rv32e* architecture
#ifndef __RISCV_EMBEDDED_CPU__
addi x16, x15, 0
addi x17, x16, 0
addi x18, x17, 0
addi x19, x18, 0
addi x20, x19, 0
addi x21, x20, 0
addi x22, x21, 0
addi x23, x22, 0
addi x24, x23, 0
addi x25, x24, 0
addi x26, x25, 0
addi x27, x26, 0
addi x28, x27, 0
addi x29, x28, 0
addi x30, x29, 0
addi x31, x30, 0
#endif
// since we dont know here if we are compiling for a rv32e architecture
// we won't touch registers above x15
 
 
// *********************************************************
/trunk/sw/example/blink_led/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/coremark/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/cpu_test/main.c
108,6 → 108,11
} cpu_systime;
 
 
// reset performance counter
neorv32_cpu_set_minstret(0);
neorv32_cpu_set_mcycle(0);
 
 
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
return 0;
255,43 → 260,8
#endif
 
 
// ----------------------------------------------------------
// Test counter CSR access for mcycle[h]
// ----------------------------------------------------------
neorv32_uart_printf("MCYCLE[H]: ");
cnt_test++;
 
neorv32_cpu_csr_write(CSR_MCYCLE, 0x1BCD1234);
neorv32_cpu_csr_write(CSR_MCYCLEH, 0x00034455);
 
if (((neorv32_cpu_csr_read(CSR_MCYCLE) & 0xffff0000L) == 0x1BCD0000) &&
(neorv32_cpu_csr_read(CSR_MCYCLEH) == 0x00034455)) {
test_ok();
}
else {
test_fail();
}
 
 
// ----------------------------------------------------------
// Test counter CSR access for minstret[h]
// ----------------------------------------------------------
neorv32_uart_printf("MINSTRET[H]: ");
cnt_test++;
 
neorv32_cpu_csr_write(CSR_MINSTRET, 0x11224499);
neorv32_cpu_csr_write(CSR_MINSTRETH, 0x00090011);
 
if (((neorv32_cpu_csr_read(CSR_MINSTRET) & 0xffff0000L) == 0x11220000) &&
(neorv32_cpu_csr_read(CSR_MINSTRETH) == 0x00090011)) {
test_ok();
}
else {
test_fail();
}
 
 
// ----------------------------------------------------------
// Test time[h] (must be == MTIME)
// ----------------------------------------------------------
neorv32_uart_printf("TIME[H]: ");
807,9 → 777,9
}
}
 
neorv32_uart_printf("Min granularity (0x%x): ", pmp_test_g);
neorv32_uart_printf("Min granularity: ");
if (i < 29) {
neorv32_uart_printf("%u bytes per region\n", (uint32_t)(1 << (i+1+2)));
neorv32_uart_printf("%u bytes per region (0x%x)\n", (uint32_t)(1 << (i+1+2)), pmp_test_g);
}
else {
neorv32_uart_printf("2^%u bytes per region\n", i+1+2);
909,8 → 879,19
// ----------------------------------------------------------
// Final test reports
// ----------------------------------------------------------
neorv32_uart_printf("\n\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);
union {
uint64_t uint64;
uint32_t uint32[sizeof(uint64_t)/2];
} exe_instr, exe_cycles;
 
exe_cycles.uint64 = neorv32_cpu_get_cycle();
exe_instr.uint64 = neorv32_cpu_get_instret();
 
neorv32_uart_printf("\n\nExecuted instructions: 0x%x_%x\n", exe_instr.uint32[1], exe_instr.uint32[0]);
neorv32_uart_printf( "Clock cycles: 0x%x_%x\n", exe_cycles.uint32[1], exe_cycles.uint32[0]);
 
neorv32_uart_printf("\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);
 
// final result
if (cnt_fail == 0) {
neorv32_uart_printf("TEST OK!\n");
/trunk/sw/example/cpu_test/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/demo_pwm/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/demo_trng/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/demo_twi/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/demo_wdt/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/sw/example/game_of_life/makefile
36,29 → 36,25
 
 
# *****************************************************************************
# USER CONFIGURATION
# USER CONFIGURATION (use default if not set by user)
# *****************************************************************************
# Compiler effort
EFFORT = -Os
EFFORT ?= -Os
 
# User's application sources (add additional files here)
APP_SRC = $(wildcard *.c)
APP_SRC ?= $(wildcard *.c)
 
# User's application include folders (don't forget the '-I' before each entry)
APP_INC = -I .
APP_INC ?= -I .
 
# Compiler toolchain (use default if not set by user)
# Compiler toolchain
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
 
# CPU architecture and ABI
MARCH = -march=rv32i
MABI = -mabi=ilp32
MARCH ?= -march=rv32i
MABI ?= -mabi=ilp32
 
# Path to runtime c library (use default if not set by user)
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
 
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
# Relative or absolute path to the NEORV32 home folder
NEORV32_HOME ?= ../../..
# *****************************************************************************
 
113,7 → 109,6
# -----------------------------------------------------------------------------
# compiler tools
CC = $(RISCV_TOOLCHAIN)-gcc
LD = $(RISCV_TOOLCHAIN)-ld
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
SIZE = $(RISCV_TOOLCHAIN)-size
121,23 → 116,14
# NEORV32 executable image generator
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
 
# Compiler flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
# Compiler & linker flags
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles
CC_OPTS += -Wl,--gc-sections -lm -lc -lgcc -lc
 
# Linker flags
LD_OPTS = $(EFFORT) --gc-sections
 
# User flags for additional config
# User flags for additional configuration
USER_FLAGS =
CC_OPTS += $(USER_FLAGS)
 
# Use embedded RISC-V CPU extension?
ifeq (,$(findstring rv32e,$(MARCH)))
CC_OPTS +=
else
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
endif
 
# -----------------------------------------------------------------------------
# Host native compiler
# -----------------------------------------------------------------------------
166,7 → 152,7
 
# Link object files and show memory utilization
main.elf: $(OBJ)
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) -o $@
@echo "Memory utilization:"
@$(SIZE) main.elf
 
212,7 → 198,7
# Compile and install bootloader
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
@set -e
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
@$(CC) $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) -o bootloader.elf
@echo "Memory utilization:"
@$(SIZE) bootloader.elf
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
237,8 → 223,6
@echo "NEORV32_HOME: $(NEORV32_HOME)"
@echo "---------------- Check: $(CC) ----------------"
@$(CC) -v
@echo "---------------- Check: $(LD) ----------------"
@$(LD) -V
@echo "---------------- Check: $(OBJDUMP) ----------------"
@$(OBJDUMP) -V
@echo "---------------- Check: $(OBJCOPY) ----------------"
247,7 → 231,7
@$(SIZE) -V
@echo "---------------- Check: NEORV32 image_gen ----------------"
@$(IMAGE_GEN) -help
@echo "---------------- Check: native gcc ----------------"
@echo "---------------- Check: Native GCC ----------------"
@$(CC_X86) -v
@echo
@echo "Toolchain check OK"
276,17 → 260,17
@echo "---------------- Info: RISC-V Toolchain ----------------"
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
@echo "CC: $(CC)"
@echo "LD: $(LD)"
@echo "OBJDUMP: $(OBJDUMP)"
@echo "OBJCOPY: $(OBJCOPY)"
@echo "SIZE: $(SIZE)"
@echo "---------------- Info: C Lib ----------------"
@echo "CLIB: $(LIBC_PATH)"
@echo "GCCLIB: $(LIBGCC_PATH)"
@echo "---------------- Info: Libraries ----------------"
@echo "LIBGCC:"
@$(CC) -print-libgcc-file-name
@echo "SEARCH-DIRS:"
@$(CC) -print-search-dirs
@echo "---------------- Info: Flags ----------------"
@echo "CC_OPTS: $(CC_OPTS)"
@echo "LD_OPTS: $(LD_OPTS)"
@echo "---------------- Info: Host Native GCC ----------------"
@echo "---------------- Info: Host Native GCC Flags ----------------"
@echo "CC_X86: $(CC_X86)"
 
 
/trunk/README.md
47,8 → 47,8
 
### Key Features
 
- RISC-V-compliant `rv32i` CPU with optional `C`, `E`, `M`, `U`, `Zicsr`, `rv32Zifencei` and PMP (physical memory protection) extensions
- GCC-based toolchain ([pre-compiled rv32i and rv32 etoolchains available](https://github.com/stnolting/riscv_gcc_prebuilt))
- RISC-V-compliant `rv32i` CPU with optional `C`, `E`, `M`, `U`, `Zicsr`, `Zifencei` and PMP (physical memory protection) extensions
- GCC-based toolchain ([pre-compiled rv32i and rv32e toolchains available](https://github.com/stnolting/riscv_gcc_prebuilt))
- Application compilation based on [GNU makefiles](https://github.com/stnolting/neorv32/blob/master/sw/example/blink_led/makefile)
- [Doxygen-based](https://github.com/stnolting/neorv32/blob/master/docs/doxygen_makefile_sw) documentation of the software framework: available on [GitHub pages](https://stnolting.github.io/neorv32/files.html)
- Detailed [datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/NEORV32.pdf) (pdf)
100,7 → 100,6
### To-Do / Wish List
 
- Add AXI(-Lite) bridges
- Option to use DSP-based multiplier in `M` extension (would be so much faster)
- Synthesis results for more platforms
- Port Dhrystone benchmark
- Implement atomic operations (`A` extension) and floating-point operations (`F` extension)
167,6 → 166,8
**Integer multiplication and division hardware** (`M` extension):
* Multiplication instructions: `MUL` `MULH` `MULHSU` `MULHU`
* Division instructions: `DIV` `DIVU` `REM` `REMU`
* By default, the multiplier and divider cores use an iterative bit-serial processing scheme
* Multiplications can be mapped to DSPs via the `FAST_MUL_EN` generic to increase performance
 
**Privileged architecture / CSR access** (`Zicsr` extension):
* Privilege levels: `M-mode` (Machine mode)
204,23 → 205,23
This chapter shows exemplary implementation results of the NEORV32 processor for an **Intel Cyclone IV EP4CE22F17C6N FPGA** on
a DE0-nano board. The design was synthesized using **Intel Quartus Prime Lite 19.1** ("balanced implementation"). The timing
information is derived from the Timing Analyzer / Slow 1200mV 0C Model. If not otherwise specified, the default configuration
of the CPU's generics is assumed (no PMP). No constraints were used at all.
of the CPU's generics is assumed (e.g., no PMP). No constraints were used at all.
 
### CPU
 
Results generated for hardware version: `1.3.0.0`
Results generated for hardware version: `1.3.6.5`
 
| CPU Configuration | LEs | FFs | Memory bits | DSPs | f_max |
|:---------------------------------|:----------:|:--------:|:-----------:|:----:|:-------:|
| `rv32i` | 1122 | 481 | 2048 | 0 | 110 MHz |
| `rv32i` + `Zicsr` + `Zifencei` | 1891 | 819 | 2048 | 0 | 100 MHz |
| `rv32im` + `Zicsr` + `Zifencei` | 2496 | 1067 | 2048 | 0 | 100 MHz |
| `rv32imc` + `Zicsr` + `Zifencei` | 2734 | 1066 | 2048 | 0 | 100 MHz |
| `rv32emc` + `Zicsr` + `Zifencei` | 2722 | 1066 | 1024 | 0 | 100 MHz |
| `rv32i` | 1113 | 479 | 2048 | 0 | 109 MHz |
| `rv32i` + `Zicsr` + `Zifencei` | 1851 | 817 | 2048 | 0 | 100 MHz |
| `rv32im` + `Zicsr` + `Zifencei` | 2462 | 1065 | 2048 | 0 | 100 MHz |
| `rv32imc` + `Zicsr` + `Zifencei` | 2714 | 1064 | 2048 | 0 | 100 MHz |
| `rv32emc` + `Zicsr` + `Zifencei` | 2717 | 1064 | 1024 | 0 | 100 MHz |
 
### Processor-Internal Peripherals and Memories
 
Results generated for hardware version: `1.3.0.0`
Results generated for hardware version: `1.3.6.5`
 
| Module | Description | LEs | FFs | Memory bits | DSPs |
|:----------|:------------------------------------------------|:---:|:---:|:-----------:|:----:|
247,13 → 248,13
processor's [top entity](https://github.com/stnolting/neorv32/blob/master/rtl/core/neorv32_top.vhd) signals
to FPGA pins - except for the Wishbone bus and the interrupt signals.
 
Results generated for hardware version: `1.3.0.0`
Results generated for hardware version: `1.3.6.5`
 
| Vendor | FPGA | Board | Toolchain | Impl. strategy |CPU | LUT / LE | FF / REG | DSP | Memory Bits | BRAM / EBR | SPRAM | Frequency |
|:--------|:----------------------------------|:-----------------|:------------------------|:---------------|:---------------------------------|:-----------|:-----------|:-------|:-------------|:-----------|:---------|---------------:|
| Intel | Cyclone IV `EP4CE22F17C6N` | Terasic DE0-Nano | Quartus Prime Lite 19.1 | balanced | `rv32imc` + `Zicsr` + `Zifencei` | 3934 (18%) | 1799 (8%) | 0 (0%) | 231424 (38%) | - | - | 100 MHz |
| Lattice | iCE40 UltraPlus `iCE40UP5K-SG48I` | Upduino v2.0 | Radiant 2.1 (LSE) | timing | `rv32ic` + `Zicsr` + `Zifencei` | 4895 (92%) | 1636 (31%) | 0 (0%) | - | 12 (40%) | 4 (100%) | *c* 22.875 MHz |
| Xilinx | Artix-7 `XC7A35TICSG324-1L` | Arty A7-35T | Vivado 2019.2 | default | `rv32imc` + `Zicsr` + `Zifencei` | 2432 (12%) | 1852 (4%) | 0 (0%) | - | 8 (16%) | - | *c* 100 MHz |
| Vendor | FPGA | Board | Toolchain | Impl. strategy |CPU | LUT / LE | FF / REG | DSP | Memory Bits | BRAM / EBR | SPRAM | Frequency |
|:--------|:----------------------------------|:-----------------|:------------------------|:---------------|:----------------------------------|:-----------|:-----------|:-------|:-------------|:-----------|:---------|---------------:|
| Intel | Cyclone IV `EP4CE22F17C6N` | Terasic DE0-Nano | Quartus Prime Lite 19.1 | balanced | `rv32imcu` + `Zicsr` + `Zifencei` | 3800 (17%) | 1706 (8%) | 0 (0%) | 231424 (38%) | - | - | 100 MHz |
| Lattice | iCE40 UltraPlus `iCE40UP5K-SG48I` | Upduino v2.0 | Radiant 2.1 (LSE) | timing | `rv32icu` + `Zicsr` + `Zifencei` | 4950 (93%) | 1641 (31%) | 0 (0%) | - | 12 (40%) | 4 (100%) | *c* 22.875 MHz |
| Xilinx | Artix-7 `XC7A35TICSG324-1L` | Arty A7-35T | Vivado 2019.2 | default | `rv32imcu` + `Zicsr` + `Zifencei` | 2445 (12%) | 1893 (4%) | 0 (0%) | - | 8 (16%) | - | *c* 100 MHz |
 
**Notes**
* The Lattice iCE40 UltraPlus setup uses the FPGA's SPRAM memory primitives for the internal IMEM and DEMEM (each 64kb).
270,7 → 271,7
[sw/example/coremark](https://github.com/stnolting/neorv32/blob/master/sw/example/coremark) project folder. This benchmark
tests the capabilities of a CPU itself rather than the functions provided by the whole system / SoC.
 
Results generated for hardware version: `1.3.0.0`
Results generated for hardware version: `1.3.6.5`
 
~~~
**Configuration**
280,12 → 281,14
Peripherals: UART for printing the results
~~~
 
| CPU | Executable Size | Optimization | CoreMark Score | CoreMarks/MHz |
|:----------|:---------------:|:------------:|:--------------:|:-------------:|
| `rv32i` | 21 600 bytes | `-O2` | 27.02 | 0.2702 |
| `rv32im` | 20 976 bytes | `-O2` | 57.14 | 0.5714 |
| `rv32imc` | 16 348 bytes | `-O2` | 57.14 | 0.5714 |
| CPU | Executable Size | Optimization | CoreMark Score | CoreMarks/MHz |
|:---------------------|:---------------:|:------------:|:--------------:|:-------------:|
| `rv32i` | 26 764 bytes | `-O3` | 28.98 | 0.2898 |
| `rv32im` | 25 612 bytes | `-O3` | 58.82 | 0.5882 |
| `rv32imc` | 19 652 bytes | `-O3` | 60.61 | 0.6061 |
| `rv32imc` + FAST_MUL | 19 652 bytes | `-O3` | 71.43 | 0.7143 |
 
The _FAST_MUL_ configuration uses DSPs for the multiplier of the `M` extensions (enabled via the `FAST_MUL_EN` generic).
 
### Instruction Cycles
 
300,16 → 303,18
The following table shows the performance results for successfully running 2000 CoreMark
iterations, which reflects a pretty good "real-life" work load. The average CPI is computed by
dividing the total number of required clock cycles (only the timed core to avoid distortion due to IO wait cycles; sampled via the `cycle[h]` CSRs)
by the number of executed instructions (`instret[h]` CSRs). The executables were generated using optimization `-O2`.
by the number of executed instructions (`instret[h]` CSRs). The executables were generated using optimization `-O3`.
 
Results generated for hardware version: `1.3.0.0`
Results generated for hardware version: `1.3.6.5`
 
| CPU | Required Clock Cycles | Executed Instructions | Average CPI |
|:----------|----------------------:|----------------------:|:-----------:|
| `rv32i` | 7 433 933 906 | 1 494 298 800 | 4.97 |
| `rv32im` | 3 589 861 906 | 628 281 454 | 5.71 |
| `rv32imc` | 3 587 131 226 | 628 282 016 | 5.70 |
| CPU | Required Clock Cycles | Executed Instructions | Average CPI |
|:---------------------|----------------------:|----------------------:|:-----------:|
| `rv32i` | 6 984 305 325 | 1 468 927 290 | 4.75 |
| `rv32im` | 3 415 761 325 | 601 565 734 | 5.67 |
| `rv32imc` | 3 398 881 094 | 601 565 832 | 5.65 |
| `rv32imc` + FAST_MUL | 2 835 121 094 | 601 565 846 | 4.71 |
 
The _FAST_MUL_ configuration uses DSPs for the multiplier of the `M` extensions (enabled via the `FAST_MUL_EN` generic).
 
 
## Top Entities
334,7 → 339,6
-- General --
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
BOOTLOADER_USE : boolean := true; -- implement processor-internal bootloader?
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
343,10 → 347,13
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
PMP_GRANULARITY : natural := 14; -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
PMP_GRANULARITY : natural := 14; -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
-- Memory configuration: Instruction memory --
MEM_ISPACE_BASE : std_ulogic_vector(31 downto 0) := x"00000000"; -- base address of instruction memory space
MEM_ISPACE_SIZE : natural := 16*1024; -- total size of instruction memory space in byte
419,7 → 426,6
entity neorv32_cpu is
generic (
-- General --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
HW_THREAD_ID : std_ulogic_vector(31 downto 0):= (others => '0'); -- hardware thread id
CPU_BOOT_ADDR : std_ulogic_vector(31 downto 0):= (others => '0'); -- cpu boot address
-- RISC-V CPU Extensions --
429,6 → 435,9
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
-- Extension Options --
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
FAST_MUL_EN : boolean := false; -- use DSPs for M extension's multiplier
-- Physical Memory Protection (PMP) --
PMP_USE : boolean := false; -- implement PMP?
PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)

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