URL
https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
Subversion Repositories oms8051mini
Compare Revisions
- This comparison shows the changes necessary to convert path
/oms8051mini/trunk/verif/run
- from Rev 31 to Rev 32
- ↔ Reverse comparison
Rev 31 → Rev 32
/run_irun
12,8 → 12,8
set all_testsi = 0; |
set all_testsx = 0; |
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set misc_tests=(uart_test_1 spi_test_1 i2cm_test_1) |
set risc_int_tests=(fib divmul sort gcd cast xram i2cm_burst_wrrd) |
set misc_tests=(spi_test_1) |
set risc_int_tests=(uart_lb fib divmul sort gcd cast xram i2cm_burst_wrrd) |
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echo " Compiling with cadence tools - irun " |
91,7 → 91,7
#echo "" |
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\cp ../testcase/dat/${risc_int_test}.dat ./dat/oc8051_xrom.in |
$ELAB +DUMP +INTERNAL_ROM -l ../log/run.log |
$ELAB +DUMP +${risc_int_test} +INTERNAL_ROM -l ../log/run.log |
if ($status != 0) then |
cat ../log/run.log |
exit |
/run_modelsim
8,10 → 8,10
set all_testsm = 0; |
set all_testsi = 0; |
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set misc_tests=(uart_test_1 spi_test_1) |
set misc_tests=(spi_test_1) |
#set misc_tests=( ) |
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set risc_int_tests=(fib divmul sort gcd cast xram i2cm_burst_wrrd) |
set risc_int_tests=(uart_lb fib divmul sort gcd cast xram i2cm_burst_wrrd) |
#set risc_int_tests=(fib divmul sort gcd cast xram all_instr) |
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echo " Compiling with MODELSIM " |
90,7 → 90,7
#echo "" |
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\cp ../testcase/dat/${risc_int_test}.dat ./dat/oc8051_xrom.in |
vsim -do run.do -c tb_top +INTERNAL_ROM | tee ../log/run.log |
vsim -do run.do -c tb_top +${risc_int_test} +INTERNAL_ROM | tee ../log/run.log |
if ($status != 0) then |
cat ../log/run.log |
exit |