URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
Subversion Repositories open8_urisc
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- This comparison shows the changes necessary to convert path
/open8_urisc/trunk/gnu/binutils/gas
- from Rev 67 to Rev 69
- ↔ Reverse comparison
Rev 67 → Rev 69
/testsuite/gas/i860/fldst03.s
0,0 → 1,75
# fld.q (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fld.q 0(%r0),%f0 |
fld.q 128(%r1),%f28 |
fld.q 256(%r2),%f24 |
fld.q 512(%r3),%f20 |
fld.q 1024(%r4),%f16 |
fld.q 4096(%r5),%f12 |
fld.q 8192(%r6),%f8 |
fld.q 16384(%r7),%f4 |
fld.q 32752(%r7),%f0 |
fld.q -32768(%r7),%f28 |
fld.q -16384(%r8),%f24 |
fld.q -8192(%r9),%f20 |
fld.q -4096(%r10),%f16 |
fld.q -1024(%r11),%f12 |
fld.q -512(%r12),%f8 |
fld.q -256(%r13),%f4 |
fld.q -16(%r14),%f0 |
|
# Immediate form, with auto-increment. |
fld.q 0(%r0)++,%f0 |
fld.q 128(%r1)++,%f4 |
fld.q 256(%r2)++,%f8 |
fld.q 512(%r3)++,%f12 |
fld.q 1024(%r4)++,%f16 |
fld.q 4096(%r5)++,%f20 |
fld.q 8192(%r6)++,%f24 |
fld.q 16384(%r7)++,%f28 |
fld.q 32752(%r7)++,%f0 |
fld.q -32768(%r7)++,%f4 |
fld.q -16384(%r8)++,%f8 |
fld.q -8192(%r9)++,%f12 |
fld.q -4096(%r10)++,%f16 |
fld.q -1024(%r11)++,%f20 |
fld.q -512(%r12)++,%f24 |
fld.q -256(%r13)++,%f28 |
fld.q -16(%r14)++,%f16 |
|
# Index form, no auto-increment. |
fld.q %r5(%r0),%f0 |
fld.q %r6(%r1),%f20 |
fld.q %r7(%r2),%f16 |
fld.q %r8(%r3),%f12 |
fld.q %r9(%r4),%f8 |
fld.q %r0(%r5),%f4 |
fld.q %r1(%r6),%f0 |
fld.q %r12(%r7),%f28 |
fld.q %r13(%r8),%f24 |
fld.q %r14(%r9),%f20 |
fld.q %r15(%r10),%f16 |
fld.q %r16(%r11),%f12 |
fld.q %r17(%r12),%f8 |
fld.q %r28(%r13),%f4 |
fld.q %r31(%r14),%f0 |
|
# Index form, with auto-increment. |
fld.q %r5(%r0)++,%f0 |
fld.q %r6(%r1)++,%f4 |
fld.q %r7(%r2)++,%f8 |
fld.q %r8(%r3)++,%f12 |
fld.q %r9(%r4)++,%f16 |
fld.q %r0(%r5)++,%f20 |
fld.q %r1(%r6)++,%f24 |
fld.q %r12(%r7)++,%f28 |
fld.q %r13(%r8)++,%f0 |
fld.q %r14(%r9)++,%f4 |
fld.q %r15(%r10)++,%f8 |
fld.q %r16(%r11)++,%f12 |
fld.q %r17(%r12)++,%f16 |
fld.q %r28(%r13)++,%f20 |
fld.q %r31(%r14)++,%f24 |
|
/testsuite/gas/i860/README.i860
0,0 → 1,34
|
Testsuite for the i860 version of the GNU assembler |
--------------------------------------------------- |
|
This is a simple testsuite for the i860 assembler. It currently |
consists mostly of testcases for checking that every instruction is |
parsed correctly and that correct object code is generated (these |
are called "blah.s"). The files called "blah-err.s" test for error |
conditions. |
|
The suite includes testcases for the base i860XR instruction set as well |
as the enhanced i860XP instructions and control registers. |
|
The expected results files were generated using the UNIX System V/i860 |
Release 4 vendor assembler (/usr/ccs/bin/as -V reports version |
"Standard C Development Environment (SCDE) 5.0 12/08/89"). This |
way GAS/i860 is tested against a known good assembler. |
|
TODO: |
- Relocation testing is basically non-existent. |
- pst.d (pixel store) is the only instruction with no testcase. |
- Some pseudo instructions need testcases (mov, all pfmov, etc.). |
- More tests for dual instruction mode: check that dual mode has a |
proper pair (FLOP/core) of instructions, and other error conditions. |
- Most current testcases use the default AT&T/SVR4 syntax; a few simple |
tests of the Intel syntax should be added to prevent bitrot (including |
relocatable expression syntax, etc). Test file dual03.s uses Intel |
syntax lightly (i.e., register names without '%' prefix). |
|
Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help. |
|
Known testsuite failures: |
- none. |
|
/testsuite/gas/i860/fldst05.s
0,0 → 1,75
# fst.d (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fst.d %f0,0(%r0) |
fst.d %f30,128(%r1) |
fst.d %f28,256(%r2) |
fst.d %f26,512(%r3) |
fst.d %f24,1024(%r4) |
fst.d %f22,4096(%r5) |
fst.d %f20,8192(%r6) |
fst.d %f18,16384(%r7) |
fst.d %f16,32760(%r7) |
fst.d %f14,-32768(%r7) |
fst.d %f12,-16384(%r8) |
fst.d %f10,-8192(%r9) |
fst.d %f8,-4096(%r10) |
fst.d %f6,-1024(%r11) |
fst.d %f4,-512(%r12) |
fst.d %f2,-248(%r13) |
fst.d %f0,-8(%r14) |
|
# Immediate form, with auto-increment. |
fst.d %f0,0(%r0)++ |
fst.d %f2,128(%r1)++ |
fst.d %f4,256(%r2)++ |
fst.d %f6,512(%r3)++ |
fst.d %f8,1024(%r4)++ |
fst.d %f10,4096(%r5)++ |
fst.d %f12,8192(%r6)++ |
fst.d %f14,16384(%r7)++ |
fst.d %f16,32760(%r7)++ |
fst.d %f18,-32768(%r7)++ |
fst.d %f20,-16384(%r8)++ |
fst.d %f22,-8192(%r9)++ |
fst.d %f24,-4096(%r10)++ |
fst.d %f26,-1024(%r11)++ |
fst.d %f28,-512(%r12)++ |
fst.d %f30,-248(%r13)++ |
fst.d %f16,-8(%r14)++ |
|
# Index form, no auto-increment. |
fst.d %f0,%r5(%r0) |
fst.d %f30,%r6(%r1) |
fst.d %f28,%r7(%r2) |
fst.d %f26,%r8(%r3) |
fst.d %f24,%r9(%r4) |
fst.d %f22,%r0(%r5) |
fst.d %f20,%r1(%r6) |
fst.d %f18,%r12(%r7) |
fst.d %f16,%r13(%r8) |
fst.d %f14,%r14(%r9) |
fst.d %f12,%r15(%r10) |
fst.d %f10,%r16(%r11) |
fst.d %f8,%r17(%r12) |
fst.d %f6,%r28(%r13) |
fst.d %f4,%r31(%r14) |
|
# Index form, with auto-increment. |
fst.d %f0,%r5(%r0)++ |
fst.d %f2,%r6(%r1)++ |
fst.d %f4,%r7(%r2)++ |
fst.d %f6,%r8(%r3)++ |
fst.d %f8,%r9(%r4)++ |
fst.d %f10,%r0(%r5)++ |
fst.d %f12,%r1(%r6)++ |
fst.d %f14,%r12(%r7)++ |
fst.d %f16,%r13(%r8)++ |
fst.d %f18,%r14(%r9)++ |
fst.d %f20,%r15(%r10)++ |
fst.d %f22,%r16(%r11)++ |
fst.d %f24,%r17(%r12)++ |
fst.d %f26,%r28(%r13)++ |
fst.d %f30,%r31(%r14)++ |
|
/testsuite/gas/i860/fldst07.s
0,0 → 1,75
# pfld.l (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
pfld.l 0(%r0),%f0 |
pfld.l 124(%r1),%f31 |
pfld.l 256(%r2),%f30 |
pfld.l 512(%r3),%f29 |
pfld.l 1024(%r4),%f28 |
pfld.l 4096(%r5),%f27 |
pfld.l 8192(%r6),%f26 |
pfld.l 16384(%r7),%f25 |
pfld.l 32764(%r7),%f25 |
pfld.l -32768(%r7),%f23 |
pfld.l -16384(%r8),%f2 |
pfld.l -8192(%r9),%f3 |
pfld.l -4096(%r10),%f8 |
pfld.l -1024(%r11),%f9 |
pfld.l -508(%r12),%f12 |
pfld.l -248(%r13),%f19 |
pfld.l -4(%r14),%f21 |
|
# Immediate form, with auto-increment. |
pfld.l 0(%r0)++,%f0 |
pfld.l 124(%r1)++,%f1 |
pfld.l 256(%r2)++,%f2 |
pfld.l 512(%r3)++,%f3 |
pfld.l 1024(%r4)++,%f4 |
pfld.l 4096(%r5)++,%f5 |
pfld.l 8192(%r6)++,%f6 |
pfld.l 16384(%r7)++,%f7 |
pfld.l 32764(%r7)++,%f8 |
pfld.l -32768(%r7)++,%f9 |
pfld.l -16384(%r8)++,%f10 |
pfld.l -8192(%r9)++,%f11 |
pfld.l -4096(%r10)++,%f12 |
pfld.l -1024(%r11)++,%f13 |
pfld.l -508(%r12)++,%f14 |
pfld.l -248(%r13)++,%f15 |
pfld.l -4(%r14)++,%f16 |
|
# Index form, no auto-increment. |
pfld.l %r5(%r0),%f0 |
pfld.l %r6(%r1),%f31 |
pfld.l %r7(%r2),%f30 |
pfld.l %r8(%r3),%f29 |
pfld.l %r9(%r4),%f28 |
pfld.l %r0(%r5),%f27 |
pfld.l %r1(%r6),%f26 |
pfld.l %r12(%r7),%f25 |
pfld.l %r13(%r8),%f24 |
pfld.l %r14(%r9),%f23 |
pfld.l %r15(%r10),%f22 |
pfld.l %r16(%r11),%f21 |
pfld.l %r17(%r12),%f20 |
pfld.l %r28(%r13),%f19 |
pfld.l %r31(%r14),%f18 |
|
# Index form, with auto-increment. |
pfld.l %r5(%r0)++,%f0 |
pfld.l %r6(%r1)++,%f1 |
pfld.l %r7(%r2)++,%f2 |
pfld.l %r8(%r3)++,%f3 |
pfld.l %r9(%r4)++,%f4 |
pfld.l %r0(%r5)++,%f5 |
pfld.l %r1(%r6)++,%f6 |
pfld.l %r12(%r7)++,%f7 |
pfld.l %r13(%r8)++,%f8 |
pfld.l %r14(%r9)++,%f9 |
pfld.l %r15(%r10)++,%f10 |
pfld.l %r16(%r11)++,%f11 |
pfld.l %r17(%r12)++,%f12 |
pfld.l %r28(%r13)++,%f13 |
pfld.l %r31(%r14)++,%f14 |
|
/testsuite/gas/i860/dual01.s
0,0 → 1,17
# Test fnop's dual bit (all other floating point operations have their dual |
# bit tested in their individual test files). |
|
.text |
.align 8 |
nop |
nop |
d.pfadd.dd %f8,%f10,%f12 |
adds %r5,%r6,%r6 |
d.pfadd.dd %f8,%f10,%f12 |
fld.d 16(%r10),%f24 |
d.fnop |
fld.d 8(%r10),%f8 |
d.fnop |
fld.d 0(%r10),%f16 |
nop |
nop |
/testsuite/gas/i860/ldst01.d
0,0 → 1,39
#as: |
#objdump: -dr |
#name: i860 ldst01 (ld.l) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 01 00 00 14 ld.l 0\(%r0\),%r0 |
4: 7d 00 3f 14 ld.l 124\(%r1\),%r31 |
8: 01 01 5e 14 ld.l 256\(%sp\),%r30 |
c: 01 02 7d 14 ld.l 512\(%fp\),%r29 |
10: 01 04 9c 14 ld.l 1024\(%r4\),%r28 |
14: 01 10 bb 14 ld.l 4096\(%r5\),%r27 |
18: 01 20 da 14 ld.l 8192\(%r6\),%r26 |
1c: 01 40 f9 14 ld.l 16384\(%r7\),%r25 |
20: 01 c0 18 15 ld.l -16384\(%r8\),%r24 |
24: 01 e0 37 15 ld.l -8192\(%r9\),%r23 |
28: 01 f0 56 15 ld.l -4096\(%r10\),%r22 |
2c: 01 fc 75 15 ld.l -1024\(%r11\),%r21 |
30: 05 fe 94 15 ld.l -508\(%r12\),%r20 |
34: 09 ff b3 15 ld.l -248\(%r13\),%r19 |
38: fd ff d2 15 ld.l -4\(%r14\),%r18 |
3c: 01 28 00 10 ld.l %r5\(%r0\),%r0 |
40: 01 30 3f 10 ld.l %r6\(%r1\),%r31 |
44: 01 38 5e 10 ld.l %r7\(%sp\),%r30 |
48: 01 40 7d 10 ld.l %r8\(%fp\),%r29 |
4c: 01 48 9c 10 ld.l %r9\(%r4\),%r28 |
50: 01 00 bb 10 ld.l %r0\(%r5\),%r27 |
54: 01 08 da 10 ld.l %r1\(%r6\),%r26 |
58: 01 60 f9 10 ld.l %r12\(%r7\),%r25 |
5c: 01 68 18 11 ld.l %r13\(%r8\),%r24 |
60: 01 70 37 11 ld.l %r14\(%r9\),%r23 |
64: 01 78 56 11 ld.l %r15\(%r10\),%r22 |
68: 01 80 75 11 ld.l %r16\(%r11\),%r21 |
6c: 01 88 94 11 ld.l %r17\(%r12\),%r20 |
70: 01 e0 b3 11 ld.l %r28\(%r13\),%r19 |
74: 01 f8 d2 11 ld.l %r31\(%r14\),%r18 |
/testsuite/gas/i860/dir-align01.d
0,0 → 1,17
#as: |
#objdump: -d |
#name: i860 dir-align01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 20 a6 90 adds %r4,%r5,%r6 |
4: 00 00 00 a0 shl %r0,%r0,%r0 |
8: 00 00 00 a0 shl %r0,%r0,%r0 |
c: 00 00 00 a0 shl %r0,%r0,%r0 |
10: 00 50 6c 91 adds %r10,%r11,%r12 |
14: a1 b1 1a 4b fmlow.dd %f22,%f24,%f26 |
18: 30 74 f0 49 pfadd.ss %f14,%f15,%f16 |
1c: b0 8c 54 4a pfadd.sd %f17,%f18,%f20 |
/testsuite/gas/i860/dual03.s
0,0 → 1,46
// A larger dual-mode test, from the programmer's reference manual. |
// This uses Intel syntax, as in the manual. |
|
// Single-precision vector sum |
fld.d r0(r16),f20 |
mov -2,r21 |
d.pfadd.ss f0,f0,f0 |
adds -6,r17,r17 |
d.pfadd.ss f0,f0,f0 |
bla r21,r17,L1 |
d.pfadd.ss f0,f0,f0 |
fld.d 8(r16)++,f22 |
L1: |
d.pfadd.ss f20,f30,f30 |
bla r21,r17,L2 |
d.pfadd.ss f21,f31,f31 |
fld.d 8(r16)++,f20 |
d.pfadd.ss f20,f30,f30 |
br S |
d.pfadd.ss f21,f31,f31 |
nop |
L2: |
d.pfadd.ss f22,f30,f30 |
bla r21,r17,L1 |
d.pfadd.ss f23,f31,f31 |
fld.d 8(r16)++,f22 |
d.pfadd.ss f20,f30,f30 |
nop |
d.pfadd.ss f21,f31,f31 |
nop |
S: |
pfadd.ss f22,f30,f30 |
mov -4,r21 |
pfadd.ss f23,f31,f31 |
bte r21,r17,DONE |
fld.l 8(r16)++,f20 |
pfadd.ss f20,f30,f30 |
DONE: |
pfadd.ss f0,f0,f30 |
pfadd.ss f30,f31,f31 |
pfadd.ss f0,f0,f30 |
pfadd.ss f0,f0,f0 |
pfadd.ss f0,f0,f31 |
fadd.ss f30,f31,f16 |
|
|
/testsuite/gas/i860/ldst03.d
0,0 → 1,43
#as: |
#objdump: -dr |
#name: i860 ldst03 (ld.b) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 04 ld.b 0\(%r0\),%r0 |
4: 01 00 3f 04 ld.b 1\(%r1\),%r31 |
8: 02 00 5e 04 ld.b 2\(%sp\),%r30 |
c: 01 02 7d 04 ld.b 513\(%fp\),%r29 |
10: 04 04 9c 04 ld.b 1028\(%r4\),%r28 |
14: fa 0f bb 04 ld.b 4090\(%r5\),%r27 |
18: fe 1f da 04 ld.b 8190\(%r6\),%r26 |
1c: 01 40 f9 04 ld.b 16385\(%r7\),%r25 |
20: 07 7d f9 04 ld.b 32007\(%r7\),%r25 |
24: ff 7f f9 04 ld.b 32767\(%r7\),%r25 |
28: 00 80 f9 04 ld.b -32768\(%r7\),%r25 |
2c: 01 80 f9 04 ld.b -32767\(%r7\),%r25 |
30: 01 c0 18 05 ld.b -16383\(%r8\),%r24 |
34: 5b e0 37 05 ld.b -8101\(%r9\),%r23 |
38: 05 f0 56 05 ld.b -4091\(%r10\),%r22 |
3c: 01 fc 75 05 ld.b -1023\(%r11\),%r21 |
40: 03 fe 94 05 ld.b -509\(%r12\),%r20 |
44: e9 ff b3 05 ld.b -23\(%r13\),%r19 |
48: ff ff d2 05 ld.b -1\(%r14\),%r18 |
4c: 00 28 00 00 ld.b %r5\(%r0\),%r0 |
50: 00 30 3f 00 ld.b %r6\(%r1\),%r31 |
54: 00 38 5e 00 ld.b %r7\(%sp\),%r30 |
58: 00 40 7d 00 ld.b %r8\(%fp\),%r29 |
5c: 00 48 9c 00 ld.b %r9\(%r4\),%r28 |
60: 00 00 bb 00 ld.b %r0\(%r5\),%r27 |
64: 00 08 da 00 ld.b %r1\(%r6\),%r26 |
68: 00 60 f9 00 ld.b %r12\(%r7\),%r25 |
6c: 00 68 18 01 ld.b %r13\(%r8\),%r24 |
70: 00 70 37 01 ld.b %r14\(%r9\),%r23 |
74: 00 78 56 01 ld.b %r15\(%r10\),%r22 |
78: 00 80 75 01 ld.b %r16\(%r11\),%r21 |
7c: 00 88 94 01 ld.b %r17\(%r12\),%r20 |
80: 00 e0 b3 01 ld.b %r28\(%r13\),%r19 |
84: 00 f8 d2 01 ld.b %r31\(%r14\),%r18 |
/testsuite/gas/i860/ldst05.d
0,0 → 1,24
#as: |
#objdump: -dr |
#name: i860 ldst05 (st.s) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 1c st.s %r0,0\(%r0\) |
4: 7a f8 20 1c st.s %r31,122\(%r1\) |
8: 02 f1 40 1c st.s %r30,258\(%sp\) |
c: 00 ea 60 1c st.s %r29,512\(%fp\) |
10: 04 e4 80 1c st.s %r28,1028\(%r4\) |
14: fa df a1 1c st.s %r27,4090\(%r5\) |
18: fe d7 c3 1c st.s %r26,8190\(%r6\) |
1c: 00 c8 e8 1c st.s %r25,16384\(%r7\) |
20: 00 c0 18 1d st.s %r24,-16384\(%r8\) |
24: 00 b8 3c 1d st.s %r23,-8192\(%r9\) |
28: 00 b0 5e 1d st.s %r22,-4096\(%r10\) |
2c: 00 ac 7f 1d st.s %r21,-1024\(%r11\) |
30: 04 a6 9f 1d st.s %r20,-508\(%r12\) |
34: 0e 9f bf 1d st.s %r19,-242\(%r13\) |
38: fe 97 df 1d st.s %r18,-2\(%r14\) |
/testsuite/gas/i860/pfmsm.d
0,0 → 1,153
#as: |
#objdump: -dr |
#name: i860 pfmsm |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 10 00 22 48 mr2s1.ss %f0,%f1,%f2 |
4: 90 18 85 48 mr2s1.sd %f3,%f4,%f5 |
8: 90 01 44 48 mr2s1.dd %f0,%f2,%f4 |
c: 11 08 43 48 mr2st.ss %f1,%f2,%f3 |
10: 91 20 a6 48 mr2st.sd %f4,%f5,%f6 |
14: 91 11 86 48 mr2st.dd %f2,%f4,%f6 |
18: 12 10 64 48 mr2ms1.ss %f2,%f3,%f4 |
1c: 92 30 e8 48 mr2ms1.sd %f6,%f7,%f8 |
20: 92 21 c8 48 mr2ms1.dd %f4,%f6,%f8 |
24: 13 18 85 48 mr2mst.ss %f3,%f4,%f5 |
28: 93 38 09 49 mr2mst.sd %f7,%f8,%f9 |
2c: 93 31 0a 49 mr2mst.dd %f6,%f8,%f10 |
30: 14 20 a6 48 mi2s1.ss %f4,%f5,%f6 |
34: 94 40 2a 49 mi2s1.sd %f8,%f9,%f10 |
38: 94 61 d0 49 mi2s1.dd %f12,%f14,%f16 |
3c: 15 38 09 49 mi2st.ss %f7,%f8,%f9 |
40: 95 58 8d 49 mi2st.sd %f11,%f12,%f13 |
44: 95 71 12 4a mi2st.dd %f14,%f16,%f18 |
48: 16 50 6c 49 mi2ms1.ss %f10,%f11,%f12 |
4c: 96 70 f0 49 mi2ms1.sd %f14,%f15,%f16 |
50: 96 81 54 4a mi2ms1.dd %f16,%f18,%f20 |
54: 17 68 cf 49 mi2mst.ss %f13,%f14,%f15 |
58: 97 88 53 4a mi2mst.sd %f17,%f18,%f19 |
5c: 97 91 96 4a mi2mst.dd %f18,%f20,%f22 |
60: 18 70 f0 49 mrmt1s2.ss %f14,%f15,%f16 |
64: 98 a0 b6 4a mrmt1s2.sd %f20,%f21,%f22 |
68: 98 a1 d8 4a mrmt1s2.dd %f20,%f22,%f24 |
6c: 19 78 11 4a mm12msm.ss %f15,%f16,%f17 |
70: 99 b8 19 4b mm12msm.sd %f23,%f24,%f25 |
74: 99 b1 1a 4b mm12msm.dd %f22,%f24,%f26 |
78: 1a 90 74 4a mrm1s2.ss %f18,%f19,%f20 |
7c: 9a d0 7c 4b mrm1s2.sd %f26,%f27,%f28 |
80: 9a a1 d8 4a mrm1s2.dd %f20,%f22,%f24 |
84: 1b 98 95 4a mm12ttsm.ss %f19,%f20,%f21 |
88: 9b e8 df 4b mm12ttsm.sd %f29,%f30,%f31 |
8c: 9b b1 1a 4b mm12ttsm.dd %f22,%f24,%f26 |
90: 1c a0 b6 4a mimt1s2.ss %f20,%f21,%f22 |
94: 9c 00 22 48 mimt1s2.sd %f0,%f1,%f2 |
98: 9c c1 5c 4b mimt1s2.dd %f24,%f26,%f28 |
9c: 1d a8 d7 4a mm12tsm.ss %f21,%f22,%f23 |
a0: 9d 18 85 48 mm12tsm.sd %f3,%f4,%f5 |
a4: 9d f1 02 48 mm12tsm.dd %f30,%f0,%f2 |
a8: 1e b0 f8 4a mim1s2.ss %f22,%f23,%f24 |
ac: 9e 30 e8 48 mim1s2.sd %f6,%f7,%f8 |
b0: 9e 21 c8 48 mim1s2.dd %f4,%f6,%f8 |
b4: 1f bc 19 4b m12tsa.ss %f23,%f24,%f25 |
b8: 9f 4c 4b 49 m12tsa.sd %f9,%f10,%f11 |
bc: 9f 35 0a 49 m12tsa.dd %f6,%f8,%f10 |
c0: 10 02 22 48 d.mr2s1.ss %f0,%f1,%f2 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: 90 1a 85 48 d.mr2s1.sd %f3,%f4,%f5 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: 90 03 44 48 d.mr2s1.dd %f0,%f2,%f4 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: 11 0a 43 48 d.mr2st.ss %f1,%f2,%f3 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: 91 22 a6 48 d.mr2st.sd %f4,%f5,%f6 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: 91 13 86 48 d.mr2st.dd %f2,%f4,%f6 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: 12 12 64 48 d.mr2ms1.ss %f2,%f3,%f4 |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: 92 32 e8 48 d.mr2ms1.sd %f6,%f7,%f8 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: 92 23 c8 48 d.mr2ms1.dd %f4,%f6,%f8 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
108: 13 1a 85 48 d.mr2mst.ss %f3,%f4,%f5 |
10c: 00 00 00 a0 shl %r0,%r0,%r0 |
110: 93 3a 09 49 d.mr2mst.sd %f7,%f8,%f9 |
114: 00 00 00 a0 shl %r0,%r0,%r0 |
118: 93 33 0a 49 d.mr2mst.dd %f6,%f8,%f10 |
11c: 00 00 00 a0 shl %r0,%r0,%r0 |
120: 14 22 a6 48 d.mi2s1.ss %f4,%f5,%f6 |
124: 00 00 00 a0 shl %r0,%r0,%r0 |
128: 94 42 2a 49 d.mi2s1.sd %f8,%f9,%f10 |
12c: 00 00 00 a0 shl %r0,%r0,%r0 |
130: 94 63 d0 49 d.mi2s1.dd %f12,%f14,%f16 |
134: 00 00 00 a0 shl %r0,%r0,%r0 |
138: 15 3a 09 49 d.mi2st.ss %f7,%f8,%f9 |
13c: 00 00 00 a0 shl %r0,%r0,%r0 |
140: 95 5a 8d 49 d.mi2st.sd %f11,%f12,%f13 |
144: 00 00 00 a0 shl %r0,%r0,%r0 |
148: 95 73 12 4a d.mi2st.dd %f14,%f16,%f18 |
14c: 00 00 00 a0 shl %r0,%r0,%r0 |
150: 16 52 6c 49 d.mi2ms1.ss %f10,%f11,%f12 |
154: 00 00 00 a0 shl %r0,%r0,%r0 |
158: 96 72 f0 49 d.mi2ms1.sd %f14,%f15,%f16 |
15c: 00 00 00 a0 shl %r0,%r0,%r0 |
160: 96 83 54 4a d.mi2ms1.dd %f16,%f18,%f20 |
164: 00 00 00 a0 shl %r0,%r0,%r0 |
168: 17 6a cf 49 d.mi2mst.ss %f13,%f14,%f15 |
16c: 00 00 00 a0 shl %r0,%r0,%r0 |
170: 97 8a 53 4a d.mi2mst.sd %f17,%f18,%f19 |
174: 00 00 00 a0 shl %r0,%r0,%r0 |
178: 97 93 96 4a d.mi2mst.dd %f18,%f20,%f22 |
17c: 00 00 00 a0 shl %r0,%r0,%r0 |
180: 18 72 f0 49 d.mrmt1s2.ss %f14,%f15,%f16 |
184: 00 00 00 a0 shl %r0,%r0,%r0 |
188: 98 a2 b6 4a d.mrmt1s2.sd %f20,%f21,%f22 |
18c: 00 00 00 a0 shl %r0,%r0,%r0 |
190: 98 a3 d8 4a d.mrmt1s2.dd %f20,%f22,%f24 |
194: 00 00 00 a0 shl %r0,%r0,%r0 |
198: 19 7a 11 4a d.mm12msm.ss %f15,%f16,%f17 |
19c: 00 00 00 a0 shl %r0,%r0,%r0 |
1a0: 99 ba 19 4b d.mm12msm.sd %f23,%f24,%f25 |
1a4: 00 00 00 a0 shl %r0,%r0,%r0 |
1a8: 99 b3 1a 4b d.mm12msm.dd %f22,%f24,%f26 |
1ac: 00 00 00 a0 shl %r0,%r0,%r0 |
1b0: 1a 92 74 4a d.mrm1s2.ss %f18,%f19,%f20 |
1b4: 00 00 00 a0 shl %r0,%r0,%r0 |
1b8: 9a d2 7c 4b d.mrm1s2.sd %f26,%f27,%f28 |
1bc: 00 00 00 a0 shl %r0,%r0,%r0 |
1c0: 9a a3 d8 4a d.mrm1s2.dd %f20,%f22,%f24 |
1c4: 00 00 00 a0 shl %r0,%r0,%r0 |
1c8: 1b 9a 95 4a d.mm12ttsm.ss %f19,%f20,%f21 |
1cc: 00 00 00 a0 shl %r0,%r0,%r0 |
1d0: 9b ea df 4b d.mm12ttsm.sd %f29,%f30,%f31 |
1d4: 00 00 00 a0 shl %r0,%r0,%r0 |
1d8: 9b b3 1a 4b d.mm12ttsm.dd %f22,%f24,%f26 |
1dc: 00 00 00 a0 shl %r0,%r0,%r0 |
1e0: 1c a2 b6 4a d.mimt1s2.ss %f20,%f21,%f22 |
1e4: 00 00 00 a0 shl %r0,%r0,%r0 |
1e8: 9c 02 22 48 d.mimt1s2.sd %f0,%f1,%f2 |
1ec: 00 00 00 a0 shl %r0,%r0,%r0 |
1f0: 9c c3 5c 4b d.mimt1s2.dd %f24,%f26,%f28 |
1f4: 00 00 00 a0 shl %r0,%r0,%r0 |
1f8: 1d aa d7 4a d.mm12tsm.ss %f21,%f22,%f23 |
1fc: 00 00 00 a0 shl %r0,%r0,%r0 |
200: 9d 1a 85 48 d.mm12tsm.sd %f3,%f4,%f5 |
204: 00 00 00 a0 shl %r0,%r0,%r0 |
208: 9d f3 02 48 d.mm12tsm.dd %f30,%f0,%f2 |
20c: 00 00 00 a0 shl %r0,%r0,%r0 |
210: 1e b2 f8 4a d.mim1s2.ss %f22,%f23,%f24 |
214: 00 00 00 a0 shl %r0,%r0,%r0 |
218: 9e 32 e8 48 d.mim1s2.sd %f6,%f7,%f8 |
21c: 00 00 00 a0 shl %r0,%r0,%r0 |
220: 9e 23 c8 48 d.mim1s2.dd %f4,%f6,%f8 |
224: 00 00 00 a0 shl %r0,%r0,%r0 |
228: 1f be 19 4b d.m12tsa.ss %f23,%f24,%f25 |
22c: 00 00 00 a0 shl %r0,%r0,%r0 |
230: 9f 4e 4b 49 d.m12tsa.sd %f9,%f10,%f11 |
234: 00 00 00 a0 shl %r0,%r0,%r0 |
238: 9f 37 0a 49 d.m12tsa.dd %f6,%f8,%f10 |
23c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/pfam.d
0,0 → 1,153
#as: |
#objdump: -dr |
#name: i860 pfam |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 04 22 48 r2p1.ss %f0,%f1,%f2 |
4: 80 1c 85 48 r2p1.sd %f3,%f4,%f5 |
8: 80 05 44 48 r2p1.dd %f0,%f2,%f4 |
c: 01 0c 43 48 r2pt.ss %f1,%f2,%f3 |
10: 81 24 a6 48 r2pt.sd %f4,%f5,%f6 |
14: 81 15 86 48 r2pt.dd %f2,%f4,%f6 |
18: 02 14 64 48 r2ap1.ss %f2,%f3,%f4 |
1c: 82 34 e8 48 r2ap1.sd %f6,%f7,%f8 |
20: 82 25 c8 48 r2ap1.dd %f4,%f6,%f8 |
24: 03 1c 85 48 r2apt.ss %f3,%f4,%f5 |
28: 83 3c 09 49 r2apt.sd %f7,%f8,%f9 |
2c: 83 35 0a 49 r2apt.dd %f6,%f8,%f10 |
30: 04 24 a6 48 i2p1.ss %f4,%f5,%f6 |
34: 84 44 2a 49 i2p1.sd %f8,%f9,%f10 |
38: 84 65 d0 49 i2p1.dd %f12,%f14,%f16 |
3c: 05 3c 09 49 i2pt.ss %f7,%f8,%f9 |
40: 85 5c 8d 49 i2pt.sd %f11,%f12,%f13 |
44: 85 75 12 4a i2pt.dd %f14,%f16,%f18 |
48: 06 54 6c 49 i2ap1.ss %f10,%f11,%f12 |
4c: 86 74 f0 49 i2ap1.sd %f14,%f15,%f16 |
50: 86 85 54 4a i2ap1.dd %f16,%f18,%f20 |
54: 07 6c cf 49 i2apt.ss %f13,%f14,%f15 |
58: 87 8c 53 4a i2apt.sd %f17,%f18,%f19 |
5c: 87 95 96 4a i2apt.dd %f18,%f20,%f22 |
60: 08 74 f0 49 rat1p2.ss %f14,%f15,%f16 |
64: 88 a4 b6 4a rat1p2.sd %f20,%f21,%f22 |
68: 88 a5 d8 4a rat1p2.dd %f20,%f22,%f24 |
6c: 09 7c 11 4a m12apm.ss %f15,%f16,%f17 |
70: 89 bc 19 4b m12apm.sd %f23,%f24,%f25 |
74: 89 b5 1a 4b m12apm.dd %f22,%f24,%f26 |
78: 0a 94 74 4a ra1p2.ss %f18,%f19,%f20 |
7c: 8a d4 7c 4b ra1p2.sd %f26,%f27,%f28 |
80: 8a a5 d8 4a ra1p2.dd %f20,%f22,%f24 |
84: 0b 9c 95 4a m12ttpa.ss %f19,%f20,%f21 |
88: 8b ec df 4b m12ttpa.sd %f29,%f30,%f31 |
8c: 8b b5 1a 4b m12ttpa.dd %f22,%f24,%f26 |
90: 0c a4 b6 4a iat1p2.ss %f20,%f21,%f22 |
94: 8c 04 22 48 iat1p2.sd %f0,%f1,%f2 |
98: 8c c5 5c 4b iat1p2.dd %f24,%f26,%f28 |
9c: 0d ac d7 4a m12tpm.ss %f21,%f22,%f23 |
a0: 8d 1c 85 48 m12tpm.sd %f3,%f4,%f5 |
a4: 8d f5 02 48 m12tpm.dd %f30,%f0,%f2 |
a8: 0e b4 f8 4a ia1p2.ss %f22,%f23,%f24 |
ac: 8e 34 e8 48 ia1p2.sd %f6,%f7,%f8 |
b0: 8e 25 c8 48 ia1p2.dd %f4,%f6,%f8 |
b4: 0f bc 19 4b m12tpa.ss %f23,%f24,%f25 |
b8: 8f 4c 4b 49 m12tpa.sd %f9,%f10,%f11 |
bc: 8f 35 0a 49 m12tpa.dd %f6,%f8,%f10 |
c0: 00 06 22 48 d.r2p1.ss %f0,%f1,%f2 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: 80 1e 85 48 d.r2p1.sd %f3,%f4,%f5 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: 80 07 44 48 d.r2p1.dd %f0,%f2,%f4 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: 01 0e 43 48 d.r2pt.ss %f1,%f2,%f3 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: 81 26 a6 48 d.r2pt.sd %f4,%f5,%f6 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: 81 17 86 48 d.r2pt.dd %f2,%f4,%f6 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: 02 16 64 48 d.r2ap1.ss %f2,%f3,%f4 |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: 82 36 e8 48 d.r2ap1.sd %f6,%f7,%f8 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: 82 27 c8 48 d.r2ap1.dd %f4,%f6,%f8 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
108: 03 1e 85 48 d.r2apt.ss %f3,%f4,%f5 |
10c: 00 00 00 a0 shl %r0,%r0,%r0 |
110: 83 3e 09 49 d.r2apt.sd %f7,%f8,%f9 |
114: 00 00 00 a0 shl %r0,%r0,%r0 |
118: 83 37 0a 49 d.r2apt.dd %f6,%f8,%f10 |
11c: 00 00 00 a0 shl %r0,%r0,%r0 |
120: 04 26 a6 48 d.i2p1.ss %f4,%f5,%f6 |
124: 00 00 00 a0 shl %r0,%r0,%r0 |
128: 84 46 2a 49 d.i2p1.sd %f8,%f9,%f10 |
12c: 00 00 00 a0 shl %r0,%r0,%r0 |
130: 84 67 d0 49 d.i2p1.dd %f12,%f14,%f16 |
134: 00 00 00 a0 shl %r0,%r0,%r0 |
138: 05 3e 09 49 d.i2pt.ss %f7,%f8,%f9 |
13c: 00 00 00 a0 shl %r0,%r0,%r0 |
140: 85 5e 8d 49 d.i2pt.sd %f11,%f12,%f13 |
144: 00 00 00 a0 shl %r0,%r0,%r0 |
148: 85 77 12 4a d.i2pt.dd %f14,%f16,%f18 |
14c: 00 00 00 a0 shl %r0,%r0,%r0 |
150: 06 56 6c 49 d.i2ap1.ss %f10,%f11,%f12 |
154: 00 00 00 a0 shl %r0,%r0,%r0 |
158: 86 76 f0 49 d.i2ap1.sd %f14,%f15,%f16 |
15c: 00 00 00 a0 shl %r0,%r0,%r0 |
160: 86 87 54 4a d.i2ap1.dd %f16,%f18,%f20 |
164: 00 00 00 a0 shl %r0,%r0,%r0 |
168: 07 6e cf 49 d.i2apt.ss %f13,%f14,%f15 |
16c: 00 00 00 a0 shl %r0,%r0,%r0 |
170: 87 8e 53 4a d.i2apt.sd %f17,%f18,%f19 |
174: 00 00 00 a0 shl %r0,%r0,%r0 |
178: 87 97 96 4a d.i2apt.dd %f18,%f20,%f22 |
17c: 00 00 00 a0 shl %r0,%r0,%r0 |
180: 08 76 f0 49 d.rat1p2.ss %f14,%f15,%f16 |
184: 00 00 00 a0 shl %r0,%r0,%r0 |
188: 88 a6 b6 4a d.rat1p2.sd %f20,%f21,%f22 |
18c: 00 00 00 a0 shl %r0,%r0,%r0 |
190: 88 a7 d8 4a d.rat1p2.dd %f20,%f22,%f24 |
194: 00 00 00 a0 shl %r0,%r0,%r0 |
198: 09 7e 11 4a d.m12apm.ss %f15,%f16,%f17 |
19c: 00 00 00 a0 shl %r0,%r0,%r0 |
1a0: 89 be 19 4b d.m12apm.sd %f23,%f24,%f25 |
1a4: 00 00 00 a0 shl %r0,%r0,%r0 |
1a8: 89 b7 1a 4b d.m12apm.dd %f22,%f24,%f26 |
1ac: 00 00 00 a0 shl %r0,%r0,%r0 |
1b0: 0a 96 74 4a d.ra1p2.ss %f18,%f19,%f20 |
1b4: 00 00 00 a0 shl %r0,%r0,%r0 |
1b8: 8a d6 7c 4b d.ra1p2.sd %f26,%f27,%f28 |
1bc: 00 00 00 a0 shl %r0,%r0,%r0 |
1c0: 8a a7 d8 4a d.ra1p2.dd %f20,%f22,%f24 |
1c4: 00 00 00 a0 shl %r0,%r0,%r0 |
1c8: 0b 9e 95 4a d.m12ttpa.ss %f19,%f20,%f21 |
1cc: 00 00 00 a0 shl %r0,%r0,%r0 |
1d0: 8b ee df 4b d.m12ttpa.sd %f29,%f30,%f31 |
1d4: 00 00 00 a0 shl %r0,%r0,%r0 |
1d8: 8b b7 1a 4b d.m12ttpa.dd %f22,%f24,%f26 |
1dc: 00 00 00 a0 shl %r0,%r0,%r0 |
1e0: 0c a6 b6 4a d.iat1p2.ss %f20,%f21,%f22 |
1e4: 00 00 00 a0 shl %r0,%r0,%r0 |
1e8: 8c 06 22 48 d.iat1p2.sd %f0,%f1,%f2 |
1ec: 00 00 00 a0 shl %r0,%r0,%r0 |
1f0: 8c c7 5c 4b d.iat1p2.dd %f24,%f26,%f28 |
1f4: 00 00 00 a0 shl %r0,%r0,%r0 |
1f8: 0d ae d7 4a d.m12tpm.ss %f21,%f22,%f23 |
1fc: 00 00 00 a0 shl %r0,%r0,%r0 |
200: 8d 1e 85 48 d.m12tpm.sd %f3,%f4,%f5 |
204: 00 00 00 a0 shl %r0,%r0,%r0 |
208: 8d f7 02 48 d.m12tpm.dd %f30,%f0,%f2 |
20c: 00 00 00 a0 shl %r0,%r0,%r0 |
210: 0e b6 f8 4a d.ia1p2.ss %f22,%f23,%f24 |
214: 00 00 00 a0 shl %r0,%r0,%r0 |
218: 8e 36 e8 48 d.ia1p2.sd %f6,%f7,%f8 |
21c: 00 00 00 a0 shl %r0,%r0,%r0 |
220: 8e 27 c8 48 d.ia1p2.dd %f4,%f6,%f8 |
224: 00 00 00 a0 shl %r0,%r0,%r0 |
228: 0f be 19 4b d.m12tpa.ss %f23,%f24,%f25 |
22c: 00 00 00 a0 shl %r0,%r0,%r0 |
230: 8f 4e 4b 49 d.m12tpa.sd %f9,%f10,%f11 |
234: 00 00 00 a0 shl %r0,%r0,%r0 |
238: 8f 37 0a 49 d.m12tpa.dd %f6,%f8,%f10 |
23c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/dual02-err.l
0,0 → 1,2
.*: Assembler messages: |
.*:7: Error: 'd\.fadd\.ss' must be 8-byte aligned |
/testsuite/gas/i860/ldst01.s
0,0 → 1,35
# ld.l (no relocations here) |
.text |
|
ld.l 0(%r0),%r0 |
ld.l 124(%r1),%r31 |
ld.l 256(%r2),%r30 |
ld.l 512(%r3),%r29 |
ld.l 1024(%r4),%r28 |
ld.l 4096(%r5),%r27 |
ld.l 8192(%r6),%r26 |
ld.l 16384(%r7),%r25 |
ld.l -16384(%r8),%r24 |
ld.l -8192(%r9),%r23 |
ld.l -4096(%r10),%r22 |
ld.l -1024(%r11),%r21 |
ld.l -508(%r12),%r20 |
ld.l -248(%r13),%r19 |
ld.l -4(%r14),%r18 |
|
ld.l %r5(%r0),%r0 |
ld.l %r6(%r1),%r31 |
ld.l %r7(%r2),%r30 |
ld.l %r8(%r3),%r29 |
ld.l %r9(%r4),%r28 |
ld.l %r0(%r5),%r27 |
ld.l %r1(%r6),%r26 |
ld.l %r12(%r7),%r25 |
ld.l %r13(%r8),%r24 |
ld.l %r14(%r9),%r23 |
ld.l %r15(%r10),%r22 |
ld.l %r16(%r11),%r21 |
ld.l %r17(%r12),%r20 |
ld.l %r28(%r13),%r19 |
ld.l %r31(%r14),%r18 |
|
/testsuite/gas/i860/dir-align01.s
0,0 → 1,11
# Test that .text section alignments use nops (0xA0000000) to fill |
# rather than 0. |
.text |
adds %r4,%r5,%r6 |
.align 16 |
adds %r10,%r11,%r12 |
fmlow.dd %f22,%f24,%f26 |
pfadd.ss %f14,%f15,%f16 |
pfadd.sd %f17,%f18,%f20 |
|
|
/testsuite/gas/i860/ldst03.s
0,0 → 1,39
# ld.b (no relocations here) |
.text |
|
ld.b 0(%r0),%r0 |
ld.b 1(%r1),%r31 |
ld.b 2(%r2),%r30 |
ld.b 513(%r3),%r29 |
ld.b 1028(%r4),%r28 |
ld.b 4090(%r5),%r27 |
ld.b 8190(%r6),%r26 |
ld.b 16385(%r7),%r25 |
ld.b 32007(%r7),%r25 |
ld.b 32767(%r7),%r25 |
ld.b -32768(%r7),%r25 |
ld.b -32767(%r7),%r25 |
ld.b -16383(%r8),%r24 |
ld.b -8101(%r9),%r23 |
ld.b -4091(%r10),%r22 |
ld.b -1023(%r11),%r21 |
ld.b -509(%r12),%r20 |
ld.b -23(%r13),%r19 |
ld.b -1(%r14),%r18 |
|
ld.b %r5(%r0),%r0 |
ld.b %r6(%r1),%r31 |
ld.b %r7(%r2),%r30 |
ld.b %r8(%r3),%r29 |
ld.b %r9(%r4),%r28 |
ld.b %r0(%r5),%r27 |
ld.b %r1(%r6),%r26 |
ld.b %r12(%r7),%r25 |
ld.b %r13(%r8),%r24 |
ld.b %r14(%r9),%r23 |
ld.b %r15(%r10),%r22 |
ld.b %r16(%r11),%r21 |
ld.b %r17(%r12),%r20 |
ld.b %r28(%r13),%r19 |
ld.b %r31(%r14),%r18 |
|
/testsuite/gas/i860/dir-intel02.d
0,0 → 1,15
#as: -mintel-syntax |
#objdump: -d |
#name: i860 dir-intel02 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 34 12 1f ec orh 0x1234,%r0,%r31 |
4: 78 56 f8 e7 or 0x5678,%r31,%r24 |
8: 00 c0 28 91 adds %r24,%r9,%r8 |
c: f0 f0 05 ec orh 0xf0f0,%r0,%r5 |
10: 5a 5a b8 e4 or 0x5a5a,%r5,%r24 |
14: 00 c0 28 91 adds %r24,%r9,%r8 |
/testsuite/gas/i860/ldst05.s
0,0 → 1,19
# st.s (no relocations here) |
.text |
|
st.s %r0,0(%r0) |
st.s %r31,122(%r1) |
st.s %r30,258(%r2) |
st.s %r29,512(%r3) |
st.s %r28,1028(%r4) |
st.s %r27,4090(%r5) |
st.s %r26,8190(%r6) |
st.s %r25,16384(%r7) |
st.s %r24,-16384(%r8) |
st.s %r23,-8192(%r9) |
st.s %r22,-4096(%r10) |
st.s %r21,-1024(%r11) |
st.s %r20,-508(%r12) |
st.s %r19,-242(%r13) |
st.s %r18,-2(%r14) |
|
/testsuite/gas/i860/dual02-err.s
0,0 → 1,9
# Dual-mode pairs must be aligned on an 8-byte boundary. This tests |
# that an error is reported if not properly aligned. |
|
.text |
.align 8 |
nop |
d.fadd.ss %f3,%f5,%f7 |
addu %r4,%r5,%r6 |
|
/testsuite/gas/i860/i860.exp
0,0 → 1,45
# i860 assembler testsuite. |
|
if [istarget i860-*-*] { |
run_dump_test "bitwise" |
run_dump_test "branch" |
run_dump_test "bte" |
run_dump_test "dir-align01" |
run_dump_test "dir-intel01" |
run_dump_test "dir-intel02" |
run_list_test "dir-intel03-err" "" |
run_dump_test "dual01" |
run_list_test "dual02-err" "" |
run_dump_test "dual03" |
run_dump_test "fldst01" |
run_dump_test "fldst02" |
run_dump_test "fldst03" |
run_dump_test "fldst04" |
run_dump_test "fldst05" |
run_dump_test "fldst06" |
run_dump_test "fldst07" |
run_dump_test "fldst08" |
run_dump_test "float01" |
run_dump_test "float02" |
run_dump_test "float03" |
run_dump_test "float04" |
run_dump_test "form" |
run_dump_test "iarith" |
run_dump_test "ldst01" |
run_dump_test "ldst02" |
run_dump_test "ldst03" |
run_dump_test "ldst04" |
run_dump_test "ldst05" |
run_dump_test "ldst06" |
run_dump_test "pfam" |
run_dump_test "pfmam" |
run_dump_test "pfmsm" |
run_dump_test "pfsm" |
run_dump_test "pseudo-ops01" |
run_dump_test "regress01" |
run_dump_test "shift" |
run_dump_test "simd" |
run_dump_test "system" |
run_dump_test "xp" |
} |
|
/testsuite/gas/i860/pfmsm.s
0,0 → 1,182
# pfmsm.p family (p={ss,sd,dd}) |
|
.text |
|
# pfmsm without dual bit |
mr2s1.ss %f0,%f1,%f2 |
mr2s1.sd %f3,%f4,%f5 |
mr2s1.dd %f0,%f2,%f4 |
|
mr2st.ss %f1,%f2,%f3 |
mr2st.sd %f4,%f5,%f6 |
mr2st.dd %f2,%f4,%f6 |
|
mr2ms1.ss %f2,%f3,%f4 |
mr2ms1.sd %f6,%f7,%f8 |
mr2ms1.dd %f4,%f6,%f8 |
|
mr2mst.ss %f3,%f4,%f5 |
mr2mst.sd %f7,%f8,%f9 |
mr2mst.dd %f6,%f8,%f10 |
|
mi2s1.ss %f4,%f5,%f6 |
mi2s1.sd %f8,%f9,%f10 |
mi2s1.dd %f12,%f14,%f16 |
|
mi2st.ss %f7,%f8,%f9 |
mi2st.sd %f11,%f12,%f13 |
mi2st.dd %f14,%f16,%f18 |
|
mi2ms1.ss %f10,%f11,%f12 |
mi2ms1.sd %f14,%f15,%f16 |
mi2ms1.dd %f16,%f18,%f20 |
|
mi2mst.ss %f13,%f14,%f15 |
mi2mst.sd %f17,%f18,%f19 |
mi2mst.dd %f18,%f20,%f22 |
|
mrmt1s2.ss %f14,%f15,%f16 |
mrmt1s2.sd %f20,%f21,%f22 |
mrmt1s2.dd %f20,%f22,%f24 |
|
mm12msm.ss %f15,%f16,%f17 |
mm12msm.sd %f23,%f24,%f25 |
mm12msm.dd %f22,%f24,%f26 |
|
mrm1s2.ss %f18,%f19,%f20 |
mrm1s2.sd %f26,%f27,%f28 |
mrm1s2.dd %f20,%f22,%f24 |
|
mm12ttsm.ss %f19,%f20,%f21 |
mm12ttsm.sd %f29,%f30,%f31 |
mm12ttsm.dd %f22,%f24,%f26 |
|
mimt1s2.ss %f20,%f21,%f22 |
mimt1s2.sd %f0,%f1,%f2 |
mimt1s2.dd %f24,%f26,%f28 |
|
mm12tsm.ss %f21,%f22,%f23 |
mm12tsm.sd %f3,%f4,%f5 |
mm12tsm.dd %f30,%f0,%f2 |
|
mim1s2.ss %f22,%f23,%f24 |
mim1s2.sd %f6,%f7,%f8 |
mim1s2.dd %f4,%f6,%f8 |
|
m12tsa.ss %f23,%f24,%f25 |
m12tsa.sd %f9,%f10,%f11 |
m12tsa.dd %f6,%f8,%f10 |
|
# pfmsm with dual bit |
d.mr2s1.ss %f0,%f1,%f2 |
nop |
d.mr2s1.sd %f3,%f4,%f5 |
nop |
d.mr2s1.dd %f0,%f2,%f4 |
nop |
|
d.mr2st.ss %f1,%f2,%f3 |
nop |
d.mr2st.sd %f4,%f5,%f6 |
nop |
d.mr2st.dd %f2,%f4,%f6 |
nop |
|
d.mr2ms1.ss %f2,%f3,%f4 |
nop |
d.mr2ms1.sd %f6,%f7,%f8 |
nop |
d.mr2ms1.dd %f4,%f6,%f8 |
nop |
|
d.mr2mst.ss %f3,%f4,%f5 |
nop |
d.mr2mst.sd %f7,%f8,%f9 |
nop |
d.mr2mst.dd %f6,%f8,%f10 |
nop |
|
d.mi2s1.ss %f4,%f5,%f6 |
nop |
d.mi2s1.sd %f8,%f9,%f10 |
nop |
d.mi2s1.dd %f12,%f14,%f16 |
nop |
|
d.mi2st.ss %f7,%f8,%f9 |
nop |
d.mi2st.sd %f11,%f12,%f13 |
nop |
d.mi2st.dd %f14,%f16,%f18 |
nop |
|
d.mi2ms1.ss %f10,%f11,%f12 |
nop |
d.mi2ms1.sd %f14,%f15,%f16 |
nop |
d.mi2ms1.dd %f16,%f18,%f20 |
nop |
|
d.mi2mst.ss %f13,%f14,%f15 |
nop |
d.mi2mst.sd %f17,%f18,%f19 |
nop |
d.mi2mst.dd %f18,%f20,%f22 |
nop |
|
d.mrmt1s2.ss %f14,%f15,%f16 |
nop |
d.mrmt1s2.sd %f20,%f21,%f22 |
nop |
d.mrmt1s2.dd %f20,%f22,%f24 |
nop |
|
d.mm12msm.ss %f15,%f16,%f17 |
nop |
d.mm12msm.sd %f23,%f24,%f25 |
nop |
d.mm12msm.dd %f22,%f24,%f26 |
nop |
|
d.mrm1s2.ss %f18,%f19,%f20 |
nop |
d.mrm1s2.sd %f26,%f27,%f28 |
nop |
d.mrm1s2.dd %f20,%f22,%f24 |
nop |
|
d.mm12ttsm.ss %f19,%f20,%f21 |
nop |
d.mm12ttsm.sd %f29,%f30,%f31 |
nop |
d.mm12ttsm.dd %f22,%f24,%f26 |
nop |
|
d.mimt1s2.ss %f20,%f21,%f22 |
nop |
d.mimt1s2.sd %f0,%f1,%f2 |
nop |
d.mimt1s2.dd %f24,%f26,%f28 |
nop |
|
d.mm12tsm.ss %f21,%f22,%f23 |
nop |
d.mm12tsm.sd %f3,%f4,%f5 |
nop |
d.mm12tsm.dd %f30,%f0,%f2 |
nop |
|
d.mim1s2.ss %f22,%f23,%f24 |
nop |
d.mim1s2.sd %f6,%f7,%f8 |
nop |
d.mim1s2.dd %f4,%f6,%f8 |
nop |
|
d.m12tsa.ss %f23,%f24,%f25 |
nop |
d.m12tsa.sd %f9,%f10,%f11 |
nop |
d.m12tsa.dd %f6,%f8,%f10 |
nop |
|
/testsuite/gas/i860/pfam.s
0,0 → 1,182
# pfam.p family (p={ss,sd,dd}) |
|
.text |
|
# pfam without dual bit. |
r2p1.ss %f0,%f1,%f2 |
r2p1.sd %f3,%f4,%f5 |
r2p1.dd %f0,%f2,%f4 |
|
r2pt.ss %f1,%f2,%f3 |
r2pt.sd %f4,%f5,%f6 |
r2pt.dd %f2,%f4,%f6 |
|
r2ap1.ss %f2,%f3,%f4 |
r2ap1.sd %f6,%f7,%f8 |
r2ap1.dd %f4,%f6,%f8 |
|
r2apt.ss %f3,%f4,%f5 |
r2apt.sd %f7,%f8,%f9 |
r2apt.dd %f6,%f8,%f10 |
|
i2p1.ss %f4,%f5,%f6 |
i2p1.sd %f8,%f9,%f10 |
i2p1.dd %f12,%f14,%f16 |
|
i2pt.ss %f7,%f8,%f9 |
i2pt.sd %f11,%f12,%f13 |
i2pt.dd %f14,%f16,%f18 |
|
i2ap1.ss %f10,%f11,%f12 |
i2ap1.sd %f14,%f15,%f16 |
i2ap1.dd %f16,%f18,%f20 |
|
i2apt.ss %f13,%f14,%f15 |
i2apt.sd %f17,%f18,%f19 |
i2apt.dd %f18,%f20,%f22 |
|
rat1p2.ss %f14,%f15,%f16 |
rat1p2.sd %f20,%f21,%f22 |
rat1p2.dd %f20,%f22,%f24 |
|
m12apm.ss %f15,%f16,%f17 |
m12apm.sd %f23,%f24,%f25 |
m12apm.dd %f22,%f24,%f26 |
|
ra1p2.ss %f18,%f19,%f20 |
ra1p2.sd %f26,%f27,%f28 |
ra1p2.dd %f20,%f22,%f24 |
|
m12ttpa.ss %f19,%f20,%f21 |
m12ttpa.sd %f29,%f30,%f31 |
m12ttpa.dd %f22,%f24,%f26 |
|
iat1p2.ss %f20,%f21,%f22 |
iat1p2.sd %f0,%f1,%f2 |
iat1p2.dd %f24,%f26,%f28 |
|
m12tpm.ss %f21,%f22,%f23 |
m12tpm.sd %f3,%f4,%f5 |
m12tpm.dd %f30,%f0,%f2 |
|
ia1p2.ss %f22,%f23,%f24 |
ia1p2.sd %f6,%f7,%f8 |
ia1p2.dd %f4,%f6,%f8 |
|
m12tpa.ss %f23,%f24,%f25 |
m12tpa.sd %f9,%f10,%f11 |
m12tpa.dd %f6,%f8,%f10 |
|
# pfam with dual bit. |
d.r2p1.ss %f0,%f1,%f2 |
nop |
d.r2p1.sd %f3,%f4,%f5 |
nop |
d.r2p1.dd %f0,%f2,%f4 |
nop |
|
d.r2pt.ss %f1,%f2,%f3 |
nop |
d.r2pt.sd %f4,%f5,%f6 |
nop |
d.r2pt.dd %f2,%f4,%f6 |
nop |
|
d.r2ap1.ss %f2,%f3,%f4 |
nop |
d.r2ap1.sd %f6,%f7,%f8 |
nop |
d.r2ap1.dd %f4,%f6,%f8 |
nop |
|
d.r2apt.ss %f3,%f4,%f5 |
nop |
d.r2apt.sd %f7,%f8,%f9 |
nop |
d.r2apt.dd %f6,%f8,%f10 |
nop |
|
d.i2p1.ss %f4,%f5,%f6 |
nop |
d.i2p1.sd %f8,%f9,%f10 |
nop |
d.i2p1.dd %f12,%f14,%f16 |
nop |
|
d.i2pt.ss %f7,%f8,%f9 |
nop |
d.i2pt.sd %f11,%f12,%f13 |
nop |
d.i2pt.dd %f14,%f16,%f18 |
nop |
|
d.i2ap1.ss %f10,%f11,%f12 |
nop |
d.i2ap1.sd %f14,%f15,%f16 |
nop |
d.i2ap1.dd %f16,%f18,%f20 |
nop |
|
d.i2apt.ss %f13,%f14,%f15 |
nop |
d.i2apt.sd %f17,%f18,%f19 |
nop |
d.i2apt.dd %f18,%f20,%f22 |
nop |
|
d.rat1p2.ss %f14,%f15,%f16 |
nop |
d.rat1p2.sd %f20,%f21,%f22 |
nop |
d.rat1p2.dd %f20,%f22,%f24 |
nop |
|
d.m12apm.ss %f15,%f16,%f17 |
nop |
d.m12apm.sd %f23,%f24,%f25 |
nop |
d.m12apm.dd %f22,%f24,%f26 |
nop |
|
d.ra1p2.ss %f18,%f19,%f20 |
nop |
d.ra1p2.sd %f26,%f27,%f28 |
nop |
d.ra1p2.dd %f20,%f22,%f24 |
nop |
|
d.m12ttpa.ss %f19,%f20,%f21 |
nop |
d.m12ttpa.sd %f29,%f30,%f31 |
nop |
d.m12ttpa.dd %f22,%f24,%f26 |
nop |
|
d.iat1p2.ss %f20,%f21,%f22 |
nop |
d.iat1p2.sd %f0,%f1,%f2 |
nop |
d.iat1p2.dd %f24,%f26,%f28 |
nop |
|
d.m12tpm.ss %f21,%f22,%f23 |
nop |
d.m12tpm.sd %f3,%f4,%f5 |
nop |
d.m12tpm.dd %f30,%f0,%f2 |
nop |
|
d.ia1p2.ss %f22,%f23,%f24 |
nop |
d.ia1p2.sd %f6,%f7,%f8 |
nop |
d.ia1p2.dd %f4,%f6,%f8 |
nop |
|
d.m12tpa.ss %f23,%f24,%f25 |
nop |
d.m12tpa.sd %f9,%f10,%f11 |
nop |
d.m12tpa.dd %f6,%f8,%f10 |
nop |
|
/testsuite/gas/i860/float02.d
0,0 → 1,39
#as: |
#objdump: -dr |
#name: i860 float02 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 22 00 01 48 frcp.ss %f0,%f1 |
4: a2 00 44 48 frcp.sd %f2,%f4 |
8: a2 01 c8 48 frcp.dd %f6,%f8 |
c: 23 00 a6 48 frsqr.ss %f5,%f6 |
10: a3 00 0a 49 frsqr.sd %f8,%f10 |
14: a3 01 8e 49 frsqr.dd %f12,%f14 |
18: 33 08 1f 48 famov.ss %f1,%f31 |
1c: 33 11 1e 48 famov.ds %f2,%f30 |
20: b3 38 10 48 famov.sd %f7,%f16 |
24: b3 c1 0c 48 famov.dd %f24,%f12 |
28: 22 02 01 48 d.frcp.ss %f0,%f1 |
2c: 00 00 00 a0 shl %r0,%r0,%r0 |
30: a2 02 5e 48 d.frcp.sd %f2,%f30 |
34: 00 00 00 a0 shl %r0,%r0,%r0 |
38: a2 03 c8 48 d.frcp.dd %f6,%f8 |
3c: 00 00 00 a0 shl %r0,%r0,%r0 |
40: 23 02 a6 48 d.frsqr.ss %f5,%f6 |
44: 00 00 00 a0 shl %r0,%r0,%r0 |
48: a3 02 18 49 d.frsqr.sd %f8,%f24 |
4c: 00 00 00 a0 shl %r0,%r0,%r0 |
50: a3 03 8e 49 d.frsqr.dd %f12,%f14 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: 33 2a 0d 48 d.famov.ss %f5,%f13 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: 33 f3 15 48 d.famov.ds %f30,%f21 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: b3 ba 16 48 d.famov.sd %f23,%f22 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: b3 03 0c 48 d.famov.dd %f0,%f12 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/dir-intel02.s
0,0 → 1,13
// Intel assembler directives: |
// Test that the .atmp directive is recognized and functions. |
|
.text |
|
.atmp r31 |
or 0x12345678,r0,r24 |
adds r24,r9,r8 |
|
.atmp r5 |
or 0xf0f05a5a,r0,r24 |
adds r24,r9,r8 |
|
/testsuite/gas/i860/float04.d
0,0 → 1,39
#as: |
#objdump: -dr |
#name: i860 float04 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 40 08 03 48 fxfr %f1,%fp |
4: 40 40 1e 48 fxfr %f8,%r30 |
8: 40 f8 12 48 fxfr %f31,%r18 |
c: 00 48 1f 08 ixfr %r9,%f31 |
10: 00 b8 10 08 ixfr %r23,%f16 |
14: 00 00 00 08 ixfr %r0,%f0 |
18: 49 00 22 48 fiadd.ss %f0,%f1,%f2 |
1c: c9 31 0a 49 fiadd.dd %f6,%f8,%f10 |
20: 4d 28 c7 48 fisub.ss %f5,%f6,%f7 |
24: cd 61 d0 49 fisub.dd %f12,%f14,%f16 |
28: 49 74 f0 49 pfiadd.ss %f14,%f15,%f16 |
2c: c9 b5 1a 4b pfiadd.dd %f22,%f24,%f26 |
30: 4d a4 b6 4a pfisub.ss %f20,%f21,%f22 |
34: cd e5 c2 4b pfisub.dd %f28,%f30,%f2 |
38: 49 02 22 48 d.fiadd.ss %f0,%f1,%f2 |
3c: 00 00 00 a0 shl %r0,%r0,%r0 |
40: c9 33 0a 49 d.fiadd.dd %f6,%f8,%f10 |
44: 00 00 00 a0 shl %r0,%r0,%r0 |
48: 4d 2a c7 48 d.fisub.ss %f5,%f6,%f7 |
4c: 00 00 00 a0 shl %r0,%r0,%r0 |
50: cd 63 d0 49 d.fisub.dd %f12,%f14,%f16 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: 49 76 f0 49 d.pfiadd.ss %f14,%f15,%f16 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: c9 b7 1a 4b d.pfiadd.dd %f22,%f24,%f26 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: 4d a6 b6 4a d.pfisub.ss %f20,%f21,%f22 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: cd e7 c2 4b d.pfisub.dd %f28,%f30,%f2 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/fldst02.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst02 (fld.d) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 24 fld.d 0\(%r0\),%f0 |
4: 80 00 3e 24 fld.d 128\(%r1\),%f30 |
8: 00 01 5c 24 fld.d 256\(%sp\),%f28 |
c: 00 02 7a 24 fld.d 512\(%fp\),%f26 |
10: 00 04 98 24 fld.d 1024\(%r4\),%f24 |
14: 00 10 b6 24 fld.d 4096\(%r5\),%f22 |
18: 00 20 d4 24 fld.d 8192\(%r6\),%f20 |
1c: 00 40 f2 24 fld.d 16384\(%r7\),%f18 |
20: f8 7f f0 24 fld.d 32760\(%r7\),%f16 |
24: 00 80 ee 24 fld.d -32768\(%r7\),%f14 |
28: 00 c0 0c 25 fld.d -16384\(%r8\),%f12 |
2c: 00 e0 2a 25 fld.d -8192\(%r9\),%f10 |
30: 00 f0 48 25 fld.d -4096\(%r10\),%f8 |
34: 00 fc 66 25 fld.d -1024\(%r11\),%f6 |
38: 00 fe 84 25 fld.d -512\(%r12\),%f4 |
3c: 08 ff a2 25 fld.d -248\(%r13\),%f2 |
40: f8 ff c0 25 fld.d -8\(%r14\),%f0 |
44: 01 00 00 24 fld.d 0\(%r0\)\+\+,%f0 |
48: 81 00 22 24 fld.d 128\(%r1\)\+\+,%f2 |
4c: 01 01 44 24 fld.d 256\(%sp\)\+\+,%f4 |
50: 01 02 66 24 fld.d 512\(%fp\)\+\+,%f6 |
54: 01 04 88 24 fld.d 1024\(%r4\)\+\+,%f8 |
58: 01 10 aa 24 fld.d 4096\(%r5\)\+\+,%f10 |
5c: 01 20 cc 24 fld.d 8192\(%r6\)\+\+,%f12 |
60: 01 40 ee 24 fld.d 16384\(%r7\)\+\+,%f14 |
64: f9 7f f0 24 fld.d 32760\(%r7\)\+\+,%f16 |
68: 01 80 f2 24 fld.d -32768\(%r7\)\+\+,%f18 |
6c: 01 c0 14 25 fld.d -16384\(%r8\)\+\+,%f20 |
70: 01 e0 36 25 fld.d -8192\(%r9\)\+\+,%f22 |
74: 01 f0 58 25 fld.d -4096\(%r10\)\+\+,%f24 |
78: 01 fc 7a 25 fld.d -1024\(%r11\)\+\+,%f26 |
7c: 01 fe 9c 25 fld.d -512\(%r12\)\+\+,%f28 |
80: 09 ff be 25 fld.d -248\(%r13\)\+\+,%f30 |
84: f9 ff d0 25 fld.d -8\(%r14\)\+\+,%f16 |
88: 00 28 00 20 fld.d %r5\(%r0\),%f0 |
8c: 00 30 3e 20 fld.d %r6\(%r1\),%f30 |
90: 00 38 5c 20 fld.d %r7\(%sp\),%f28 |
94: 00 40 7a 20 fld.d %r8\(%fp\),%f26 |
98: 00 48 98 20 fld.d %r9\(%r4\),%f24 |
9c: 00 00 b6 20 fld.d %r0\(%r5\),%f22 |
a0: 00 08 d4 20 fld.d %r1\(%r6\),%f20 |
a4: 00 60 f2 20 fld.d %r12\(%r7\),%f18 |
a8: 00 68 10 21 fld.d %r13\(%r8\),%f16 |
ac: 00 70 2e 21 fld.d %r14\(%r9\),%f14 |
b0: 00 78 4c 21 fld.d %r15\(%r10\),%f12 |
b4: 00 80 6a 21 fld.d %r16\(%r11\),%f10 |
b8: 00 88 88 21 fld.d %r17\(%r12\),%f8 |
bc: 00 e0 a6 21 fld.d %r28\(%r13\),%f6 |
c0: 00 f8 c4 21 fld.d %r31\(%r14\),%f4 |
c4: 01 28 00 20 fld.d %r5\(%r0\)\+\+,%f0 |
c8: 01 30 22 20 fld.d %r6\(%r1\)\+\+,%f2 |
cc: 01 38 44 20 fld.d %r7\(%sp\)\+\+,%f4 |
d0: 01 40 66 20 fld.d %r8\(%fp\)\+\+,%f6 |
d4: 01 48 88 20 fld.d %r9\(%r4\)\+\+,%f8 |
d8: 01 00 aa 20 fld.d %r0\(%r5\)\+\+,%f10 |
dc: 01 08 cc 20 fld.d %r1\(%r6\)\+\+,%f12 |
e0: 01 60 ee 20 fld.d %r12\(%r7\)\+\+,%f14 |
e4: 01 68 10 21 fld.d %r13\(%r8\)\+\+,%f16 |
e8: 01 70 32 21 fld.d %r14\(%r9\)\+\+,%f18 |
ec: 01 78 54 21 fld.d %r15\(%r10\)\+\+,%f20 |
f0: 01 80 76 21 fld.d %r16\(%r11\)\+\+,%f22 |
f4: 01 88 98 21 fld.d %r17\(%r12\)\+\+,%f24 |
f8: 01 e0 ba 21 fld.d %r28\(%r13\)\+\+,%f26 |
fc: 01 f8 de 21 fld.d %r31\(%r14\)\+\+,%f30 |
/testsuite/gas/i860/iarith.d
0,0 → 1,97
#as: |
#objdump: -dr |
#name: i860 iarith |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 22 80 addu %r0,%r1,%sp |
4: 00 18 85 80 addu %fp,%r4,%r5 |
8: 00 30 e8 80 addu %r6,%r7,%r8 |
c: 00 48 4b 81 addu %r9,%r10,%r11 |
10: 00 f8 ae 81 addu %r31,%r13,%r14 |
14: 00 78 11 82 addu %r15,%r16,%r17 |
18: 00 90 74 82 addu %r18,%r19,%r20 |
1c: 00 a8 d7 82 addu %r21,%r22,%r23 |
20: 00 c0 3f 83 addu %r24,%r25,%r31 |
24: 00 d8 9d 83 addu %r27,%r28,%r29 |
28: 00 f0 e0 83 addu %r30,%r31,%r0 |
2c: 00 00 22 90 adds %r0,%r1,%sp |
30: 00 18 85 90 adds %fp,%r4,%r5 |
34: 00 30 e8 90 adds %r6,%r7,%r8 |
38: 00 48 4b 91 adds %r9,%r10,%r11 |
3c: 00 f8 ae 91 adds %r31,%r13,%r14 |
40: 00 78 11 92 adds %r15,%r16,%r17 |
44: 00 90 74 92 adds %r18,%r19,%r20 |
48: 00 a8 d7 92 adds %r21,%r22,%r23 |
4c: 00 c0 3f 93 adds %r24,%r25,%r31 |
50: 00 d8 9d 93 adds %r27,%r28,%r29 |
54: 00 f0 e0 93 adds %r30,%r31,%r0 |
58: 00 00 22 88 subu %r0,%r1,%sp |
5c: 00 18 85 88 subu %fp,%r4,%r5 |
60: 00 30 e8 88 subu %r6,%r7,%r8 |
64: 00 48 4b 89 subu %r9,%r10,%r11 |
68: 00 f8 ae 89 subu %r31,%r13,%r14 |
6c: 00 78 11 8a subu %r15,%r16,%r17 |
70: 00 90 74 8a subu %r18,%r19,%r20 |
74: 00 a8 d7 8a subu %r21,%r22,%r23 |
78: 00 c0 3f 8b subu %r24,%r25,%r31 |
7c: 00 d8 9d 8b subu %r27,%r28,%r29 |
80: 00 f0 e0 8b subu %r30,%r31,%r0 |
84: 00 00 22 98 subs %r0,%r1,%sp |
88: 00 18 85 98 subs %fp,%r4,%r5 |
8c: 00 30 e8 98 subs %r6,%r7,%r8 |
90: 00 48 4b 99 subs %r9,%r10,%r11 |
94: 00 f8 ae 99 subs %r31,%r13,%r14 |
98: 00 78 11 9a subs %r15,%r16,%r17 |
9c: 00 90 74 9a subs %r18,%r19,%r20 |
a0: 00 a8 d7 9a subs %r21,%r22,%r23 |
a4: 00 c0 3f 9b subs %r24,%r25,%r31 |
a8: 00 d8 9d 9b subs %r27,%r28,%r29 |
ac: 00 f0 e0 9b subs %r30,%r31,%r0 |
b0: 00 00 22 84 addu 0,%r1,%sp |
b4: 00 20 85 84 addu 8192,%r4,%r5 |
b8: f5 13 e8 84 addu 5109,%r7,%r8 |
bc: ff 7f 4b 85 addu 32767,%r10,%r11 |
c0: 00 80 ae 85 addu -32768,%r13,%r14 |
c4: 00 e0 11 86 addu -8192,%r16,%r17 |
c8: ff ff 74 86 addu -1,%r19,%r20 |
cc: cd ab d7 86 addu -21555,%r22,%r23 |
d0: 34 12 3a 87 addu 4660,%r25,%r26 |
d4: 00 00 9d 87 addu 0,%r28,%r29 |
d8: 03 00 e0 87 addu 3,%r31,%r0 |
dc: 00 00 22 94 adds 0,%r1,%sp |
e0: 00 20 85 94 adds 8192,%r4,%r5 |
e4: f5 13 e8 94 adds 5109,%r7,%r8 |
e8: ff 7f 4b 95 adds 32767,%r10,%r11 |
ec: 00 80 ae 95 adds -32768,%r13,%r14 |
f0: 00 e0 11 96 adds -8192,%r16,%r17 |
f4: ff ff 74 96 adds -1,%r19,%r20 |
f8: cd ab d7 96 adds -21555,%r22,%r23 |
fc: 34 12 3a 97 adds 4660,%r25,%r26 |
100: 00 00 9d 97 adds 0,%r28,%r29 |
104: 03 00 e0 97 adds 3,%r31,%r0 |
108: 01 00 22 8c subu 1,%r1,%sp |
10c: 01 20 85 8c subu 8193,%r4,%r5 |
110: f6 13 e8 8c subu 5110,%r7,%r8 |
114: ff 7f 4b 8d subu 32767,%r10,%r11 |
118: 00 80 ae 8d subu -32768,%r13,%r14 |
11c: 00 e0 11 8e subu -8192,%r16,%r17 |
120: ff ff 74 8e subu -1,%r19,%r20 |
124: cd ab d7 8e subu -21555,%r22,%r23 |
128: 34 12 3a 8f subu 4660,%r25,%r26 |
12c: 00 00 9d 8f subu 0,%r28,%r29 |
130: 03 00 e0 8f subu 3,%r31,%r0 |
134: 01 00 22 9c subs 1,%r1,%sp |
138: 01 20 85 9c subs 8193,%r4,%r5 |
13c: f6 13 e8 9c subs 5110,%r7,%r8 |
140: ff 7f 4b 9d subs 32767,%r10,%r11 |
144: 00 80 ae 9d subs -32768,%r13,%r14 |
148: 00 e0 11 9e subs -8192,%r16,%r17 |
14c: ff ff 74 9e subs -1,%r19,%r20 |
150: cd ab d7 9e subs -21555,%r22,%r23 |
154: 34 12 3a 9f subs 4660,%r25,%r26 |
158: 00 00 9d 9f subs 0,%r28,%r29 |
15c: 03 00 e0 9f subs 3,%r31,%r0 |
/testsuite/gas/i860/fldst04.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst04 (fst.l) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 02 00 00 2c fst.l %f0,0\(%r0\) |
4: 7e 00 3f 2c fst.l %f31,124\(%r1\) |
8: 02 01 5e 2c fst.l %f30,256\(%sp\) |
c: 02 02 7d 2c fst.l %f29,512\(%fp\) |
10: 02 04 9c 2c fst.l %f28,1024\(%r4\) |
14: 02 10 bb 2c fst.l %f27,4096\(%r5\) |
18: 02 20 da 2c fst.l %f26,8192\(%r6\) |
1c: 02 40 f9 2c fst.l %f25,16384\(%r7\) |
20: fe 7f f9 2c fst.l %f25,32764\(%r7\) |
24: 02 80 f7 2c fst.l %f23,-32768\(%r7\) |
28: 02 c0 02 2d fst.l %f2,-16384\(%r8\) |
2c: 02 e0 23 2d fst.l %f3,-8192\(%r9\) |
30: 02 f0 48 2d fst.l %f8,-4096\(%r10\) |
34: 02 fc 69 2d fst.l %f9,-1024\(%r11\) |
38: 06 fe 8c 2d fst.l %f12,-508\(%r12\) |
3c: 0a ff b3 2d fst.l %f19,-248\(%r13\) |
40: fe ff d5 2d fst.l %f21,-4\(%r14\) |
44: 03 00 00 2c fst.l %f0,0\(%r0\)\+\+ |
48: 7f 00 21 2c fst.l %f1,124\(%r1\)\+\+ |
4c: 03 01 42 2c fst.l %f2,256\(%sp\)\+\+ |
50: 03 02 63 2c fst.l %f3,512\(%fp\)\+\+ |
54: 03 04 84 2c fst.l %f4,1024\(%r4\)\+\+ |
58: 03 10 a5 2c fst.l %f5,4096\(%r5\)\+\+ |
5c: 03 20 c6 2c fst.l %f6,8192\(%r6\)\+\+ |
60: 03 40 e7 2c fst.l %f7,16384\(%r7\)\+\+ |
64: ff 7f e8 2c fst.l %f8,32764\(%r7\)\+\+ |
68: 03 80 e9 2c fst.l %f9,-32768\(%r7\)\+\+ |
6c: 03 c0 0a 2d fst.l %f10,-16384\(%r8\)\+\+ |
70: 03 e0 2b 2d fst.l %f11,-8192\(%r9\)\+\+ |
74: 03 f0 4c 2d fst.l %f12,-4096\(%r10\)\+\+ |
78: 03 fc 6d 2d fst.l %f13,-1024\(%r11\)\+\+ |
7c: 07 fe 8e 2d fst.l %f14,-508\(%r12\)\+\+ |
80: 0b ff af 2d fst.l %f15,-248\(%r13\)\+\+ |
84: ff ff d0 2d fst.l %f16,-4\(%r14\)\+\+ |
88: 02 28 00 28 fst.l %f0,%r5\(%r0\) |
8c: 02 30 3f 28 fst.l %f31,%r6\(%r1\) |
90: 02 38 5e 28 fst.l %f30,%r7\(%sp\) |
94: 02 40 7d 28 fst.l %f29,%r8\(%fp\) |
98: 02 48 9c 28 fst.l %f28,%r9\(%r4\) |
9c: 02 00 bb 28 fst.l %f27,%r0\(%r5\) |
a0: 02 08 da 28 fst.l %f26,%r1\(%r6\) |
a4: 02 60 f9 28 fst.l %f25,%r12\(%r7\) |
a8: 02 68 18 29 fst.l %f24,%r13\(%r8\) |
ac: 02 70 37 29 fst.l %f23,%r14\(%r9\) |
b0: 02 78 56 29 fst.l %f22,%r15\(%r10\) |
b4: 02 80 75 29 fst.l %f21,%r16\(%r11\) |
b8: 02 88 94 29 fst.l %f20,%r17\(%r12\) |
bc: 02 e0 b3 29 fst.l %f19,%r28\(%r13\) |
c0: 02 f8 d2 29 fst.l %f18,%r31\(%r14\) |
c4: 03 28 00 28 fst.l %f0,%r5\(%r0\)\+\+ |
c8: 03 30 21 28 fst.l %f1,%r6\(%r1\)\+\+ |
cc: 03 38 42 28 fst.l %f2,%r7\(%sp\)\+\+ |
d0: 03 40 63 28 fst.l %f3,%r8\(%fp\)\+\+ |
d4: 03 48 84 28 fst.l %f4,%r9\(%r4\)\+\+ |
d8: 03 00 a5 28 fst.l %f5,%r0\(%r5\)\+\+ |
dc: 03 08 c6 28 fst.l %f6,%r1\(%r6\)\+\+ |
e0: 03 60 e7 28 fst.l %f7,%r12\(%r7\)\+\+ |
e4: 03 68 08 29 fst.l %f8,%r13\(%r8\)\+\+ |
e8: 03 70 29 29 fst.l %f9,%r14\(%r9\)\+\+ |
ec: 03 78 4a 29 fst.l %f10,%r15\(%r10\)\+\+ |
f0: 03 80 6b 29 fst.l %f11,%r16\(%r11\)\+\+ |
f4: 03 88 8c 29 fst.l %f12,%r17\(%r12\)\+\+ |
f8: 03 e0 ad 29 fst.l %f13,%r28\(%r13\)\+\+ |
fc: 03 f8 ce 29 fst.l %f14,%r31\(%r14\)\+\+ |
/testsuite/gas/i860/fldst06.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst06 (fst.q) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 04 00 00 2c fst.q %f0,0\(%r0\) |
4: 84 00 3c 2c fst.q %f28,128\(%r1\) |
8: 04 01 58 2c fst.q %f24,256\(%sp\) |
c: 04 02 74 2c fst.q %f20,512\(%fp\) |
10: 04 04 90 2c fst.q %f16,1024\(%r4\) |
14: 04 10 ac 2c fst.q %f12,4096\(%r5\) |
18: 04 20 c8 2c fst.q %f8,8192\(%r6\) |
1c: 04 40 e4 2c fst.q %f4,16384\(%r7\) |
20: f4 7f e0 2c fst.q %f0,32752\(%r7\) |
24: 04 80 fc 2c fst.q %f28,-32768\(%r7\) |
28: 04 c0 18 2d fst.q %f24,-16384\(%r8\) |
2c: 04 e0 34 2d fst.q %f20,-8192\(%r9\) |
30: 04 f0 50 2d fst.q %f16,-4096\(%r10\) |
34: 04 fc 6c 2d fst.q %f12,-1024\(%r11\) |
38: 04 fe 88 2d fst.q %f8,-512\(%r12\) |
3c: 04 ff a4 2d fst.q %f4,-256\(%r13\) |
40: f4 ff c0 2d fst.q %f0,-16\(%r14\) |
44: 05 00 00 2c fst.q %f0,0\(%r0\)\+\+ |
48: 85 00 24 2c fst.q %f4,128\(%r1\)\+\+ |
4c: 05 01 48 2c fst.q %f8,256\(%sp\)\+\+ |
50: 05 02 6c 2c fst.q %f12,512\(%fp\)\+\+ |
54: 05 04 90 2c fst.q %f16,1024\(%r4\)\+\+ |
58: 05 10 b4 2c fst.q %f20,4096\(%r5\)\+\+ |
5c: 05 20 d8 2c fst.q %f24,8192\(%r6\)\+\+ |
60: 05 40 fc 2c fst.q %f28,16384\(%r7\)\+\+ |
64: f5 7f e0 2c fst.q %f0,32752\(%r7\)\+\+ |
68: 05 80 e4 2c fst.q %f4,-32768\(%r7\)\+\+ |
6c: 05 c0 08 2d fst.q %f8,-16384\(%r8\)\+\+ |
70: 05 e0 2c 2d fst.q %f12,-8192\(%r9\)\+\+ |
74: 05 f0 50 2d fst.q %f16,-4096\(%r10\)\+\+ |
78: 05 fc 74 2d fst.q %f20,-1024\(%r11\)\+\+ |
7c: 05 fe 98 2d fst.q %f24,-512\(%r12\)\+\+ |
80: 05 ff bc 2d fst.q %f28,-256\(%r13\)\+\+ |
84: f5 ff d0 2d fst.q %f16,-16\(%r14\)\+\+ |
88: 04 28 00 28 fst.q %f0,%r5\(%r0\) |
8c: 04 30 34 28 fst.q %f20,%r6\(%r1\) |
90: 04 38 50 28 fst.q %f16,%r7\(%sp\) |
94: 04 40 6c 28 fst.q %f12,%r8\(%fp\) |
98: 04 48 88 28 fst.q %f8,%r9\(%r4\) |
9c: 04 00 a4 28 fst.q %f4,%r0\(%r5\) |
a0: 04 08 c0 28 fst.q %f0,%r1\(%r6\) |
a4: 04 60 fc 28 fst.q %f28,%r12\(%r7\) |
a8: 04 68 18 29 fst.q %f24,%r13\(%r8\) |
ac: 04 70 34 29 fst.q %f20,%r14\(%r9\) |
b0: 04 78 50 29 fst.q %f16,%r15\(%r10\) |
b4: 04 80 6c 29 fst.q %f12,%r16\(%r11\) |
b8: 04 88 88 29 fst.q %f8,%r17\(%r12\) |
bc: 04 e0 a4 29 fst.q %f4,%r28\(%r13\) |
c0: 04 f8 c0 29 fst.q %f0,%r31\(%r14\) |
c4: 05 28 00 28 fst.q %f0,%r5\(%r0\)\+\+ |
c8: 05 30 24 28 fst.q %f4,%r6\(%r1\)\+\+ |
cc: 05 38 48 28 fst.q %f8,%r7\(%sp\)\+\+ |
d0: 05 40 6c 28 fst.q %f12,%r8\(%fp\)\+\+ |
d4: 05 48 90 28 fst.q %f16,%r9\(%r4\)\+\+ |
d8: 05 00 b4 28 fst.q %f20,%r0\(%r5\)\+\+ |
dc: 05 08 d8 28 fst.q %f24,%r1\(%r6\)\+\+ |
e0: 05 60 fc 28 fst.q %f28,%r12\(%r7\)\+\+ |
e4: 05 68 00 29 fst.q %f0,%r13\(%r8\)\+\+ |
e8: 05 70 24 29 fst.q %f4,%r14\(%r9\)\+\+ |
ec: 05 78 48 29 fst.q %f8,%r15\(%r10\)\+\+ |
f0: 05 80 6c 29 fst.q %f12,%r16\(%r11\)\+\+ |
f4: 05 88 90 29 fst.q %f16,%r17\(%r12\)\+\+ |
f8: 05 e0 b4 29 fst.q %f20,%r28\(%r13\)\+\+ |
fc: 05 f8 d8 29 fst.q %f24,%r31\(%r14\)\+\+ |
/testsuite/gas/i860/fldst08.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst08 (pfld.d) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 64 pfld.d 0\(%r0\),%f0 |
4: 80 00 3e 64 pfld.d 128\(%r1\),%f30 |
8: 00 01 5c 64 pfld.d 256\(%sp\),%f28 |
c: 00 02 7a 64 pfld.d 512\(%fp\),%f26 |
10: 00 04 98 64 pfld.d 1024\(%r4\),%f24 |
14: 00 10 b6 64 pfld.d 4096\(%r5\),%f22 |
18: 00 20 d4 64 pfld.d 8192\(%r6\),%f20 |
1c: 00 40 f2 64 pfld.d 16384\(%r7\),%f18 |
20: f8 7f f0 64 pfld.d 32760\(%r7\),%f16 |
24: 00 80 ee 64 pfld.d -32768\(%r7\),%f14 |
28: 00 c0 0c 65 pfld.d -16384\(%r8\),%f12 |
2c: 00 e0 2a 65 pfld.d -8192\(%r9\),%f10 |
30: 00 f0 48 65 pfld.d -4096\(%r10\),%f8 |
34: 00 fc 66 65 pfld.d -1024\(%r11\),%f6 |
38: 00 fe 84 65 pfld.d -512\(%r12\),%f4 |
3c: 08 ff a2 65 pfld.d -248\(%r13\),%f2 |
40: f8 ff c0 65 pfld.d -8\(%r14\),%f0 |
44: 01 00 00 64 pfld.d 0\(%r0\)\+\+,%f0 |
48: 81 00 22 64 pfld.d 128\(%r1\)\+\+,%f2 |
4c: 01 01 44 64 pfld.d 256\(%sp\)\+\+,%f4 |
50: 01 02 66 64 pfld.d 512\(%fp\)\+\+,%f6 |
54: 01 04 88 64 pfld.d 1024\(%r4\)\+\+,%f8 |
58: 01 10 aa 64 pfld.d 4096\(%r5\)\+\+,%f10 |
5c: 01 20 cc 64 pfld.d 8192\(%r6\)\+\+,%f12 |
60: 01 40 ee 64 pfld.d 16384\(%r7\)\+\+,%f14 |
64: f9 7f f0 64 pfld.d 32760\(%r7\)\+\+,%f16 |
68: 01 80 f2 64 pfld.d -32768\(%r7\)\+\+,%f18 |
6c: 01 c0 14 65 pfld.d -16384\(%r8\)\+\+,%f20 |
70: 01 e0 36 65 pfld.d -8192\(%r9\)\+\+,%f22 |
74: 01 f0 58 65 pfld.d -4096\(%r10\)\+\+,%f24 |
78: 01 fc 7a 65 pfld.d -1024\(%r11\)\+\+,%f26 |
7c: 01 fe 9c 65 pfld.d -512\(%r12\)\+\+,%f28 |
80: 09 ff be 65 pfld.d -248\(%r13\)\+\+,%f30 |
84: f9 ff d0 65 pfld.d -8\(%r14\)\+\+,%f16 |
88: 00 28 00 60 pfld.d %r5\(%r0\),%f0 |
8c: 00 30 3e 60 pfld.d %r6\(%r1\),%f30 |
90: 00 38 5c 60 pfld.d %r7\(%sp\),%f28 |
94: 00 40 7a 60 pfld.d %r8\(%fp\),%f26 |
98: 00 48 98 60 pfld.d %r9\(%r4\),%f24 |
9c: 00 00 b6 60 pfld.d %r0\(%r5\),%f22 |
a0: 00 08 d4 60 pfld.d %r1\(%r6\),%f20 |
a4: 00 60 f2 60 pfld.d %r12\(%r7\),%f18 |
a8: 00 68 10 61 pfld.d %r13\(%r8\),%f16 |
ac: 00 70 2e 61 pfld.d %r14\(%r9\),%f14 |
b0: 00 78 4c 61 pfld.d %r15\(%r10\),%f12 |
b4: 00 80 6a 61 pfld.d %r16\(%r11\),%f10 |
b8: 00 88 88 61 pfld.d %r17\(%r12\),%f8 |
bc: 00 e0 a6 61 pfld.d %r28\(%r13\),%f6 |
c0: 00 f8 c4 61 pfld.d %r31\(%r14\),%f4 |
c4: 01 28 00 60 pfld.d %r5\(%r0\)\+\+,%f0 |
c8: 01 30 22 60 pfld.d %r6\(%r1\)\+\+,%f2 |
cc: 01 38 44 60 pfld.d %r7\(%sp\)\+\+,%f4 |
d0: 01 40 66 60 pfld.d %r8\(%fp\)\+\+,%f6 |
d4: 01 48 88 60 pfld.d %r9\(%r4\)\+\+,%f8 |
d8: 01 00 aa 60 pfld.d %r0\(%r5\)\+\+,%f10 |
dc: 01 08 cc 60 pfld.d %r1\(%r6\)\+\+,%f12 |
e0: 01 60 ee 60 pfld.d %r12\(%r7\)\+\+,%f14 |
e4: 01 68 10 61 pfld.d %r13\(%r8\)\+\+,%f16 |
e8: 01 70 32 61 pfld.d %r14\(%r9\)\+\+,%f18 |
ec: 01 78 54 61 pfld.d %r15\(%r10\)\+\+,%f20 |
f0: 01 80 76 61 pfld.d %r16\(%r11\)\+\+,%f22 |
f4: 01 88 98 61 pfld.d %r17\(%r12\)\+\+,%f24 |
f8: 01 e0 ba 61 pfld.d %r28\(%r13\)\+\+,%f26 |
fc: 01 f8 de 61 pfld.d %r31\(%r14\)\+\+,%f30 |
/testsuite/gas/i860/float02.s
0,0 → 1,42
# frcp, frsqr, famov |
|
.text |
|
# Without dual bit |
frcp.ss %f0,%f1 |
frcp.sd %f2,%f4 |
frcp.dd %f6,%f8 |
|
frsqr.ss %f5,%f6 |
frsqr.sd %f8,%f10 |
frsqr.dd %f12,%f14 |
|
famov.ss %f1,%f31 |
famov.ds %f2,%f30 |
famov.sd %f7,%f16 |
famov.dd %f24,%f12 |
|
# With dual bit |
d.frcp.ss %f0,%f1 |
nop |
d.frcp.sd %f2,%f30 |
nop |
d.frcp.dd %f6,%f8 |
nop |
|
d.frsqr.ss %f5,%f6 |
nop |
d.frsqr.sd %f8,%f24 |
nop |
d.frsqr.dd %f12,%f14 |
nop |
|
d.famov.ss %f5,%f13 |
nop |
d.famov.ds %f30,%f21 |
nop |
d.famov.sd %f23,%f22 |
nop |
d.famov.dd %f0,%f12 |
nop |
|
/testsuite/gas/i860/xp.d
0,0 → 1,241
#as: -mxp |
#objdump: -dr |
#name: i860 xp (XP-only instructions) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 df 30 ld.c %bear,%r31 |
4: 00 00 c0 30 ld.c %bear,%r0 |
8: 00 00 e5 30 ld.c %ccr,%r5 |
c: 00 00 fe 30 ld.c %ccr,%r30 |
10: 00 00 0a 31 ld.c %p0,%r10 |
14: 00 00 02 31 ld.c %p0,%sp |
18: 00 00 35 31 ld.c %p1,%r21 |
1c: 00 00 20 31 ld.c %p1,%r0 |
20: 00 00 5c 31 ld.c %p2,%r28 |
24: 00 00 4c 31 ld.c %p2,%r12 |
28: 00 00 7f 31 ld.c %p3,%r31 |
2c: 00 00 66 31 ld.c %p3,%r6 |
30: 00 00 c0 38 st.c %r0,%bear |
34: 00 f0 c0 38 st.c %r30,%bear |
38: 00 38 e0 38 st.c %r7,%ccr |
3c: 00 f8 e0 38 st.c %r31,%ccr |
40: 00 58 00 39 st.c %r11,%p0 |
44: 00 18 00 39 st.c %fp,%p0 |
48: 00 b0 20 39 st.c %r22,%p1 |
4c: 00 78 20 39 st.c %r15,%p1 |
50: 00 e8 40 39 st.c %r29,%p2 |
54: 00 68 40 39 st.c %r13,%p2 |
58: 00 20 60 39 st.c %r4,%p3 |
5c: 00 30 60 39 st.c %r6,%p3 |
60: 0a 04 05 4c ldint.l %r0,%r5 |
64: 0a 04 df 4c ldint.l %r6,%r31 |
68: 0a 04 fe 4c ldint.l %r7,%r30 |
6c: 0a 04 1d 4d ldint.l %r8,%r29 |
70: 0a 04 3c 4d ldint.l %r9,%r28 |
74: 0a 04 1b 4c ldint.l %r0,%r27 |
78: 0a 04 3a 4c ldint.l %r1,%r26 |
7c: 0a 04 99 4d ldint.l %r12,%r25 |
80: 0a 04 b8 4d ldint.l %r13,%r24 |
84: 0a 04 d7 4d ldint.l %r14,%r23 |
88: 0a 04 f6 4d ldint.l %r15,%r22 |
8c: 0a 04 15 4e ldint.l %r16,%r21 |
90: 0a 04 34 4e ldint.l %r17,%r20 |
94: 0a 04 93 4f ldint.l %r28,%r19 |
98: 0a 04 f2 4f ldint.l %r31,%r18 |
9c: 0a 02 05 4c ldint.s %r0,%r5 |
a0: 0a 02 df 4c ldint.s %r6,%r31 |
a4: 0a 02 fe 4c ldint.s %r7,%r30 |
a8: 0a 02 1d 4d ldint.s %r8,%r29 |
ac: 0a 02 3c 4d ldint.s %r9,%r28 |
b0: 0a 02 1b 4c ldint.s %r0,%r27 |
b4: 0a 02 3a 4c ldint.s %r1,%r26 |
b8: 0a 02 99 4d ldint.s %r12,%r25 |
bc: 0a 02 b8 4d ldint.s %r13,%r24 |
c0: 0a 02 d7 4d ldint.s %r14,%r23 |
c4: 0a 02 f6 4d ldint.s %r15,%r22 |
c8: 0a 02 15 4e ldint.s %r16,%r21 |
cc: 0a 02 34 4e ldint.s %r17,%r20 |
d0: 0a 02 93 4f ldint.s %r28,%r19 |
d4: 0a 02 f2 4f ldint.s %r31,%r18 |
d8: 0a 00 05 4c ldint.b %r0,%r5 |
dc: 0a 00 df 4c ldint.b %r6,%r31 |
e0: 0a 00 fe 4c ldint.b %r7,%r30 |
e4: 0a 00 1d 4d ldint.b %r8,%r29 |
e8: 0a 00 3c 4d ldint.b %r9,%r28 |
ec: 0a 00 1b 4c ldint.b %r0,%r27 |
f0: 0a 00 3a 4c ldint.b %r1,%r26 |
f4: 0a 00 99 4d ldint.b %r12,%r25 |
f8: 0a 00 b8 4d ldint.b %r13,%r24 |
fc: 0a 00 d7 4d ldint.b %r14,%r23 |
100: 0a 00 f6 4d ldint.b %r15,%r22 |
104: 0a 00 15 4e ldint.b %r16,%r21 |
108: 0a 00 34 4e ldint.b %r17,%r20 |
10c: 0a 00 93 4f ldint.b %r28,%r19 |
110: 0a 00 f2 4f ldint.b %r31,%r18 |
114: 08 04 05 4c ldio.l %r0,%r5 |
118: 08 04 df 4c ldio.l %r6,%r31 |
11c: 08 04 fe 4c ldio.l %r7,%r30 |
120: 08 04 1d 4d ldio.l %r8,%r29 |
124: 08 04 3c 4d ldio.l %r9,%r28 |
128: 08 04 1b 4c ldio.l %r0,%r27 |
12c: 08 04 3a 4c ldio.l %r1,%r26 |
130: 08 04 99 4d ldio.l %r12,%r25 |
134: 08 04 b8 4d ldio.l %r13,%r24 |
138: 08 04 d7 4d ldio.l %r14,%r23 |
13c: 08 04 f6 4d ldio.l %r15,%r22 |
140: 08 04 15 4e ldio.l %r16,%r21 |
144: 08 04 34 4e ldio.l %r17,%r20 |
148: 08 04 93 4f ldio.l %r28,%r19 |
14c: 08 04 f2 4f ldio.l %r31,%r18 |
150: 08 02 05 4c ldio.s %r0,%r5 |
154: 08 02 df 4c ldio.s %r6,%r31 |
158: 08 02 fe 4c ldio.s %r7,%r30 |
15c: 08 02 1d 4d ldio.s %r8,%r29 |
160: 08 02 3c 4d ldio.s %r9,%r28 |
164: 08 02 1b 4c ldio.s %r0,%r27 |
168: 08 02 3a 4c ldio.s %r1,%r26 |
16c: 08 02 99 4d ldio.s %r12,%r25 |
170: 08 02 b8 4d ldio.s %r13,%r24 |
174: 08 02 d7 4d ldio.s %r14,%r23 |
178: 08 02 f6 4d ldio.s %r15,%r22 |
17c: 08 02 15 4e ldio.s %r16,%r21 |
180: 08 02 34 4e ldio.s %r17,%r20 |
184: 08 02 93 4f ldio.s %r28,%r19 |
188: 08 02 f2 4f ldio.s %r31,%r18 |
18c: 08 00 05 4c ldio.b %r0,%r5 |
190: 08 00 df 4c ldio.b %r6,%r31 |
194: 08 00 fe 4c ldio.b %r7,%r30 |
198: 08 00 1d 4d ldio.b %r8,%r29 |
19c: 08 00 3c 4d ldio.b %r9,%r28 |
1a0: 08 00 1b 4c ldio.b %r0,%r27 |
1a4: 08 00 3a 4c ldio.b %r1,%r26 |
1a8: 08 00 99 4d ldio.b %r12,%r25 |
1ac: 08 00 b8 4d ldio.b %r13,%r24 |
1b0: 08 00 d7 4d ldio.b %r14,%r23 |
1b4: 08 00 f6 4d ldio.b %r15,%r22 |
1b8: 08 00 15 4e ldio.b %r16,%r21 |
1bc: 08 00 34 4e ldio.b %r17,%r20 |
1c0: 08 00 93 4f ldio.b %r28,%r19 |
1c4: 08 00 f2 4f ldio.b %r31,%r18 |
1c8: 09 04 a0 4c stio.l %r0,%r5 |
1cc: 09 34 e0 4f stio.l %r6,%r31 |
1d0: 09 3c c0 4f stio.l %r7,%r30 |
1d4: 09 44 a0 4f stio.l %r8,%r29 |
1d8: 09 4c 80 4f stio.l %r9,%r28 |
1dc: 09 04 60 4f stio.l %r0,%r27 |
1e0: 09 0c 40 4f stio.l %r1,%r26 |
1e4: 09 64 20 4f stio.l %r12,%r25 |
1e8: 09 6c 00 4f stio.l %r13,%r24 |
1ec: 09 74 e0 4e stio.l %r14,%r23 |
1f0: 09 7c c0 4e stio.l %r15,%r22 |
1f4: 09 84 a0 4e stio.l %r16,%r21 |
1f8: 09 8c 80 4e stio.l %r17,%r20 |
1fc: 09 e4 60 4e stio.l %r28,%r19 |
200: 09 fc 40 4e stio.l %r31,%r18 |
204: 09 02 a0 4c stio.s %r0,%r5 |
208: 09 32 e0 4f stio.s %r6,%r31 |
20c: 09 3a c0 4f stio.s %r7,%r30 |
210: 09 42 a0 4f stio.s %r8,%r29 |
214: 09 4a 80 4f stio.s %r9,%r28 |
218: 09 02 60 4f stio.s %r0,%r27 |
21c: 09 0a 40 4f stio.s %r1,%r26 |
220: 09 62 20 4f stio.s %r12,%r25 |
224: 09 6a 00 4f stio.s %r13,%r24 |
228: 09 72 e0 4e stio.s %r14,%r23 |
22c: 09 7a c0 4e stio.s %r15,%r22 |
230: 09 82 a0 4e stio.s %r16,%r21 |
234: 09 8a 80 4e stio.s %r17,%r20 |
238: 09 e2 60 4e stio.s %r28,%r19 |
23c: 09 fa 40 4e stio.s %r31,%r18 |
240: 09 00 a0 4c stio.b %r0,%r5 |
244: 09 30 e0 4f stio.b %r6,%r31 |
248: 09 38 c0 4f stio.b %r7,%r30 |
24c: 09 40 a0 4f stio.b %r8,%r29 |
250: 09 48 80 4f stio.b %r9,%r28 |
254: 09 00 60 4f stio.b %r0,%r27 |
258: 09 08 40 4f stio.b %r1,%r26 |
25c: 09 60 20 4f stio.b %r12,%r25 |
260: 09 68 00 4f stio.b %r13,%r24 |
264: 09 70 e0 4e stio.b %r14,%r23 |
268: 09 78 c0 4e stio.b %r15,%r22 |
26c: 09 80 a0 4e stio.b %r16,%r21 |
270: 09 88 80 4e stio.b %r17,%r20 |
274: 09 e0 60 4e stio.b %r28,%r19 |
278: 09 f8 40 4e stio.b %r31,%r18 |
27c: 0b 00 00 4c scyc.b %r0 |
280: 0b 00 a0 4c scyc.b %r5 |
284: 0b 00 c0 4c scyc.b %r6 |
288: 0b 00 a0 4d scyc.b %r13 |
28c: 0b 00 c0 4d scyc.b %r14 |
290: 0b 00 80 4f scyc.b %r28 |
294: 0b 00 a0 4f scyc.b %r29 |
298: 0b 00 c0 4f scyc.b %r30 |
29c: 0b 00 e0 4f scyc.b %r31 |
2a0: 04 00 00 64 pfld.q 0\(%r0\),%f0 |
2a4: 84 00 3c 64 pfld.q 128\(%r1\),%f28 |
2a8: 04 01 58 64 pfld.q 256\(%sp\),%f24 |
2ac: 04 02 74 64 pfld.q 512\(%fp\),%f20 |
2b0: 04 04 90 64 pfld.q 1024\(%r4\),%f16 |
2b4: 04 10 ac 64 pfld.q 4096\(%r5\),%f12 |
2b8: 04 20 c8 64 pfld.q 8192\(%r6\),%f8 |
2bc: 04 40 e4 64 pfld.q 16384\(%r7\),%f4 |
2c0: fc 7f e0 64 pfld.q 32760\(%r7\),%f0 |
2c4: 04 80 fc 64 pfld.q -32768\(%r7\),%f28 |
2c8: 04 c0 18 65 pfld.q -16384\(%r8\),%f24 |
2cc: 04 e0 34 65 pfld.q -8192\(%r9\),%f20 |
2d0: 04 f0 50 65 pfld.q -4096\(%r10\),%f16 |
2d4: 04 fc 6c 65 pfld.q -1024\(%r11\),%f12 |
2d8: 04 fe 88 65 pfld.q -512\(%r12\),%f8 |
2dc: 0c ff a4 65 pfld.q -248\(%r13\),%f4 |
2e0: fc ff c0 65 pfld.q -8\(%r14\),%f0 |
2e4: 05 00 00 64 pfld.q 0\(%r0\)\+\+,%f0 |
2e8: 85 00 24 64 pfld.q 128\(%r1\)\+\+,%f4 |
2ec: 05 01 48 64 pfld.q 256\(%sp\)\+\+,%f8 |
2f0: 05 02 6c 64 pfld.q 512\(%fp\)\+\+,%f12 |
2f4: 05 04 90 64 pfld.q 1024\(%r4\)\+\+,%f16 |
2f8: 05 10 b4 64 pfld.q 4096\(%r5\)\+\+,%f20 |
2fc: 05 20 d8 64 pfld.q 8192\(%r6\)\+\+,%f24 |
300: 05 40 fc 64 pfld.q 16384\(%r7\)\+\+,%f28 |
304: fd 7f e0 64 pfld.q 32760\(%r7\)\+\+,%f0 |
308: 05 80 e4 64 pfld.q -32768\(%r7\)\+\+,%f4 |
30c: 05 c0 08 65 pfld.q -16384\(%r8\)\+\+,%f8 |
310: 05 e0 2c 65 pfld.q -8192\(%r9\)\+\+,%f12 |
314: 05 f0 50 65 pfld.q -4096\(%r10\)\+\+,%f16 |
318: 05 fc 74 65 pfld.q -1024\(%r11\)\+\+,%f20 |
31c: 05 fe 98 65 pfld.q -512\(%r12\)\+\+,%f24 |
320: 0d ff bc 65 pfld.q -248\(%r13\)\+\+,%f28 |
324: fd ff d0 65 pfld.q -8\(%r14\)\+\+,%f16 |
328: 04 28 1c 60 pfld.q %r5\(%r0\),%f28 |
32c: 04 30 38 60 pfld.q %r6\(%r1\),%f24 |
330: 04 38 54 60 pfld.q %r7\(%sp\),%f20 |
334: 04 40 70 60 pfld.q %r8\(%fp\),%f16 |
338: 04 48 8c 60 pfld.q %r9\(%r4\),%f12 |
33c: 04 00 a8 60 pfld.q %r0\(%r5\),%f8 |
340: 04 08 c4 60 pfld.q %r1\(%r6\),%f4 |
344: 04 60 e0 60 pfld.q %r12\(%r7\),%f0 |
348: 04 68 1c 61 pfld.q %r13\(%r8\),%f28 |
34c: 04 70 38 61 pfld.q %r14\(%r9\),%f24 |
350: 04 78 54 61 pfld.q %r15\(%r10\),%f20 |
354: 04 80 70 61 pfld.q %r16\(%r11\),%f16 |
358: 04 88 8c 61 pfld.q %r17\(%r12\),%f12 |
35c: 04 e0 a8 61 pfld.q %r28\(%r13\),%f8 |
360: 04 f8 c4 61 pfld.q %r31\(%r14\),%f4 |
364: 05 28 00 60 pfld.q %r5\(%r0\)\+\+,%f0 |
368: 05 30 24 60 pfld.q %r6\(%r1\)\+\+,%f4 |
36c: 05 38 48 60 pfld.q %r7\(%sp\)\+\+,%f8 |
370: 05 40 6c 60 pfld.q %r8\(%fp\)\+\+,%f12 |
374: 05 48 90 60 pfld.q %r9\(%r4\)\+\+,%f16 |
378: 05 00 b4 60 pfld.q %r0\(%r5\)\+\+,%f20 |
37c: 05 08 d8 60 pfld.q %r1\(%r6\)\+\+,%f24 |
380: 05 60 fc 60 pfld.q %r12\(%r7\)\+\+,%f28 |
384: 05 68 00 61 pfld.q %r13\(%r8\)\+\+,%f0 |
388: 05 70 24 61 pfld.q %r14\(%r9\)\+\+,%f4 |
38c: 05 78 48 61 pfld.q %r15\(%r10\)\+\+,%f8 |
390: 05 80 6c 61 pfld.q %r16\(%r11\)\+\+,%f12 |
394: 05 88 90 61 pfld.q %r17\(%r12\)\+\+,%f16 |
398: 05 e0 b4 61 pfld.q %r28\(%r13\)\+\+,%f20 |
39c: 05 f8 d8 61 pfld.q %r31\(%r14\)\+\+,%f24 |
/testsuite/gas/i860/float04.s
0,0 → 1,49
# fxfr, ixfr, fiadd, fisub |
|
.text |
|
# ixfr, fxfr |
fxfr %f1,%r3 |
fxfr %f8,%r30 |
fxfr %f31,%r18 |
|
ixfr %r9,%f31 |
ixfr %r23,%f16 |
ixfr %r0,%f0 |
|
# Non-pipelined, without dual bit |
fiadd.ss %f0,%f1,%f2 |
fiadd.dd %f6,%f8,%f10 |
|
fisub.ss %f5,%f6,%f7 |
fisub.dd %f12,%f14,%f16 |
|
# Pipelined, without dual bit |
pfiadd.ss %f14,%f15,%f16 |
pfiadd.dd %f22,%f24,%f26 |
|
pfisub.ss %f20,%f21,%f22 |
pfisub.dd %f28,%f30,%f2 |
|
# Non-pipelined, with dual bit |
d.fiadd.ss %f0,%f1,%f2 |
nop |
d.fiadd.dd %f6,%f8,%f10 |
nop |
|
d.fisub.ss %f5,%f6,%f7 |
nop |
d.fisub.dd %f12,%f14,%f16 |
nop |
|
# Pipelined, with dual bit |
d.pfiadd.ss %f14,%f15,%f16 |
nop |
d.pfiadd.dd %f22,%f24,%f26 |
nop |
|
d.pfisub.ss %f20,%f21,%f22 |
nop |
d.pfisub.dd %f28,%f30,%f2 |
nop |
|
/testsuite/gas/i860/dir-intel03-err.l
0,0 → 1,5
.*: Assembler messages: |
.*:8: Error: Directive .atmp available only with -mintel-syntax option |
.*:8: Error: junk at end of line, first unrecognized character is `r' |
.*:10: Error: Directive .dual available only with -mintel-syntax option |
.*:13: Error: Directive .enddual available only with -mintel-syntax option |
/testsuite/gas/i860/simd.d
0,0 → 1,105
#as: |
#objdump: -dr |
#name: i860 simd |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: d7 05 48 48 pfzchkl %f0,%f2,%f8 |
4: d7 15 90 48 pfzchkl %f2,%f4,%f16 |
8: d7 25 cd 48 pfzchkl %f4,%f6,%f13 |
c: d7 45 52 49 pfzchkl %f8,%f10,%f18 |
10: df 65 de 49 pfzchks %f12,%f14,%f30 |
14: df 85 54 4a pfzchks %f16,%f18,%f20 |
18: df a5 dc 4a pfzchks %f20,%f22,%f28 |
1c: df c5 5e 4b pfzchks %f24,%f26,%f30 |
20: d0 05 48 48 pfaddp %f0,%f2,%f8 |
24: d0 15 90 48 pfaddp %f2,%f4,%f16 |
28: d0 25 cd 48 pfaddp %f4,%f6,%f13 |
2c: d0 45 52 49 pfaddp %f8,%f10,%f18 |
30: d1 65 de 49 pfaddz %f12,%f14,%f30 |
34: d1 85 54 4a pfaddz %f16,%f18,%f20 |
38: d1 a5 dc 4a pfaddz %f20,%f22,%f28 |
3c: d1 c5 5e 4b pfaddz %f24,%f26,%f30 |
40: d7 61 44 48 fzchkl %f12,%f2,%f4 |
44: d7 b1 82 48 fzchkl %f22,%f4,%f2 |
48: d7 21 d2 48 fzchkl %f4,%f6,%f18 |
4c: d7 41 5c 49 fzchkl %f8,%f10,%f28 |
50: df 61 c6 49 fzchks %f12,%f14,%f6 |
54: df 81 54 4a fzchks %f16,%f18,%f20 |
58: df a1 dc 4a fzchks %f20,%f22,%f28 |
5c: df c1 5e 4b fzchks %f24,%f26,%f30 |
60: d0 61 44 48 faddp %f12,%f2,%f4 |
64: d0 b1 82 48 faddp %f22,%f4,%f2 |
68: d0 21 d2 48 faddp %f4,%f6,%f18 |
6c: d0 41 5c 49 faddp %f8,%f10,%f28 |
70: d1 61 c6 49 faddz %f12,%f14,%f6 |
74: d1 81 54 4a faddz %f16,%f18,%f20 |
78: d1 a1 dc 4a faddz %f20,%f22,%f28 |
7c: d1 c1 5e 4b faddz %f24,%f26,%f30 |
80: d7 07 52 48 d.pfzchkl %f0,%f2,%f18 |
84: 00 00 00 a0 shl %r0,%r0,%r0 |
88: d7 17 8c 48 d.pfzchkl %f2,%f4,%f12 |
8c: 00 00 00 a0 shl %r0,%r0,%r0 |
90: d7 27 de 48 d.pfzchkl %f4,%f6,%f30 |
94: 00 00 00 a0 shl %r0,%r0,%r0 |
98: d7 47 44 49 d.pfzchkl %f8,%f10,%f4 |
9c: 00 00 00 a0 shl %r0,%r0,%r0 |
a0: df 67 ce 49 d.pfzchks %f12,%f14,%f14 |
a4: 00 00 00 a0 shl %r0,%r0,%r0 |
a8: df 87 46 4a d.pfzchks %f16,%f18,%f6 |
ac: 00 00 00 a0 shl %r0,%r0,%r0 |
b0: df a7 ca 4a d.pfzchks %f20,%f22,%f10 |
b4: 00 00 00 a0 shl %r0,%r0,%r0 |
b8: df c7 48 4b d.pfzchks %f24,%f26,%f8 |
bc: 00 00 00 a0 shl %r0,%r0,%r0 |
c0: d0 07 52 48 d.pfaddp %f0,%f2,%f18 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: d0 17 80 48 d.pfaddp %f2,%f4,%f0 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: d0 27 de 48 d.pfaddp %f4,%f6,%f30 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: d0 47 44 49 d.pfaddp %f8,%f10,%f4 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: d1 67 ce 49 d.pfaddz %f12,%f14,%f14 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: d1 87 46 4a d.pfaddz %f16,%f18,%f6 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: d1 a7 ca 4a d.pfaddz %f20,%f22,%f10 |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: d1 c7 48 4b d.pfaddz %f24,%f26,%f8 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: d7 03 4a 48 d.fzchkl %f0,%f2,%f10 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
108: d7 13 92 48 d.fzchkl %f2,%f4,%f18 |
10c: 00 00 00 a0 shl %r0,%r0,%r0 |
110: d7 23 cc 48 d.fzchkl %f4,%f6,%f12 |
114: 00 00 00 a0 shl %r0,%r0,%r0 |
118: d7 43 4e 49 d.fzchkl %f8,%f10,%f14 |
11c: 00 00 00 a0 shl %r0,%r0,%r0 |
120: df 63 d0 49 d.fzchks %f12,%f14,%f16 |
124: 00 00 00 a0 shl %r0,%r0,%r0 |
128: df 83 4c 4a d.fzchks %f16,%f18,%f12 |
12c: 00 00 00 a0 shl %r0,%r0,%r0 |
130: df a3 d0 4a d.fzchks %f20,%f22,%f16 |
134: 00 00 00 a0 shl %r0,%r0,%r0 |
138: df c3 5e 4b d.fzchks %f24,%f26,%f30 |
13c: 00 00 00 a0 shl %r0,%r0,%r0 |
140: d0 03 4a 48 d.faddp %f0,%f2,%f10 |
144: 00 00 00 a0 shl %r0,%r0,%r0 |
148: d0 13 92 48 d.faddp %f2,%f4,%f18 |
14c: 00 00 00 a0 shl %r0,%r0,%r0 |
150: d0 23 cc 48 d.faddp %f4,%f6,%f12 |
154: 00 00 00 a0 shl %r0,%r0,%r0 |
158: d0 43 4e 49 d.faddp %f8,%f10,%f14 |
15c: 00 00 00 a0 shl %r0,%r0,%r0 |
160: d1 63 d0 49 d.faddz %f12,%f14,%f16 |
164: 00 00 00 a0 shl %r0,%r0,%r0 |
168: d1 83 4c 4a d.faddz %f16,%f18,%f12 |
16c: 00 00 00 a0 shl %r0,%r0,%r0 |
170: d1 a3 d0 4a d.faddz %f20,%f22,%f16 |
174: 00 00 00 a0 shl %r0,%r0,%r0 |
178: d1 c3 5e 4b d.faddz %f24,%f26,%f30 |
17c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/branch.d
0,0 → 1,81
#as: |
#objdump: -dr |
#name: i860 branch |
|
.*: +file format .* |
|
Disassembly of section .text: |
|
00000000 <.text>: |
0: 3d 00 20 b4 bla %r0,%r1,0x000000f8 // 0xf8 |
4: 00 00 00 a0 shl %r0,%r0,%r0 |
8: 3d 28 e0 b7 bla %r5,%r31,0x00000100 // 0x100 |
c: 00 00 00 a0 shl %r0,%r0,%r0 |
10: 39 b8 00 b6 bla %r23,%r16,0x000000f8 // 0xf8 |
14: 00 00 00 a0 shl %r0,%r0,%r0 |
18: 39 20 60 b6 bla %r4,%r19,0x00000100 // 0x100 |
1c: 00 00 00 a0 shl %r0,%r0,%r0 |
20: 00 00 00 40 bri %r0 |
24: 00 00 00 a0 shl %r0,%r0,%r0 |
28: 00 08 00 40 bri %r1 |
2c: 00 00 00 a0 shl %r0,%r0,%r0 |
30: 00 f8 00 40 bri %r31 |
34: 00 00 00 a0 shl %r0,%r0,%r0 |
38: 00 08 00 40 bri %r1 |
3c: 00 00 00 a0 shl %r0,%r0,%r0 |
40: 00 60 00 40 bri %r12 |
44: 00 00 00 a0 shl %r0,%r0,%r0 |
48: 00 98 00 40 bri %r19 |
4c: 00 00 00 a0 shl %r0,%r0,%r0 |
50: 02 00 00 4c calli %r0 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: 02 08 00 4c calli %r1 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: 02 f8 00 4c calli %r31 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: 02 28 00 4c calli %r5 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: 02 b0 00 4c calli %r22 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
78: 02 48 00 4c calli %r9 |
7c: 00 00 00 a0 shl %r0,%r0,%r0 |
80: 1d 00 00 68 br 0x000000f8 // 0xf8 |
84: 00 00 00 a0 shl %r0,%r0,%r0 |
88: 1d 00 00 68 br 0x00000100 // 0x100 |
8c: 00 00 00 a0 shl %r0,%r0,%r0 |
90: 00 00 00 68 br 0x00000094 // 0x94 |
90: R_860_PC26 some_fake_extern |
94: 00 00 00 a0 shl %r0,%r0,%r0 |
98: 17 00 00 6c call 0x000000f8 // 0xf8 |
9c: 00 00 00 a0 shl %r0,%r0,%r0 |
a0: 17 00 00 6c call 0x00000100 // 0x100 |
a4: 00 00 00 a0 shl %r0,%r0,%r0 |
a8: 00 00 00 6c call 0x000000ac // 0xac |
a8: R_860_PC26 some_fake_extern |
ac: 00 00 00 a0 shl %r0,%r0,%r0 |
b0: 02 00 00 70 bc 0x000000bc // 0xbc |
b4: 10 00 00 70 bc 0x000000f8 // 0xf8 |
b8: 00 00 00 70 bc 0x000000bc // 0xbc |
b8: R_860_PC26 some_fake_extern |
bc: ff ff ff 77 bc.t 0x000000bc // 0xbc |
c0: 00 00 00 a0 shl %r0,%r0,%r0 |
c4: 0c 00 00 74 bc.t 0x000000f8 // 0xf8 |
c8: 00 00 00 a0 shl %r0,%r0,%r0 |
cc: 00 00 00 74 bc.t 0x000000d0 // 0xd0 |
cc: R_860_PC26 some_fake_extern |
d0: 00 00 00 a0 shl %r0,%r0,%r0 |
d4: 02 00 00 78 bnc 0x000000e0 // 0xe0 |
d8: 07 00 00 78 bnc 0x000000f8 // 0xf8 |
dc: 00 00 00 78 bnc 0x000000e0 // 0xe0 |
dc: R_860_PC26 some_fake_extern |
e0: ff ff ff 7f bnc.t 0x000000e0 // 0xe0 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: 03 00 00 7c bnc.t 0x000000f8 // 0xf8 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: 00 00 00 7c bnc.t 0x000000f4 // 0xf4 |
f0: R_860_PC26 some_fake_extern |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: 00 00 00 a0 shl %r0,%r0,%r0 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: 00 00 00 a0 shl %r0,%r0,%r0 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/fldst02.s
0,0 → 1,75
# fld.d (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fld.d 0(%r0),%f0 |
fld.d 128(%r1),%f30 |
fld.d 256(%r2),%f28 |
fld.d 512(%r3),%f26 |
fld.d 1024(%r4),%f24 |
fld.d 4096(%r5),%f22 |
fld.d 8192(%r6),%f20 |
fld.d 16384(%r7),%f18 |
fld.d 32760(%r7),%f16 |
fld.d -32768(%r7),%f14 |
fld.d -16384(%r8),%f12 |
fld.d -8192(%r9),%f10 |
fld.d -4096(%r10),%f8 |
fld.d -1024(%r11),%f6 |
fld.d -512(%r12),%f4 |
fld.d -248(%r13),%f2 |
fld.d -8(%r14),%f0 |
|
# Immediate form, with auto-increment. |
fld.d 0(%r0)++,%f0 |
fld.d 128(%r1)++,%f2 |
fld.d 256(%r2)++,%f4 |
fld.d 512(%r3)++,%f6 |
fld.d 1024(%r4)++,%f8 |
fld.d 4096(%r5)++,%f10 |
fld.d 8192(%r6)++,%f12 |
fld.d 16384(%r7)++,%f14 |
fld.d 32760(%r7)++,%f16 |
fld.d -32768(%r7)++,%f18 |
fld.d -16384(%r8)++,%f20 |
fld.d -8192(%r9)++,%f22 |
fld.d -4096(%r10)++,%f24 |
fld.d -1024(%r11)++,%f26 |
fld.d -512(%r12)++,%f28 |
fld.d -248(%r13)++,%f30 |
fld.d -8(%r14)++,%f16 |
|
# Index form, no auto-increment. |
fld.d %r5(%r0),%f0 |
fld.d %r6(%r1),%f30 |
fld.d %r7(%r2),%f28 |
fld.d %r8(%r3),%f26 |
fld.d %r9(%r4),%f24 |
fld.d %r0(%r5),%f22 |
fld.d %r1(%r6),%f20 |
fld.d %r12(%r7),%f18 |
fld.d %r13(%r8),%f16 |
fld.d %r14(%r9),%f14 |
fld.d %r15(%r10),%f12 |
fld.d %r16(%r11),%f10 |
fld.d %r17(%r12),%f8 |
fld.d %r28(%r13),%f6 |
fld.d %r31(%r14),%f4 |
|
# Index form, with auto-increment. |
fld.d %r5(%r0)++,%f0 |
fld.d %r6(%r1)++,%f2 |
fld.d %r7(%r2)++,%f4 |
fld.d %r8(%r3)++,%f6 |
fld.d %r9(%r4)++,%f8 |
fld.d %r0(%r5)++,%f10 |
fld.d %r1(%r6)++,%f12 |
fld.d %r12(%r7)++,%f14 |
fld.d %r13(%r8)++,%f16 |
fld.d %r14(%r9)++,%f18 |
fld.d %r15(%r10)++,%f20 |
fld.d %r16(%r11)++,%f22 |
fld.d %r17(%r12)++,%f24 |
fld.d %r28(%r13)++,%f26 |
fld.d %r31(%r14)++,%f30 |
|
/testsuite/gas/i860/iarith.s
0,0 → 1,102
# addu, adds, subu, subs |
|
.text |
|
# Register forms |
addu %r0,%r1,%r2 |
addu %r3,%r4,%r5 |
addu %r6,%r7,%r8 |
addu %r9,%r10,%r11 |
addu %r31,%r13,%r14 |
addu %r15,%r16,%r17 |
addu %r18,%r19,%r20 |
addu %r21,%r22,%r23 |
addu %r24,%r25,%r31 |
addu %r27,%r28,%r29 |
addu %r30,%r31,%r0 |
|
adds %r0,%r1,%r2 |
adds %r3,%r4,%r5 |
adds %r6,%r7,%r8 |
adds %r9,%r10,%r11 |
adds %r31,%r13,%r14 |
adds %r15,%r16,%r17 |
adds %r18,%r19,%r20 |
adds %r21,%r22,%r23 |
adds %r24,%r25,%r31 |
adds %r27,%r28,%r29 |
adds %r30,%r31,%r0 |
|
subu %r0,%r1,%r2 |
subu %r3,%r4,%r5 |
subu %r6,%r7,%r8 |
subu %r9,%r10,%r11 |
subu %r31,%r13,%r14 |
subu %r15,%r16,%r17 |
subu %r18,%r19,%r20 |
subu %r21,%r22,%r23 |
subu %r24,%r25,%r31 |
subu %r27,%r28,%r29 |
subu %r30,%r31,%r0 |
|
subs %r0,%r1,%r2 |
subs %r3,%r4,%r5 |
subs %r6,%r7,%r8 |
subs %r9,%r10,%r11 |
subs %r31,%r13,%r14 |
subs %r15,%r16,%r17 |
subs %r18,%r19,%r20 |
subs %r21,%r22,%r23 |
subs %r24,%r25,%r31 |
subs %r27,%r28,%r29 |
subs %r30,%r31,%r0 |
|
# Immediate forms (all) |
addu 0,%r1,%r2 |
addu 8192,%r4,%r5 |
addu 5109,%r7,%r8 |
addu 32767,%r10,%r11 |
addu -32768,%r13,%r14 |
addu -8192,%r16,%r17 |
addu -1,%r19,%r20 |
addu -21555,%r22,%r23 |
addu 0x1234,%r25,%r26 |
addu 0x0,%r28,%r29 |
addu 0x3,%r31,%r0 |
|
adds 0,%r1,%r2 |
adds 8192,%r4,%r5 |
adds 5109,%r7,%r8 |
adds 32767,%r10,%r11 |
adds -32768,%r13,%r14 |
adds -8192,%r16,%r17 |
adds -1,%r19,%r20 |
adds -21555,%r22,%r23 |
adds 0x1234,%r25,%r26 |
adds 0x0,%r28,%r29 |
adds 0x3,%r31,%r0 |
|
subu 1,%r1,%r2 |
subu 8193,%r4,%r5 |
subu 5110,%r7,%r8 |
subu 32767,%r10,%r11 |
subu -32768,%r13,%r14 |
subu -8192,%r16,%r17 |
subu -1,%r19,%r20 |
subu -21555,%r22,%r23 |
subu 0x1234,%r25,%r26 |
subu 0x0,%r28,%r29 |
subu 0x3,%r31,%r0 |
|
subs 1,%r1,%r2 |
subs 8193,%r4,%r5 |
subs 5110,%r7,%r8 |
subs 32767,%r10,%r11 |
subs -32768,%r13,%r14 |
subs -8192,%r16,%r17 |
subs -1,%r19,%r20 |
subs -21555,%r22,%r23 |
subs 0x1234,%r25,%r26 |
subs 0x0,%r28,%r29 |
subs 0x3,%r31,%r0 |
|
/testsuite/gas/i860/dir-intel03-err.s
0,0 → 1,14
# Intel assembler directives: |
# The .dual, .enddual, and .atmp directives are valid only |
# in Intel syntax mode. Check that we issue an error if in |
# AT&T/SVR4 mode. |
|
.text |
|
.atmp r31 |
|
.dual |
fsub.ss %f22,%f21,%f13 |
nop |
.enddual |
|
/testsuite/gas/i860/fldst04.s
0,0 → 1,75
# fst.l (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fst.l %f0,0(%r0) |
fst.l %f31,124(%r1) |
fst.l %f30,256(%r2) |
fst.l %f29,512(%r3) |
fst.l %f28,1024(%r4) |
fst.l %f27,4096(%r5) |
fst.l %f26,8192(%r6) |
fst.l %f25,16384(%r7) |
fst.l %f25,32764(%r7) |
fst.l %f23,-32768(%r7) |
fst.l %f2,-16384(%r8) |
fst.l %f3,-8192(%r9) |
fst.l %f8,-4096(%r10) |
fst.l %f9,-1024(%r11) |
fst.l %f12,-508(%r12) |
fst.l %f19,-248(%r13) |
fst.l %f21,-4(%r14) |
|
# Immediate form, with auto-increment. |
fst.l %f0,0(%r0)++ |
fst.l %f1,124(%r1)++ |
fst.l %f2,256(%r2)++ |
fst.l %f3,512(%r3)++ |
fst.l %f4,1024(%r4)++ |
fst.l %f5,4096(%r5)++ |
fst.l %f6,8192(%r6)++ |
fst.l %f7,16384(%r7)++ |
fst.l %f8,32764(%r7)++ |
fst.l %f9,-32768(%r7)++ |
fst.l %f10,-16384(%r8)++ |
fst.l %f11,-8192(%r9)++ |
fst.l %f12,-4096(%r10)++ |
fst.l %f13,-1024(%r11)++ |
fst.l %f14,-508(%r12)++ |
fst.l %f15,-248(%r13)++ |
fst.l %f16,-4(%r14)++ |
|
# Index form, no auto-increment. |
fst.l %f0,%r5(%r0) |
fst.l %f31,%r6(%r1) |
fst.l %f30,%r7(%r2) |
fst.l %f29,%r8(%r3) |
fst.l %f28,%r9(%r4) |
fst.l %f27,%r0(%r5) |
fst.l %f26,%r1(%r6) |
fst.l %f25,%r12(%r7) |
fst.l %f24,%r13(%r8) |
fst.l %f23,%r14(%r9) |
fst.l %f22,%r15(%r10) |
fst.l %f21,%r16(%r11) |
fst.l %f20,%r17(%r12) |
fst.l %f19,%r28(%r13) |
fst.l %f18,%r31(%r14) |
|
# Index form, with auto-increment. |
fst.l %f0,%r5(%r0)++ |
fst.l %f1,%r6(%r1)++ |
fst.l %f2,%r7(%r2)++ |
fst.l %f3,%r8(%r3)++ |
fst.l %f4,%r9(%r4)++ |
fst.l %f5,%r0(%r5)++ |
fst.l %f6,%r1(%r6)++ |
fst.l %f7,%r12(%r7)++ |
fst.l %f8,%r13(%r8)++ |
fst.l %f9,%r14(%r9)++ |
fst.l %f10,%r15(%r10)++ |
fst.l %f11,%r16(%r11)++ |
fst.l %f12,%r17(%r12)++ |
fst.l %f13,%r28(%r13)++ |
fst.l %f14,%r31(%r14)++ |
|
/testsuite/gas/i860/pseudo-ops01.d
0,0 → 1,14
#as: |
#objdump: -d |
#name: i860 pseudo-ops01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 49 28 06 48 fiadd\.ss %f5,%f0,%f6 |
4: c9 41 0a 48 fiadd\.dd %f8,%f0,%f10 |
8: b3 18 14 48 famov\.sd %f3,%f20 |
c: 33 c1 09 48 famov\.ds %f24,%f9 |
10: 33 e5 03 48 pfamov\.ds %f28,%f3 |
/testsuite/gas/i860/pfmam.d
0,0 → 1,153
#as: |
#objdump: -dr |
#name: i860 pfmam |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 22 48 mr2p1.ss %f0,%f1,%f2 |
4: 80 18 85 48 mr2p1.sd %f3,%f4,%f5 |
8: 80 01 44 48 mr2p1.dd %f0,%f2,%f4 |
c: 01 08 43 48 mr2pt.ss %f1,%f2,%f3 |
10: 81 20 a6 48 mr2pt.sd %f4,%f5,%f6 |
14: 81 11 86 48 mr2pt.dd %f2,%f4,%f6 |
18: 02 10 64 48 mr2mp1.ss %f2,%f3,%f4 |
1c: 82 30 e8 48 mr2mp1.sd %f6,%f7,%f8 |
20: 82 21 c8 48 mr2mp1.dd %f4,%f6,%f8 |
24: 03 18 85 48 mr2mpt.ss %f3,%f4,%f5 |
28: 83 38 09 49 mr2mpt.sd %f7,%f8,%f9 |
2c: 83 31 0a 49 mr2mpt.dd %f6,%f8,%f10 |
30: 04 20 a6 48 mi2p1.ss %f4,%f5,%f6 |
34: 84 40 2a 49 mi2p1.sd %f8,%f9,%f10 |
38: 84 61 d0 49 mi2p1.dd %f12,%f14,%f16 |
3c: 05 38 09 49 mi2pt.ss %f7,%f8,%f9 |
40: 85 58 8d 49 mi2pt.sd %f11,%f12,%f13 |
44: 85 71 12 4a mi2pt.dd %f14,%f16,%f18 |
48: 06 50 6c 49 mi2mp1.ss %f10,%f11,%f12 |
4c: 86 70 f0 49 mi2mp1.sd %f14,%f15,%f16 |
50: 86 81 54 4a mi2mp1.dd %f16,%f18,%f20 |
54: 07 68 cf 49 mi2mpt.ss %f13,%f14,%f15 |
58: 87 88 53 4a mi2mpt.sd %f17,%f18,%f19 |
5c: 87 91 96 4a mi2mpt.dd %f18,%f20,%f22 |
60: 08 70 f0 49 mrmt1p2.ss %f14,%f15,%f16 |
64: 88 a0 b6 4a mrmt1p2.sd %f20,%f21,%f22 |
68: 88 a1 d8 4a mrmt1p2.dd %f20,%f22,%f24 |
6c: 09 78 11 4a mm12mpm.ss %f15,%f16,%f17 |
70: 89 b8 19 4b mm12mpm.sd %f23,%f24,%f25 |
74: 89 b1 1a 4b mm12mpm.dd %f22,%f24,%f26 |
78: 0a 90 74 4a mrm1p2.ss %f18,%f19,%f20 |
7c: 8a d0 7c 4b mrm1p2.sd %f26,%f27,%f28 |
80: 8a a1 d8 4a mrm1p2.dd %f20,%f22,%f24 |
84: 0b 98 95 4a mm12ttpm.ss %f19,%f20,%f21 |
88: 8b e8 df 4b mm12ttpm.sd %f29,%f30,%f31 |
8c: 8b b1 1a 4b mm12ttpm.dd %f22,%f24,%f26 |
90: 0c a0 b6 4a mimt1p2.ss %f20,%f21,%f22 |
94: 8c 00 22 48 mimt1p2.sd %f0,%f1,%f2 |
98: 8c c1 5c 4b mimt1p2.dd %f24,%f26,%f28 |
9c: 0d a8 d7 4a mm12tpm.ss %f21,%f22,%f23 |
a0: 8d 18 85 48 mm12tpm.sd %f3,%f4,%f5 |
a4: 8d f1 02 48 mm12tpm.dd %f30,%f0,%f2 |
a8: 0e b0 f8 4a mim1p2.ss %f22,%f23,%f24 |
ac: 8e 30 e8 48 mim1p2.sd %f6,%f7,%f8 |
b0: 8e 21 c8 48 mim1p2.dd %f4,%f6,%f8 |
b4: 0f bc 19 4b m12tpa.ss %f23,%f24,%f25 |
b8: 8f 4c 4b 49 m12tpa.sd %f9,%f10,%f11 |
bc: 8f 35 0a 49 m12tpa.dd %f6,%f8,%f10 |
c0: 00 02 22 48 d.mr2p1.ss %f0,%f1,%f2 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: 80 1a 85 48 d.mr2p1.sd %f3,%f4,%f5 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: 80 03 44 48 d.mr2p1.dd %f0,%f2,%f4 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: 01 0a 43 48 d.mr2pt.ss %f1,%f2,%f3 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: 81 22 a6 48 d.mr2pt.sd %f4,%f5,%f6 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: 81 13 86 48 d.mr2pt.dd %f2,%f4,%f6 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: 02 12 64 48 d.mr2mp1.ss %f2,%f3,%f4 |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: 82 32 e8 48 d.mr2mp1.sd %f6,%f7,%f8 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: 82 23 c8 48 d.mr2mp1.dd %f4,%f6,%f8 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
108: 03 1a 85 48 d.mr2mpt.ss %f3,%f4,%f5 |
10c: 00 00 00 a0 shl %r0,%r0,%r0 |
110: 83 3a 09 49 d.mr2mpt.sd %f7,%f8,%f9 |
114: 00 00 00 a0 shl %r0,%r0,%r0 |
118: 83 33 0a 49 d.mr2mpt.dd %f6,%f8,%f10 |
11c: 00 00 00 a0 shl %r0,%r0,%r0 |
120: 04 22 a6 48 d.mi2p1.ss %f4,%f5,%f6 |
124: 00 00 00 a0 shl %r0,%r0,%r0 |
128: 84 42 2a 49 d.mi2p1.sd %f8,%f9,%f10 |
12c: 00 00 00 a0 shl %r0,%r0,%r0 |
130: 84 63 d0 49 d.mi2p1.dd %f12,%f14,%f16 |
134: 00 00 00 a0 shl %r0,%r0,%r0 |
138: 05 3a 09 49 d.mi2pt.ss %f7,%f8,%f9 |
13c: 00 00 00 a0 shl %r0,%r0,%r0 |
140: 85 5a 8d 49 d.mi2pt.sd %f11,%f12,%f13 |
144: 00 00 00 a0 shl %r0,%r0,%r0 |
148: 85 73 12 4a d.mi2pt.dd %f14,%f16,%f18 |
14c: 00 00 00 a0 shl %r0,%r0,%r0 |
150: 06 52 6c 49 d.mi2mp1.ss %f10,%f11,%f12 |
154: 00 00 00 a0 shl %r0,%r0,%r0 |
158: 86 72 f0 49 d.mi2mp1.sd %f14,%f15,%f16 |
15c: 00 00 00 a0 shl %r0,%r0,%r0 |
160: 86 83 54 4a d.mi2mp1.dd %f16,%f18,%f20 |
164: 00 00 00 a0 shl %r0,%r0,%r0 |
168: 07 6a cf 49 d.mi2mpt.ss %f13,%f14,%f15 |
16c: 00 00 00 a0 shl %r0,%r0,%r0 |
170: 87 8a 53 4a d.mi2mpt.sd %f17,%f18,%f19 |
174: 00 00 00 a0 shl %r0,%r0,%r0 |
178: 87 93 96 4a d.mi2mpt.dd %f18,%f20,%f22 |
17c: 00 00 00 a0 shl %r0,%r0,%r0 |
180: 08 72 f0 49 d.mrmt1p2.ss %f14,%f15,%f16 |
184: 00 00 00 a0 shl %r0,%r0,%r0 |
188: 88 a2 b6 4a d.mrmt1p2.sd %f20,%f21,%f22 |
18c: 00 00 00 a0 shl %r0,%r0,%r0 |
190: 88 a3 d8 4a d.mrmt1p2.dd %f20,%f22,%f24 |
194: 00 00 00 a0 shl %r0,%r0,%r0 |
198: 09 7a 11 4a d.mm12mpm.ss %f15,%f16,%f17 |
19c: 00 00 00 a0 shl %r0,%r0,%r0 |
1a0: 89 ba 19 4b d.mm12mpm.sd %f23,%f24,%f25 |
1a4: 00 00 00 a0 shl %r0,%r0,%r0 |
1a8: 89 b3 1a 4b d.mm12mpm.dd %f22,%f24,%f26 |
1ac: 00 00 00 a0 shl %r0,%r0,%r0 |
1b0: 0a 92 74 4a d.mrm1p2.ss %f18,%f19,%f20 |
1b4: 00 00 00 a0 shl %r0,%r0,%r0 |
1b8: 8a d2 7c 4b d.mrm1p2.sd %f26,%f27,%f28 |
1bc: 00 00 00 a0 shl %r0,%r0,%r0 |
1c0: 8a a3 d8 4a d.mrm1p2.dd %f20,%f22,%f24 |
1c4: 00 00 00 a0 shl %r0,%r0,%r0 |
1c8: 0b 9a 95 4a d.mm12ttpm.ss %f19,%f20,%f21 |
1cc: 00 00 00 a0 shl %r0,%r0,%r0 |
1d0: 8b ea df 4b d.mm12ttpm.sd %f29,%f30,%f31 |
1d4: 00 00 00 a0 shl %r0,%r0,%r0 |
1d8: 8b b3 1a 4b d.mm12ttpm.dd %f22,%f24,%f26 |
1dc: 00 00 00 a0 shl %r0,%r0,%r0 |
1e0: 0c a2 b6 4a d.mimt1p2.ss %f20,%f21,%f22 |
1e4: 00 00 00 a0 shl %r0,%r0,%r0 |
1e8: 8c 02 22 48 d.mimt1p2.sd %f0,%f1,%f2 |
1ec: 00 00 00 a0 shl %r0,%r0,%r0 |
1f0: 8c c3 5c 4b d.mimt1p2.dd %f24,%f26,%f28 |
1f4: 00 00 00 a0 shl %r0,%r0,%r0 |
1f8: 0d aa d7 4a d.mm12tpm.ss %f21,%f22,%f23 |
1fc: 00 00 00 a0 shl %r0,%r0,%r0 |
200: 8d 1a 85 48 d.mm12tpm.sd %f3,%f4,%f5 |
204: 00 00 00 a0 shl %r0,%r0,%r0 |
208: 8d f3 02 48 d.mm12tpm.dd %f30,%f0,%f2 |
20c: 00 00 00 a0 shl %r0,%r0,%r0 |
210: 0e b2 f8 4a d.mim1p2.ss %f22,%f23,%f24 |
214: 00 00 00 a0 shl %r0,%r0,%r0 |
218: 8e 32 e8 48 d.mim1p2.sd %f6,%f7,%f8 |
21c: 00 00 00 a0 shl %r0,%r0,%r0 |
220: 8e 23 c8 48 d.mim1p2.dd %f4,%f6,%f8 |
224: 00 00 00 a0 shl %r0,%r0,%r0 |
228: 0f be 19 4b d.m12tpa.ss %f23,%f24,%f25 |
22c: 00 00 00 a0 shl %r0,%r0,%r0 |
230: 8f 4e 4b 49 d.m12tpa.sd %f9,%f10,%f11 |
234: 00 00 00 a0 shl %r0,%r0,%r0 |
238: 8f 37 0a 49 d.m12tpa.dd %f6,%f8,%f10 |
23c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/fldst06.s
0,0 → 1,75
# fst.q (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fst.q %f0,0(%r0) |
fst.q %f28,128(%r1) |
fst.q %f24,256(%r2) |
fst.q %f20,512(%r3) |
fst.q %f16,1024(%r4) |
fst.q %f12,4096(%r5) |
fst.q %f8,8192(%r6) |
fst.q %f4,16384(%r7) |
fst.q %f0,32752(%r7) |
fst.q %f28,-32768(%r7) |
fst.q %f24,-16384(%r8) |
fst.q %f20,-8192(%r9) |
fst.q %f16,-4096(%r10) |
fst.q %f12,-1024(%r11) |
fst.q %f8,-512(%r12) |
fst.q %f4,-256(%r13) |
fst.q %f0,-16(%r14) |
|
# Immediate form, with auto-increment. |
fst.q %f0,0(%r0)++ |
fst.q %f4,128(%r1)++ |
fst.q %f8,256(%r2)++ |
fst.q %f12,512(%r3)++ |
fst.q %f16,1024(%r4)++ |
fst.q %f20,4096(%r5)++ |
fst.q %f24,8192(%r6)++ |
fst.q %f28,16384(%r7)++ |
fst.q %f0,32752(%r7)++ |
fst.q %f4,-32768(%r7)++ |
fst.q %f8,-16384(%r8)++ |
fst.q %f12,-8192(%r9)++ |
fst.q %f16,-4096(%r10)++ |
fst.q %f20,-1024(%r11)++ |
fst.q %f24,-512(%r12)++ |
fst.q %f28,-256(%r13)++ |
fst.q %f16,-16(%r14)++ |
|
# Index form, no auto-increment. |
fst.q %f0,%r5(%r0) |
fst.q %f20,%r6(%r1) |
fst.q %f16,%r7(%r2) |
fst.q %f12,%r8(%r3) |
fst.q %f8,%r9(%r4) |
fst.q %f4,%r0(%r5) |
fst.q %f0,%r1(%r6) |
fst.q %f28,%r12(%r7) |
fst.q %f24,%r13(%r8) |
fst.q %f20,%r14(%r9) |
fst.q %f16,%r15(%r10) |
fst.q %f12,%r16(%r11) |
fst.q %f8,%r17(%r12) |
fst.q %f4,%r28(%r13) |
fst.q %f0,%r31(%r14) |
|
# Index form, with auto-increment. |
fst.q %f0,%r5(%r0)++ |
fst.q %f4,%r6(%r1)++ |
fst.q %f8,%r7(%r2)++ |
fst.q %f12,%r8(%r3)++ |
fst.q %f16,%r9(%r4)++ |
fst.q %f20,%r0(%r5)++ |
fst.q %f24,%r1(%r6)++ |
fst.q %f28,%r12(%r7)++ |
fst.q %f0,%r13(%r8)++ |
fst.q %f4,%r14(%r9)++ |
fst.q %f8,%r15(%r10)++ |
fst.q %f12,%r16(%r11)++ |
fst.q %f16,%r17(%r12)++ |
fst.q %f20,%r28(%r13)++ |
fst.q %f24,%r31(%r14)++ |
|
/testsuite/gas/i860/form.d
0,0 → 1,63
#as: |
#objdump: -dr |
#name: i860 form/pform |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: da 05 02 48 pform %f0,%f2 |
4: da 15 04 48 pform %f2,%f4 |
8: da 25 06 48 pform %f4,%f6 |
c: da 45 0a 48 pform %f8,%f10 |
10: da 65 0e 48 pform %f12,%f14 |
14: da 85 12 48 pform %f16,%f18 |
18: da a5 16 48 pform %f20,%f22 |
1c: da c5 1a 48 pform %f24,%f26 |
20: da e5 1e 48 pform %f28,%f30 |
24: da 01 02 48 form %f0,%f2 |
28: da 11 04 48 form %f2,%f4 |
2c: da 21 06 48 form %f4,%f6 |
30: da 41 0a 48 form %f8,%f10 |
34: da 61 0e 48 form %f12,%f14 |
38: da 81 12 48 form %f16,%f18 |
3c: da a1 16 48 form %f20,%f22 |
40: da c1 1a 48 form %f24,%f26 |
44: da e1 1e 48 form %f28,%f30 |
48: da 07 02 48 d.pform %f0,%f2 |
4c: 00 00 00 a0 shl %r0,%r0,%r0 |
50: da 17 04 48 d.pform %f2,%f4 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: da 27 06 48 d.pform %f4,%f6 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: da 47 0a 48 d.pform %f8,%f10 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: da 67 0e 48 d.pform %f12,%f14 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: da 87 12 48 d.pform %f16,%f18 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
78: da a7 16 48 d.pform %f20,%f22 |
7c: 00 00 00 a0 shl %r0,%r0,%r0 |
80: da c7 1a 48 d.pform %f24,%f26 |
84: 00 00 00 a0 shl %r0,%r0,%r0 |
88: da e7 1e 48 d.pform %f28,%f30 |
8c: 00 00 00 a0 shl %r0,%r0,%r0 |
90: da 03 02 48 d.form %f0,%f2 |
94: 00 00 00 a0 shl %r0,%r0,%r0 |
98: da 13 04 48 d.form %f2,%f4 |
9c: 00 00 00 a0 shl %r0,%r0,%r0 |
a0: da 23 06 48 d.form %f4,%f6 |
a4: 00 00 00 a0 shl %r0,%r0,%r0 |
a8: da 43 0a 48 d.form %f8,%f10 |
ac: 00 00 00 a0 shl %r0,%r0,%r0 |
b0: da 63 0e 48 d.form %f12,%f14 |
b4: 00 00 00 a0 shl %r0,%r0,%r0 |
b8: da 83 12 48 d.form %f16,%f18 |
bc: 00 00 00 a0 shl %r0,%r0,%r0 |
c0: da a3 16 48 d.form %f20,%f22 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: da c3 1a 48 d.form %f24,%f26 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: da e3 1e 48 d.form %f28,%f30 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/fldst08.s
0,0 → 1,75
# pfld.d (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
pfld.d 0(%r0),%f0 |
pfld.d 128(%r1),%f30 |
pfld.d 256(%r2),%f28 |
pfld.d 512(%r3),%f26 |
pfld.d 1024(%r4),%f24 |
pfld.d 4096(%r5),%f22 |
pfld.d 8192(%r6),%f20 |
pfld.d 16384(%r7),%f18 |
pfld.d 32760(%r7),%f16 |
pfld.d -32768(%r7),%f14 |
pfld.d -16384(%r8),%f12 |
pfld.d -8192(%r9),%f10 |
pfld.d -4096(%r10),%f8 |
pfld.d -1024(%r11),%f6 |
pfld.d -512(%r12),%f4 |
pfld.d -248(%r13),%f2 |
pfld.d -8(%r14),%f0 |
|
# Immediate form, with auto-increment. |
pfld.d 0(%r0)++,%f0 |
pfld.d 128(%r1)++,%f2 |
pfld.d 256(%r2)++,%f4 |
pfld.d 512(%r3)++,%f6 |
pfld.d 1024(%r4)++,%f8 |
pfld.d 4096(%r5)++,%f10 |
pfld.d 8192(%r6)++,%f12 |
pfld.d 16384(%r7)++,%f14 |
pfld.d 32760(%r7)++,%f16 |
pfld.d -32768(%r7)++,%f18 |
pfld.d -16384(%r8)++,%f20 |
pfld.d -8192(%r9)++,%f22 |
pfld.d -4096(%r10)++,%f24 |
pfld.d -1024(%r11)++,%f26 |
pfld.d -512(%r12)++,%f28 |
pfld.d -248(%r13)++,%f30 |
pfld.d -8(%r14)++,%f16 |
|
# Index form, no auto-increment. |
pfld.d %r5(%r0),%f0 |
pfld.d %r6(%r1),%f30 |
pfld.d %r7(%r2),%f28 |
pfld.d %r8(%r3),%f26 |
pfld.d %r9(%r4),%f24 |
pfld.d %r0(%r5),%f22 |
pfld.d %r1(%r6),%f20 |
pfld.d %r12(%r7),%f18 |
pfld.d %r13(%r8),%f16 |
pfld.d %r14(%r9),%f14 |
pfld.d %r15(%r10),%f12 |
pfld.d %r16(%r11),%f10 |
pfld.d %r17(%r12),%f8 |
pfld.d %r28(%r13),%f6 |
pfld.d %r31(%r14),%f4 |
|
# Index form, with auto-increment. |
pfld.d %r5(%r0)++,%f0 |
pfld.d %r6(%r1)++,%f2 |
pfld.d %r7(%r2)++,%f4 |
pfld.d %r8(%r3)++,%f6 |
pfld.d %r9(%r4)++,%f8 |
pfld.d %r0(%r5)++,%f10 |
pfld.d %r1(%r6)++,%f12 |
pfld.d %r12(%r7)++,%f14 |
pfld.d %r13(%r8)++,%f16 |
pfld.d %r14(%r9)++,%f18 |
pfld.d %r15(%r10)++,%f20 |
pfld.d %r16(%r11)++,%f22 |
pfld.d %r17(%r12)++,%f24 |
pfld.d %r28(%r13)++,%f26 |
pfld.d %r31(%r14)++,%f30 |
|
/testsuite/gas/i860/xp.s
0,0 → 1,266
# This tests the XP-only instructions: |
# ldint.x, ldio.x, stio.x, scyc.b, pfld.q |
# And control registers: |
# %bear, %ccr, %p0, %p1, %p2, %p3 |
|
.text |
|
# XP-only control registers |
ld.c %bear,%r31 |
ld.c %bear,%r0 |
ld.c %ccr,%r5 |
ld.c %ccr,%r30 |
ld.c %p0,%r10 |
ld.c %p0,%r2 |
ld.c %p1,%r21 |
ld.c %p1,%r0 |
ld.c %p2,%r28 |
ld.c %p2,%r12 |
ld.c %p3,%r31 |
ld.c %p3,%r6 |
|
st.c %r0,%bear |
st.c %r30,%bear |
st.c %r7,%ccr |
st.c %r31,%ccr |
st.c %r11,%p0 |
st.c %r3,%p0 |
st.c %r22,%p1 |
st.c %r15,%p1 |
st.c %r29,%p2 |
st.c %r13,%p2 |
st.c %r4,%p3 |
st.c %r6,%p3 |
|
# ldint.{s,b,l} |
ldint.l %r0,%r5 |
ldint.l %r6,%r31 |
ldint.l %r7,%r30 |
ldint.l %r8,%r29 |
ldint.l %r9,%r28 |
ldint.l %r0,%r27 |
ldint.l %r1,%r26 |
ldint.l %r12,%r25 |
ldint.l %r13,%r24 |
ldint.l %r14,%r23 |
ldint.l %r15,%r22 |
ldint.l %r16,%r21 |
ldint.l %r17,%r20 |
ldint.l %r28,%r19 |
ldint.l %r31,%r18 |
|
ldint.s %r0,%r5 |
ldint.s %r6,%r31 |
ldint.s %r7,%r30 |
ldint.s %r8,%r29 |
ldint.s %r9,%r28 |
ldint.s %r0,%r27 |
ldint.s %r1,%r26 |
ldint.s %r12,%r25 |
ldint.s %r13,%r24 |
ldint.s %r14,%r23 |
ldint.s %r15,%r22 |
ldint.s %r16,%r21 |
ldint.s %r17,%r20 |
ldint.s %r28,%r19 |
ldint.s %r31,%r18 |
|
ldint.b %r0,%r5 |
ldint.b %r6,%r31 |
ldint.b %r7,%r30 |
ldint.b %r8,%r29 |
ldint.b %r9,%r28 |
ldint.b %r0,%r27 |
ldint.b %r1,%r26 |
ldint.b %r12,%r25 |
ldint.b %r13,%r24 |
ldint.b %r14,%r23 |
ldint.b %r15,%r22 |
ldint.b %r16,%r21 |
ldint.b %r17,%r20 |
ldint.b %r28,%r19 |
ldint.b %r31,%r18 |
|
# ldio.{s,b,l} |
ldio.l %r0,%r5 |
ldio.l %r6,%r31 |
ldio.l %r7,%r30 |
ldio.l %r8,%r29 |
ldio.l %r9,%r28 |
ldio.l %r0,%r27 |
ldio.l %r1,%r26 |
ldio.l %r12,%r25 |
ldio.l %r13,%r24 |
ldio.l %r14,%r23 |
ldio.l %r15,%r22 |
ldio.l %r16,%r21 |
ldio.l %r17,%r20 |
ldio.l %r28,%r19 |
ldio.l %r31,%r18 |
|
ldio.s %r0,%r5 |
ldio.s %r6,%r31 |
ldio.s %r7,%r30 |
ldio.s %r8,%r29 |
ldio.s %r9,%r28 |
ldio.s %r0,%r27 |
ldio.s %r1,%r26 |
ldio.s %r12,%r25 |
ldio.s %r13,%r24 |
ldio.s %r14,%r23 |
ldio.s %r15,%r22 |
ldio.s %r16,%r21 |
ldio.s %r17,%r20 |
ldio.s %r28,%r19 |
ldio.s %r31,%r18 |
|
ldio.b %r0,%r5 |
ldio.b %r6,%r31 |
ldio.b %r7,%r30 |
ldio.b %r8,%r29 |
ldio.b %r9,%r28 |
ldio.b %r0,%r27 |
ldio.b %r1,%r26 |
ldio.b %r12,%r25 |
ldio.b %r13,%r24 |
ldio.b %r14,%r23 |
ldio.b %r15,%r22 |
ldio.b %r16,%r21 |
ldio.b %r17,%r20 |
ldio.b %r28,%r19 |
ldio.b %r31,%r18 |
|
# stio.{s,b,l} |
stio.l %r0,%r5 |
stio.l %r6,%r31 |
stio.l %r7,%r30 |
stio.l %r8,%r29 |
stio.l %r9,%r28 |
stio.l %r0,%r27 |
stio.l %r1,%r26 |
stio.l %r12,%r25 |
stio.l %r13,%r24 |
stio.l %r14,%r23 |
stio.l %r15,%r22 |
stio.l %r16,%r21 |
stio.l %r17,%r20 |
stio.l %r28,%r19 |
stio.l %r31,%r18 |
|
stio.s %r0,%r5 |
stio.s %r6,%r31 |
stio.s %r7,%r30 |
stio.s %r8,%r29 |
stio.s %r9,%r28 |
stio.s %r0,%r27 |
stio.s %r1,%r26 |
stio.s %r12,%r25 |
stio.s %r13,%r24 |
stio.s %r14,%r23 |
stio.s %r15,%r22 |
stio.s %r16,%r21 |
stio.s %r17,%r20 |
stio.s %r28,%r19 |
stio.s %r31,%r18 |
|
stio.b %r0,%r5 |
stio.b %r6,%r31 |
stio.b %r7,%r30 |
stio.b %r8,%r29 |
stio.b %r9,%r28 |
stio.b %r0,%r27 |
stio.b %r1,%r26 |
stio.b %r12,%r25 |
stio.b %r13,%r24 |
stio.b %r14,%r23 |
stio.b %r15,%r22 |
stio.b %r16,%r21 |
stio.b %r17,%r20 |
stio.b %r28,%r19 |
stio.b %r31,%r18 |
|
# scyc.b |
scyc.b %r0 |
scyc.b %r5 |
scyc.b %r6 |
scyc.b %r13 |
scyc.b %r14 |
scyc.b %r28 |
scyc.b %r29 |
scyc.b %r30 |
scyc.b %r31 |
|
# pfld.q |
# Immediate form, no auto-increment. |
pfld.q 0(%r0),%f0 |
pfld.q 128(%r1),%f28 |
pfld.q 256(%r2),%f24 |
pfld.q 512(%r3),%f20 |
pfld.q 1024(%r4),%f16 |
pfld.q 4096(%r5),%f12 |
pfld.q 8192(%r6),%f8 |
pfld.q 16384(%r7),%f4 |
pfld.q 32760(%r7),%f0 |
pfld.q -32768(%r7),%f28 |
pfld.q -16384(%r8),%f24 |
pfld.q -8192(%r9),%f20 |
pfld.q -4096(%r10),%f16 |
pfld.q -1024(%r11),%f12 |
pfld.q -512(%r12),%f8 |
pfld.q -248(%r13),%f4 |
pfld.q -8(%r14),%f0 |
|
# Immediate form, with auto-increment. |
pfld.q 0(%r0)++,%f0 |
pfld.q 128(%r1)++,%f4 |
pfld.q 256(%r2)++,%f8 |
pfld.q 512(%r3)++,%f12 |
pfld.q 1024(%r4)++,%f16 |
pfld.q 4096(%r5)++,%f20 |
pfld.q 8192(%r6)++,%f24 |
pfld.q 16384(%r7)++,%f28 |
pfld.q 32760(%r7)++,%f0 |
pfld.q -32768(%r7)++,%f4 |
pfld.q -16384(%r8)++,%f8 |
pfld.q -8192(%r9)++,%f12 |
pfld.q -4096(%r10)++,%f16 |
pfld.q -1024(%r11)++,%f20 |
pfld.q -512(%r12)++,%f24 |
pfld.q -248(%r13)++,%f28 |
pfld.q -8(%r14)++,%f16 |
|
# Index form, no auto-increment. |
pfld.q %r5(%r0),%f28 |
pfld.q %r6(%r1),%f24 |
pfld.q %r7(%r2),%f20 |
pfld.q %r8(%r3),%f16 |
pfld.q %r9(%r4),%f12 |
pfld.q %r0(%r5),%f8 |
pfld.q %r1(%r6),%f4 |
pfld.q %r12(%r7),%f0 |
pfld.q %r13(%r8),%f28 |
pfld.q %r14(%r9),%f24 |
pfld.q %r15(%r10),%f20 |
pfld.q %r16(%r11),%f16 |
pfld.q %r17(%r12),%f12 |
pfld.q %r28(%r13),%f8 |
pfld.q %r31(%r14),%f4 |
|
# Index form, with auto-increment. |
pfld.q %r5(%r0)++,%f0 |
pfld.q %r6(%r1)++,%f4 |
pfld.q %r7(%r2)++,%f8 |
pfld.q %r8(%r3)++,%f12 |
pfld.q %r9(%r4)++,%f16 |
pfld.q %r0(%r5)++,%f20 |
pfld.q %r1(%r6)++,%f24 |
pfld.q %r12(%r7)++,%f28 |
pfld.q %r13(%r8)++,%f0 |
pfld.q %r14(%r9)++,%f4 |
pfld.q %r15(%r10)++,%f8 |
pfld.q %r16(%r11)++,%f12 |
pfld.q %r17(%r12)++,%f16 |
pfld.q %r28(%r13)++,%f20 |
pfld.q %r31(%r14)++,%f24 |
|
|
/testsuite/gas/i860/ldst02.d
0,0 → 1,39
#as: |
#objdump: -dr |
#name: i860 ldst02 (ld.s) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 14 ld.s 0\(%r0\),%r0 |
4: 7a 00 3f 14 ld.s 122\(%r1\),%r31 |
8: 02 01 5e 14 ld.s 258\(%sp\),%r30 |
c: 00 02 7d 14 ld.s 512\(%fp\),%r29 |
10: 04 04 9c 14 ld.s 1028\(%r4\),%r28 |
14: fa 0f bb 14 ld.s 4090\(%r5\),%r27 |
18: fe 1f da 14 ld.s 8190\(%r6\),%r26 |
1c: 00 40 f9 14 ld.s 16384\(%r7\),%r25 |
20: 00 c0 18 15 ld.s -16384\(%r8\),%r24 |
24: 00 e0 37 15 ld.s -8192\(%r9\),%r23 |
28: 00 f0 56 15 ld.s -4096\(%r10\),%r22 |
2c: 00 fc 75 15 ld.s -1024\(%r11\),%r21 |
30: 04 fe 94 15 ld.s -508\(%r12\),%r20 |
34: 0e ff b3 15 ld.s -242\(%r13\),%r19 |
38: fe ff d2 15 ld.s -2\(%r14\),%r18 |
3c: 00 28 00 10 ld.s %r5\(%r0\),%r0 |
40: 00 30 3f 10 ld.s %r6\(%r1\),%r31 |
44: 00 38 5e 10 ld.s %r7\(%sp\),%r30 |
48: 00 40 7d 10 ld.s %r8\(%fp\),%r29 |
4c: 00 48 9c 10 ld.s %r9\(%r4\),%r28 |
50: 00 00 bb 10 ld.s %r0\(%r5\),%r27 |
54: 00 08 da 10 ld.s %r1\(%r6\),%r26 |
58: 00 60 f9 10 ld.s %r12\(%r7\),%r25 |
5c: 00 68 18 11 ld.s %r13\(%r8\),%r24 |
60: 00 70 37 11 ld.s %r14\(%r9\),%r23 |
64: 00 78 56 11 ld.s %r15\(%r10\),%r22 |
68: 00 80 75 11 ld.s %r16\(%r11\),%r21 |
6c: 00 88 94 11 ld.s %r17\(%r12\),%r20 |
70: 00 e0 b3 11 ld.s %r28\(%r13\),%r19 |
74: 00 f8 d2 11 ld.s %r31\(%r14\),%r18 |
/testsuite/gas/i860/ldst04.d
0,0 → 1,24
#as: |
#objdump: -dr |
#name: i860 ldst04 (st.l) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 01 00 00 1c st.l %r0,0\(%r0\) |
4: 7d f8 20 1c st.l %r31,124\(%r1\) |
8: 01 f1 40 1c st.l %r30,256\(%sp\) |
c: 01 ea 60 1c st.l %r29,512\(%fp\) |
10: 01 e4 80 1c st.l %r28,1024\(%r4\) |
14: 01 d8 a2 1c st.l %r27,4096\(%r5\) |
18: 01 d0 c4 1c st.l %r26,8192\(%r6\) |
1c: 01 c8 e8 1c st.l %r25,16384\(%r7\) |
20: 01 c0 18 1d st.l %r24,-16384\(%r8\) |
24: 01 b8 3c 1d st.l %r23,-8192\(%r9\) |
28: 01 b0 5e 1d st.l %r22,-4096\(%r10\) |
2c: 01 ac 7f 1d st.l %r21,-1024\(%r11\) |
30: 05 a6 9f 1d st.l %r20,-508\(%r12\) |
34: 09 9f bf 1d st.l %r19,-248\(%r13\) |
38: fd 97 df 1d st.l %r18,-4\(%r14\) |
/testsuite/gas/i860/bte.d
0,0 → 1,62
#as: |
#objdump: -dr |
#name: i860 bte/btne |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <some_label-0xb8>: |
0: 2d 00 e0 57 btne 0,%r31,0x000000b8 // b8 <some_label> |
4: 2c 08 a0 57 btne 1,%r29,0x000000b8 // b8 <some_label> |
8: 2b 10 60 57 btne 2,%r27,0x000000b8 // b8 <some_label> |
c: 2a 18 20 57 btne 3,%r25,0x000000b8 // b8 <some_label> |
10: 29 50 e0 56 btne 10,%r23,0x000000b8 // b8 <some_label> |
14: 28 58 a0 56 btne 11,%r21,0x000000b8 // b8 <some_label> |
18: 27 60 60 56 btne 12,%r19,0x000000b8 // b8 <some_label> |
1c: 26 e8 20 56 btne 29,%r17,0x000000b8 // b8 <some_label> |
20: 25 f0 00 56 btne 30,%r16,0x000000b8 // b8 <some_label> |
24: 24 f8 00 55 btne 31,%r8,0x000000b8 // b8 <some_label> |
28: 00 78 00 54 btne 15,%r0,0x0000002c // 2c <some_label-0x8c> |
28: R_860_PC16 some_fake_extern |
2c: 22 00 e0 5f bte 0,%r31,0x000000b8 // b8 <some_label> |
30: 21 08 a0 5f bte 1,%r29,0x000000b8 // b8 <some_label> |
34: 20 10 60 5f bte 2,%r27,0x000000b8 // b8 <some_label> |
38: 1f 18 20 5f bte 3,%r25,0x000000b8 // b8 <some_label> |
3c: 1e 50 e0 5e bte 10,%r23,0x000000b8 // b8 <some_label> |
40: 1d 58 a0 5e bte 11,%r21,0x000000b8 // b8 <some_label> |
44: 1c 60 60 5e bte 12,%r19,0x000000b8 // b8 <some_label> |
48: 1b e8 20 5e bte 29,%r17,0x000000b8 // b8 <some_label> |
4c: 1a f0 00 5e bte 30,%r16,0x000000b8 // b8 <some_label> |
50: 19 f8 00 5d bte 31,%r8,0x000000b8 // b8 <some_label> |
54: 00 78 00 5c bte 15,%r0,0x00000058 // 58 <some_label-0x60> |
54: R_860_PC16 some_fake_extern |
58: 17 00 e0 53 btne %r0,%r31,0x000000b8 // b8 <some_label> |
5c: 16 08 a0 53 btne %r1,%r29,0x000000b8 // b8 <some_label> |
60: 15 10 60 53 btne %sp,%r27,0x000000b8 // b8 <some_label> |
64: 14 18 20 53 btne %fp,%r25,0x000000b8 // b8 <some_label> |
68: 13 50 e0 52 btne %r10,%r23,0x000000b8 // b8 <some_label> |
6c: 12 58 a0 52 btne %r11,%r21,0x000000b8 // b8 <some_label> |
70: 11 60 60 52 btne %r12,%r19,0x000000b8 // b8 <some_label> |
74: 10 e8 20 52 btne %r29,%r17,0x000000b8 // b8 <some_label> |
78: 0f f0 00 52 btne %r30,%r16,0x000000b8 // b8 <some_label> |
7c: 0e f8 00 51 btne %r31,%r8,0x000000b8 // b8 <some_label> |
80: 00 78 00 50 btne %r15,%r0,0x00000084 // 84 <some_label-0x34> |
80: R_860_PC16 some_fake_extern |
84: 0c 00 e0 5b bte %r0,%r31,0x000000b8 // b8 <some_label> |
88: 0b 08 a0 5b bte %r1,%r29,0x000000b8 // b8 <some_label> |
8c: 0a 10 60 5b bte %sp,%r27,0x000000b8 // b8 <some_label> |
90: 09 18 20 5b bte %fp,%r25,0x000000b8 // b8 <some_label> |
94: 08 50 e0 5a bte %r10,%r23,0x000000b8 // b8 <some_label> |
98: 07 58 a0 5a bte %r11,%r21,0x000000b8 // b8 <some_label> |
9c: 06 60 60 5a bte %r12,%r19,0x000000b8 // b8 <some_label> |
a0: 05 e8 20 5a bte %r29,%r17,0x000000b8 // b8 <some_label> |
a4: 04 f0 00 5a bte %r30,%r16,0x000000b8 // b8 <some_label> |
a8: 03 f8 00 59 bte %r31,%r8,0x000000b8 // b8 <some_label> |
ac: 00 78 00 58 bte %r15,%r0,0x000000b0 // b0 <some_label-0x8> |
ac: R_860_PC16 some_fake_extern |
b0: 00 00 00 a0 shl %r0,%r0,%r0 |
b4: 00 00 00 a0 shl %r0,%r0,%r0 |
|
000000b8 <some_label>: |
b8: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/simd.s
0,0 → 1,119
# fzchkl, fzchks, faddp, faddz |
|
.text |
|
# Pipelined, without dual bit |
pfzchkl %f0,%f2,%f8 |
pfzchkl %f2,%f4,%f16 |
pfzchkl %f4,%f6,%f13 |
pfzchkl %f8,%f10,%f18 |
|
pfzchks %f12,%f14,%f30 |
pfzchks %f16,%f18,%f20 |
pfzchks %f20,%f22,%f28 |
pfzchks %f24,%f26,%f30 |
|
pfaddp %f0,%f2,%f8 |
pfaddp %f2,%f4,%f16 |
pfaddp %f4,%f6,%f13 |
pfaddp %f8,%f10,%f18 |
|
pfaddz %f12,%f14,%f30 |
pfaddz %f16,%f18,%f20 |
pfaddz %f20,%f22,%f28 |
pfaddz %f24,%f26,%f30 |
|
# Non-pipelined, without dual bit |
fzchkl %f12,%f2,%f4 |
fzchkl %f22,%f4,%f2 |
fzchkl %f4,%f6,%f18 |
fzchkl %f8,%f10,%f28 |
|
fzchks %f12,%f14,%f6 |
fzchks %f16,%f18,%f20 |
fzchks %f20,%f22,%f28 |
fzchks %f24,%f26,%f30 |
|
faddp %f12,%f2,%f4 |
faddp %f22,%f4,%f2 |
faddp %f4,%f6,%f18 |
faddp %f8,%f10,%f28 |
|
faddz %f12,%f14,%f6 |
faddz %f16,%f18,%f20 |
faddz %f20,%f22,%f28 |
faddz %f24,%f26,%f30 |
|
# Pipelined, with dual bit |
d.pfzchkl %f0,%f2,%f18 |
nop |
d.pfzchkl %f2,%f4,%f12 |
nop |
d.pfzchkl %f4,%f6,%f30 |
nop |
d.pfzchkl %f8,%f10,%f4 |
nop |
|
d.pfzchks %f12,%f14,%f14 |
nop |
d.pfzchks %f16,%f18,%f6 |
nop |
d.pfzchks %f20,%f22,%f10 |
nop |
d.pfzchks %f24,%f26,%f8 |
nop |
|
d.pfaddp %f0,%f2,%f18 |
nop |
d.pfaddp %f2,%f4,%f0 |
nop |
d.pfaddp %f4,%f6,%f30 |
nop |
d.pfaddp %f8,%f10,%f4 |
nop |
|
d.pfaddz %f12,%f14,%f14 |
nop |
d.pfaddz %f16,%f18,%f6 |
nop |
d.pfaddz %f20,%f22,%f10 |
nop |
d.pfaddz %f24,%f26,%f8 |
nop |
|
# Non-pipelined, with dual bit |
d.fzchkl %f0,%f2,%f10 |
nop |
d.fzchkl %f2,%f4,%f18 |
nop |
d.fzchkl %f4,%f6,%f12 |
nop |
d.fzchkl %f8,%f10,%f14 |
nop |
|
d.fzchks %f12,%f14,%f16 |
nop |
d.fzchks %f16,%f18,%f12 |
nop |
d.fzchks %f20,%f22,%f16 |
nop |
d.fzchks %f24,%f26,%f30 |
nop |
|
d.faddp %f0,%f2,%f10 |
nop |
d.faddp %f2,%f4,%f18 |
nop |
d.faddp %f4,%f6,%f12 |
nop |
d.faddp %f8,%f10,%f14 |
nop |
|
d.faddz %f12,%f14,%f16 |
nop |
d.faddz %f16,%f18,%f12 |
nop |
d.faddz %f20,%f22,%f16 |
nop |
d.faddz %f24,%f26,%f30 |
nop |
/testsuite/gas/i860/ldst06.d
0,0 → 1,28
#as: |
#objdump: -dr |
#name: i860 ldst06 (st.b) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 0c st.b %r0,0\(%r0\) |
4: 01 f8 20 0c st.b %r31,1\(%r1\) |
8: 02 f0 40 0c st.b %r30,2\(%sp\) |
c: 01 ea 60 0c st.b %r29,513\(%fp\) |
10: 04 e4 80 0c st.b %r28,1028\(%r4\) |
14: fa df a1 0c st.b %r27,4090\(%r5\) |
18: fe d7 c3 0c st.b %r26,8190\(%r6\) |
1c: 01 c8 e8 0c st.b %r25,16385\(%r7\) |
20: 07 cd ef 0c st.b %r25,32007\(%r7\) |
24: ff cf ef 0c st.b %r25,32767\(%r7\) |
28: 00 c8 f0 0c st.b %r25,-32768\(%r7\) |
2c: 01 c8 f0 0c st.b %r25,-32767\(%r7\) |
30: 01 c0 18 0d st.b %r24,-16383\(%r8\) |
34: 5b b8 3c 0d st.b %r23,-8101\(%r9\) |
38: 05 b0 5e 0d st.b %r22,-4091\(%r10\) |
3c: 01 ac 7f 0d st.b %r21,-1023\(%r11\) |
40: 03 a6 9f 0d st.b %r20,-509\(%r12\) |
44: e9 9f bf 0d st.b %r19,-23\(%r13\) |
48: ff 97 df 0d st.b %r18,-1\(%r14\) |
/testsuite/gas/i860/branch.s
0,0 → 1,85
# Branches and calls |
|
.text |
|
bla %r0,%r1,.Lsome_label1 |
nop |
bla %r5,%r31,.Lsome_label2 |
nop |
bla %r23,%r16,.Lsome_label1 |
nop |
bla %r4,%r19,.Lsome_label2 |
nop |
|
bri %r0 |
nop |
bri %r1 |
nop |
bri %r31 |
nop |
bri %r1 |
nop |
bri %r12 |
nop |
bri %r19 |
nop |
|
calli %r0 |
nop |
calli %r1 |
nop |
calli %r31 |
nop |
calli %r5 |
nop |
calli %r22 |
nop |
calli %r9 |
nop |
|
br .Lsome_label1 |
nop |
br .Lsome_label2 |
nop |
br some_fake_extern |
nop |
|
call .Lcall_me_now |
nop |
call .Lcall_me_anytime |
nop |
call some_fake_extern |
nop |
|
bc .+12 |
bc .Lsome_label1 |
bc some_fake_extern |
|
bc.t .+0 |
nop |
bc.t .Lsome_label1 |
nop |
bc.t some_fake_extern |
nop |
|
bnc .+12 |
bnc .Lsome_label1 |
bnc some_fake_extern |
|
bnc.t .+0 |
nop |
bnc.t .Lsome_label1 |
nop |
bnc.t some_fake_extern |
nop |
|
|
.Lsome_label1: |
.Lcall_me_now: |
nop |
nop |
.Lsome_label2: |
.Lcall_me_anytime: |
nop |
nop |
|
/testsuite/gas/i860/pseudo-ops01.s
0,0 → 1,10
# Test some assembler pseudo-operations: |
# Floating point moves. |
|
.text |
fmov.ss %f5,%f6 |
fmov.dd %f8,%f10 |
fmov.sd %f3,%f20 |
fmov.ds %f24,%f9 |
pfmov.ds %f28,%f3 |
|
/testsuite/gas/i860/pfmam.s
0,0 → 1,182
# pfmam.p family (p={ss,sd,dd}) |
|
.text |
|
# pfmam without dual bit. |
mr2p1.ss %f0,%f1,%f2 |
mr2p1.sd %f3,%f4,%f5 |
mr2p1.dd %f0,%f2,%f4 |
|
mr2pt.ss %f1,%f2,%f3 |
mr2pt.sd %f4,%f5,%f6 |
mr2pt.dd %f2,%f4,%f6 |
|
mr2mp1.ss %f2,%f3,%f4 |
mr2mp1.sd %f6,%f7,%f8 |
mr2mp1.dd %f4,%f6,%f8 |
|
mr2mpt.ss %f3,%f4,%f5 |
mr2mpt.sd %f7,%f8,%f9 |
mr2mpt.dd %f6,%f8,%f10 |
|
mi2p1.ss %f4,%f5,%f6 |
mi2p1.sd %f8,%f9,%f10 |
mi2p1.dd %f12,%f14,%f16 |
|
mi2pt.ss %f7,%f8,%f9 |
mi2pt.sd %f11,%f12,%f13 |
mi2pt.dd %f14,%f16,%f18 |
|
mi2mp1.ss %f10,%f11,%f12 |
mi2mp1.sd %f14,%f15,%f16 |
mi2mp1.dd %f16,%f18,%f20 |
|
mi2mpt.ss %f13,%f14,%f15 |
mi2mpt.sd %f17,%f18,%f19 |
mi2mpt.dd %f18,%f20,%f22 |
|
mrmt1p2.ss %f14,%f15,%f16 |
mrmt1p2.sd %f20,%f21,%f22 |
mrmt1p2.dd %f20,%f22,%f24 |
|
mm12mpm.ss %f15,%f16,%f17 |
mm12mpm.sd %f23,%f24,%f25 |
mm12mpm.dd %f22,%f24,%f26 |
|
mrm1p2.ss %f18,%f19,%f20 |
mrm1p2.sd %f26,%f27,%f28 |
mrm1p2.dd %f20,%f22,%f24 |
|
mm12ttpm.ss %f19,%f20,%f21 |
mm12ttpm.sd %f29,%f30,%f31 |
mm12ttpm.dd %f22,%f24,%f26 |
|
mimt1p2.ss %f20,%f21,%f22 |
mimt1p2.sd %f0,%f1,%f2 |
mimt1p2.dd %f24,%f26,%f28 |
|
mm12tpm.ss %f21,%f22,%f23 |
mm12tpm.sd %f3,%f4,%f5 |
mm12tpm.dd %f30,%f0,%f2 |
|
mim1p2.ss %f22,%f23,%f24 |
mim1p2.sd %f6,%f7,%f8 |
mim1p2.dd %f4,%f6,%f8 |
|
m12tpa.ss %f23,%f24,%f25 |
m12tpa.sd %f9,%f10,%f11 |
m12tpa.dd %f6,%f8,%f10 |
|
# pfmam with dual bit. |
d.mr2p1.ss %f0,%f1,%f2 |
nop |
d.mr2p1.sd %f3,%f4,%f5 |
nop |
d.mr2p1.dd %f0,%f2,%f4 |
nop |
|
d.mr2pt.ss %f1,%f2,%f3 |
nop |
d.mr2pt.sd %f4,%f5,%f6 |
nop |
d.mr2pt.dd %f2,%f4,%f6 |
nop |
|
d.mr2mp1.ss %f2,%f3,%f4 |
nop |
d.mr2mp1.sd %f6,%f7,%f8 |
nop |
d.mr2mp1.dd %f4,%f6,%f8 |
nop |
|
d.mr2mpt.ss %f3,%f4,%f5 |
nop |
d.mr2mpt.sd %f7,%f8,%f9 |
nop |
d.mr2mpt.dd %f6,%f8,%f10 |
nop |
|
d.mi2p1.ss %f4,%f5,%f6 |
nop |
d.mi2p1.sd %f8,%f9,%f10 |
nop |
d.mi2p1.dd %f12,%f14,%f16 |
nop |
|
d.mi2pt.ss %f7,%f8,%f9 |
nop |
d.mi2pt.sd %f11,%f12,%f13 |
nop |
d.mi2pt.dd %f14,%f16,%f18 |
nop |
|
d.mi2mp1.ss %f10,%f11,%f12 |
nop |
d.mi2mp1.sd %f14,%f15,%f16 |
nop |
d.mi2mp1.dd %f16,%f18,%f20 |
nop |
|
d.mi2mpt.ss %f13,%f14,%f15 |
nop |
d.mi2mpt.sd %f17,%f18,%f19 |
nop |
d.mi2mpt.dd %f18,%f20,%f22 |
nop |
|
d.mrmt1p2.ss %f14,%f15,%f16 |
nop |
d.mrmt1p2.sd %f20,%f21,%f22 |
nop |
d.mrmt1p2.dd %f20,%f22,%f24 |
nop |
|
d.mm12mpm.ss %f15,%f16,%f17 |
nop |
d.mm12mpm.sd %f23,%f24,%f25 |
nop |
d.mm12mpm.dd %f22,%f24,%f26 |
nop |
|
d.mrm1p2.ss %f18,%f19,%f20 |
nop |
d.mrm1p2.sd %f26,%f27,%f28 |
nop |
d.mrm1p2.dd %f20,%f22,%f24 |
nop |
|
d.mm12ttpm.ss %f19,%f20,%f21 |
nop |
d.mm12ttpm.sd %f29,%f30,%f31 |
nop |
d.mm12ttpm.dd %f22,%f24,%f26 |
nop |
|
d.mimt1p2.ss %f20,%f21,%f22 |
nop |
d.mimt1p2.sd %f0,%f1,%f2 |
nop |
d.mimt1p2.dd %f24,%f26,%f28 |
nop |
|
d.mm12tpm.ss %f21,%f22,%f23 |
nop |
d.mm12tpm.sd %f3,%f4,%f5 |
nop |
d.mm12tpm.dd %f30,%f0,%f2 |
nop |
|
d.mim1p2.ss %f22,%f23,%f24 |
nop |
d.mim1p2.sd %f6,%f7,%f8 |
nop |
d.mim1p2.dd %f4,%f6,%f8 |
nop |
|
d.m12tpa.ss %f23,%f24,%f25 |
nop |
d.m12tpa.sd %f9,%f10,%f11 |
nop |
d.m12tpa.dd %f6,%f8,%f10 |
nop |
|
/testsuite/gas/i860/form.s
0,0 → 1,66
# form and pform |
|
.text |
|
# pform, no dual bit |
pform %f0,%f2 |
pform %f2,%f4 |
pform %f4,%f6 |
pform %f8,%f10 |
pform %f12,%f14 |
pform %f16,%f18 |
pform %f20,%f22 |
pform %f24,%f26 |
pform %f28,%f30 |
|
# form, no dual bit |
form %f0,%f2 |
form %f2,%f4 |
form %f4,%f6 |
form %f8,%f10 |
form %f12,%f14 |
form %f16,%f18 |
form %f20,%f22 |
form %f24,%f26 |
form %f28,%f30 |
|
# pform, with dual bit |
d.pform %f0,%f2 |
nop |
d.pform %f2,%f4 |
nop |
d.pform %f4,%f6 |
nop |
d.pform %f8,%f10 |
nop |
d.pform %f12,%f14 |
nop |
d.pform %f16,%f18 |
nop |
d.pform %f20,%f22 |
nop |
d.pform %f24,%f26 |
nop |
d.pform %f28,%f30 |
nop |
|
# form, with dual bit |
d.form %f0,%f2 |
nop |
d.form %f2,%f4 |
nop |
d.form %f4,%f6 |
nop |
d.form %f8,%f10 |
nop |
d.form %f12,%f14 |
nop |
d.form %f16,%f18 |
nop |
d.form %f20,%f22 |
nop |
d.form %f24,%f26 |
nop |
d.form %f28,%f30 |
nop |
|
/testsuite/gas/i860/system.d
0,0 → 1,72
#as: |
#objdump: -dr |
#name: i860 system |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 01 00 00 4c lock |
4: 07 00 00 4c unlock |
8: 04 00 00 4c intovr |
c: 00 00 00 44 trap %r0,%r0,%r0 |
10: 00 f8 ff 47 trap %r31,%r31,%r31 |
14: 00 08 b2 44 trap %r1,%r5,%r18 |
18: 00 f8 86 46 trap %r31,%r20,%r6 |
1c: 00 00 01 30 ld.c %fir,%r1 |
20: 00 00 1f 30 ld.c %fir,%r31 |
24: 00 00 25 30 ld.c %psr,%r5 |
28: 00 00 3e 30 ld.c %psr,%r30 |
2c: 00 00 4a 30 ld.c %dirbase,%r10 |
30: 00 00 42 30 ld.c %dirbase,%sp |
34: 00 00 75 30 ld.c %db,%r21 |
38: 00 00 60 30 ld.c %db,%r0 |
3c: 00 00 9c 30 ld.c %fsr,%r28 |
40: 00 00 8c 30 ld.c %fsr,%r12 |
44: 00 00 bf 30 ld.c %epsr,%r31 |
48: 00 00 a6 30 ld.c %epsr,%r6 |
4c: 00 00 00 38 st.c %r0,%fir |
50: 00 f0 00 38 st.c %r30,%fir |
54: 00 38 20 38 st.c %r7,%psr |
58: 00 f8 20 38 st.c %r31,%psr |
5c: 00 58 40 38 st.c %r11,%dirbase |
60: 00 18 40 38 st.c %fp,%dirbase |
64: 00 b0 60 38 st.c %r22,%db |
68: 00 78 60 38 st.c %r15,%db |
6c: 00 e8 80 38 st.c %r29,%fsr |
70: 00 68 80 38 st.c %r13,%fsr |
74: 00 20 a0 38 st.c %r4,%epsr |
78: 00 30 a0 38 st.c %r6,%epsr |
7c: 04 00 00 34 flush 0\(%r0\) |
80: 84 00 20 34 flush 128\(%r1\) |
84: 04 01 40 34 flush 256\(%sp\) |
88: 04 02 60 34 flush 512\(%fp\) |
8c: 04 04 80 34 flush 1024\(%r4\) |
90: 04 10 a0 34 flush 4096\(%r5\) |
94: 04 20 c0 34 flush 8192\(%r6\) |
98: 04 40 e0 34 flush 16384\(%r7\) |
9c: 04 c0 00 35 flush -16384\(%r8\) |
a0: 04 e0 20 35 flush -8192\(%r9\) |
a4: 04 f0 40 35 flush -4096\(%r10\) |
a8: 04 fc 60 35 flush -1024\(%r11\) |
ac: 04 fe 80 35 flush -512\(%r12\) |
b0: 0c ff a0 35 flush -248\(%r13\) |
b4: e4 ff c0 35 flush -32\(%r14\) |
b8: f4 ff c0 35 flush -16\(%r14\) |
bc: 05 00 00 34 flush 0\(%r0\)\+\+ |
c0: 85 00 20 34 flush 128\(%r1\)\+\+ |
c4: 05 01 40 34 flush 256\(%sp\)\+\+ |
c8: 05 02 60 34 flush 512\(%fp\)\+\+ |
cc: 05 04 80 34 flush 1024\(%r4\)\+\+ |
d0: 05 10 c0 36 flush 4096\(%r22\)\+\+ |
d4: 05 20 e0 36 flush 8192\(%r23\)\+\+ |
d8: 05 40 00 37 flush 16384\(%r24\)\+\+ |
dc: 05 c0 20 37 flush -16384\(%r25\)\+\+ |
e0: 05 e0 40 37 flush -8192\(%r26\)\+\+ |
e4: 05 f0 60 37 flush -4096\(%r27\)\+\+ |
e8: 05 fc 80 37 flush -1024\(%r28\)\+\+ |
ec: 05 fe a0 37 flush -512\(%r29\)\+\+ |
f0: 0d ff c0 37 flush -248\(%r30\)\+\+ |
f4: 25 00 e0 37 flush 32\(%r31\)\+\+ |
f8: 15 00 e0 37 flush 16\(%r31\)\+\+ |
/testsuite/gas/i860/ldst02.s
0,0 → 1,35
# ld.s (no relocations here) |
.text |
|
ld.s 0(%r0),%r0 |
ld.s 122(%r1),%r31 |
ld.s 258(%r2),%r30 |
ld.s 512(%r3),%r29 |
ld.s 1028(%r4),%r28 |
ld.s 4090(%r5),%r27 |
ld.s 8190(%r6),%r26 |
ld.s 16384(%r7),%r25 |
ld.s -16384(%r8),%r24 |
ld.s -8192(%r9),%r23 |
ld.s -4096(%r10),%r22 |
ld.s -1024(%r11),%r21 |
ld.s -508(%r12),%r20 |
ld.s -242(%r13),%r19 |
ld.s -2(%r14),%r18 |
|
ld.s %r5(%r0),%r0 |
ld.s %r6(%r1),%r31 |
ld.s %r7(%r2),%r30 |
ld.s %r8(%r3),%r29 |
ld.s %r9(%r4),%r28 |
ld.s %r0(%r5),%r27 |
ld.s %r1(%r6),%r26 |
ld.s %r12(%r7),%r25 |
ld.s %r13(%r8),%r24 |
ld.s %r14(%r9),%r23 |
ld.s %r15(%r10),%r22 |
ld.s %r16(%r11),%r21 |
ld.s %r17(%r12),%r20 |
ld.s %r28(%r13),%r19 |
ld.s %r31(%r14),%r18 |
|
/testsuite/gas/i860/dir-intel01.d
0,0 → 1,19
#as: -mintel-syntax |
#objdump: -d |
#name: i860 dir-intel01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 a0 shl %r0,%r0,%r0 |
4: 00 00 00 a0 shl %r0,%r0,%r0 |
8: 30 02 22 48 d.fadd.ss %f0,%f1,%f2 |
c: 00 00 00 a0 shl %r0,%r0,%r0 |
10: b0 12 64 48 d.fadd.sd %f2,%f3,%f4 |
14: 00 00 00 a0 shl %r0,%r0,%r0 |
18: b0 33 0a 49 d.fadd.dd %f6,%f8,%f10 |
1c: 00 00 00 a0 shl %r0,%r0,%r0 |
20: 00 00 00 a0 shl %r0,%r0,%r0 |
24: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/ldst04.s
0,0 → 1,19
# st.l (no relocations here) |
.text |
|
st.l %r0,0(%r0) |
st.l %r31,124(%r1) |
st.l %r30,256(%r2) |
st.l %r29,512(%r3) |
st.l %r28,1024(%r4) |
st.l %r27,4096(%r5) |
st.l %r26,8192(%r6) |
st.l %r25,16384(%r7) |
st.l %r24,-16384(%r8) |
st.l %r23,-8192(%r9) |
st.l %r22,-4096(%r10) |
st.l %r21,-1024(%r11) |
st.l %r20,-508(%r12) |
st.l %r19,-248(%r13) |
st.l %r18,-4(%r14) |
|
/testsuite/gas/i860/bte.s
0,0 → 1,55
# bte, btne |
.text |
|
btne 0,%r31,some_label |
btne 1,%r29,some_label |
btne 2,%r27,some_label |
btne 3,%r25,some_label |
btne 10,%r23,some_label |
btne 11,%r21,some_label |
btne 12,%r19,some_label |
btne 29,%r17,some_label |
btne 30,%r16,some_label |
btne 31,%r8,some_label |
btne 15,%r0,some_fake_extern |
|
bte 0,%r31,some_label |
bte 1,%r29,some_label |
bte 2,%r27,some_label |
bte 3,%r25,some_label |
bte 10,%r23,some_label |
bte 11,%r21,some_label |
bte 12,%r19,some_label |
bte 29,%r17,some_label |
bte 30,%r16,some_label |
bte 31,%r8,some_label |
bte 15,%r0,some_fake_extern |
|
btne %r0,%r31,some_label |
btne %r1,%r29,some_label |
btne %r2,%r27,some_label |
btne %r3,%r25,some_label |
btne %r10,%r23,some_label |
btne %r11,%r21,some_label |
btne %r12,%r19,some_label |
btne %r29,%r17,some_label |
btne %r30,%r16,some_label |
btne %r31,%r8,some_label |
btne %r15,%r0,some_fake_extern |
|
bte %r0,%r31,some_label |
bte %r1,%r29,some_label |
bte %r2,%r27,some_label |
bte %r3,%r25,some_label |
bte %r10,%r23,some_label |
bte %r11,%r21,some_label |
bte %r12,%r19,some_label |
bte %r29,%r17,some_label |
bte %r30,%r16,some_label |
bte %r31,%r8,some_label |
bte %r15,%r0,some_fake_extern |
|
nop |
nop |
some_label: |
nop |
/testsuite/gas/i860/ldst06.s
0,0 → 1,22
# st.b (no relocations here) |
.text |
|
st.b %r0,0(%r0) |
st.b %r31,1(%r1) |
st.b %r30,2(%r2) |
st.b %r29,513(%r3) |
st.b %r28,1028(%r4) |
st.b %r27,4090(%r5) |
st.b %r26,8190(%r6) |
st.b %r25,16385(%r7) |
st.b %r25,32007(%r7) |
st.b %r25,32767(%r7) |
st.b %r25,-32768(%r7) |
st.b %r25,-32767(%r7) |
st.b %r24,-16383(%r8) |
st.b %r23,-8101(%r9) |
st.b %r22,-4091(%r10) |
st.b %r21,-1023(%r11) |
st.b %r20,-509(%r12) |
st.b %r19,-23(%r13) |
st.b %r18,-1(%r14) |
/testsuite/gas/i860/system.s
0,0 → 1,76
# System and privileged instructions |
# ld.c, st.c, flush, lock, unlock, intovr, trap |
|
.text |
|
lock |
unlock |
intovr |
|
trap %r0,%r0,%r0 |
trap %r31,%r31,%r31 |
trap %r1,%r5,%r18 |
trap %r31,%r20,%r6 |
|
ld.c %fir,%r1 |
ld.c %fir,%r31 |
ld.c %psr,%r5 |
ld.c %psr,%r30 |
ld.c %dirbase,%r10 |
ld.c %dirbase,%r2 |
ld.c %db,%r21 |
ld.c %db,%r0 |
ld.c %fsr,%r28 |
ld.c %fsr,%r12 |
ld.c %epsr,%r31 |
ld.c %epsr,%r6 |
|
st.c %r0,%fir |
st.c %r30,%fir |
st.c %r7,%psr |
st.c %r31,%psr |
st.c %r11,%dirbase |
st.c %r3,%dirbase |
st.c %r22,%db |
st.c %r15,%db |
st.c %r29,%fsr |
st.c %r13,%fsr |
st.c %r4,%epsr |
st.c %r6,%epsr |
|
# Flush, no auto-increment. |
flush 0(%r0) |
flush 128(%r1) |
flush 256(%r2) |
flush 512(%r3) |
flush 1024(%r4) |
flush 4096(%r5) |
flush 8192(%r6) |
flush 16384(%r7) |
flush -16384(%r8) |
flush -8192(%r9) |
flush -4096(%r10) |
flush -1024(%r11) |
flush -512(%r12) |
flush -248(%r13) |
flush -32(%r14) |
flush -16(%r14) |
|
# Flush, auto-increment. |
flush 0(%r0)++ |
flush 128(%r1)++ |
flush 256(%r2)++ |
flush 512(%r3)++ |
flush 1024(%r4)++ |
flush 4096(%r22)++ |
flush 8192(%r23)++ |
flush 16384(%r24)++ |
flush -16384(%r25)++ |
flush -8192(%r26)++ |
flush -4096(%r27)++ |
flush -1024(%r28)++ |
flush -512(%r29)++ |
flush -248(%r30)++ |
flush 32(%r31)++ |
flush 16(%r31)++ |
|
/testsuite/gas/i860/pfsm.d
0,0 → 1,153
#as: |
#objdump: -dr |
#name: i860 pfsm |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 10 04 22 48 r2s1.ss %f0,%f1,%f2 |
4: 90 1c 85 48 r2s1.sd %f3,%f4,%f5 |
8: 90 05 44 48 r2s1.dd %f0,%f2,%f4 |
c: 11 0c 43 48 r2st.ss %f1,%f2,%f3 |
10: 91 24 a6 48 r2st.sd %f4,%f5,%f6 |
14: 91 15 86 48 r2st.dd %f2,%f4,%f6 |
18: 12 14 64 48 r2as1.ss %f2,%f3,%f4 |
1c: 92 34 e8 48 r2as1.sd %f6,%f7,%f8 |
20: 92 25 c8 48 r2as1.dd %f4,%f6,%f8 |
24: 13 1c 85 48 r2ast.ss %f3,%f4,%f5 |
28: 93 3c 09 49 r2ast.sd %f7,%f8,%f9 |
2c: 93 35 0a 49 r2ast.dd %f6,%f8,%f10 |
30: 14 24 a6 48 i2s1.ss %f4,%f5,%f6 |
34: 94 44 2a 49 i2s1.sd %f8,%f9,%f10 |
38: 94 65 d0 49 i2s1.dd %f12,%f14,%f16 |
3c: 15 3c 09 49 i2st.ss %f7,%f8,%f9 |
40: 95 5c 8d 49 i2st.sd %f11,%f12,%f13 |
44: 95 75 12 4a i2st.dd %f14,%f16,%f18 |
48: 16 54 6c 49 i2as1.ss %f10,%f11,%f12 |
4c: 96 74 f0 49 i2as1.sd %f14,%f15,%f16 |
50: 96 85 54 4a i2as1.dd %f16,%f18,%f20 |
54: 17 6c cf 49 i2ast.ss %f13,%f14,%f15 |
58: 97 8c 53 4a i2ast.sd %f17,%f18,%f19 |
5c: 97 95 96 4a i2ast.dd %f18,%f20,%f22 |
60: 18 74 f0 49 rat1s2.ss %f14,%f15,%f16 |
64: 98 a4 b6 4a rat1s2.sd %f20,%f21,%f22 |
68: 98 a5 d8 4a rat1s2.dd %f20,%f22,%f24 |
6c: 19 7c 11 4a m12asm.ss %f15,%f16,%f17 |
70: 99 bc 19 4b m12asm.sd %f23,%f24,%f25 |
74: 99 b5 1a 4b m12asm.dd %f22,%f24,%f26 |
78: 1a 94 74 4a ra1s2.ss %f18,%f19,%f20 |
7c: 9a d4 7c 4b ra1s2.sd %f26,%f27,%f28 |
80: 9a a5 d8 4a ra1s2.dd %f20,%f22,%f24 |
84: 1b 9c 95 4a m12ttsa.ss %f19,%f20,%f21 |
88: 9b ec df 4b m12ttsa.sd %f29,%f30,%f31 |
8c: 9b b5 1a 4b m12ttsa.dd %f22,%f24,%f26 |
90: 1c a4 b6 4a iat1s2.ss %f20,%f21,%f22 |
94: 9c 04 22 48 iat1s2.sd %f0,%f1,%f2 |
98: 9c c5 5c 4b iat1s2.dd %f24,%f26,%f28 |
9c: 1d ac d7 4a m12tsm.ss %f21,%f22,%f23 |
a0: 9d 1c 85 48 m12tsm.sd %f3,%f4,%f5 |
a4: 9d f5 02 48 m12tsm.dd %f30,%f0,%f2 |
a8: 1e b4 f8 4a ia1s2.ss %f22,%f23,%f24 |
ac: 9e 34 e8 48 ia1s2.sd %f6,%f7,%f8 |
b0: 9e 25 c8 48 ia1s2.dd %f4,%f6,%f8 |
b4: 1f bc 19 4b m12tsa.ss %f23,%f24,%f25 |
b8: 9f 4c 4b 49 m12tsa.sd %f9,%f10,%f11 |
bc: 9f 35 0a 49 m12tsa.dd %f6,%f8,%f10 |
c0: 10 06 22 48 d.r2s1.ss %f0,%f1,%f2 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: 90 1e 85 48 d.r2s1.sd %f3,%f4,%f5 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: 90 07 44 48 d.r2s1.dd %f0,%f2,%f4 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: 11 0e 43 48 d.r2st.ss %f1,%f2,%f3 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: 91 26 a6 48 d.r2st.sd %f4,%f5,%f6 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: 91 17 86 48 d.r2st.dd %f2,%f4,%f6 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
f0: 12 16 64 48 d.r2as1.ss %f2,%f3,%f4 |
f4: 00 00 00 a0 shl %r0,%r0,%r0 |
f8: 92 36 e8 48 d.r2as1.sd %f6,%f7,%f8 |
fc: 00 00 00 a0 shl %r0,%r0,%r0 |
100: 92 27 c8 48 d.r2as1.dd %f4,%f6,%f8 |
104: 00 00 00 a0 shl %r0,%r0,%r0 |
108: 13 1e 85 48 d.r2ast.ss %f3,%f4,%f5 |
10c: 00 00 00 a0 shl %r0,%r0,%r0 |
110: 93 3e 09 49 d.r2ast.sd %f7,%f8,%f9 |
114: 00 00 00 a0 shl %r0,%r0,%r0 |
118: 93 37 0a 49 d.r2ast.dd %f6,%f8,%f10 |
11c: 00 00 00 a0 shl %r0,%r0,%r0 |
120: 14 26 a6 48 d.i2s1.ss %f4,%f5,%f6 |
124: 00 00 00 a0 shl %r0,%r0,%r0 |
128: 94 46 2a 49 d.i2s1.sd %f8,%f9,%f10 |
12c: 00 00 00 a0 shl %r0,%r0,%r0 |
130: 94 67 d0 49 d.i2s1.dd %f12,%f14,%f16 |
134: 00 00 00 a0 shl %r0,%r0,%r0 |
138: 15 3e 09 49 d.i2st.ss %f7,%f8,%f9 |
13c: 00 00 00 a0 shl %r0,%r0,%r0 |
140: 95 5e 8d 49 d.i2st.sd %f11,%f12,%f13 |
144: 00 00 00 a0 shl %r0,%r0,%r0 |
148: 95 77 12 4a d.i2st.dd %f14,%f16,%f18 |
14c: 00 00 00 a0 shl %r0,%r0,%r0 |
150: 16 56 6c 49 d.i2as1.ss %f10,%f11,%f12 |
154: 00 00 00 a0 shl %r0,%r0,%r0 |
158: 96 76 f0 49 d.i2as1.sd %f14,%f15,%f16 |
15c: 00 00 00 a0 shl %r0,%r0,%r0 |
160: 96 87 54 4a d.i2as1.dd %f16,%f18,%f20 |
164: 00 00 00 a0 shl %r0,%r0,%r0 |
168: 17 6e cf 49 d.i2ast.ss %f13,%f14,%f15 |
16c: 00 00 00 a0 shl %r0,%r0,%r0 |
170: 97 8e 53 4a d.i2ast.sd %f17,%f18,%f19 |
174: 00 00 00 a0 shl %r0,%r0,%r0 |
178: 97 97 96 4a d.i2ast.dd %f18,%f20,%f22 |
17c: 00 00 00 a0 shl %r0,%r0,%r0 |
180: 18 76 f0 49 d.rat1s2.ss %f14,%f15,%f16 |
184: 00 00 00 a0 shl %r0,%r0,%r0 |
188: 98 a6 b6 4a d.rat1s2.sd %f20,%f21,%f22 |
18c: 00 00 00 a0 shl %r0,%r0,%r0 |
190: 98 a7 d8 4a d.rat1s2.dd %f20,%f22,%f24 |
194: 00 00 00 a0 shl %r0,%r0,%r0 |
198: 19 7e 11 4a d.m12asm.ss %f15,%f16,%f17 |
19c: 00 00 00 a0 shl %r0,%r0,%r0 |
1a0: 99 be 19 4b d.m12asm.sd %f23,%f24,%f25 |
1a4: 00 00 00 a0 shl %r0,%r0,%r0 |
1a8: 99 b7 1a 4b d.m12asm.dd %f22,%f24,%f26 |
1ac: 00 00 00 a0 shl %r0,%r0,%r0 |
1b0: 1a 96 74 4a d.ra1s2.ss %f18,%f19,%f20 |
1b4: 00 00 00 a0 shl %r0,%r0,%r0 |
1b8: 9a d6 7c 4b d.ra1s2.sd %f26,%f27,%f28 |
1bc: 00 00 00 a0 shl %r0,%r0,%r0 |
1c0: 9a a7 d8 4a d.ra1s2.dd %f20,%f22,%f24 |
1c4: 00 00 00 a0 shl %r0,%r0,%r0 |
1c8: 1b 9e 95 4a d.m12ttsa.ss %f19,%f20,%f21 |
1cc: 00 00 00 a0 shl %r0,%r0,%r0 |
1d0: 9b ee df 4b d.m12ttsa.sd %f29,%f30,%f31 |
1d4: 00 00 00 a0 shl %r0,%r0,%r0 |
1d8: 9b b7 1a 4b d.m12ttsa.dd %f22,%f24,%f26 |
1dc: 00 00 00 a0 shl %r0,%r0,%r0 |
1e0: 1c a6 b6 4a d.iat1s2.ss %f20,%f21,%f22 |
1e4: 00 00 00 a0 shl %r0,%r0,%r0 |
1e8: 9c 06 22 48 d.iat1s2.sd %f0,%f1,%f2 |
1ec: 00 00 00 a0 shl %r0,%r0,%r0 |
1f0: 9c c7 5c 4b d.iat1s2.dd %f24,%f26,%f28 |
1f4: 00 00 00 a0 shl %r0,%r0,%r0 |
1f8: 1d ae d7 4a d.m12tsm.ss %f21,%f22,%f23 |
1fc: 00 00 00 a0 shl %r0,%r0,%r0 |
200: 9d 1e 85 48 d.m12tsm.sd %f3,%f4,%f5 |
204: 00 00 00 a0 shl %r0,%r0,%r0 |
208: 9d f7 02 48 d.m12tsm.dd %f30,%f0,%f2 |
20c: 00 00 00 a0 shl %r0,%r0,%r0 |
210: 1e b6 f8 4a d.ia1s2.ss %f22,%f23,%f24 |
214: 00 00 00 a0 shl %r0,%r0,%r0 |
218: 9e 36 e8 48 d.ia1s2.sd %f6,%f7,%f8 |
21c: 00 00 00 a0 shl %r0,%r0,%r0 |
220: 9e 27 c8 48 d.ia1s2.dd %f4,%f6,%f8 |
224: 00 00 00 a0 shl %r0,%r0,%r0 |
228: 1f be 19 4b d.m12tsa.ss %f23,%f24,%f25 |
22c: 00 00 00 a0 shl %r0,%r0,%r0 |
230: 9f 4e 4b 49 d.m12tsa.sd %f9,%f10,%f11 |
234: 00 00 00 a0 shl %r0,%r0,%r0 |
238: 9f 37 0a 49 d.m12tsa.dd %f6,%f8,%f10 |
23c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/float01.d
0,0 → 1,69
#as: |
#objdump: -dr |
#name: i860 float01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 30 00 22 48 fadd.ss %f0,%f1,%f2 |
4: b0 10 64 48 fadd.sd %f2,%f3,%f4 |
8: b0 31 0a 49 fadd.dd %f6,%f8,%f10 |
c: 31 28 c7 48 fsub.ss %f5,%f6,%f7 |
10: b1 40 2a 49 fsub.sd %f8,%f9,%f10 |
14: b1 61 d0 49 fsub.dd %f12,%f14,%f16 |
18: 20 58 8d 49 fmul.ss %f11,%f12,%f13 |
1c: a0 70 f0 49 fmul.sd %f14,%f15,%f16 |
20: a0 91 96 4a fmul.dd %f18,%f20,%f22 |
24: a1 b1 1a 4b fmlow.dd %f22,%f24,%f26 |
28: 30 74 f0 49 pfadd.ss %f14,%f15,%f16 |
2c: b0 8c 54 4a pfadd.sd %f17,%f18,%f20 |
30: b0 b5 1a 4b pfadd.dd %f22,%f24,%f26 |
34: 31 a4 b6 4a pfsub.ss %f20,%f21,%f22 |
38: b1 bc 1a 4b pfsub.sd %f23,%f24,%f26 |
3c: b1 e5 c2 4b pfsub.dd %f28,%f30,%f2 |
40: 20 dc 9d 4b pfmul.ss %f27,%f28,%f29 |
44: a0 f4 e4 4b pfmul.sd %f30,%f31,%f4 |
48: a0 35 08 48 pfmul.dd %f6,%f0,%f8 |
4c: a4 15 9e 48 pfmul3.dd %f2,%f4,%f30 |
50: 30 02 22 48 d.fadd.ss %f0,%f1,%f2 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: b0 12 64 48 d.fadd.sd %f2,%f3,%f4 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: b0 33 0a 49 d.fadd.dd %f6,%f8,%f10 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: 31 2a c7 48 d.fsub.ss %f5,%f6,%f7 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: b1 42 2a 49 d.fsub.sd %f8,%f9,%f10 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
78: b1 63 d0 49 d.fsub.dd %f12,%f14,%f16 |
7c: 00 00 00 a0 shl %r0,%r0,%r0 |
80: 20 5a 8d 49 d.fmul.ss %f11,%f12,%f13 |
84: 00 00 00 a0 shl %r0,%r0,%r0 |
88: a0 72 f0 49 d.fmul.sd %f14,%f15,%f16 |
8c: 00 00 00 a0 shl %r0,%r0,%r0 |
90: a0 93 96 4a d.fmul.dd %f18,%f20,%f22 |
94: 00 00 00 a0 shl %r0,%r0,%r0 |
98: a1 43 4c 49 d.fmlow.dd %f8,%f10,%f12 |
9c: 00 00 00 a0 shl %r0,%r0,%r0 |
a0: 30 76 f0 49 d.pfadd.ss %f14,%f15,%f16 |
a4: 00 00 00 a0 shl %r0,%r0,%r0 |
a8: b0 8e 54 4a d.pfadd.sd %f17,%f18,%f20 |
ac: 00 00 00 a0 shl %r0,%r0,%r0 |
b0: b0 b7 1a 4b d.pfadd.dd %f22,%f24,%f26 |
b4: 00 00 00 a0 shl %r0,%r0,%r0 |
b8: 31 a6 b6 4a d.pfsub.ss %f20,%f21,%f22 |
bc: 00 00 00 a0 shl %r0,%r0,%r0 |
c0: b1 be 1a 4b d.pfsub.sd %f23,%f24,%f26 |
c4: 00 00 00 a0 shl %r0,%r0,%r0 |
c8: b1 e7 c2 4b d.pfsub.dd %f28,%f30,%f2 |
cc: 00 00 00 a0 shl %r0,%r0,%r0 |
d0: 20 de 9d 4b d.pfmul.ss %f27,%f28,%f29 |
d4: 00 00 00 a0 shl %r0,%r0,%r0 |
d8: a0 f6 e4 4b d.pfmul.sd %f30,%f31,%f4 |
dc: 00 00 00 a0 shl %r0,%r0,%r0 |
e0: a0 37 08 48 d.pfmul.dd %f6,%f0,%f8 |
e4: 00 00 00 a0 shl %r0,%r0,%r0 |
e8: a4 17 9e 48 d.pfmul3.dd %f2,%f4,%f30 |
ec: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/bitwise.d
0,0 → 1,141
#as: |
#objdump: -dr |
#name: i860 bitwise |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 22 c0 and %r0,%r1,%sp |
4: 00 18 85 c0 and %fp,%r4,%r5 |
8: 00 30 e8 c0 and %r6,%r7,%r8 |
c: 00 48 4b c1 and %r9,%r10,%r11 |
10: 00 60 ae c1 and %r12,%r13,%r14 |
14: 00 78 11 c2 and %r15,%r16,%r17 |
18: 00 90 74 c2 and %r18,%r19,%r20 |
1c: 00 a8 d7 c2 and %r21,%r22,%r23 |
20: 00 c0 3a c3 and %r24,%r25,%r26 |
24: 00 d8 9d c3 and %r27,%r28,%r29 |
28: 00 f0 e0 c3 and %r30,%r31,%r0 |
2c: 00 00 22 d0 andnot %r0,%r1,%sp |
30: 00 18 85 d0 andnot %fp,%r4,%r5 |
34: 00 30 e8 d0 andnot %r6,%r7,%r8 |
38: 00 48 4b d1 andnot %r9,%r10,%r11 |
3c: 00 60 ae d1 andnot %r12,%r13,%r14 |
40: 00 78 11 d2 andnot %r15,%r16,%r17 |
44: 00 90 74 d2 andnot %r18,%r19,%r20 |
48: 00 a8 d7 d2 andnot %r21,%r22,%r23 |
4c: 00 c0 3a d3 andnot %r24,%r25,%r26 |
50: 00 d8 9d d3 andnot %r27,%r28,%r29 |
54: 00 f0 e0 d3 andnot %r30,%r31,%r0 |
58: 00 00 22 e0 or %r0,%r1,%sp |
5c: 00 18 85 e0 or %fp,%r4,%r5 |
60: 00 30 e8 e0 or %r6,%r7,%r8 |
64: 00 48 4b e1 or %r9,%r10,%r11 |
68: 00 60 ae e1 or %r12,%r13,%r14 |
6c: 00 78 11 e2 or %r15,%r16,%r17 |
70: 00 90 74 e2 or %r18,%r19,%r20 |
74: 00 a8 d7 e2 or %r21,%r22,%r23 |
78: 00 c0 3a e3 or %r24,%r25,%r26 |
7c: 00 d8 9d e3 or %r27,%r28,%r29 |
80: 00 f0 e0 e3 or %r30,%r31,%r0 |
84: 00 00 22 f0 xor %r0,%r1,%sp |
88: 00 18 85 f0 xor %fp,%r4,%r5 |
8c: 00 30 e8 f0 xor %r6,%r7,%r8 |
90: 00 48 4b f1 xor %r9,%r10,%r11 |
94: 00 60 ae f1 xor %r12,%r13,%r14 |
98: 00 78 11 f2 xor %r15,%r16,%r17 |
9c: 00 90 74 f2 xor %r18,%r19,%r20 |
a0: 00 a8 d7 f2 xor %r21,%r22,%r23 |
a4: 00 c0 3a f3 xor %r24,%r25,%r26 |
a8: 00 d8 9d f3 xor %r27,%r28,%r29 |
ac: 00 f0 e0 f3 xor %r30,%r31,%r0 |
b0: 00 00 22 c4 and 0x0000,%r1,%sp |
b4: 00 20 85 c4 and 0x2000,%r4,%r5 |
b8: f5 13 e8 c4 and 0x13f5,%r7,%r8 |
bc: 00 80 4b c5 and 0x8000,%r10,%r11 |
c0: e8 fd ae c5 and 0xfde8,%r13,%r14 |
c4: ff ff 11 c6 and 0xffff,%r16,%r17 |
c8: ff ff 74 c6 and 0xffff,%r19,%r20 |
cc: cd ab d7 c6 and 0xabcd,%r22,%r23 |
d0: 34 12 3a c7 and 0x1234,%r25,%r26 |
d4: 00 00 9d c7 and 0x0000,%r28,%r29 |
d8: 03 00 e0 c7 and 0x0003,%r31,%r0 |
dc: 01 00 22 cc andh 0x0001,%r1,%sp |
e0: 01 20 85 cc andh 0x2001,%r4,%r5 |
e4: f6 13 e8 cc andh 0x13f6,%r7,%r8 |
e8: 01 80 4b cd andh 0x8001,%r10,%r11 |
ec: e9 fd ae cd andh 0xfde9,%r13,%r14 |
f0: ff ff 11 ce andh 0xffff,%r16,%r17 |
f4: ff ff 74 ce andh 0xffff,%r19,%r20 |
f8: cd ab d7 ce andh 0xabcd,%r22,%r23 |
fc: 34 12 3a cf andh 0x1234,%r25,%r26 |
100: 00 00 9d cf andh 0x0000,%r28,%r29 |
104: 03 00 e0 cf andh 0x0003,%r31,%r0 |
108: 00 00 22 d4 andnot 0x0000,%r1,%sp |
10c: 00 20 85 d4 andnot 0x2000,%r4,%r5 |
110: f5 13 e8 d4 andnot 0x13f5,%r7,%r8 |
114: 00 80 4b d5 andnot 0x8000,%r10,%r11 |
118: e8 fd ae d5 andnot 0xfde8,%r13,%r14 |
11c: ff ff 11 d6 andnot 0xffff,%r16,%r17 |
120: ff ff 74 d6 andnot 0xffff,%r19,%r20 |
124: cd ab d7 d6 andnot 0xabcd,%r22,%r23 |
128: 34 12 3a d7 andnot 0x1234,%r25,%r26 |
12c: 00 00 9d d7 andnot 0x0000,%r28,%r29 |
130: 03 00 e0 d7 andnot 0x0003,%r31,%r0 |
134: 01 00 22 dc andnoth 0x0001,%r1,%sp |
138: 01 20 85 dc andnoth 0x2001,%r4,%r5 |
13c: f6 13 e8 dc andnoth 0x13f6,%r7,%r8 |
140: 01 80 4b dd andnoth 0x8001,%r10,%r11 |
144: e9 fd ae dd andnoth 0xfde9,%r13,%r14 |
148: ff ff 11 de andnoth 0xffff,%r16,%r17 |
14c: ff ff 74 de andnoth 0xffff,%r19,%r20 |
150: cd ab d7 de andnoth 0xabcd,%r22,%r23 |
154: 34 12 3a df andnoth 0x1234,%r25,%r26 |
158: 00 00 9d df andnoth 0x0000,%r28,%r29 |
15c: 03 00 e0 df andnoth 0x0003,%r31,%r0 |
160: 00 00 22 e4 or 0x0000,%r1,%sp |
164: 01 00 85 e4 or 0x0001,%r4,%r5 |
168: 02 00 e8 e4 or 0x0002,%r7,%r8 |
16c: 03 00 4b e5 or 0x0003,%r10,%r11 |
170: e8 fd ae e5 or 0xfde8,%r13,%r14 |
174: ff ff 11 e6 or 0xffff,%r16,%r17 |
178: ff ff 74 e6 or 0xffff,%r19,%r20 |
17c: cd ab d7 e6 or 0xabcd,%r22,%r23 |
180: 34 12 3a e7 or 0x1234,%r25,%r26 |
184: 00 00 9d e7 or 0x0000,%r28,%r29 |
188: 03 00 e0 e7 or 0x0003,%r31,%r0 |
18c: 00 00 22 ec orh 0x0000,%r1,%sp |
190: 01 00 85 ec orh 0x0001,%r4,%r5 |
194: 02 00 e8 ec orh 0x0002,%r7,%r8 |
198: 03 00 4b ed orh 0x0003,%r10,%r11 |
19c: e8 fd ae ed orh 0xfde8,%r13,%r14 |
1a0: ff ff 11 ee orh 0xffff,%r16,%r17 |
1a4: ff ff 74 ee orh 0xffff,%r19,%r20 |
1a8: cd ab d7 ee orh 0xabcd,%r22,%r23 |
1ac: 34 12 3a ef orh 0x1234,%r25,%r26 |
1b0: 00 00 9d ef orh 0x0000,%r28,%r29 |
1b4: 03 00 e0 ef orh 0x0003,%r31,%r0 |
1b8: 00 00 22 f4 xor 0x0000,%r1,%sp |
1bc: 01 00 85 f4 xor 0x0001,%r4,%r5 |
1c0: 02 00 e8 f4 xor 0x0002,%r7,%r8 |
1c4: 03 00 4b f5 xor 0x0003,%r10,%r11 |
1c8: e8 fd ae f5 xor 0xfde8,%r13,%r14 |
1cc: ff ff 11 f6 xor 0xffff,%r16,%r17 |
1d0: ff ff 74 f6 xor 0xffff,%r19,%r20 |
1d4: cd ab d7 f6 xor 0xabcd,%r22,%r23 |
1d8: 34 12 3a f7 xor 0x1234,%r25,%r26 |
1dc: 00 00 9d f7 xor 0x0000,%r28,%r29 |
1e0: 03 00 e0 f7 xor 0x0003,%r31,%r0 |
1e4: 00 00 22 fc xorh 0x0000,%r1,%sp |
1e8: 01 00 85 fc xorh 0x0001,%r4,%r5 |
1ec: 02 00 e8 fc xorh 0x0002,%r7,%r8 |
1f0: 03 00 4b fd xorh 0x0003,%r10,%r11 |
1f4: e8 fd ae fd xorh 0xfde8,%r13,%r14 |
1f8: ff ff 11 fe xorh 0xffff,%r16,%r17 |
1fc: ff ff 74 fe xorh 0xffff,%r19,%r20 |
200: cd ab d7 fe xorh 0xabcd,%r22,%r23 |
204: 34 12 3a ff xorh 0x1234,%r25,%r26 |
208: 00 00 9d ff xorh 0x0000,%r28,%r29 |
20c: 03 00 e0 ff xorh 0x0003,%r31,%r0 |
/testsuite/gas/i860/dir-intel01.s
0,0 → 1,19
// Intel assembler directives: |
// Test that the .dual and .enddual directives are recognized and |
// function (i.e., that the dual bits are set properly). |
|
.text |
|
nop |
nop |
.dual |
fadd.ss f0,f1,f2 |
nop |
fadd.sd f2,f3,f4 |
nop |
fadd.dd f6,f8,f10 |
nop |
.enddual |
nop |
nop |
|
/testsuite/gas/i860/float03.d
0,0 → 1,51
#as: |
#objdump: -dr |
#name: i860 float03 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: b2 10 04 48 fix.sd %f2,%f4 |
4: b2 31 08 48 fix.dd %f6,%f8 |
8: ba 40 0a 48 ftrunc.sd %f8,%f10 |
c: ba 61 0e 48 ftrunc.dd %f12,%f14 |
10: b2 f4 0e 48 pfix.sd %f30,%f14 |
14: b2 c5 02 48 pfix.dd %f24,%f2 |
18: ba 44 0a 48 pftrunc.sd %f8,%f10 |
1c: ba 65 0e 48 pftrunc.dd %f12,%f14 |
20: 34 04 22 48 pfgt.ss %f0,%f1,%f2 |
24: 34 35 0a 49 pfgt.dd %f6,%f8,%f10 |
28: b4 2c c7 48 pfle.ss %f5,%f6,%f7 |
2c: b4 65 d0 49 pfle.dd %f12,%f14,%f16 |
30: 35 5c 8d 49 pfeq.ss %f11,%f12,%f13 |
34: 35 95 96 4a pfeq.dd %f18,%f20,%f22 |
38: b2 12 1e 48 d.fix.sd %f2,%f30 |
3c: 00 00 00 a0 shl %r0,%r0,%r0 |
40: b2 33 08 48 d.fix.dd %f6,%f8 |
44: 00 00 00 a0 shl %r0,%r0,%r0 |
48: ba 42 18 48 d.ftrunc.sd %f8,%f24 |
4c: 00 00 00 a0 shl %r0,%r0,%r0 |
50: ba 63 0e 48 d.ftrunc.dd %f12,%f14 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: b2 16 1e 48 d.pfix.sd %f2,%f30 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
60: b2 37 08 48 d.pfix.dd %f6,%f8 |
64: 00 00 00 a0 shl %r0,%r0,%r0 |
68: ba 46 18 48 d.pftrunc.sd %f8,%f24 |
6c: 00 00 00 a0 shl %r0,%r0,%r0 |
70: ba 67 0e 48 d.pftrunc.dd %f12,%f14 |
74: 00 00 00 a0 shl %r0,%r0,%r0 |
78: 34 06 22 48 d.pfgt.ss %f0,%f1,%f2 |
7c: 00 00 00 a0 shl %r0,%r0,%r0 |
80: 34 37 0a 49 d.pfgt.dd %f6,%f8,%f10 |
84: 00 00 00 a0 shl %r0,%r0,%r0 |
88: b4 2e c7 48 d.pfle.ss %f5,%f6,%f7 |
8c: 00 00 00 a0 shl %r0,%r0,%r0 |
90: b4 67 d0 49 d.pfle.dd %f12,%f14,%f16 |
94: 00 00 00 a0 shl %r0,%r0,%r0 |
98: 35 5e 8d 49 d.pfeq.ss %f11,%f12,%f13 |
9c: 00 00 00 a0 shl %r0,%r0,%r0 |
a0: 35 97 96 4a d.pfeq.dd %f18,%f20,%f22 |
a4: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/regress01.d
0,0 → 1,21
#as: |
#objdump: -dr |
#name: i860 regress01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: f2 ff 50 2c fst.l %f16,-16\(%sp\) |
4: f2 ff 54 2c fst.l %f20,-16\(%sp\) |
8: f2 ff 58 2c fst.l %f24,-16\(%sp\) |
c: f3 ff 50 2c fst.l %f16,-16\(%sp\)\+\+ |
10: f3 ff 54 2c fst.l %f20,-16\(%sp\)\+\+ |
14: f3 ff 58 2c fst.l %f24,-16\(%sp\)\+\+ |
18: f4 ff 50 2c fst.q %f16,-16\(%sp\) |
1c: f4 ff 54 2c fst.q %f20,-16\(%sp\) |
20: f4 ff 58 2c fst.q %f24,-16\(%sp\) |
24: f5 ff 50 2c fst.q %f16,-16\(%sp\)\+\+ |
28: f5 ff 54 2c fst.q %f20,-16\(%sp\)\+\+ |
2c: f5 ff 58 2c fst.q %f24,-16\(%sp\)\+\+ |
/testsuite/gas/i860/fldst01.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst01 (fld.l) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 02 00 00 24 fld.l 0\(%r0\),%f0 |
4: 7e 00 3f 24 fld.l 124\(%r1\),%f31 |
8: 02 01 5e 24 fld.l 256\(%sp\),%f30 |
c: 02 02 7d 24 fld.l 512\(%fp\),%f29 |
10: 02 04 9c 24 fld.l 1024\(%r4\),%f28 |
14: 02 10 bb 24 fld.l 4096\(%r5\),%f27 |
18: 02 20 da 24 fld.l 8192\(%r6\),%f26 |
1c: 02 40 f9 24 fld.l 16384\(%r7\),%f25 |
20: fe 7f f9 24 fld.l 32764\(%r7\),%f25 |
24: 02 80 f7 24 fld.l -32768\(%r7\),%f23 |
28: 02 c0 02 25 fld.l -16384\(%r8\),%f2 |
2c: 02 e0 23 25 fld.l -8192\(%r9\),%f3 |
30: 02 f0 48 25 fld.l -4096\(%r10\),%f8 |
34: 02 fc 69 25 fld.l -1024\(%r11\),%f9 |
38: 06 fe 8c 25 fld.l -508\(%r12\),%f12 |
3c: 0a ff b3 25 fld.l -248\(%r13\),%f19 |
40: fe ff d5 25 fld.l -4\(%r14\),%f21 |
44: 03 00 00 24 fld.l 0\(%r0\)\+\+,%f0 |
48: 7f 00 21 24 fld.l 124\(%r1\)\+\+,%f1 |
4c: 03 01 42 24 fld.l 256\(%sp\)\+\+,%f2 |
50: 03 02 63 24 fld.l 512\(%fp\)\+\+,%f3 |
54: 03 04 84 24 fld.l 1024\(%r4\)\+\+,%f4 |
58: 03 10 a5 24 fld.l 4096\(%r5\)\+\+,%f5 |
5c: 03 20 c6 24 fld.l 8192\(%r6\)\+\+,%f6 |
60: 03 40 e7 24 fld.l 16384\(%r7\)\+\+,%f7 |
64: ff 7f e8 24 fld.l 32764\(%r7\)\+\+,%f8 |
68: 03 80 e9 24 fld.l -32768\(%r7\)\+\+,%f9 |
6c: 03 c0 0a 25 fld.l -16384\(%r8\)\+\+,%f10 |
70: 03 e0 2b 25 fld.l -8192\(%r9\)\+\+,%f11 |
74: 03 f0 4c 25 fld.l -4096\(%r10\)\+\+,%f12 |
78: 03 fc 6d 25 fld.l -1024\(%r11\)\+\+,%f13 |
7c: 07 fe 8e 25 fld.l -508\(%r12\)\+\+,%f14 |
80: 0b ff af 25 fld.l -248\(%r13\)\+\+,%f15 |
84: ff ff d0 25 fld.l -4\(%r14\)\+\+,%f16 |
88: 02 28 00 20 fld.l %r5\(%r0\),%f0 |
8c: 02 30 3f 20 fld.l %r6\(%r1\),%f31 |
90: 02 38 5e 20 fld.l %r7\(%sp\),%f30 |
94: 02 40 7d 20 fld.l %r8\(%fp\),%f29 |
98: 02 48 9c 20 fld.l %r9\(%r4\),%f28 |
9c: 02 00 bb 20 fld.l %r0\(%r5\),%f27 |
a0: 02 08 da 20 fld.l %r1\(%r6\),%f26 |
a4: 02 60 f9 20 fld.l %r12\(%r7\),%f25 |
a8: 02 68 18 21 fld.l %r13\(%r8\),%f24 |
ac: 02 70 37 21 fld.l %r14\(%r9\),%f23 |
b0: 02 78 56 21 fld.l %r15\(%r10\),%f22 |
b4: 02 80 75 21 fld.l %r16\(%r11\),%f21 |
b8: 02 88 94 21 fld.l %r17\(%r12\),%f20 |
bc: 02 e0 b3 21 fld.l %r28\(%r13\),%f19 |
c0: 02 f8 d2 21 fld.l %r31\(%r14\),%f18 |
c4: 03 28 00 20 fld.l %r5\(%r0\)\+\+,%f0 |
c8: 03 30 21 20 fld.l %r6\(%r1\)\+\+,%f1 |
cc: 03 38 42 20 fld.l %r7\(%sp\)\+\+,%f2 |
d0: 03 40 63 20 fld.l %r8\(%fp\)\+\+,%f3 |
d4: 03 48 84 20 fld.l %r9\(%r4\)\+\+,%f4 |
d8: 03 00 a5 20 fld.l %r0\(%r5\)\+\+,%f5 |
dc: 03 08 c6 20 fld.l %r1\(%r6\)\+\+,%f6 |
e0: 03 60 e7 20 fld.l %r12\(%r7\)\+\+,%f7 |
e4: 03 68 08 21 fld.l %r13\(%r8\)\+\+,%f8 |
e8: 03 70 29 21 fld.l %r14\(%r9\)\+\+,%f9 |
ec: 03 78 4a 21 fld.l %r15\(%r10\)\+\+,%f10 |
f0: 03 80 6b 21 fld.l %r16\(%r11\)\+\+,%f11 |
f4: 03 88 8c 21 fld.l %r17\(%r12\)\+\+,%f12 |
f8: 03 e0 ad 21 fld.l %r28\(%r13\)\+\+,%f13 |
fc: 03 f8 ce 21 fld.l %r31\(%r14\)\+\+,%f14 |
/testsuite/gas/i860/shift.d
0,0 → 1,86
#as: |
#objdump: -dr |
#name: i860 shift |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 22 a0 shl %r0,%r1,%sp |
4: 00 18 85 a0 shl %fp,%r4,%r5 |
8: 00 30 e8 a0 shl %r6,%r7,%r8 |
c: 00 48 4b a1 shl %r9,%r10,%r11 |
10: 00 f8 ae a1 shl %r31,%r13,%r14 |
14: 00 78 11 a2 shl %r15,%r16,%r17 |
18: 00 90 74 a2 shl %r18,%r19,%r20 |
1c: 00 a8 d7 a2 shl %r21,%r22,%r23 |
20: 00 c0 3f a3 shl %r24,%r25,%r31 |
24: 00 d8 9d a3 shl %r27,%r28,%r29 |
28: 00 f0 e0 a3 shl %r30,%r31,%r0 |
2c: 00 00 22 a8 shr %r0,%r1,%sp |
30: 00 18 85 a8 shr %fp,%r4,%r5 |
34: 00 30 e8 a8 shr %r6,%r7,%r8 |
38: 00 48 4b a9 shr %r9,%r10,%r11 |
3c: 00 f8 ae a9 shr %r31,%r13,%r14 |
40: 00 78 11 aa shr %r15,%r16,%r17 |
44: 00 90 74 aa shr %r18,%r19,%r20 |
48: 00 a8 d7 aa shr %r21,%r22,%r23 |
4c: 00 c0 3f ab shr %r24,%r25,%r31 |
50: 00 d8 9d ab shr %r27,%r28,%r29 |
54: 00 f0 e0 ab shr %r30,%r31,%r0 |
58: 00 00 22 b8 shra %r0,%r1,%sp |
5c: 00 18 85 b8 shra %fp,%r4,%r5 |
60: 00 30 e8 b8 shra %r6,%r7,%r8 |
64: 00 48 4b b9 shra %r9,%r10,%r11 |
68: 00 f8 ae b9 shra %r31,%r13,%r14 |
6c: 00 78 11 ba shra %r15,%r16,%r17 |
70: 00 90 74 ba shra %r18,%r19,%r20 |
74: 00 a8 d7 ba shra %r21,%r22,%r23 |
78: 00 c0 3f bb shra %r24,%r25,%r31 |
7c: 00 d8 9d bb shra %r27,%r28,%r29 |
80: 00 f0 e0 bb shra %r30,%r31,%r0 |
84: 00 00 22 b0 shrd %r0,%r1,%sp |
88: 00 18 85 b0 shrd %fp,%r4,%r5 |
8c: 00 30 e8 b0 shrd %r6,%r7,%r8 |
90: 00 48 4b b1 shrd %r9,%r10,%r11 |
94: 00 f8 ae b1 shrd %r31,%r13,%r14 |
98: 00 78 11 b2 shrd %r15,%r16,%r17 |
9c: 00 90 74 b2 shrd %r18,%r19,%r20 |
a0: 00 a8 d7 b2 shrd %r21,%r22,%r23 |
a4: 00 c0 3f b3 shrd %r24,%r25,%r31 |
a8: 00 d8 9d b3 shrd %r27,%r28,%r29 |
ac: 00 f0 e0 b3 shrd %r30,%r31,%r0 |
b0: 00 00 22 a4 shl 0,%r1,%sp |
b4: 00 20 85 a4 shl 8192,%r4,%r5 |
b8: f5 13 e8 a4 shl 5109,%r7,%r8 |
bc: ff 7f 4b a5 shl 32767,%r10,%r11 |
c0: 00 80 ae a5 shl -32768,%r13,%r14 |
c4: 00 e0 11 a6 shl -8192,%r16,%r17 |
c8: ff ff 74 a6 shl -1,%r19,%r20 |
cc: cd ab d7 a6 shl -21555,%r22,%r23 |
d0: 34 12 3a a7 shl 4660,%r25,%r26 |
d4: 00 00 9d a7 shl 0,%r28,%r29 |
d8: 03 00 e0 a7 shl 3,%r31,%r0 |
dc: 00 00 22 ac shr 0,%r1,%sp |
e0: 00 20 85 ac shr 8192,%r4,%r5 |
e4: f5 13 e8 ac shr 5109,%r7,%r8 |
e8: ff 7f 4b ad shr 32767,%r10,%r11 |
ec: 00 80 ae ad shr -32768,%r13,%r14 |
f0: 00 e0 11 ae shr -8192,%r16,%r17 |
f4: ff ff 74 ae shr -1,%r19,%r20 |
f8: cd ab d7 ae shr -21555,%r22,%r23 |
fc: 34 12 3a af shr 4660,%r25,%r26 |
100: 00 00 9d af shr 0,%r28,%r29 |
104: 03 00 e0 af shr 3,%r31,%r0 |
108: 01 00 22 bc shra 1,%r1,%sp |
10c: 01 20 85 bc shra 8193,%r4,%r5 |
110: f6 13 e8 bc shra 5110,%r7,%r8 |
114: ff 7f 4b bd shra 32767,%r10,%r11 |
118: 00 80 ae bd shra -32768,%r13,%r14 |
11c: 00 e0 11 be shra -8192,%r16,%r17 |
120: ff ff 74 be shra -1,%r19,%r20 |
124: cd ab d7 be shra -21555,%r22,%r23 |
128: 34 12 3a bf shra 4660,%r25,%r26 |
12c: 00 00 9d bf shra 0,%r28,%r29 |
130: 03 00 e0 bf shra 3,%r31,%r0 |
/testsuite/gas/i860/fldst03.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst03 (fld.q) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 04 00 00 24 fld.q 0\(%r0\),%f0 |
4: 84 00 3c 24 fld.q 128\(%r1\),%f28 |
8: 04 01 58 24 fld.q 256\(%sp\),%f24 |
c: 04 02 74 24 fld.q 512\(%fp\),%f20 |
10: 04 04 90 24 fld.q 1024\(%r4\),%f16 |
14: 04 10 ac 24 fld.q 4096\(%r5\),%f12 |
18: 04 20 c8 24 fld.q 8192\(%r6\),%f8 |
1c: 04 40 e4 24 fld.q 16384\(%r7\),%f4 |
20: f4 7f e0 24 fld.q 32752\(%r7\),%f0 |
24: 04 80 fc 24 fld.q -32768\(%r7\),%f28 |
28: 04 c0 18 25 fld.q -16384\(%r8\),%f24 |
2c: 04 e0 34 25 fld.q -8192\(%r9\),%f20 |
30: 04 f0 50 25 fld.q -4096\(%r10\),%f16 |
34: 04 fc 6c 25 fld.q -1024\(%r11\),%f12 |
38: 04 fe 88 25 fld.q -512\(%r12\),%f8 |
3c: 04 ff a4 25 fld.q -256\(%r13\),%f4 |
40: f4 ff c0 25 fld.q -16\(%r14\),%f0 |
44: 05 00 00 24 fld.q 0\(%r0\)\+\+,%f0 |
48: 85 00 24 24 fld.q 128\(%r1\)\+\+,%f4 |
4c: 05 01 48 24 fld.q 256\(%sp\)\+\+,%f8 |
50: 05 02 6c 24 fld.q 512\(%fp\)\+\+,%f12 |
54: 05 04 90 24 fld.q 1024\(%r4\)\+\+,%f16 |
58: 05 10 b4 24 fld.q 4096\(%r5\)\+\+,%f20 |
5c: 05 20 d8 24 fld.q 8192\(%r6\)\+\+,%f24 |
60: 05 40 fc 24 fld.q 16384\(%r7\)\+\+,%f28 |
64: f5 7f e0 24 fld.q 32752\(%r7\)\+\+,%f0 |
68: 05 80 e4 24 fld.q -32768\(%r7\)\+\+,%f4 |
6c: 05 c0 08 25 fld.q -16384\(%r8\)\+\+,%f8 |
70: 05 e0 2c 25 fld.q -8192\(%r9\)\+\+,%f12 |
74: 05 f0 50 25 fld.q -4096\(%r10\)\+\+,%f16 |
78: 05 fc 74 25 fld.q -1024\(%r11\)\+\+,%f20 |
7c: 05 fe 98 25 fld.q -512\(%r12\)\+\+,%f24 |
80: 05 ff bc 25 fld.q -256\(%r13\)\+\+,%f28 |
84: f5 ff d0 25 fld.q -16\(%r14\)\+\+,%f16 |
88: 04 28 00 20 fld.q %r5\(%r0\),%f0 |
8c: 04 30 34 20 fld.q %r6\(%r1\),%f20 |
90: 04 38 50 20 fld.q %r7\(%sp\),%f16 |
94: 04 40 6c 20 fld.q %r8\(%fp\),%f12 |
98: 04 48 88 20 fld.q %r9\(%r4\),%f8 |
9c: 04 00 a4 20 fld.q %r0\(%r5\),%f4 |
a0: 04 08 c0 20 fld.q %r1\(%r6\),%f0 |
a4: 04 60 fc 20 fld.q %r12\(%r7\),%f28 |
a8: 04 68 18 21 fld.q %r13\(%r8\),%f24 |
ac: 04 70 34 21 fld.q %r14\(%r9\),%f20 |
b0: 04 78 50 21 fld.q %r15\(%r10\),%f16 |
b4: 04 80 6c 21 fld.q %r16\(%r11\),%f12 |
b8: 04 88 88 21 fld.q %r17\(%r12\),%f8 |
bc: 04 e0 a4 21 fld.q %r28\(%r13\),%f4 |
c0: 04 f8 c0 21 fld.q %r31\(%r14\),%f0 |
c4: 05 28 00 20 fld.q %r5\(%r0\)\+\+,%f0 |
c8: 05 30 24 20 fld.q %r6\(%r1\)\+\+,%f4 |
cc: 05 38 48 20 fld.q %r7\(%sp\)\+\+,%f8 |
d0: 05 40 6c 20 fld.q %r8\(%fp\)\+\+,%f12 |
d4: 05 48 90 20 fld.q %r9\(%r4\)\+\+,%f16 |
d8: 05 00 b4 20 fld.q %r0\(%r5\)\+\+,%f20 |
dc: 05 08 d8 20 fld.q %r1\(%r6\)\+\+,%f24 |
e0: 05 60 fc 20 fld.q %r12\(%r7\)\+\+,%f28 |
e4: 05 68 00 21 fld.q %r13\(%r8\)\+\+,%f0 |
e8: 05 70 24 21 fld.q %r14\(%r9\)\+\+,%f4 |
ec: 05 78 48 21 fld.q %r15\(%r10\)\+\+,%f8 |
f0: 05 80 6c 21 fld.q %r16\(%r11\)\+\+,%f12 |
f4: 05 88 90 21 fld.q %r17\(%r12\)\+\+,%f16 |
f8: 05 e0 b4 21 fld.q %r28\(%r13\)\+\+,%f20 |
fc: 05 f8 d8 21 fld.q %r31\(%r14\)\+\+,%f24 |
/testsuite/gas/i860/fldst05.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst05 (fst.d) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 2c fst.d %f0,0\(%r0\) |
4: 80 00 3e 2c fst.d %f30,128\(%r1\) |
8: 00 01 5c 2c fst.d %f28,256\(%sp\) |
c: 00 02 7a 2c fst.d %f26,512\(%fp\) |
10: 00 04 98 2c fst.d %f24,1024\(%r4\) |
14: 00 10 b6 2c fst.d %f22,4096\(%r5\) |
18: 00 20 d4 2c fst.d %f20,8192\(%r6\) |
1c: 00 40 f2 2c fst.d %f18,16384\(%r7\) |
20: f8 7f f0 2c fst.d %f16,32760\(%r7\) |
24: 00 80 ee 2c fst.d %f14,-32768\(%r7\) |
28: 00 c0 0c 2d fst.d %f12,-16384\(%r8\) |
2c: 00 e0 2a 2d fst.d %f10,-8192\(%r9\) |
30: 00 f0 48 2d fst.d %f8,-4096\(%r10\) |
34: 00 fc 66 2d fst.d %f6,-1024\(%r11\) |
38: 00 fe 84 2d fst.d %f4,-512\(%r12\) |
3c: 08 ff a2 2d fst.d %f2,-248\(%r13\) |
40: f8 ff c0 2d fst.d %f0,-8\(%r14\) |
44: 01 00 00 2c fst.d %f0,0\(%r0\)\+\+ |
48: 81 00 22 2c fst.d %f2,128\(%r1\)\+\+ |
4c: 01 01 44 2c fst.d %f4,256\(%sp\)\+\+ |
50: 01 02 66 2c fst.d %f6,512\(%fp\)\+\+ |
54: 01 04 88 2c fst.d %f8,1024\(%r4\)\+\+ |
58: 01 10 aa 2c fst.d %f10,4096\(%r5\)\+\+ |
5c: 01 20 cc 2c fst.d %f12,8192\(%r6\)\+\+ |
60: 01 40 ee 2c fst.d %f14,16384\(%r7\)\+\+ |
64: f9 7f f0 2c fst.d %f16,32760\(%r7\)\+\+ |
68: 01 80 f2 2c fst.d %f18,-32768\(%r7\)\+\+ |
6c: 01 c0 14 2d fst.d %f20,-16384\(%r8\)\+\+ |
70: 01 e0 36 2d fst.d %f22,-8192\(%r9\)\+\+ |
74: 01 f0 58 2d fst.d %f24,-4096\(%r10\)\+\+ |
78: 01 fc 7a 2d fst.d %f26,-1024\(%r11\)\+\+ |
7c: 01 fe 9c 2d fst.d %f28,-512\(%r12\)\+\+ |
80: 09 ff be 2d fst.d %f30,-248\(%r13\)\+\+ |
84: f9 ff d0 2d fst.d %f16,-8\(%r14\)\+\+ |
88: 00 28 00 28 fst.d %f0,%r5\(%r0\) |
8c: 00 30 3e 28 fst.d %f30,%r6\(%r1\) |
90: 00 38 5c 28 fst.d %f28,%r7\(%sp\) |
94: 00 40 7a 28 fst.d %f26,%r8\(%fp\) |
98: 00 48 98 28 fst.d %f24,%r9\(%r4\) |
9c: 00 00 b6 28 fst.d %f22,%r0\(%r5\) |
a0: 00 08 d4 28 fst.d %f20,%r1\(%r6\) |
a4: 00 60 f2 28 fst.d %f18,%r12\(%r7\) |
a8: 00 68 10 29 fst.d %f16,%r13\(%r8\) |
ac: 00 70 2e 29 fst.d %f14,%r14\(%r9\) |
b0: 00 78 4c 29 fst.d %f12,%r15\(%r10\) |
b4: 00 80 6a 29 fst.d %f10,%r16\(%r11\) |
b8: 00 88 88 29 fst.d %f8,%r17\(%r12\) |
bc: 00 e0 a6 29 fst.d %f6,%r28\(%r13\) |
c0: 00 f8 c4 29 fst.d %f4,%r31\(%r14\) |
c4: 01 28 00 28 fst.d %f0,%r5\(%r0\)\+\+ |
c8: 01 30 22 28 fst.d %f2,%r6\(%r1\)\+\+ |
cc: 01 38 44 28 fst.d %f4,%r7\(%sp\)\+\+ |
d0: 01 40 66 28 fst.d %f6,%r8\(%fp\)\+\+ |
d4: 01 48 88 28 fst.d %f8,%r9\(%r4\)\+\+ |
d8: 01 00 aa 28 fst.d %f10,%r0\(%r5\)\+\+ |
dc: 01 08 cc 28 fst.d %f12,%r1\(%r6\)\+\+ |
e0: 01 60 ee 28 fst.d %f14,%r12\(%r7\)\+\+ |
e4: 01 68 10 29 fst.d %f16,%r13\(%r8\)\+\+ |
e8: 01 70 32 29 fst.d %f18,%r14\(%r9\)\+\+ |
ec: 01 78 54 29 fst.d %f20,%r15\(%r10\)\+\+ |
f0: 01 80 76 29 fst.d %f22,%r16\(%r11\)\+\+ |
f4: 01 88 98 29 fst.d %f24,%r17\(%r12\)\+\+ |
f8: 01 e0 ba 29 fst.d %f26,%r28\(%r13\)\+\+ |
fc: 01 f8 de 29 fst.d %f30,%r31\(%r14\)\+\+ |
/testsuite/gas/i860/fldst07.d
0,0 → 1,73
#as: |
#objdump: -dr |
#name: i860 fldst07 (pfld.l) |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 02 00 00 64 pfld.l 0\(%r0\),%f0 |
4: 7e 00 3f 64 pfld.l 124\(%r1\),%f31 |
8: 02 01 5e 64 pfld.l 256\(%sp\),%f30 |
c: 02 02 7d 64 pfld.l 512\(%fp\),%f29 |
10: 02 04 9c 64 pfld.l 1024\(%r4\),%f28 |
14: 02 10 bb 64 pfld.l 4096\(%r5\),%f27 |
18: 02 20 da 64 pfld.l 8192\(%r6\),%f26 |
1c: 02 40 f9 64 pfld.l 16384\(%r7\),%f25 |
20: fe 7f f9 64 pfld.l 32764\(%r7\),%f25 |
24: 02 80 f7 64 pfld.l -32768\(%r7\),%f23 |
28: 02 c0 02 65 pfld.l -16384\(%r8\),%f2 |
2c: 02 e0 23 65 pfld.l -8192\(%r9\),%f3 |
30: 02 f0 48 65 pfld.l -4096\(%r10\),%f8 |
34: 02 fc 69 65 pfld.l -1024\(%r11\),%f9 |
38: 06 fe 8c 65 pfld.l -508\(%r12\),%f12 |
3c: 0a ff b3 65 pfld.l -248\(%r13\),%f19 |
40: fe ff d5 65 pfld.l -4\(%r14\),%f21 |
44: 03 00 00 64 pfld.l 0\(%r0\)\+\+,%f0 |
48: 7f 00 21 64 pfld.l 124\(%r1\)\+\+,%f1 |
4c: 03 01 42 64 pfld.l 256\(%sp\)\+\+,%f2 |
50: 03 02 63 64 pfld.l 512\(%fp\)\+\+,%f3 |
54: 03 04 84 64 pfld.l 1024\(%r4\)\+\+,%f4 |
58: 03 10 a5 64 pfld.l 4096\(%r5\)\+\+,%f5 |
5c: 03 20 c6 64 pfld.l 8192\(%r6\)\+\+,%f6 |
60: 03 40 e7 64 pfld.l 16384\(%r7\)\+\+,%f7 |
64: ff 7f e8 64 pfld.l 32764\(%r7\)\+\+,%f8 |
68: 03 80 e9 64 pfld.l -32768\(%r7\)\+\+,%f9 |
6c: 03 c0 0a 65 pfld.l -16384\(%r8\)\+\+,%f10 |
70: 03 e0 2b 65 pfld.l -8192\(%r9\)\+\+,%f11 |
74: 03 f0 4c 65 pfld.l -4096\(%r10\)\+\+,%f12 |
78: 03 fc 6d 65 pfld.l -1024\(%r11\)\+\+,%f13 |
7c: 07 fe 8e 65 pfld.l -508\(%r12\)\+\+,%f14 |
80: 0b ff af 65 pfld.l -248\(%r13\)\+\+,%f15 |
84: ff ff d0 65 pfld.l -4\(%r14\)\+\+,%f16 |
88: 02 28 00 60 pfld.l %r5\(%r0\),%f0 |
8c: 02 30 3f 60 pfld.l %r6\(%r1\),%f31 |
90: 02 38 5e 60 pfld.l %r7\(%sp\),%f30 |
94: 02 40 7d 60 pfld.l %r8\(%fp\),%f29 |
98: 02 48 9c 60 pfld.l %r9\(%r4\),%f28 |
9c: 02 00 bb 60 pfld.l %r0\(%r5\),%f27 |
a0: 02 08 da 60 pfld.l %r1\(%r6\),%f26 |
a4: 02 60 f9 60 pfld.l %r12\(%r7\),%f25 |
a8: 02 68 18 61 pfld.l %r13\(%r8\),%f24 |
ac: 02 70 37 61 pfld.l %r14\(%r9\),%f23 |
b0: 02 78 56 61 pfld.l %r15\(%r10\),%f22 |
b4: 02 80 75 61 pfld.l %r16\(%r11\),%f21 |
b8: 02 88 94 61 pfld.l %r17\(%r12\),%f20 |
bc: 02 e0 b3 61 pfld.l %r28\(%r13\),%f19 |
c0: 02 f8 d2 61 pfld.l %r31\(%r14\),%f18 |
c4: 03 28 00 60 pfld.l %r5\(%r0\)\+\+,%f0 |
c8: 03 30 21 60 pfld.l %r6\(%r1\)\+\+,%f1 |
cc: 03 38 42 60 pfld.l %r7\(%sp\)\+\+,%f2 |
d0: 03 40 63 60 pfld.l %r8\(%fp\)\+\+,%f3 |
d4: 03 48 84 60 pfld.l %r9\(%r4\)\+\+,%f4 |
d8: 03 00 a5 60 pfld.l %r0\(%r5\)\+\+,%f5 |
dc: 03 08 c6 60 pfld.l %r1\(%r6\)\+\+,%f6 |
e0: 03 60 e7 60 pfld.l %r12\(%r7\)\+\+,%f7 |
e4: 03 68 08 61 pfld.l %r13\(%r8\)\+\+,%f8 |
e8: 03 70 29 61 pfld.l %r14\(%r9\)\+\+,%f9 |
ec: 03 78 4a 61 pfld.l %r15\(%r10\)\+\+,%f10 |
f0: 03 80 6b 61 pfld.l %r16\(%r11\)\+\+,%f11 |
f4: 03 88 8c 61 pfld.l %r17\(%r12\)\+\+,%f12 |
f8: 03 e0 ad 61 pfld.l %r28\(%r13\)\+\+,%f13 |
fc: 03 f8 ce 61 pfld.l %r31\(%r14\)\+\+,%f14 |
/testsuite/gas/i860/pfsm.s
0,0 → 1,182
# pfsm.p family (p={ss,sd,dd}) |
|
.text |
|
# pfsm without dual bit |
r2s1.ss %f0,%f1,%f2 |
r2s1.sd %f3,%f4,%f5 |
r2s1.dd %f0,%f2,%f4 |
|
r2st.ss %f1,%f2,%f3 |
r2st.sd %f4,%f5,%f6 |
r2st.dd %f2,%f4,%f6 |
|
r2as1.ss %f2,%f3,%f4 |
r2as1.sd %f6,%f7,%f8 |
r2as1.dd %f4,%f6,%f8 |
|
r2ast.ss %f3,%f4,%f5 |
r2ast.sd %f7,%f8,%f9 |
r2ast.dd %f6,%f8,%f10 |
|
i2s1.ss %f4,%f5,%f6 |
i2s1.sd %f8,%f9,%f10 |
i2s1.dd %f12,%f14,%f16 |
|
i2st.ss %f7,%f8,%f9 |
i2st.sd %f11,%f12,%f13 |
i2st.dd %f14,%f16,%f18 |
|
i2as1.ss %f10,%f11,%f12 |
i2as1.sd %f14,%f15,%f16 |
i2as1.dd %f16,%f18,%f20 |
|
i2ast.ss %f13,%f14,%f15 |
i2ast.sd %f17,%f18,%f19 |
i2ast.dd %f18,%f20,%f22 |
|
rat1s2.ss %f14,%f15,%f16 |
rat1s2.sd %f20,%f21,%f22 |
rat1s2.dd %f20,%f22,%f24 |
|
m12asm.ss %f15,%f16,%f17 |
m12asm.sd %f23,%f24,%f25 |
m12asm.dd %f22,%f24,%f26 |
|
ra1s2.ss %f18,%f19,%f20 |
ra1s2.sd %f26,%f27,%f28 |
ra1s2.dd %f20,%f22,%f24 |
|
m12ttsa.ss %f19,%f20,%f21 |
m12ttsa.sd %f29,%f30,%f31 |
m12ttsa.dd %f22,%f24,%f26 |
|
iat1s2.ss %f20,%f21,%f22 |
iat1s2.sd %f0,%f1,%f2 |
iat1s2.dd %f24,%f26,%f28 |
|
m12tsm.ss %f21,%f22,%f23 |
m12tsm.sd %f3,%f4,%f5 |
m12tsm.dd %f30,%f0,%f2 |
|
ia1s2.ss %f22,%f23,%f24 |
ia1s2.sd %f6,%f7,%f8 |
ia1s2.dd %f4,%f6,%f8 |
|
m12tsa.ss %f23,%f24,%f25 |
m12tsa.sd %f9,%f10,%f11 |
m12tsa.dd %f6,%f8,%f10 |
|
# pfsm with dual bit |
d.r2s1.ss %f0,%f1,%f2 |
nop |
d.r2s1.sd %f3,%f4,%f5 |
nop |
d.r2s1.dd %f0,%f2,%f4 |
nop |
|
d.r2st.ss %f1,%f2,%f3 |
nop |
d.r2st.sd %f4,%f5,%f6 |
nop |
d.r2st.dd %f2,%f4,%f6 |
nop |
|
d.r2as1.ss %f2,%f3,%f4 |
nop |
d.r2as1.sd %f6,%f7,%f8 |
nop |
d.r2as1.dd %f4,%f6,%f8 |
nop |
|
d.r2ast.ss %f3,%f4,%f5 |
nop |
d.r2ast.sd %f7,%f8,%f9 |
nop |
d.r2ast.dd %f6,%f8,%f10 |
nop |
|
d.i2s1.ss %f4,%f5,%f6 |
nop |
d.i2s1.sd %f8,%f9,%f10 |
nop |
d.i2s1.dd %f12,%f14,%f16 |
nop |
|
d.i2st.ss %f7,%f8,%f9 |
nop |
d.i2st.sd %f11,%f12,%f13 |
nop |
d.i2st.dd %f14,%f16,%f18 |
nop |
|
d.i2as1.ss %f10,%f11,%f12 |
nop |
d.i2as1.sd %f14,%f15,%f16 |
nop |
d.i2as1.dd %f16,%f18,%f20 |
nop |
|
d.i2ast.ss %f13,%f14,%f15 |
nop |
d.i2ast.sd %f17,%f18,%f19 |
nop |
d.i2ast.dd %f18,%f20,%f22 |
nop |
|
d.rat1s2.ss %f14,%f15,%f16 |
nop |
d.rat1s2.sd %f20,%f21,%f22 |
nop |
d.rat1s2.dd %f20,%f22,%f24 |
nop |
|
d.m12asm.ss %f15,%f16,%f17 |
nop |
d.m12asm.sd %f23,%f24,%f25 |
nop |
d.m12asm.dd %f22,%f24,%f26 |
nop |
|
d.ra1s2.ss %f18,%f19,%f20 |
nop |
d.ra1s2.sd %f26,%f27,%f28 |
nop |
d.ra1s2.dd %f20,%f22,%f24 |
nop |
|
d.m12ttsa.ss %f19,%f20,%f21 |
nop |
d.m12ttsa.sd %f29,%f30,%f31 |
nop |
d.m12ttsa.dd %f22,%f24,%f26 |
nop |
|
d.iat1s2.ss %f20,%f21,%f22 |
nop |
d.iat1s2.sd %f0,%f1,%f2 |
nop |
d.iat1s2.dd %f24,%f26,%f28 |
nop |
|
d.m12tsm.ss %f21,%f22,%f23 |
nop |
d.m12tsm.sd %f3,%f4,%f5 |
nop |
d.m12tsm.dd %f30,%f0,%f2 |
nop |
|
d.ia1s2.ss %f22,%f23,%f24 |
nop |
d.ia1s2.sd %f6,%f7,%f8 |
nop |
d.ia1s2.dd %f4,%f6,%f8 |
nop |
|
d.m12tsa.ss %f23,%f24,%f25 |
nop |
d.m12tsa.sd %f9,%f10,%f11 |
nop |
d.m12tsa.dd %f6,%f8,%f10 |
nop |
|
/testsuite/gas/i860/float01.s
0,0 → 1,84
# fadd, fsub, fmul, pfmul3, fmlow |
|
.text |
|
# Non-pipelined, without dual bit |
fadd.ss %f0,%f1,%f2 |
fadd.sd %f2,%f3,%f4 |
fadd.dd %f6,%f8,%f10 |
|
fsub.ss %f5,%f6,%f7 |
fsub.sd %f8,%f9,%f10 |
fsub.dd %f12,%f14,%f16 |
|
fmul.ss %f11,%f12,%f13 |
fmul.sd %f14,%f15,%f16 |
fmul.dd %f18,%f20,%f22 |
|
fmlow.dd %f22,%f24,%f26 |
|
# Pipelined, without dual bit |
pfadd.ss %f14,%f15,%f16 |
pfadd.sd %f17,%f18,%f20 |
pfadd.dd %f22,%f24,%f26 |
|
pfsub.ss %f20,%f21,%f22 |
pfsub.sd %f23,%f24,%f26 |
pfsub.dd %f28,%f30,%f2 |
|
pfmul.ss %f27,%f28,%f29 |
pfmul.sd %f30,%f31,%f4 |
pfmul.dd %f6,%f0,%f8 |
|
pfmul3.dd %f2,%f4,%f30 |
|
# Non-pipelined, with dual bit |
d.fadd.ss %f0,%f1,%f2 |
nop |
d.fadd.sd %f2,%f3,%f4 |
nop |
d.fadd.dd %f6,%f8,%f10 |
nop |
|
d.fsub.ss %f5,%f6,%f7 |
nop |
d.fsub.sd %f8,%f9,%f10 |
nop |
d.fsub.dd %f12,%f14,%f16 |
nop |
|
d.fmul.ss %f11,%f12,%f13 |
nop |
d.fmul.sd %f14,%f15,%f16 |
nop |
d.fmul.dd %f18,%f20,%f22 |
nop |
|
d.fmlow.dd %f8,%f10,%f12 |
nop |
|
# Pipelined, with dual bit |
d.pfadd.ss %f14,%f15,%f16 |
nop |
d.pfadd.sd %f17,%f18,%f20 |
nop |
d.pfadd.dd %f22,%f24,%f26 |
nop |
|
d.pfsub.ss %f20,%f21,%f22 |
nop |
d.pfsub.sd %f23,%f24,%f26 |
nop |
d.pfsub.dd %f28,%f30,%f2 |
nop |
|
d.pfmul.ss %f27,%f28,%f29 |
nop |
d.pfmul.sd %f30,%f31,%f4 |
nop |
d.pfmul.dd %f6,%f0,%f8 |
nop |
|
d.pfmul3.dd %f2,%f4,%f30 |
nop |
|
/testsuite/gas/i860/bitwise.s
0,0 → 1,150
# and, andh, andnot, andnoth, or, orh, xor, xorh |
|
.text |
|
# Register forms (high variants do not have register forms). |
and %r0,%r1,%r2 |
and %r3,%r4,%r5 |
and %r6,%r7,%r8 |
and %r9,%r10,%r11 |
and %r12,%r13,%r14 |
and %r15,%r16,%r17 |
and %r18,%r19,%r20 |
and %r21,%r22,%r23 |
and %r24,%r25,%r26 |
and %r27,%r28,%r29 |
and %r30,%r31,%r0 |
|
andnot %r0,%r1,%r2 |
andnot %r3,%r4,%r5 |
andnot %r6,%r7,%r8 |
andnot %r9,%r10,%r11 |
andnot %r12,%r13,%r14 |
andnot %r15,%r16,%r17 |
andnot %r18,%r19,%r20 |
andnot %r21,%r22,%r23 |
andnot %r24,%r25,%r26 |
andnot %r27,%r28,%r29 |
andnot %r30,%r31,%r0 |
|
or %r0,%r1,%r2 |
or %r3,%r4,%r5 |
or %r6,%r7,%r8 |
or %r9,%r10,%r11 |
or %r12,%r13,%r14 |
or %r15,%r16,%r17 |
or %r18,%r19,%r20 |
or %r21,%r22,%r23 |
or %r24,%r25,%r26 |
or %r27,%r28,%r29 |
or %r30,%r31,%r0 |
|
xor %r0,%r1,%r2 |
xor %r3,%r4,%r5 |
xor %r6,%r7,%r8 |
xor %r9,%r10,%r11 |
xor %r12,%r13,%r14 |
xor %r15,%r16,%r17 |
xor %r18,%r19,%r20 |
xor %r21,%r22,%r23 |
xor %r24,%r25,%r26 |
xor %r27,%r28,%r29 |
xor %r30,%r31,%r0 |
|
# Immediate forms (all) |
and 0,%r1,%r2 |
and 8192,%r4,%r5 |
and 5109,%r7,%r8 |
and 32768,%r10,%r11 |
and 65000,%r13,%r14 |
and 65535,%r16,%r17 |
and 0xffff,%r19,%r20 |
and 0xabcd,%r22,%r23 |
and 0x1234,%r25,%r26 |
and 0x0,%r28,%r29 |
and 0x3,%r31,%r0 |
|
andh 1,%r1,%r2 |
andh 8193,%r4,%r5 |
andh 5110,%r7,%r8 |
andh 32769,%r10,%r11 |
andh 65001,%r13,%r14 |
andh 65535,%r16,%r17 |
andh 0xffff,%r19,%r20 |
andh 0xabcd,%r22,%r23 |
andh 0x1234,%r25,%r26 |
andh 0x0,%r28,%r29 |
andh 0x3,%r31,%r0 |
|
andnot 0,%r1,%r2 |
andnot 8192,%r4,%r5 |
andnot 5109,%r7,%r8 |
andnot 32768,%r10,%r11 |
andnot 65000,%r13,%r14 |
andnot 65535,%r16,%r17 |
andnot 0xffff,%r19,%r20 |
andnot 0xabcd,%r22,%r23 |
andnot 0x1234,%r25,%r26 |
andnot 0x0,%r28,%r29 |
andnot 0x3,%r31,%r0 |
|
andnoth 1,%r1,%r2 |
andnoth 8193,%r4,%r5 |
andnoth 5110,%r7,%r8 |
andnoth 32769,%r10,%r11 |
andnoth 65001,%r13,%r14 |
andnoth 65535,%r16,%r17 |
andnoth 0xffff,%r19,%r20 |
andnoth 0xabcd,%r22,%r23 |
andnoth 0x1234,%r25,%r26 |
andnoth 0x0,%r28,%r29 |
andnoth 0x3,%r31,%r0 |
|
or 0,%r1,%r2 |
or 1,%r4,%r5 |
or 2,%r7,%r8 |
or 3,%r10,%r11 |
or 65000,%r13,%r14 |
or 65535,%r16,%r17 |
or 0xffff,%r19,%r20 |
or 0xabcd,%r22,%r23 |
or 0x1234,%r25,%r26 |
or 0x0,%r28,%r29 |
or 0x3,%r31,%r0 |
|
orh 0,%r1,%r2 |
orh 1,%r4,%r5 |
orh 2,%r7,%r8 |
orh 3,%r10,%r11 |
orh 65000,%r13,%r14 |
orh 65535,%r16,%r17 |
orh 0xffff,%r19,%r20 |
orh 0xabcd,%r22,%r23 |
orh 0x1234,%r25,%r26 |
orh 0x0,%r28,%r29 |
orh 0x3,%r31,%r0 |
|
xor 0,%r1,%r2 |
xor 1,%r4,%r5 |
xor 2,%r7,%r8 |
xor 3,%r10,%r11 |
xor 65000,%r13,%r14 |
xor 65535,%r16,%r17 |
xor 0xffff,%r19,%r20 |
xor 0xabcd,%r22,%r23 |
xor 0x1234,%r25,%r26 |
xor 0x0,%r28,%r29 |
xor 0x3,%r31,%r0 |
|
xorh 0,%r1,%r2 |
xorh 1,%r4,%r5 |
xorh 2,%r7,%r8 |
xorh 3,%r10,%r11 |
xorh 65000,%r13,%r14 |
xorh 65535,%r16,%r17 |
xorh 0xffff,%r19,%r20 |
xorh 0xabcd,%r22,%r23 |
xorh 0x1234,%r25,%r26 |
xorh 0x0,%r28,%r29 |
xorh 0x3,%r31,%r0 |
|
/testsuite/gas/i860/dual01.d
0,0 → 1,21
#as: |
#objdump: -d |
#name: i860 dual01 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <\.text>: |
0: 00 00 00 a0 shl %r0,%r0,%r0 |
4: 00 00 00 a0 shl %r0,%r0,%r0 |
8: b0 47 4c 49 d.pfadd.dd %f8,%f10,%f12 |
c: 00 28 c6 90 adds %r5,%r6,%r6 |
10: b0 47 4c 49 d.pfadd.dd %f8,%f10,%f12 |
14: 10 00 58 25 fld.d 16\(%r10\),%f24 |
18: 00 02 00 b0 d.shrd %r0,%r0,%r0 |
1c: 08 00 48 25 fld.d 8\(%r10\),%f8 |
20: 00 02 00 b0 d.shrd %r0,%r0,%r0 |
24: 00 00 50 25 fld.d 0\(%r10\),%f16 |
28: 00 00 00 a0 shl %r0,%r0,%r0 |
2c: 00 00 00 a0 shl %r0,%r0,%r0 |
/testsuite/gas/i860/float03.s
0,0 → 1,64
# fix, ftrunc, pfgt, pfle, pfeq |
|
.text |
|
# Non-pipelined, without dual bit |
fix.sd %f2,%f4 |
fix.dd %f6,%f8 |
|
ftrunc.sd %f8,%f10 |
ftrunc.dd %f12,%f14 |
|
# Pipelined, without dual bit |
pfix.sd %f30,%f14 |
pfix.dd %f24,%f2 |
|
pftrunc.sd %f8,%f10 |
pftrunc.dd %f12,%f14 |
|
pfgt.ss %f0,%f1,%f2 |
pfgt.dd %f6,%f8,%f10 |
|
pfle.ss %f5,%f6,%f7 |
pfle.dd %f12,%f14,%f16 |
|
pfeq.ss %f11,%f12,%f13 |
pfeq.dd %f18,%f20,%f22 |
|
# Non-pipelined, with dual bit |
d.fix.sd %f2,%f30 |
nop |
d.fix.dd %f6,%f8 |
nop |
|
d.ftrunc.sd %f8,%f24 |
nop |
d.ftrunc.dd %f12,%f14 |
nop |
|
# Pipelined, with dual bit |
d.pfix.sd %f2,%f30 |
nop |
d.pfix.dd %f6,%f8 |
nop |
|
d.pftrunc.sd %f8,%f24 |
nop |
d.pftrunc.dd %f12,%f14 |
nop |
|
d.pfgt.ss %f0,%f1,%f2 |
nop |
d.pfgt.dd %f6,%f8,%f10 |
nop |
|
d.pfle.ss %f5,%f6,%f7 |
nop |
d.pfle.dd %f12,%f14,%f16 |
nop |
|
d.pfeq.ss %f11,%f12,%f13 |
nop |
d.pfeq.dd %f18,%f20,%f22 |
nop |
|
/testsuite/gas/i860/dual03.d
0,0 → 1,53
#as: -mintel-syntax |
#objdump: -d |
#name: i860 dual03 |
|
.*: +file format .* |
|
Disassembly of section \.text: |
|
00000000 <L1-0x20>: |
0: 00 00 14 22 fld.d %r0\(%r16\),%f20 |
4: fe ff 15 94 adds -2,%r0,%r21 |
8: 30 06 00 48 d.pfadd.ss %f0,%f0,%f0 |
c: fa ff 31 96 adds -6,%r17,%r17 |
10: 30 06 00 48 d.pfadd.ss %f0,%f0,%f0 |
14: 02 a8 20 b6 bla %r21,%r17,0x00000020 // 20 <L1> |
18: 30 06 00 48 d.pfadd.ss %f0,%f0,%f0 |
1c: 09 00 16 26 fld.d 8\(%r16\)\+\+,%f22 |
|
00000020 <L1>: |
20: 30 a6 de 4b d.pfadd.ss %f20,%f30,%f30 |
24: 06 a8 20 b6 bla %r21,%r17,0x00000040 // 40 <L2> |
28: 30 ae ff 4b d.pfadd.ss %f21,%f31,%f31 |
2c: 09 00 14 26 fld.d 8\(%r16\)\+\+,%f20 |
30: 30 a6 de 4b d.pfadd.ss %f20,%f30,%f30 |
34: 0a 00 00 68 br 0x00000060 // 60 <S> |
38: 30 ae ff 4b d.pfadd.ss %f21,%f31,%f31 |
3c: 00 00 00 a0 shl %r0,%r0,%r0 |
|
00000040 <L2>: |
40: 30 b6 de 4b d.pfadd.ss %f22,%f30,%f30 |
44: f6 af 3f b6 bla %r21,%r17,0x00000020 // 20 <L1> |
48: 30 be ff 4b d.pfadd.ss %f23,%f31,%f31 |
4c: 09 00 16 26 fld.d 8\(%r16\)\+\+,%f22 |
50: 30 a6 de 4b d.pfadd.ss %f20,%f30,%f30 |
54: 00 00 00 a0 shl %r0,%r0,%r0 |
58: 30 ae ff 4b d.pfadd.ss %f21,%f31,%f31 |
5c: 00 00 00 a0 shl %r0,%r0,%r0 |
|
00000060 <S>: |
60: 30 b4 de 4b pfadd.ss %f22,%f30,%f30 |
64: fc ff 15 94 adds -4,%r0,%r21 |
68: 30 bc ff 4b pfadd.ss %f23,%f31,%f31 |
6c: 02 a8 20 5a bte %r21,%r17,0x00000078 // 78 <DONE> |
70: 0b 00 14 26 fld.l 8\(%r16\)\+\+,%f20 |
74: 30 a4 de 4b pfadd.ss %f20,%f30,%f30 |
|
00000078 <DONE>: |
78: 30 04 1e 48 pfadd.ss %f0,%f0,%f30 |
7c: 30 f4 ff 4b pfadd.ss %f30,%f31,%f31 |
80: 30 04 1e 48 pfadd.ss %f0,%f0,%f30 |
84: 30 04 00 48 pfadd.ss %f0,%f0,%f0 |
88: 30 04 1f 48 pfadd.ss %f0,%f0,%f31 |
8c: 30 f0 f0 4b fadd.ss %f30,%f31,%f16 |
/testsuite/gas/i860/regress01.s
0,0 → 1,19
# Test fst.* with and without auto-increment. |
|
.text |
|
fst.l %f16,-16(%sp) |
fst.l %f20,-16(%sp) |
fst.l %f24,-16(%sp) |
|
fst.l %f16,-16(%sp)++ |
fst.l %f20,-16(%sp)++ |
fst.l %f24,-16(%sp)++ |
|
fst.q %f16,-16(%sp) |
fst.q %f20,-16(%sp) |
fst.q %f24,-16(%sp) |
|
fst.q %f16,-16(%sp)++ |
fst.q %f20,-16(%sp)++ |
fst.q %f24,-16(%sp)++ |
/testsuite/gas/i860/fldst01.s
0,0 → 1,75
# fld.l (no relocations here) |
.text |
|
# Immediate form, no auto-increment. |
fld.l 0(%r0),%f0 |
fld.l 124(%r1),%f31 |
fld.l 256(%r2),%f30 |
fld.l 512(%r3),%f29 |
fld.l 1024(%r4),%f28 |
fld.l 4096(%r5),%f27 |
fld.l 8192(%r6),%f26 |
fld.l 16384(%r7),%f25 |
fld.l 32764(%r7),%f25 |
fld.l -32768(%r7),%f23 |
fld.l -16384(%r8),%f2 |
fld.l -8192(%r9),%f3 |
fld.l -4096(%r10),%f8 |
fld.l -1024(%r11),%f9 |
fld.l -508(%r12),%f12 |
fld.l -248(%r13),%f19 |
fld.l -4(%r14),%f21 |
|
# Immediate form, with auto-increment. |
fld.l 0(%r0)++,%f0 |
fld.l 124(%r1)++,%f1 |
fld.l 256(%r2)++,%f2 |
fld.l 512(%r3)++,%f3 |
fld.l 1024(%r4)++,%f4 |
fld.l 4096(%r5)++,%f5 |
fld.l 8192(%r6)++,%f6 |
fld.l 16384(%r7)++,%f7 |
fld.l 32764(%r7)++,%f8 |
fld.l -32768(%r7)++,%f9 |
fld.l -16384(%r8)++,%f10 |
fld.l -8192(%r9)++,%f11 |
fld.l -4096(%r10)++,%f12 |
fld.l -1024(%r11)++,%f13 |
fld.l -508(%r12)++,%f14 |
fld.l -248(%r13)++,%f15 |
fld.l -4(%r14)++,%f16 |
|
# Index form, no auto-increment. |
fld.l %r5(%r0),%f0 |
fld.l %r6(%r1),%f31 |
fld.l %r7(%r2),%f30 |
fld.l %r8(%r3),%f29 |
fld.l %r9(%r4),%f28 |
fld.l %r0(%r5),%f27 |
fld.l %r1(%r6),%f26 |
fld.l %r12(%r7),%f25 |
fld.l %r13(%r8),%f24 |
fld.l %r14(%r9),%f23 |
fld.l %r15(%r10),%f22 |
fld.l %r16(%r11),%f21 |
fld.l %r17(%r12),%f20 |
fld.l %r28(%r13),%f19 |
fld.l %r31(%r14),%f18 |
|
# Index form, with auto-increment. |
fld.l %r5(%r0)++,%f0 |
fld.l %r6(%r1)++,%f1 |
fld.l %r7(%r2)++,%f2 |
fld.l %r8(%r3)++,%f3 |
fld.l %r9(%r4)++,%f4 |
fld.l %r0(%r5)++,%f5 |
fld.l %r1(%r6)++,%f6 |
fld.l %r12(%r7)++,%f7 |
fld.l %r13(%r8)++,%f8 |
fld.l %r14(%r9)++,%f9 |
fld.l %r15(%r10)++,%f10 |
fld.l %r16(%r11)++,%f11 |
fld.l %r17(%r12)++,%f12 |
fld.l %r28(%r13)++,%f13 |
fld.l %r31(%r14)++,%f14 |
|
/testsuite/gas/i860/shift.s
0,0 → 1,90
# shl, shr, shra, shrd |
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.text |
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# Register forms (all) |
shl %r0,%r1,%r2 |
shl %r3,%r4,%r5 |
shl %r6,%r7,%r8 |
shl %r9,%r10,%r11 |
shl %r31,%r13,%r14 |
shl %r15,%r16,%r17 |
shl %r18,%r19,%r20 |
shl %r21,%r22,%r23 |
shl %r24,%r25,%r31 |
shl %r27,%r28,%r29 |
shl %r30,%r31,%r0 |
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shr %r0,%r1,%r2 |
shr %r3,%r4,%r5 |
shr %r6,%r7,%r8 |
shr %r9,%r10,%r11 |
shr %r31,%r13,%r14 |
shr %r15,%r16,%r17 |
shr %r18,%r19,%r20 |
shr %r21,%r22,%r23 |
shr %r24,%r25,%r31 |
shr %r27,%r28,%r29 |
shr %r30,%r31,%r0 |
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shra %r0,%r1,%r2 |
shra %r3,%r4,%r5 |
shra %r6,%r7,%r8 |
shra %r9,%r10,%r11 |
shra %r31,%r13,%r14 |
shra %r15,%r16,%r17 |
shra %r18,%r19,%r20 |
shra %r21,%r22,%r23 |
shra %r24,%r25,%r31 |
shra %r27,%r28,%r29 |
shra %r30,%r31,%r0 |
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shrd %r0,%r1,%r2 |
shrd %r3,%r4,%r5 |
shrd %r6,%r7,%r8 |
shrd %r9,%r10,%r11 |
shrd %r31,%r13,%r14 |
shrd %r15,%r16,%r17 |
shrd %r18,%r19,%r20 |
shrd %r21,%r22,%r23 |
shrd %r24,%r25,%r31 |
shrd %r27,%r28,%r29 |
shrd %r30,%r31,%r0 |
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# Immediate forms (shrd does not have an immediate form) |
shl 0,%r1,%r2 |
shl 8192,%r4,%r5 |
shl 5109,%r7,%r8 |
shl 32767,%r10,%r11 |
shl -32768,%r13,%r14 |
shl -8192,%r16,%r17 |
shl -1,%r19,%r20 |
shl -21555,%r22,%r23 |
shl 0x1234,%r25,%r26 |
shl 0x0,%r28,%r29 |
shl 0x3,%r31,%r0 |
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shr 0,%r1,%r2 |
shr 8192,%r4,%r5 |
shr 5109,%r7,%r8 |
shr 32767,%r10,%r11 |
shr -32768,%r13,%r14 |
shr -8192,%r16,%r17 |
shr -1,%r19,%r20 |
shr -21555,%r22,%r23 |
shr 0x1234,%r25,%r26 |
shr 0x0,%r28,%r29 |
shr 0x3,%r31,%r0 |
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shra 1,%r1,%r2 |
shra 8193,%r4,%r5 |
shra 5110,%r7,%r8 |
shra 32767,%r10,%r11 |
shra -32768,%r13,%r14 |
shra -8192,%r16,%r17 |
shra -1,%r19,%r20 |
shra -21555,%r22,%r23 |
shra 0x1234,%r25,%r26 |
shra 0x0,%r28,%r29 |
shra 0x3,%r31,%r0 |
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