OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /open8_urisc
    from Rev 126 to Rev 127
    ↔ Reverse comparison
  •

Rev 126 → Rev 127

/trunk/gnu/binutils/gas/testsuite/gas/sparc/gotop32.d
0,0 → 1,15
#as: -Av7
#objdump: -dr
#name: sparc gotop
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo>:
0: 23 00 00 00 sethi %hi\(0\), %l1
0: R_SPARC_GOTDATA_OP_HIX22 .data
4: a2 1c 60 00 xor %l1, 0, %l1
4: R_SPARC_GOTDATA_OP_LOX10 .data
8: e4 05 c0 11 ld \[ %l7 \+ %l1 \], %l2
8: R_SPARC_GOTDATA_OP .data
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch1.d
0,0 → 1,23
#as: -Av9
#objdump: -dr --prefix-addresses
#name: v9branch1
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
0x0+000000 brz %o0, 0x0+01fffc
0x0+000004 nop
...
0x0+01fff8 nop
0x0+01fffc nop
...
0x0+03fffc brz %o0, 0x0+01fffc
0x0+040000 nop
0x0+040004 bne %icc, 0x0+140000
0x0+040008 nop
...
0x0+13fffc nop
0x0+140000 nop
...
0x0+240000 bne %icc, 0x0+140000
0x0+240004 nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/rdhpr.s
0,0 → 1,8
# Test rdpr
.text
rdhpr %hpstate,%g1
rdhpr %htstate,%g2
rdhpr %hintp,%g3
rdhpr %htba,%g4
rdhpr %hver,%g5
rdhpr %hstick_cmpr,%g6
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch2.d
0,0 → 1,3
#as: -Av9
#name: v9branch2
#error: :3:.*relocation.*overflow
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch3.d
0,0 → 1,3
#as: -Av9
#name: v9branch3
#error: :5:.*relocation.*overflow
/trunk/gnu/binutils/gas/testsuite/gas/sparc/prefetch.d
0,0 → 1,19
#as: -64 -Av9
#objdump: -dr
#name: sparc64 prefetch
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: c1 68 40 00 prefetch \[ %g1 \], #n_reads
4: ff 68 40 00 prefetch \[ %g1 \], 31
8: c1 68 40 00 prefetch \[ %g1 \], #n_reads
c: c3 68 40 00 prefetch \[ %g1 \], #one_read
10: c5 68 40 00 prefetch \[ %g1 \], #n_writes
14: c7 68 40 00 prefetch \[ %g1 \], #one_write
18: c1 e8 42 00 prefetcha \[ %g1 \] #ASI_AIUP, #n_reads
1c: ff e8 60 00 prefetcha \[ %g1 \] %asi, 31
20: c1 e8 42 20 prefetcha \[ %g1 \] #ASI_AIUS, #n_reads
24: c3 e8 60 00 prefetcha \[ %g1 \] %asi, #one_read
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch4.d
0,0 → 1,3
#as: -Av9
#name: v9branch4
#error: :3:.*relocation.*overflow
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch5.d
0,0 → 1,3
#as: -Av9
#name: v9branch5
#error: :5:.*relocation.*overflow
/trunk/gnu/binutils/gas/testsuite/gas/sparc/wrhpr.d
0,0 → 1,14
#as: -64 -Av9
#objdump: -dr
#name: sparc64 wrhpr
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 81 98 40 00 wrhpr %g1, %hpstate
4: 83 98 80 00 wrhpr %g2, %htstate
8: 87 98 c0 00 wrhpr %g3, %hintp
c: 8b 99 00 00 wrhpr %g4, %htba
10: bf 99 40 00 wrhpr %g5, %hstick_cmpr
/trunk/gnu/binutils/gas/testsuite/gas/sparc/rdpr.d
0,0 → 1,27
#as: -64 -Av9
#objdump: -dr
#name: sparc64 rdpr
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 83 50 00 00 rdpr %tpc, %g1
4: 85 50 40 00 rdpr %tnpc, %g2
8: 87 50 80 00 rdpr %tstate, %g3
c: 89 50 c0 00 rdpr %tt, %g4
10: 8b 51 00 00 rdpr %tick, %g5
14: 8d 51 40 00 rdpr %tba, %g6
18: 8f 51 80 00 rdpr %pstate, %g7
1c: 91 51 c0 00 rdpr %tl, %o0
20: 93 52 00 00 rdpr %pil, %o1
24: 95 52 40 00 rdpr %cwp, %o2
28: 97 52 80 00 rdpr %cansave, %o3
2c: 99 52 c0 00 rdpr %canrestore, %o4
30: 9b 53 00 00 rdpr %cleanwin, %o5
34: 9d 53 40 00 rdpr %otherwin, %sp
38: 9f 53 80 00 rdpr %wstate, %o7
3c: a1 53 c0 00 rdpr %fq, %l0
40: a3 54 00 00 rdpr %gl, %l1
44: a5 57 c0 00 rdpr %ver, %l2
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pc2210.d
0,0 → 1,13
#as: -Av7
#objdump: -dr
#name: pc2210
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 13 00 00 00 sethi %hi\(0\), %o1
0: R_SPARC_PC22 .data
4: 92 12 60 00 mov %o1, %o1 ! 0 <.text>
4: R_SPARC_PC10 .data
/trunk/gnu/binutils/gas/testsuite/gas/sparc/plt64.d
0,0 → 1,26
#as: -K PIC -64
#objdump: -Dr
#name: plt 64-bit relocs
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 40 00 00 00 call 0x0
0: R_SPARC_WPLT30 foo
4: 01 00 00 00 nop
8: 40 00 00 00 call 0x8
8: R_SPARC_WPLT30 bar\+0x4
Disassembly of section .data:
 
0+ <.data>:
...
0: R_SPARC_PLT64 foo
8: R_SPARC_PLT64 bar\+0x4
10: 01 00 00 00 nop
11: R_SPARC_PLT64 foo
14: 00 00 00 00 illtrap 0
18: 00 02 03 04 illtrap 0x20304
1c: 00 00 00 00 illtrap 0
1c: R_SPARC_PLT32 bar\+0x4
/trunk/gnu/binutils/gas/testsuite/gas/sparc/wrpr.s
0,0 → 1,18
# Test wrpr
.text
wrpr %g1,%tpc
wrpr %g2,%tnpc
wrpr %g3,%tstate
wrpr %g4,%tt
wrpr %g5,%tick
wrpr %g6,%tba
wrpr %g7,%pstate
wrpr %o0,%tl
wrpr %o1,%pil
wrpr %o2,%cwp
wrpr %o3,%cansave
wrpr %o4,%canrestore
wrpr %o5,%cleanwin
wrpr %o6,%otherwin
wrpr %o7,%wstate
wrpr %l0,%gl
/trunk/gnu/binutils/gas/testsuite/gas/sparc/gotop32.s
0,0 → 1,9
# sparc gotop
 
.data
sym: .word 0
 
.text
foo: sethi %gdop_hix22(sym), %l1
xor %l1, %gdop_lox10(sym), %l1
ld [%l7 + %l1], %l2, %gdop(sym)
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch1.s
0,0 → 1,18
# Check if maximum possible branch distances for v9 branches are accepted
.text
brz,pt %o0, 1f
nop
.skip (128 * 1024 - 16)
nop
1: nop
.skip (128 * 1024 - 4)
brz,pt %o0, 1b
nop
bne,pt %icc, 2f
nop
.skip (1024 * 1024 - 16)
nop
2: nop
.skip (1024 * 1024 - 4)
bne,pt %icc, 2b
nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch2.s
0,0 → 1,7
# Text for relocation overflow diagnostic
.text
brz,pt %o0, 1f
nop
.skip (128 * 1024 - 12)
nop
1: nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/reloc64.d
0,0 → 1,76
#as: -64 -Av9
#objdump: -dr
#name: sparc64 reloc64
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo>:
0: 03 04 8d 15 sethi %hi\(0x12345400\), %g1
4: 82 10 62 78 or %g1, 0x278, %g1.*
8: 01 00 00 00 nop
c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
c: R_SPARC_HH22 .text
10: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
10: R_SPARC_HM10 .text
14: 01 00 00 00 nop
18: 03 00 00 00 sethi %hi\((0x|)0\), %g1
18: R_SPARC_HH22 .text\+0x1234567800000000
1c: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
1c: R_SPARC_HM10 .text\+0x1234567800000000
20: 01 00 00 00 nop
24: 03 3f b7 2e sethi %hi\(0xfedcb800\), %g1
28: 82 10 62 98 or %g1, 0x298, %g1.*
2c: 05 1d 95 0c sethi %hi\(0x76543000\), %g2
30: 84 10 62 10 or %g1, 0x210, %g2
34: 01 00 00 00 nop
38: 03 00 00 00 sethi %hi\((0x|)0\), %g1
38: R_SPARC_HH22 .text
3c: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
3c: R_SPARC_HM10 .text
40: 05 00 00 00 sethi %hi\((0x|)0\), %g2
40: R_SPARC_LM22 .text
44: 84 10 60 00 mov %g1, %g2
44: R_SPARC_LO10 .text
48: 01 00 00 00 nop
4c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
4c: R_SPARC_HH22 .text\+0xfedcba9876543210
50: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
50: R_SPARC_HM10 .text\+0xfedcba9876543210
54: 05 00 00 00 sethi %hi\((0x|)0\), %g2
54: R_SPARC_LM22 .text\+0xfedcba9876543210
58: 84 10 60 00 mov %g1, %g2
58: R_SPARC_LO10 .text\+0xfedcba9876543210
5c: 01 00 00 00 nop
60: 03 2a 61 d9 sethi %hi\(0xa9876400\), %g1
64: 82 10 61 43 or %g1, 0x143, %g1.*
68: 82 10 62 10 or %g1, 0x210, %g1
6c: 01 00 00 00 nop
70: 03 00 00 00 sethi %hi\((0x|)0\), %g1
70: R_SPARC_H44 .text
74: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
74: R_SPARC_M44 .text
78: 82 10 60 00 mov %g1, %g1
78: R_SPARC_L44 .text
7c: 01 00 00 00 nop
80: 03 00 00 00 sethi %hi\((0x|)0\), %g1
80: R_SPARC_H44 .text\+0xa9876543210
84: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
84: R_SPARC_M44 .text\+0xa9876543210
88: 82 10 60 00 mov %g1, %g1
88: R_SPARC_L44 .text\+0xa9876543210
8c: 01 00 00 00 nop
90: 03 22 6a f3 sethi %hi\(0x89abcc00\), %g1
94: 82 18 7e 10 xor %g1, -496, %g1
98: 01 00 00 00 nop
9c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
9c: R_SPARC_HIX22 .text
a0: 82 18 60 00 xor %g1, 0, %g1
a0: R_SPARC_LOX10 .text
a4: 01 00 00 00 nop
a8: 03 00 00 00 sethi %hi\((0x|)0\), %g1
a8: R_SPARC_HIX22 .text\+0xffffffff76543210
ac: 82 18 60 00 xor %g1, 0, %g1
ac: R_SPARC_LOX10 .text\+0xffffffff76543210
b0: 01 00 00 00 nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/mismatch.exp
0,0 → 1,20
# Test architecture mismatch errors.
#
# GAS issues two lines of error text for each mismatch:
#
# mm-lite.s:7: Error: Architecture mismatch on "divscc".
# mm-lite.s:7: (Requires sparclite; requested architecture is v8.)
#
# The suggested regexp argument to dg-error is "mismatch|<arch>".
 
if [istarget sparc*-*-*] {
 
load_lib gas-dg.exp
 
dg-init
 
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/mism-*.s]] "" ""
 
dg-finish
 
}
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch3.s
0,0 → 1,6
# Text for relocation overflow diagnostic
.text
1: nop
.skip (128 * 1024)
brz,pt %o0, 1b
nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/prefetch.s
0,0 → 1,11
.text
prefetch [%g1],0
prefetch [%g1],31
prefetch [%g1],#n_reads
prefetch [%g1],#one_read
prefetch [%g1],#n_writes
prefetch [%g1],#one_write
prefetcha [%g1]#ASI_AIUP,0
prefetcha [%g1]%asi,31
prefetcha [%g1]#ASI_AIUS,#n_reads
prefetcha [%g1]%asi,#one_read
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pcrel64.d
0,0 → 1,40
#as: -64 -K PIC
#objdump: -Dr
#name: pc relative 64-bit relocs
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo-0x8>:
0: 01 00 00 00 nop
4: 01 00 00 00 nop
 
0+8 <foo>:
8: 01 00 00 00 nop
Disassembly of section .data:
 
0+ <.data>:
0: 00 00 00 00 illtrap 0
4: 00 00 00 01 illtrap 0x1
...
8: R_SPARC_32 .text\+0x10
c: R_SPARC_DISP32 .text\+0x10
10: R_SPARC_32 .text\+0x14
14: R_SPARC_DISP32 .text\+0x14
18: R_SPARC_32 foo
1c: R_SPARC_DISP32 foo
20: R_SPARC_32 foo\+0x10
24: R_SPARC_DISP32 foo\+0x10
28: R_SPARC_64 .text\+0x8
30: R_SPARC_DISP64 .text\+0x8
38: R_SPARC_64 foo
40: R_SPARC_DISP64 foo
48: R_SPARC_64 foo\+0x10
50: R_SPARC_DISP64 foo\+0x10
58: R_SPARC_DISP8 .data\+0x18
59: R_SPARC_DISP8 .data\+0x64
5a: R_SPARC_DISP16 .data\+0x18
5c: R_SPARC_DISP16 .data\+0x64
60: 00 02 00 00 illtrap 0x20000
...
/trunk/gnu/binutils/gas/testsuite/gas/sparc/synth64.d
0,0 → 1,21
#as: -64 -Av9
#objdump: -dr --prefix-addresses
#name: sparc64 synth64
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
0+0000 <foo-(0x|)4> iprefetch 0+0004 <foo>
0+0004 <foo> signx %g1, %g2
0+0008 <foo\+(0x|)4> clruw %g1, %g2
0+000c <foo\+(0x|)8> cas \[ %g1 \], %g2, %g3
0+0010 <foo\+(0x|)c> casl \[ %g1 \], %g2, %g3
0+0014 <foo\+(0x|)10> casx \[ %g1 \], %g2, %g3
0+0018 <foo\+(0x|)14> casxl \[ %g1 \], %g2, %g3
0+001c <foo\+(0x|)18> clrx \[ %g1 \+ %g2 \]
0+0020 <foo\+(0x|)1c> clrx \[ %g1 \]
0+0024 <foo\+(0x|)20> clrx \[ %g1 \+ 1 \]
0+0028 <foo\+(0x|)24> clrx \[ %g1 \+ 0x2a \]
0+002c <foo\+(0x|)28> clrx \[ 0x42 \]
0+0030 <foo\+(0x|)2c> signx %g1
0+0034 <foo\+(0x|)30> clruw %g2
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch4.s
0,0 → 1,7
# Text for relocation overflow diagnostic
.text
bne,pt %icc, 1f
nop
.skip (1024 * 1024 - 12)
nop
1: nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/v9branch5.s
0,0 → 1,6
# Text for relocation overflow diagnostic
.text
1: nop
.skip (1024 * 1024)
bne,pt %icc, 1b
nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pr4587.l
0,0 → 1,2
.*pr4587.s: Assembler messages:
.*pr4587.s:18: Error: Illegal operands
/trunk/gnu/binutils/gas/testsuite/gas/sparc/sparc.exp
0,0 → 1,70
# Some generic SPARC and SPARC64 tests
 
# FIXME: The tests here aren't really bullet proof. A mistake in the opcode
# table can slip through since we use the same table for assembly and
# disassembly. The way to fix this is to include a hex dump of the insns
# and test that as well. Later.
 
# Find out if these binutils are either sparc64*-*-* or
# sparc*-*-* with --enable-targets=sparc64-*-*
proc gas_64_check { } {
global NM
global NMFLAGS
 
set status [gas_host_run "$NM $NMFLAGS --help" ""]
return [regexp "elf64\[_-\]sparc" [lindex $status 1]]
}
 
proc sparc_elf_setup { } {
setup_xfail "sparc*-*-*aout*" "sparc*-*-sunos4*"
setup_xfail "sparc*-fujitsu-none" "sparc*-*-*n*bsd*"
setup_xfail "sparc*-*-coff" "sparc*-*-lynxos*"
clear_xfail "sparc64*-*-*n*bsd*"
clear_xfail "sparc*-*-netbsdelf*"
}
 
if [istarget sparc*-*-*] {
run_dump_test "synth"
# The next four tests are ELF only.
sparc_elf_setup
run_dump_test "unalign"
sparc_elf_setup
run_dump_test "pcrel"
sparc_elf_setup
run_dump_test "plt"
sparc_elf_setup
run_dump_test "gotop32"
if [gas_64_check] {
run_dump_test "asi"
run_dump_test "membar"
run_dump_test "prefetch"
run_dump_test "set64"
run_dump_test "synth64"
run_dump_test "rdpr"
run_dump_test "rdhpr"
run_dump_test "wrpr"
run_dump_test "wrhpr"
run_dump_test "window"
run_dump_test "reloc64"
run_dump_test "pcrel64"
run_dump_test "plt64"
run_dump_test "gotop64"
}
run_dump_test "v9branch1"
run_dump_test "v9branch2"
run_dump_test "v9branch3"
run_dump_test "v9branch4"
run_dump_test "v9branch5"
run_dump_test "pc2210"
 
run_list_test "pr4587" ""
}
 
if [istarget sparc-*-vxworks*] {
run_dump_test "vxworks-pic"
}
 
if [istarget sparclet*-*-*] {
run_dump_test "splet"
run_dump_test "splet-2"
}
/trunk/gnu/binutils/gas/testsuite/gas/sparc/wrhpr.s
0,0 → 1,7
# Test wrpr
.text
wrhpr %g1,%hpstate
wrhpr %g2,%htstate
wrhpr %g3,%hintp
wrhpr %g4,%htba
wrhpr %g5,%hstick_cmpr
/trunk/gnu/binutils/gas/testsuite/gas/sparc/mism-1.s
0,0 → 1,22
! Test architecture mismatch warnings.
! We don't test every possible mismatch, we just want to be reasonable sure
! the mismatch checking code works.
!
! { dg-do assemble { target sparc*-*-* } }
! { dg-options -Av6 }
 
! sparclite
 
divscc %g1,%g2,%g3 ! { dg-error "mismatch|sparclite" "sparclite divscc mismatch" }
 
scan %g1,%g2,%g3 ! { dg-error "mismatch|sparclite" "sparclite scan mismatch" }
 
! v9
 
movrz %g1,%g2,%g3 ! { dg-error "mismatch|v9" "v9 fp reg mismatch" }
 
! v9a
 
shutdown ! { dg-error "mismatch|v9a" "v9a shutdown mismatch" }
 
foo:
/trunk/gnu/binutils/gas/testsuite/gas/sparc/rdpr.s
0,0 → 1,20
# Test rdpr
.text
rdpr %tpc,%g1
rdpr %tnpc,%g2
rdpr %tstate,%g3
rdpr %tt,%g4
rdpr %tick,%g5
rdpr %tba,%g6
rdpr %pstate,%g7
rdpr %tl,%o0
rdpr %pil,%o1
rdpr %cwp,%o2
rdpr %cansave,%o3
rdpr %canrestore,%o4
rdpr %cleanwin,%o5
rdpr %otherwin,%o6
rdpr %wstate,%o7
rdpr %fq,%l0
rdpr %gl,%l1
rdpr %ver,%l2
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pc2210.s
0,0 → 1,6
# Test R_SPARC_PC22 and R_SPARC_PC10 relocations
.data
sym: .word 0
.text
sethi %pc22(sym), %o1
or %o1, %pc10(sym), %o1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/splet-2.d
0,0 → 1,23
#as: -Asparclet
#objdump: -dr
#name: sparclet coprocessor registers
 
.*: +file format .*
 
Disassembly of section .text:
 
0+ <start>:
0: 81 b0 40 c0 cwrcxt %g1, %ccsr
4: 83 b0 40 c0 cwrcxt %g1, %ccfr
8: 85 b0 40 c0 cwrcxt %g1, %cccrcr
c: 87 b0 40 c0 cwrcxt %g1, %ccpr
10: 89 b0 40 c0 cwrcxt %g1, %ccsr2
14: 8b b0 40 c0 cwrcxt %g1, %cccrr
18: 8d b0 40 c0 cwrcxt %g1, %ccrstr
1c: 83 b0 01 00 crdcxt %ccsr, %g1
20: 83 b0 41 00 crdcxt %ccfr, %g1
24: 83 b0 81 00 crdcxt %cccrcr, %g1
28: 83 b0 c1 00 crdcxt %ccpr, %g1
2c: 83 b1 01 00 crdcxt %ccsr2, %g1
30: 83 b1 41 00 crdcxt %cccrr, %g1
34: 83 b1 81 00 crdcxt %ccrstr, %g1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/splet.d
0,0 → 1,195
#as: -Asparclet
#objdump: -dr
#name: sparclet extensions
 
.*: +file format .*
 
Disassembly of section .text:
 
0+ <start>:
0: a1 40 00 00 rd %y, %l0
4: a1 40 40 00 rd %asr1, %l0
8: a1 43 c0 00 rd %asr15, %l0
c: a1 44 40 00 rd %asr17, %l0
10: a1 44 80 00 rd %asr18, %l0
14: a1 44 c0 00 rd %asr19, %l0
18: a1 45 00 00 rd %asr20, %l0
1c: a1 45 40 00 rd %asr21, %l0
20: a1 45 80 00 rd %asr22, %l0
24: 81 84 20 00 mov %l0, %y
28: 83 84 20 00 mov %l0, %asr1
2c: 9f 84 20 00 mov %l0, %asr15
30: a3 84 20 00 mov %l0, %asr17
34: a5 84 20 00 mov %l0, %asr18
38: a7 84 20 00 mov %l0, %asr19
3c: a9 84 20 00 mov %l0, %asr20
40: ab 84 20 00 mov %l0, %asr21
44: ad 84 20 00 mov %l0, %asr22
 
0+48 <test_umul>:
48: 86 50 40 02 umul %g1, %g2, %g3
4c: 86 50 40 02 umul %g1, %g2, %g3
 
0+50 <test_smul>:
50: 86 58 40 02 smul %g1, %g2, %g3
54: 86 58 40 02 smul %g1, %g2, %g3
 
0+58 <test_stbar>:
58: 81 43 c0 00 stbar
5c: 81 43 c0 00 stbar
60: 00 00 00 01 unimp 0x1
64: 81 dc 40 00 flush %l1
 
0+68 <test_scan>:
68: a7 64 7f ff scan %l1, -1, %l3
6c: a7 64 60 00 scan %l1, 0, %l3
70: a7 64 40 11 scan %l1, %l1, %l3
 
0+74 <test_shuffle>:
74: a3 6c 20 01 shuffle %l0, 1, %l1
78: a3 6c 20 02 shuffle %l0, 2, %l1
7c: a3 6c 20 04 shuffle %l0, 4, %l1
80: a3 6c 20 08 shuffle %l0, 8, %l1
84: a3 6c 20 10 shuffle %l0, 0x10, %l1
88: a3 6c 20 18 shuffle %l0, 0x18, %l1
 
0+8c <test_umac>:
8c: a1 f4 40 12 umac %l1, %l2, %l0
90: a1 f4 60 02 umac %l1, 2, %l0
94: a1 f4 60 02 umac %l1, 2, %l0
 
0+98 <test_umacd>:
98: a1 74 80 14 umacd %l2, %l4, %l0
9c: a1 74 a0 03 umacd %l2, 3, %l0
a0: a1 74 a0 03 umacd %l2, 3, %l0
 
0+a4 <test_smac>:
a4: a1 fc 40 12 smac %l1, %l2, %l0
a8: a1 fc 7f d6 smac %l1, -42, %l0
ac: a1 fc 7f d6 smac %l1, -42, %l0
 
0+b0 <test_smacd>:
b0: a1 7c 80 14 smacd %l2, %l4, %l0
b4: a1 7c a0 7b smacd %l2, 0x7b, %l0
b8: a1 7c a0 7b smacd %l2, 0x7b, %l0
 
0+bc <test_umuld>:
bc: 90 4a 80 0c umuld %o2, %o4, %o0
c0: 90 4a a2 34 umuld %o2, 0x234, %o0
c4: 90 4a a5 67 umuld %o2, 0x567, %o0
 
0+c8 <test_smuld>:
c8: b0 6e 80 1c smuld %i2, %i4, %i0
cc: b0 6e b0 00 smuld %i2, -4096, %i0
d0: b0 6f 2f ff smuld %i4, 0xfff, %i0
 
0+d4 <test_coprocessor>:
d4: 81 b4 00 11 cpush %l0, %l1
d8: 81 b4 20 01 cpush %l0, 1
dc: 81 b4 00 51 cpusha %l0, %l1
e0: 81 b4 20 41 cpusha %l0, 1
e4: a1 b0 00 80 cpull %l0
e8: a1 b0 01 00 crdcxt %ccsr, %l0
ec: a1 b0 41 00 crdcxt %ccfr, %l0
f0: a1 b0 c1 00 crdcxt %ccpr, %l0
f4: a1 b0 81 00 crdcxt %cccrcr, %l0
f8: 81 b4 00 c0 cwrcxt %l0, %ccsr
fc: 83 b4 00 c0 cwrcxt %l0, %ccfr
100: 87 b4 00 c0 cwrcxt %l0, %ccpr
104: 85 b4 00 c0 cwrcxt %l0, %cccrcr
108: 01 c0 00 01 cbn 10c <test_coprocessor\+(0x|)38>
108: WDISP22 stop\+0xfffffef8
10c: 01 00 00 00 nop
110: 21 c0 00 01 cbn,a 114 <test_coprocessor\+(0x|)40>
110: WDISP22 stop\+0xfffffef0
114: 01 00 00 00 nop
118: 03 c0 00 01 cbe 11c <test_coprocessor\+(0x|)48>
118: WDISP22 stop\+0xfffffee8
11c: 01 00 00 00 nop
120: 23 c0 00 01 cbe,a 124 <test_coprocessor\+(0x|)50>
120: WDISP22 stop\+0xfffffee0
124: 01 00 00 00 nop
128: 05 c0 00 01 cbf 12c <test_coprocessor\+(0x|)58>
128: WDISP22 stop\+0xfffffed8
12c: 01 00 00 00 nop
130: 25 c0 00 01 cbf,a 134 <test_coprocessor\+(0x|)60>
130: WDISP22 stop\+0xfffffed0
134: 01 00 00 00 nop
138: 07 c0 00 01 cbef 13c <test_coprocessor\+(0x|)68>
138: WDISP22 stop\+0xfffffec8
13c: 01 00 00 00 nop
140: 27 c0 00 01 cbef,a 144 <test_coprocessor\+(0x|)70>
140: WDISP22 stop\+0xfffffec0
144: 01 00 00 00 nop
148: 09 c0 00 01 cbr 14c <test_coprocessor\+(0x|)78>
148: WDISP22 stop\+0xfffffeb8
14c: 01 00 00 00 nop
150: 29 c0 00 01 cbr,a 154 <test_coprocessor\+(0x|)80>
150: WDISP22 stop\+0xfffffeb0
154: 01 00 00 00 nop
158: 0b c0 00 01 cber 15c <test_coprocessor\+(0x|)88>
158: WDISP22 stop\+0xfffffea8
15c: 01 00 00 00 nop
160: 2b c0 00 01 cber,a 164 <test_coprocessor\+(0x|)90>
160: WDISP22 stop\+0xfffffea0
164: 01 00 00 00 nop
168: 0d c0 00 01 cbfr 16c <test_coprocessor\+(0x|)98>
168: WDISP22 stop\+0xfffffe98
16c: 01 00 00 00 nop
170: 2d c0 00 01 cbfr,a 174 <test_coprocessor\+(0x|)a0>
170: WDISP22 stop\+0xfffffe90
174: 01 00 00 00 nop
178: 0f c0 00 01 cbefr 17c <test_coprocessor\+(0x|)a8>
178: WDISP22 stop\+0xfffffe88
17c: 01 00 00 00 nop
180: 2f c0 00 01 cbefr,a 184 <test_coprocessor\+(0x|)b0>
180: WDISP22 stop\+0xfffffe80
184: 01 00 00 00 nop
188: 11 c0 00 01 cba 18c <test_coprocessor\+(0x|)b8>
188: WDISP22 stop\+0xfffffe78
18c: 01 00 00 00 nop
190: 31 c0 00 01 cba,a 194 <test_coprocessor\+(0x|)c0>
190: WDISP22 stop\+0xfffffe70
194: 01 00 00 00 nop
198: 13 c0 00 01 cbne 19c <test_coprocessor\+(0x|)c8>
198: WDISP22 stop\+0xfffffe68
19c: 01 00 00 00 nop
1a0: 33 c0 00 01 cbne,a 1a4 <test_coprocessor\+(0x|)d0>
1a0: WDISP22 stop\+0xfffffe60
1a4: 01 00 00 00 nop
1a8: 15 c0 00 01 cbnf 1ac <test_coprocessor\+(0x|)d8>
1a8: WDISP22 stop\+0xfffffe58
1ac: 01 00 00 00 nop
1b0: 35 c0 00 01 cbnf,a 1b4 <test_coprocessor\+(0x|)e0>
1b0: WDISP22 stop\+0xfffffe50
1b4: 01 00 00 00 nop
1b8: 17 c0 00 01 cbnef 1bc <test_coprocessor\+(0x|)e8>
1b8: WDISP22 stop\+0xfffffe48
1bc: 01 00 00 00 nop
1c0: 37 c0 00 01 cbnef,a 1c4 <test_coprocessor\+(0x|)f0>
1c0: WDISP22 stop\+0xfffffe40
1c4: 01 00 00 00 nop
1c8: 19 c0 00 01 cbnr 1cc <test_coprocessor\+(0x|)f8>
1c8: WDISP22 stop\+0xfffffe38
1cc: 01 00 00 00 nop
1d0: 39 c0 00 01 cbnr,a 1d4 <test_coprocessor\+(0x|)100>
1d0: WDISP22 stop\+0xfffffe30
1d4: 01 00 00 00 nop
1d8: 1b c0 00 01 cbner 1dc <test_coprocessor\+(0x|)108>
1d8: WDISP22 stop\+0xfffffe28
1dc: 01 00 00 00 nop
1e0: 3b c0 00 01 cbner,a 1e4 <test_coprocessor\+(0x|)110>
1e0: WDISP22 stop\+0xfffffe20
1e4: 01 00 00 00 nop
1e8: 1d c0 00 01 cbnfr 1ec <test_coprocessor\+(0x|)118>
1e8: WDISP22 stop\+0xfffffe18
1ec: 01 00 00 00 nop
1f0: 3d c0 00 01 cbnfr,a 1f4 <test_coprocessor\+(0x|)120>
1f0: WDISP22 stop\+0xfffffe10
1f4: 01 00 00 00 nop
1f8: 1f c0 00 01 cbnefr 1fc <test_coprocessor\+(0x|)128>
1f8: WDISP22 stop\+0xfffffe08
1fc: 01 00 00 00 nop
200: 3f c0 00 01 cbnefr,a 204 <test_coprocessor\+(0x|)130>
200: WDISP22 stop\+0xfffffe00
204: 01 00 00 00 nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pr4587.s
0,0 → 1,22
.section .data
.align 4
zero: .single 0.0
 
.section .text
.align 4
.global main
main:
save %sp, -96, %sp
 
! Zero-out the first FP register
set zero, %l0
ld [%l0], %f0
 
! Compare it to itself
! The third reg (%f0) will cause a segfault in as
! fcmps only takes two regs... this should be illegal operand error
fcmps %f0, %f0, %f0
 
! Return 0
ret
restore %g0, %g0, %o0
/trunk/gnu/binutils/gas/testsuite/gas/sparc/plt64.s
0,0 → 1,13
.text
.align 4
call foo
nop
call bar + 4
.data
.align 8
.xword %r_plt64(foo)
.xword %r_plt64(bar + 4)
.byte 1
.uaxword %r_plt64(foo)
.byte 2, 3, 4
.word %r_plt32(bar + 4)
/trunk/gnu/binutils/gas/testsuite/gas/sparc/vxworks-pic.d
0,0 → 1,27
#as: -KPIC
#objdump: -dr
#name: VxWorks PIC
 
.*: file format .*
 
Disassembly of section \.text:
 
00000000 <\.text>:
0: 2f 00 00 00 sethi %hi\(0\), %l7
0: R_SPARC_HI22 __GOTT_BASE__
4: ee 05 e0 00 ld \[ %l7 \], %l7
4: R_SPARC_LO10 __GOTT_BASE__
8: ee 05 e0 00 ld \[ %l7 \], %l7
8: R_SPARC_LO10 __GOTT_INDEX__
c: 03 00 00 00 sethi %hi\(0\), %g1
c: R_SPARC_HI22 __GOTT_BASE__
10: 82 10 60 00 mov %g1, %g1 ! 0x0
10: R_SPARC_LO10 __GOTT_BASE__
14: 03 00 00 00 sethi %hi\(0\), %g1
14: R_SPARC_HI22 __GOTT_INDEX__
18: 82 10 60 00 mov %g1, %g1 ! 0x0
18: R_SPARC_LO10 __GOTT_INDEX__
1c: 03 00 00 00 sethi %hi\(0\), %g1
1c: R_SPARC_GOT22 __GOT_BASE__
20: 82 10 60 00 mov %g1, %g1 ! 0x0
20: R_SPARC_GOT10 __GOT_BASE__
/trunk/gnu/binutils/gas/testsuite/gas/sparc/reloc64.s
0,0 → 1,48
# sparc64 special relocs
 
foo:
sethi %uhi(0x1234567800000000),%g1
or %g1,%ulo(0x1234567800000000),%g1
nop
sethi %uhi(foo),%g1
or %g1,%ulo(foo),%g1
nop
sethi %uhi(foo+0x1234567800000000),%g1
or %g1,%ulo(foo+0x1234567800000000),%g1
nop
sethi %hh(0xfedcba9876543210),%g1
or %g1,%hm(0xfedcba9876543210),%g1
sethi %lm(0xfedcba9876543210),%g2
or %g1,%lo(0xfedcba9876543210),%g2
nop
sethi %hh(foo),%g1
or %g1,%hm(foo),%g1
sethi %lm(foo),%g2
or %g1,%lo(foo),%g2
nop
sethi %hh(foo+0xfedcba9876543210),%g1
or %g1,%hm(foo+0xfedcba9876543210),%g1
sethi %lm(foo+0xfedcba9876543210),%g2
or %g1,%lo(foo+0xfedcba9876543210),%g2
nop
sethi %h44(0xa9876543210),%g1
or %g1,%m44(0xa9876543210),%g1
or %g1,%l44(0xa9876543210),%g1
nop
sethi %h44(foo),%g1
or %g1,%m44(foo),%g1
or %g1,%l44(foo),%g1
nop
sethi %h44(foo+0xa9876543210),%g1
or %g1,%m44(foo+0xa9876543210),%g1
or %g1,%l44(foo+0xa9876543210),%g1
nop
sethi %hix(0xffffffff76543210),%g1
xor %g1,%lox(0xffffffff76543210),%g1
nop
sethi %hix(foo),%g1
xor %g1,%lox(foo),%g1
nop
sethi %hix(foo+0xffffffff76543210),%g1
xor %g1,%lox(foo+0xffffffff76543210),%g1
nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/unalign.d
0,0 → 1,18
#as:
#objdump: -Dr
#name: sparc unaligned relocs
 
.*: +file format .*sparc.*
 
Disassembly of section .data:
 
0+ <foo>:
0: 01 00 00 00 nop
1: R_SPARC_UA32 fred
4: 00 02 00 00 (unimp|illtrap) 0x20000
6: R_SPARC_UA16 jim
8: 03 04 05 00 sethi %hi\(0x10140000\), %g1
b: R_SPARC_UA32 baz
c: 00 00 00 00 (unimp|illtrap) 0
f: R_SPARC_UA32 bar
10: 00 00 00 06 (unimp|illtrap) 0x6
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pcrel64.s
0,0 → 1,32
.text
.align 4
1: nop
2: nop
.globl foo
foo: nop
 
.data
.align 32
.word 0
.word 1
.word 1b + 16
.word %r_disp32(1b + 16)
.word 2b + 16
.word %r_disp32(2b + 16)
3: .word foo
.word %r_disp32(foo)
.word foo + 16
.word %r_disp32(foo + 16)
.xword 2b + 4
.xword %r_disp64(2b + 4)
.xword foo
.xword %r_disp64(foo)
.xword foo + 16
.xword %r_disp64(foo + 16)
.byte %r_disp8(3b)
.byte %r_disp8(4f)
.half %r_disp16(3b)
.half %r_disp16(4f)
.uaword 2
.half 0
4:
/trunk/gnu/binutils/gas/testsuite/gas/sparc/synth64.s
0,0 → 1,19
# sparc64 synthetic insns
.text
iprefetch foo
foo:
signx %g1,%g2
clruw %g1,%g2
cas [%g1],%g2,%g3
casl [%g1],%g2,%g3
casx [%g1],%g2,%g3
casxl [%g1],%g2,%g3
 
clrx [%g1+%g2]
clrx [%g1]
clrx [%g1+1]
clrx [42+%g1]
clrx [0x42]
 
signx %g1
clruw %g2
/trunk/gnu/binutils/gas/testsuite/gas/sparc/plt.d
0,0 → 1,23
#as: -K PIC
#objdump: -Dr
#name: plt relocs
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 40 00 00 00 call 0x0
0: R_SPARC_WPLT30 foo
4: 01 00 00 00 nop
8: 40 00 00 00 call 0x8
8: R_SPARC_WPLT30 bar\+0x4
Disassembly of section .data:
 
0+ <.data>:
...
0: R_SPARC_PLT32 foo
4: R_SPARC_PLT32 bar\+0x4
8: 01 00 00 00 nop
9: R_SPARC_PLT32 foo
c: 00 02 03 04 (unimp|illtrap) 0x20304
/trunk/gnu/binutils/gas/testsuite/gas/sparc/gotop64.d
0,0 → 1,15
#as: -64 -Av9
#objdump: -dr
#name: sparc64 gotop
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo>:
0: 23 00 00 00 sethi %hi\(0\), %l1
0: R_SPARC_GOTDATA_OP_HIX22 .data
4: a2 1c 60 00 xor %l1, 0, %l1
4: R_SPARC_GOTDATA_OP_LOX10 .data
8: e4 5d c0 11 ldx \[ %l7 \+ %l1 \], %l2
8: R_SPARC_GOTDATA_OP .data
/trunk/gnu/binutils/gas/testsuite/gas/sparc/membar.d
0,0 → 1,19
#as: -Av9
#objdump: -dr
#name: sparc64 membar
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 81 43 e0 00 membar 0
4: 81 43 e0 7f membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad
8: 81 43 e0 7f membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad
c: 81 43 e0 40 membar #Sync
10: 81 43 e0 20 membar #MemIssue
14: 81 43 e0 10 membar #Lookaside
18: 81 43 e0 08 membar #StoreStore
1c: 81 43 e0 04 membar #LoadStore
20: 81 43 e0 02 membar #StoreLoad
24: 81 43 e0 01 membar #LoadLoad
/trunk/gnu/binutils/gas/testsuite/gas/sparc/set64.d
0,0 → 1,109
#as: -64 -Av9
#objdump: -dr
#name: sparc64 set64
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo>:
0: 05 00 00 00 sethi %hi\((0x|)0\), %g2
0: R_SPARC_HI22 .text
4: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
4: R_SPARC_LO10 .text
8: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
c: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+(0x|)0x76543210>
10: 88 10 20 00 clr %g4
14: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
18: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+(0x|)ffff>
1c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
1c: R_SPARC_HH22 .text
20: 05 00 00 00 sethi %hi\((0x|)0\), %g2
20: R_SPARC_LM22 .text
24: 82 10 60 00 mov %g1, %g1
24: R_SPARC_HM10 .text
28: 84 10 a0 00 mov %g2, %g2
28: R_SPARC_LO10 .text
2c: 83 28 70 20 sllx %g1, 0x20, %g1
30: 84 10 80 01 or %g2, %g1, %g2
34: 86 10 3f ff mov -1, %g3
38: 86 10 20 00 clr %g3
3c: 86 10 20 01 mov 1, %g3
40: 86 10 2f ff mov 0xfff, %g3
44: 07 00 00 04 sethi %hi\(0x1000\), %g3
48: 86 10 30 00 mov -4096, %g3
4c: 07 00 00 04 sethi %hi\(0x1000\), %g3
50: 86 18 ff ff xor %g3, -1, %g3
54: 07 00 00 3f sethi %hi\(0xfc00\), %g3
58: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffff <(\*ABS\*|foo)\+(0x|)ffff>
5c: 07 00 00 3f sethi %hi\(0xfc00\), %g3
60: 86 18 fc 00 xor %g3, -1024, %g3
64: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
68: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <(\*ABS\*|foo)\+(0x|)7fffffff>
6c: 09 20 00 00 sethi %hi\(0x80000000\), %g4
70: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
74: 88 19 3c 00 xor %g4, -1024, %g4
78: 09 20 00 00 sethi %hi\(0x80000000\), %g4
7c: 88 19 3f ff xor %g4, -1, %g4
80: 09 3f ff ff sethi %hi\(0xfffffc00\), %g4
84: 88 11 23 ff or %g4, 0x3ff, %g4 ! ffffffff <(\*ABS\*|foo)\+(0x|)ffffffff>
88: 88 10 20 01 mov 1, %g4
8c: 89 29 30 20 sllx %g4, 0x20, %g4
90: 03 1f ff ff sethi %hi\(0x7ffffc00\), %g1
94: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5
98: 82 10 63 ff or %g1, 0x3ff, %g1
9c: 8a 11 63 ff or %g5, 0x3ff, %g5
a0: 83 28 70 20 sllx %g1, 0x20, %g1
a4: 8a 11 40 01 or %g5, %g1, %g5
a8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5
ac: 8b 29 70 20 sllx %g5, 0x20, %g5
b0: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5
b4: 8a 19 7c 00 xor %g5, -1024, %g5
b8: 0b 1f ff ff sethi %hi\(0x7ffffc00\), %g5
bc: 8a 19 7c 00 xor %g5, -1024, %g5
c0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1
c4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
c8: 83 28 70 20 sllx %g1, 0x20, %g1
cc: 8a 11 40 01 or %g5, %g1, %g5
d0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1
d4: 8a 10 20 01 mov 1, %g5
d8: 83 28 70 20 sllx %g1, 0x20, %g1
dc: 8a 11 40 01 or %g5, %g1, %g5
e0: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
e4: 82 10 20 01 mov 1, %g1
e8: 8a 11 60 01 or %g5, 1, %g5
ec: 83 28 70 20 sllx %g1, 0x20, %g1
f0: 8a 11 40 01 or %g5, %g1, %g5
f4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
f8: 82 10 20 01 mov 1, %g1
fc: 83 28 70 20 sllx %g1, 0x20, %g1
100: 8a 11 40 01 or %g5, %g1, %g5
104: 82 10 20 01 mov 1, %g1
108: 8a 10 20 01 mov 1, %g5
10c: 83 28 70 20 sllx %g1, 0x20, %g1
110: 8a 11 40 01 or %g5, %g1, %g5
114: 05 00 00 00 sethi %hi\((0x|)0\), %g2
114: R_SPARC_HI22 .text
118: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
118: R_SPARC_LO10 .text
11c: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
120: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+0x76543210>
124: 88 10 20 00 clr %g4
128: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
12c: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+0xffff>
130: 05 00 00 00 sethi %hi\((0x|)0\), %g2
130: R_SPARC_HI22 .text
134: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
134: R_SPARC_LO10 .text
138: 85 38 80 00 signx %g2
13c: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
140: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+0x76543210>
144: 88 10 20 00 clr %g4
148: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
14c: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+0xffff>
150: 82 10 3f ff mov -1, %g1
154: 05 1f ff ff sethi %hi\(0x7ffffc00\), %g2
158: 84 10 a3 ff or %g2, 0x3ff, %g2 ! 7fffffff <(\*ABS\*|foo)\+0x7fffffff>
15c: 07 00 00 3f sethi %hi\(0xfc00\), %g3
160: 86 18 fc 00 xor %g3, -1024, %g3
164: 88 10 3f ff mov -1, %g4
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pcrel.d
0,0 → 1,34
#as:
#objdump: -Dr
#name: pc relative relocs
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <foo-0x8>:
0: 01 00 00 00 nop
4: 01 00 00 00 nop
 
0+8 <foo>:
8: 01 00 00 00 nop
Disassembly of section .data:
 
0+ <.data>:
0: 00 00 00 00 (unimp|illtrap) 0
4: 00 00 00 01 (unimp|illtrap) 0x1
...
8: R_SPARC_32 .text\+0x10
c: R_SPARC_DISP32 .text\+0x10
10: R_SPARC_32 .text\+0x14
14: R_SPARC_DISP32 .text\+0x14
18: R_SPARC_32 foo
1c: R_SPARC_DISP32 foo
20: R_SPARC_32 foo\+0x10
24: R_SPARC_DISP32 foo\+0x10
28: R_SPARC_DISP8 .data\+0x18
29: R_SPARC_DISP8 .data\+0x34
2a: R_SPARC_DISP16 .data\+0x18
2c: R_SPARC_DISP16 .data\+0x34
30: 00 02 00 00 (unimp|illtrap) 0x20000
...
/trunk/gnu/binutils/gas/testsuite/gas/sparc/splet-2.s
0,0 → 1,21
! Test sparclet coprocessor registers.
 
.text
.global start
start:
 
cwrcxt %g1,%ccsr
cwrcxt %g1,%ccfr
cwrcxt %g1,%cccrcr
cwrcxt %g1,%ccpr
cwrcxt %g1,%ccsr2
cwrcxt %g1,%cccrr
cwrcxt %g1,%ccrstr
 
crdcxt %ccsr,%g1
crdcxt %ccfr,%g1
crdcxt %cccrcr,%g1
crdcxt %ccpr,%g1
crdcxt %ccsr2,%g1
crdcxt %cccrr,%g1
crdcxt %ccrstr,%g1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/synth.d
0,0 → 1,11
#as: -Av7
#objdump: -dr --prefix-addresses
#name: sparc synth
 
.*: +file format .*
 
Disassembly of section .text:
0+0000 <foo> xnor %g1, %g0, %g2
0+0004 <foo\+(0x|)4> xnor %g1, %g0, %g1
0+0008 <foo\+(0x|)8> neg %g1, %g2
0+000c <foo\+(0x|)c> neg %g1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/splet.s
0,0 → 1,211
.text
.global start
 
! Starting point
start:
 
! test all ASRs
 
rd %asr0, %l0
rd %asr1, %l0
rd %asr15, %l0
rd %asr17, %l0
rd %asr18, %l0
rd %asr19, %l0 ! should stop the processor
rd %asr20, %l0
rd %asr21, %l0
rd %asr22, %l0
 
wr %l0, 0, %asr0
wr %l0, 0, %asr1
wr %l0, 0, %asr15
wr %l0, 0, %asr17
wr %l0, 0, %asr18
wr %l0, 0, %asr19
wr %l0, 0, %asr20
wr %l0, 0, %asr21
wr %l0, 0, %asr22
 
! test UMUL with no overflow inside Y
test_umul:
umul %g1, %g2, %g3
 
! test UMUL with an overflow inside Y
 
umul %g1, %g2, %g3 ! %g3 must be equal to 0
 
! test SMUL with negative result
test_smul:
smul %g1, %g2, %g3
 
! test SMUL with positive result
 
smul %g1, %g2, %g3
 
! test STBAR: there are two possible syntaxes
test_stbar:
stbar ! is a valid V8 syntax, at least a synthetic
! instruction
rd %asr15, %g0 ! other solution
 
! test UNIMP
unimp 1
 
! test FLUSH
flush %l1 ! is the official V8 syntax
 
! test SCAN: find first 0
test_scan:
scan %l1, 0xffffffff, %l3
 
! test scan: find first 1
 
scan %l1, 0, %l3
 
! test scan: find first bit != bit-0
 
scan %l1, %l1, %l3
 
! test SHUFFLE
test_shuffle:
shuffle %l0, 0x1, %l1
shuffle %l0, 0x2, %l1
shuffle %l0, 0x4, %l1
shuffle %l0, 0x8, %l1
shuffle %l0, 0x10, %l1
shuffle %l0, 0x18, %l1
 
! test UMAC
test_umac:
umac %l1, %l2, %l0
umac %l1, 2, %l0
umac 2, %l1, %l0
 
! test UMACD
test_umacd:
umacd %l2, %l4, %l0
umacd %l2, 3, %l0
umacd 3, %l2, %l0
 
! test SMAC
test_smac:
smac %l1, %l2, %l0
smac %l1, -42, %l0
smac -42, %l1, %l0
 
! test SMACD
test_smacd:
smacd %l2, %l4, %l0
smacd %l2, 123, %l0
smacd 123, %l2, %l0
 
! test UMULD
test_umuld:
umuld %o2, %o4, %o0
umuld %o2, 0x234, %o0
umuld 0x567, %o2, %o0
 
! test SMULD
test_smuld:
smuld %i2, %i4, %i0
smuld %i2, -4096, %i0
smuld 4095, %i4, %i0
 
! Coprocessor instructions
test_coprocessor:
! %ccsr is register # 0
! %ccfr is register # 1
! %ccpr is register # 3
! %cccrcr is register # 2
 
! test CPUSH: just syntax
 
cpush %l0, %l1
cpush %l0, 1
cpusha %l0, %l1
cpusha %l0, 1
 
! test CPULL: just syntax
 
cpull %l0
 
! test CPRDCXT: just syntax
 
crdcxt %ccsr, %l0
crdcxt %ccfr, %l0
crdcxt %ccpr, %l0
crdcxt %cccrcr, %l0
 
! test CPWRCXT: just syntax
 
cwrcxt %l0, %ccsr
cwrcxt %l0, %ccfr
cwrcxt %l0, %ccpr
cwrcxt %l0, %cccrcr
 
! test CBccc: just syntax
 
cbn stop
nop
cbn,a stop
nop
cbe stop
nop
cbe,a stop
nop
cbf stop
nop
cbf,a stop
nop
cbef stop
nop
cbef,a stop
nop
cbr stop
nop
cbr,a stop
nop
cber stop
nop
cber,a stop
nop
cbfr stop
nop
cbfr,a stop
nop
cbefr stop
nop
cbefr,a stop
nop
cba stop
nop
cba,a stop
nop
cbne stop
nop
cbne,a stop
nop
cbnf stop
nop
cbnf,a stop
nop
cbnef stop
nop
cbnef,a stop
nop
cbnr stop
nop
cbnr,a stop
nop
cbner stop
nop
cbner,a stop
nop
cbnfr stop
nop
cbnfr,a stop
nop
cbnefr stop
nop
cbnefr,a stop
nop
/trunk/gnu/binutils/gas/testsuite/gas/sparc/window.d
0,0 → 1,15
#as: -64 -Av9
#objdump: -dr
#name: sparc64 window
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 81 88 00 00 saved
4: 83 88 00 00 restored
8: 85 88 00 00 allclean
c: 87 88 00 00 otherw
10: 89 88 00 00 normalw
14: 8b 88 00 00 invalw
/trunk/gnu/binutils/gas/testsuite/gas/sparc/vxworks-pic.s
0,0 → 1,11
sethi %hi(__GOTT_BASE__), %l7
ld [%l7+%lo(__GOTT_BASE__)],%l7
ld [%l7+%lo(__GOTT_INDEX__)],%l7
 
sethi %hi(__GOTT_BASE__), %g1
or %g1, %lo(__GOTT_BASE__), %g1
sethi %hi(__GOTT_INDEX__), %g1
or %g1, %lo(__GOTT_INDEX__), %g1
 
sethi %hi(__GOT_BASE__), %g1
or %g1, %lo(__GOT_BASE__), %g1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/asi.d
0,0 → 1,35
#as: -Av9
#objdump: -dr
#name: sparc64 asi
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: c4 80 40 00 lda \[ %g1 \] \(0\), %g2
4: c4 80 5f e0 lda \[ %g1 \] \(255\), %g2
8: c4 80 42 00 lda \[ %g1 \] #ASI_AIUP, %g2
c: c4 80 42 20 lda \[ %g1 \] #ASI_AIUS, %g2
10: c4 80 43 00 lda \[ %g1 \] #ASI_AIUP_L, %g2
14: c4 80 43 20 lda \[ %g1 \] #ASI_AIUS_L, %g2
18: c4 80 50 00 lda \[ %g1 \] #ASI_P, %g2
1c: c4 80 50 20 lda \[ %g1 \] #ASI_S, %g2
20: c4 80 50 40 lda \[ %g1 \] #ASI_PNF, %g2
24: c4 80 50 60 lda \[ %g1 \] #ASI_SNF, %g2
28: c4 80 51 00 lda \[ %g1 \] #ASI_P_L, %g2
2c: c4 80 51 20 lda \[ %g1 \] #ASI_S_L, %g2
30: c4 80 51 40 lda \[ %g1 \] #ASI_PNF_L, %g2
34: c4 80 51 60 lda \[ %g1 \] #ASI_SNF_L, %g2
38: c4 80 42 00 lda \[ %g1 \] #ASI_AIUP, %g2
3c: c4 80 42 20 lda \[ %g1 \] #ASI_AIUS, %g2
40: c4 80 43 00 lda \[ %g1 \] #ASI_AIUP_L, %g2
44: c4 80 43 20 lda \[ %g1 \] #ASI_AIUS_L, %g2
48: c4 80 50 00 lda \[ %g1 \] #ASI_P, %g2
4c: c4 80 50 20 lda \[ %g1 \] #ASI_S, %g2
50: c4 80 50 40 lda \[ %g1 \] #ASI_PNF, %g2
54: c4 80 50 60 lda \[ %g1 \] #ASI_SNF, %g2
58: c4 80 51 00 lda \[ %g1 \] #ASI_P_L, %g2
5c: c4 80 51 20 lda \[ %g1 \] #ASI_S_L, %g2
60: c4 80 51 40 lda \[ %g1 \] #ASI_PNF_L, %g2
64: c4 80 51 60 lda \[ %g1 \] #ASI_SNF_L, %g2
/trunk/gnu/binutils/gas/testsuite/gas/sparc/unalign.s
0,0 → 1,13
# Test unaligned reloc generation
.data
foo:
.byte 0x1
.uaword fred
.byte 0x2
.uahalf jim
.byte 0x3
.byte 0x4
.byte 0x5
.uaword baz, bar
.byte 0x6
/trunk/gnu/binutils/gas/testsuite/gas/sparc/plt.s
0,0 → 1,12
.text
.align 4
call foo
nop
call bar + 4
.data
.align 4
.word %r_plt32(foo)
.word %r_plt32(bar + 4)
.byte 1
.uaword %r_plt32(foo)
.byte 2, 3, 4
/trunk/gnu/binutils/gas/testsuite/gas/sparc/rdhpr.d
0,0 → 1,15
#as: -64 -Av9
#objdump: -dr
#name: sparc64 rdhpr
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 83 48 00 00 rdhpr %hpstate, %g1
4: 85 48 40 00 rdhpr %htstate, %g2
8: 87 48 c0 00 rdhpr %hintp, %g3
c: 89 49 40 00 rdhpr %htba, %g4
10: 8b 49 80 00 rdhpr %hver, %g5
14: 8d 4f c0 00 rdhpr %hstick_cmpr, %g6
/trunk/gnu/binutils/gas/testsuite/gas/sparc/gotop64.s
0,0 → 1,9
# sparc64 gotop
 
.data
sym: .word 0
 
.text
foo: sethi %gdop_hix22(sym), %l1
xor %l1, %gdop_lox10(sym), %l1
ldx [%l7 + %l1], %l2, %gdop(sym)
/trunk/gnu/binutils/gas/testsuite/gas/sparc/membar.s
0,0 → 1,12
# Test membar args
.text
membar 0
membar 127
membar #Sync|#MemIssue|#Lookaside|#StoreStore|#LoadStore|#StoreLoad|#LoadLoad
membar #Sync
membar #MemIssue
membar #Lookaside
membar #StoreStore
membar #LoadStore
membar #StoreLoad
membar #LoadLoad
/trunk/gnu/binutils/gas/testsuite/gas/sparc/set64.s
0,0 → 1,56
# sparc64 set insn handling (includes set, setuw, setsw, setx)
 
foo:
set foo,%g2
set 0x76543210,%g3
set 0,%g4
set 65535,%g5
 
setx foo,%g1,%g2
 
setx -1,%g1,%g3
setx 0,%g1,%g3
setx 1,%g1,%g3
setx 4095,%g1,%g3
setx 4096,%g1,%g3
setx -4096,%g1,%g3
setx -4097,%g1,%g3
setx 65535,%g1,%g3
setx -65536,%g1,%g3
 
setx 2147483647,%g1,%g4
setx 2147483648,%g1,%g4
setx -2147483648,%g1,%g4
setx -2147483649,%g1,%g4
setx 4294967295,%g1,%g4
setx 4294967296,%g1,%g4
 
! GAS doesn't handle large base10 numbers yet.
! setx 9223372036854775807,%g1,%g5
! setx 9223372036854775808,%g1,%g5
! setx -9223372036854775808,%g1,%g5
! setx -9223372036854775809,%g1,%g5
 
setx 0x7fffffffffffffff,%g1,%g5
setx 0x8000000000000000,%g1,%g5 ! test only hh22 needed
setx 0xffffffff00000000,%g1,%g5 ! test only hm10 needed
setx 0xffffffff80000000,%g1,%g5 ! test sign-ext of lower 32
setx 0xffff0000ffff0000,%g1,%g5 ! test hh22,hi22
setx 0xffff000000000001,%g1,%g5 ! test hh22,lo10
setx 0x00000001ffff0001,%g1,%g5 ! test hm10,hi22,lo10
setx 0x00000001ffff0000,%g1,%g5 ! test hm10,hi22
setx 0x0000000100000001,%g1,%g5 ! test hm10,lo10
 
setuw foo,%g2
setuw 0x76543210,%g3
setuw 0,%g4
setuw 65535,%g5
 
setsw foo,%g2
setsw 0x76543210,%g3
setsw 0,%g4
setsw 65535,%g5
setsw 0xffffffff,%g1
setsw 0x7fffffff,%g2
setsw 0xffff0000,%g3
setsw -1,%g4
/trunk/gnu/binutils/gas/testsuite/gas/sparc/pcrel.s
0,0 → 1,26
.text
.align 4
1: nop
2: nop
.globl foo
foo: nop
 
.data
.align 32
.word 0
.word 1
.word 1b + 16
.word %r_disp32(1b + 16)
.word 2b + 16
.word %r_disp32(2b + 16)
3: .word foo
.word %r_disp32(foo)
.word foo + 16
.word %r_disp32(foo + 16)
.byte %r_disp8(3b)
.byte %r_disp8(4f)
.half %r_disp16(3b)
.half %r_disp16(4f)
.uaword 2
.half 0
4:
/trunk/gnu/binutils/gas/testsuite/gas/sparc/synth.s
0,0 → 1,7
# common (v8 or v9) synthetic insns
.text
foo:
not %g1,%g2
not %g1
neg %g1,%g2
neg %g1
/trunk/gnu/binutils/gas/testsuite/gas/sparc/window.s
0,0 → 1,8
# Test window
.text
saved
restored
allclean
otherw
normalw
invalw
/trunk/gnu/binutils/gas/testsuite/gas/sparc/wrpr.d
0,0 → 1,25
#as: -64 -Av9
#objdump: -dr
#name: sparc64 wrpr
 
.*: +file format .*sparc.*
 
Disassembly of section .text:
 
0+ <.text>:
0: 81 90 40 00 wrpr %g1, %tpc
4: 83 90 80 00 wrpr %g2, %tnpc
8: 85 90 c0 00 wrpr %g3, %tstate
c: 87 91 00 00 wrpr %g4, %tt
10: 89 91 40 00 wrpr %g5, %tick
14: 8b 91 80 00 wrpr %g6, %tba
18: 8d 91 c0 00 wrpr %g7, %pstate
1c: 8f 92 00 00 wrpr %o0, %tl
20: 91 92 40 00 wrpr %o1, %pil
24: 93 92 80 00 wrpr %o2, %cwp
28: 95 92 c0 00 wrpr %o3, %cansave
2c: 97 93 00 00 wrpr %o4, %canrestore
30: 99 93 40 00 wrpr %o5, %cleanwin
34: 9b 93 80 00 wrpr %sp, %otherwin
38: 9d 93 c0 00 wrpr %o7, %wstate
3c: a1 94 00 00 wrpr %l0, %gl
/trunk/gnu/binutils/gas/testsuite/gas/sparc/asi.s
0,0 → 1,28
# Test asi's.
.text
lduwa [%g1]0,%g2
lduwa [%g1]255,%g2
lduwa [%g1]#ASI_AIUP,%g2
lduwa [%g1]#ASI_AIUS,%g2
lduwa [%g1]#ASI_AIUP_L,%g2
lduwa [%g1]#ASI_AIUS_L,%g2
lduwa [%g1]#ASI_P,%g2
lduwa [%g1]#ASI_S,%g2
lduwa [%g1]#ASI_PNF,%g2
lduwa [%g1]#ASI_SNF,%g2
lduwa [%g1]#ASI_P_L,%g2
lduwa [%g1]#ASI_S_L,%g2
lduwa [%g1]#ASI_PNF_L,%g2
lduwa [%g1]#ASI_SNF_L,%g2
lduwa [%g1]#ASI_AS_IF_USER_PRIMARY,%g2
lduwa [%g1]#ASI_AS_IF_USER_SECONDARY,%g2
lduwa [%g1]#ASI_AS_IF_USER_PRIMARY_LITTLE,%g2
lduwa [%g1]#ASI_AS_IF_USER_SECONDARY_LITTLE,%g2
lduwa [%g1]#ASI_PRIMARY,%g2
lduwa [%g1]#ASI_SECONDARY,%g2
lduwa [%g1]#ASI_PRIMARY_NOFAULT,%g2
lduwa [%g1]#ASI_SECONDARY_NOFAULT,%g2
lduwa [%g1]#ASI_PRIMARY_LITTLE,%g2
lduwa [%g1]#ASI_SECONDARY_LITTLE,%g2
lduwa [%g1]#ASI_PRIMARY_NOFAULT_LITTLE,%g2
lduwa [%g1]#ASI_SECONDARY_NOFAULT_LITTLE,%g2

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.