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URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

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  • This comparison shows the changes necessary to convert path
    /open8_urisc
    from Rev 224 to Rev 225
    Reverse comparison

Rev 224 → Rev 225

/trunk/VHDL/o8_cpu.vhd
203,7 → 203,8
-- Also added the I bit to the exported flags for
-- use in memory protection schemes.
-- Seth Henry 04/16/20 Modified to use new Open8 bus record. Also added
-- reset and usec_tick logic to drive utility signals
-- reset and usec_tick logic to drive utility
-- signals. Also added Halt_Ack output.
 
library ieee;
use ieee.std_logic_1164.all;
232,8 → 233,10
port(
Clock : in std_logic;
PLL_Locked : in std_logic;
CPU_Halt : in std_logic := '0';
--
Halt_Req : in std_logic := '0';
Halt_Ack : out std_logic;
--
Open8_Bus : out OPEN8_BUS_TYPE;
Rd_Data : in DATA_TYPE;
Interrupts : in INTERRUPT_BUNDLE := x"00"
264,7 → 267,8
signal CPU_Next_State : CPU_STATES := IPF_C0;
signal CPU_State : CPU_STATES := IPF_C0;
 
signal CPU_Halt_Req : std_logic;
signal CPU_Halt_Req : std_logic := '0';
signal CPU_Halt_Ack : std_logic := '0';
 
signal Cache_Ctrl : CACHE_MODES := CACHE_IDLE;
 
406,8 → 410,10
INT_Ctrl.Soft_Ints <= x"00";
INT_Ctrl.Incr_ISR <= '0';
Ack_D <= '0';
 
--
Reg := conv_integer(SubOp);
--
CPU_Halt_Ack <= '0';
 
case CPU_State is
-------------------------------------------------------------------------------
830,6 → 836,7
end if;
 
when WAH_Cx => -- Holds until CPU_Halt_Req is deasserted.
CPU_Halt_Ack <= '1';
DP_Ctrl.Src <= DATA_BUS_IDLE;
if( CPU_Halt_Req = '0' )then
CPU_Next_State <= IPF_C0;
932,6 → 939,7
Prefetch <= x"00";
 
CPU_Halt_Req <= '0';
Halt_Ack <= '0';
 
Open8_Bus.Wr_En <= '0';
Open8_Bus.Wr_Data <= OPEN8_NULLBUS;
964,7 → 972,8
 
elsif( rising_edge(Clock) )then
 
CPU_Halt_Req <= CPU_Halt;
CPU_Halt_Req <= Halt_Req;
Halt_Ack <= CPU_Halt_Ack;
 
Open8_Bus.Wr_En <= '0';
Open8_Bus.Wr_Data <= OPEN8_NULLBUS;

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