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URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

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  • This comparison shows the changes necessary to convert path 
    /open8_urisc
    from Rev 71 to Rev 72
    ↔ Reverse comparison
  •

Rev 71 → Rev 72

/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-war-err.l
0,0 → 1,3
.*: Assembler messages:
.*:8: Warning: Use of 'br.wtop.sptk' .* WAR dependency 'PR63' \(stop\)
.*:7: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/invalid-ar.l
0,0 → 1,125
.*: Assembler messages:
.*:2: Error: AR 0 can only be accessed by M-unit
.*:3: Error: AR 1 can only be accessed by M-unit
.*:4: Error: AR 2 can only be accessed by M-unit
.*:5: Error: AR 3 can only be accessed by M-unit
.*:6: Error: AR 4 can only be accessed by M-unit
.*:7: Error: AR 5 can only be accessed by M-unit
.*:8: Error: AR 6 can only be accessed by M-unit
.*:9: Error: AR 7 can only be accessed by M-unit
.*:10: Error: AR 8 can only be accessed by M-unit
.*:11: Error: AR 9 can only be accessed by M-unit
.*:12: Error: AR 10 can only be accessed by M-unit
.*:13: Error: AR 11 can only be accessed by M-unit
.*:14: Error: AR 12 can only be accessed by M-unit
.*:15: Error: AR 13 can only be accessed by M-unit
.*:16: Error: AR 14 can only be accessed by M-unit
.*:17: Error: AR 15 can only be accessed by M-unit
.*:18: Error: AR 16 can only be accessed by M-unit
.*:19: Error: AR 17 can only be accessed by M-unit
.*:20: Error: AR 18 can only be accessed by M-unit
.*:21: Error: AR 19 can only be accessed by M-unit
.*:22: Error: AR 20 can only be accessed by M-unit
.*:23: Error: AR 21 can only be accessed by M-unit
.*:24: Error: AR 22 can only be accessed by M-unit
.*:25: Error: AR 23 can only be accessed by M-unit
.*:26: Error: AR 24 can only be accessed by M-unit
.*:27: Error: AR 25 can only be accessed by M-unit
.*:28: Error: AR 26 can only be accessed by M-unit
.*:29: Error: AR 27 can only be accessed by M-unit
.*:30: Error: AR 28 can only be accessed by M-unit
.*:31: Error: AR 29 can only be accessed by M-unit
.*:32: Error: AR 30 can only be accessed by M-unit
.*:33: Error: AR 31 can only be accessed by M-unit
.*:34: Error: AR 32 can only be accessed by M-unit
.*:35: Error: AR 33 can only be accessed by M-unit
.*:36: Error: AR 34 can only be accessed by M-unit
.*:37: Error: AR 35 can only be accessed by M-unit
.*:38: Error: AR 36 can only be accessed by M-unit
.*:39: Error: AR 37 can only be accessed by M-unit
.*:40: Error: AR 38 can only be accessed by M-unit
.*:41: Error: AR 39 can only be accessed by M-unit
.*:42: Error: AR 40 can only be accessed by M-unit
.*:43: Error: AR 41 can only be accessed by M-unit
.*:44: Error: AR 42 can only be accessed by M-unit
.*:45: Error: AR 43 can only be accessed by M-unit
.*:46: Error: AR 44 can only be accessed by M-unit
.*:47: Error: AR 45 can only be accessed by M-unit
.*:48: Error: AR 46 can only be accessed by M-unit
.*:49: Error: AR 47 can only be accessed by M-unit
.*:54: Error: AR 64 can only be accessed by I-unit
.*:55: Error: AR 65 can only be accessed by I-unit
.*:56: Error: AR 66 can only be accessed by I-unit
.*:57: Error: AR 67 can only be accessed by I-unit
.*:58: Error: AR 68 can only be accessed by I-unit
.*:59: Error: AR 69 can only be accessed by I-unit
.*:60: Error: AR 70 can only be accessed by I-unit
.*:61: Error: AR 71 can only be accessed by I-unit
.*:62: Error: AR 72 can only be accessed by I-unit
.*:63: Error: AR 73 can only be accessed by I-unit
.*:64: Error: AR 74 can only be accessed by I-unit
.*:65: Error: AR 75 can only be accessed by I-unit
.*:66: Error: AR 76 can only be accessed by I-unit
.*:67: Error: AR 77 can only be accessed by I-unit
.*:68: Error: AR 78 can only be accessed by I-unit
.*:69: Error: AR 79 can only be accessed by I-unit
.*:70: Error: AR 80 can only be accessed by I-unit
.*:71: Error: AR 81 can only be accessed by I-unit
.*:72: Error: AR 82 can only be accessed by I-unit
.*:73: Error: AR 83 can only be accessed by I-unit
.*:74: Error: AR 84 can only be accessed by I-unit
.*:75: Error: AR 85 can only be accessed by I-unit
.*:76: Error: AR 86 can only be accessed by I-unit
.*:77: Error: AR 87 can only be accessed by I-unit
.*:78: Error: AR 88 can only be accessed by I-unit
.*:79: Error: AR 89 can only be accessed by I-unit
.*:80: Error: AR 90 can only be accessed by I-unit
.*:81: Error: AR 91 can only be accessed by I-unit
.*:82: Error: AR 92 can only be accessed by I-unit
.*:83: Error: AR 93 can only be accessed by I-unit
.*:84: Error: AR 94 can only be accessed by I-unit
.*:85: Error: AR 95 can only be accessed by I-unit
.*:86: Error: AR 96 can only be accessed by I-unit
.*:87: Error: AR 97 can only be accessed by I-unit
.*:88: Error: AR 98 can only be accessed by I-unit
.*:89: Error: AR 99 can only be accessed by I-unit
.*:90: Error: AR 100 can only be accessed by I-unit
.*:91: Error: AR 101 can only be accessed by I-unit
.*:92: Error: AR 102 can only be accessed by I-unit
.*:93: Error: AR 103 can only be accessed by I-unit
.*:94: Error: AR 104 can only be accessed by I-unit
.*:95: Error: AR 105 can only be accessed by I-unit
.*:96: Error: AR 106 can only be accessed by I-unit
.*:97: Error: AR 107 can only be accessed by I-unit
.*:98: Error: AR 108 can only be accessed by I-unit
.*:99: Error: AR 109 can only be accessed by I-unit
.*:100: Error: AR 110 can only be accessed by I-unit
.*:101: Error: AR 111 can only be accessed by I-unit
.*:106: Error: AR 0 can only be accessed by M-unit
.*:107: Error: AR 1 can only be accessed by M-unit
.*:108: Error: AR 2 can only be accessed by M-unit
.*:109: Error: AR 3 can only be accessed by M-unit
.*:110: Error: AR 4 can only be accessed by M-unit
.*:111: Error: AR 5 can only be accessed by M-unit
.*:112: Error: AR 6 can only be accessed by M-unit
.*:113: Error: AR 7 can only be accessed by M-unit
.*:114: Error: AR 16 can only be accessed by M-unit
.*:115: Error: AR 17 can only be accessed by M-unit
.*:116: Error: AR 18 can only be accessed by M-unit
.*:117: Error: AR 19 can only be accessed by M-unit
.*:118: Error: AR 21 can only be accessed by M-unit
.*:119: Error: AR 24 can only be accessed by M-unit
.*:120: Error: AR 25 can only be accessed by M-unit
.*:121: Error: AR 26 can only be accessed by M-unit
.*:122: Error: AR 27 can only be accessed by M-unit
.*:123: Error: AR 28 can only be accessed by M-unit
.*:124: Error: AR 29 can only be accessed by M-unit
.*:125: Error: AR 30 can only be accessed by M-unit
.*:126: Error: AR 32 can only be accessed by M-unit
.*:127: Error: AR 36 can only be accessed by M-unit
.*:128: Error: AR 40 can only be accessed by M-unit
.*:129: Error: AR 44 can only be accessed by M-unit
.*:130: Error: AR 45 can only be accessed by M-unit
.*:133: Error: AR 64 can only be accessed by I-unit
.*:134: Error: AR 65 can only be accessed by I-unit
.*:135: Error: AR 66 can only be accessed by I-unit
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pseudo.d
0,0 → 1,29
# as: -xnone -mtune=itanium1
# objdump: -d
# name: ia64 pseudo-ops
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+0 <_start>:
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+alloc r8=ar\.pfs,0,0,0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp\.eq p6,p0=r0,r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp\.eq p7,p0=0,r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp4\.eq p8,p0=r0,r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp4\.eq p9,p0=0,r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmp8xchg16\.acq r9=\[r0\],r0,ar\.csd,ar\.ccv
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+cmpxchg4\.acq r10=\[r0\],r0,ar\.ccv
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+fclass\.m p10,p0=f0,0x1
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+fcmp\.eq\.s0 p11,p0=f0,f0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+ld16 r11,ar\.csd=\[r0\]
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+mov pr=r0,0xfffffffffffffffe
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+st16 \[r0\]=r0,ar\.csd
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tbit\.z p0,p12=r0,0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tnat\.z p0,p13=r0(;;)?
#...
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+tf\.z p3,p2=33(;;)?
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-a.d
0,0 → 1,363
# as: -xnone
# objdump: -d
# name: ia64 opc-a
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
0: 00 28 9b cf 00 60 \[MII\] add r101=r102,r103
6: 80 4e ab 01 40 60 \(p01\) add r104=r105,r106
c: cd 6e 07 80 add r107=r108,r109,1
10: 40 70 bf e1 01 20 \[MII\] \(p02\) add r110=r111,r112,1
16: 40 01 28 00 c2 a0 mov r20=r10
1c: 12 50 00 84 \(p01\) adds r21=1,r10
20: 00 b0 fc 15 3f 23 \[MII\] adds r22=-1,r10
26: 70 01 28 00 46 01 adds r23=-8192,r10
2c: f3 57 fc 84 \(p02\) adds r24=8191,r10
30: 00 f0 00 02 00 24 \[MII\] addl r30=0,r1
36: f0 09 04 00 c8 00 addl r31=1,r1
3c: f4 ef ff 9f \(p01\) addl r32=-1,r1
40: 00 08 01 fa c0 27 \[MII\] addl r33=-8192,r1
46: 20 fa 07 7e 48 60 addl r34=8191,r1
4c: 04 08 00 98 addl r35=-2097152,r1
50: 00 20 fd fb ff 25 \[MII\] addl r36=2097151,r1
56: b0 00 28 00 42 80 mov r11=r10
5c: 41 53 90 84 adds r12=4660,r10
60: 00 68 d0 02 24 24 \[MII\] addl r13=4660,r1
66: e0 28 16 8c 48 80 addl r14=74565,r1
6c: 32 50 20 80 addp4 r20=r3,r10
70: 20 a8 04 14 80 21 \[MII\] \(p01\) addp4 r21=1,r10
76: 60 f9 2b 7e 47 a0 addp4 r22=-1,r10
7c: 6c 3e 17 80 sub r101=r102,r103
80: 40 70 bf e1 04 20 \[MII\] \(p02\) sub r110=r111,r112,1
86: 80 07 0c 4a 40 20 sub r120=0,r3
8c: 1f 18 94 80 sub r121=1,r3
90: 00 d0 ff 07 25 22 \[MII\] sub r122=-1,r3
96: b0 07 0c 4a 44 80 sub r123=-128,r3
9c: ff 1f 94 80 sub r124=127,r3
a0: 00 40 24 14 0c e0 \[MII\] and r8=r9,r10
a6: b0 00 30 58 44 02 \(p03\) and r11=-128,r12
ac: 91 50 38 80 \(p04\) or r8=r9,r10
b0: 00 58 00 18 2e 22 \[MII\] or r11=-128,r12
b6: 80 48 28 1e 40 60 xor r8=r9,r10
bc: 01 60 bc 88 xor r11=-128,r12
c0: 00 40 24 14 0d 20 \[MII\] andcm r8=r9,r10
c6: b0 00 30 5a 44 00 andcm r11=-128,r12
cc: e1 f9 40 80 shladd r8=r30,1,r31
d0: 00 48 78 3e 11 20 \[MII\] shladd r9=r30,2,r31
d6: a0 f0 7c 24 40 60 shladd r10=r30,3,r31
dc: e1 f9 4c 80 shladd r11=r30,4,r31
e0: 00 40 78 3e 18 20 \[MII\] shladdp4 r8=r30,1,r31
e6: 90 f0 7c 32 40 40 shladdp4 r9=r30,2,r31
ec: e1 f9 68 80 shladdp4 r10=r30,3,r31
f0: 00 58 78 3e 1b 20 \[MII\] shladdp4 r11=r30,4,r31
f6: a0 f0 7c 00 41 60 padd1 r10=r30,r31
fc: e1 f9 04 82 padd1\.sss r11=r30,r31
100: 00 60 78 3e 83 20 \[MII\] padd1\.uus r12=r30,r31
106: d0 f0 7c 04 41 c0 padd1\.uuu r13=r30,r31
10c: e1 f9 00 83 padd2 r14=r30,r31
110: 00 78 78 3e c1 20 \[MII\] padd2\.sss r15=r30,r31
116: 00 f1 7c 86 41 20 padd2\.uus r16=r30,r31
11c: e2 f9 08 83 padd2\.uuu r17=r30,r31
120: 00 90 78 3e 80 22 \[MII\] padd4 r18=r30,r31
126: a0 f0 7c 08 41 60 psub1 r10=r30,r31
12c: e1 f9 14 82 psub1\.sss r11=r30,r31
130: 00 60 78 3e 87 20 \[MII\] psub1\.uus r12=r30,r31
136: d0 f0 7c 0c 41 c0 psub1\.uuu r13=r30,r31
13c: e1 f9 10 83 psub2 r14=r30,r31
140: 00 78 78 3e c5 20 \[MII\] psub2\.sss r15=r30,r31
146: 00 f1 7c 8e 41 20 psub2\.uus r16=r30,r31
14c: e2 f9 18 83 psub2\.uuu r17=r30,r31
150: 00 90 78 3e 84 22 \[MII\] psub4 r18=r30,r31
156: a0 f0 7c 14 41 40 pavg1 r10=r30,r31
15c: e1 f9 2c 82 pavg1\.raz r10=r30,r31
160: 00 50 78 3e ca 20 \[MII\] pavg2 r10=r30,r31
166: a0 f0 7c 96 41 40 pavg2\.raz r10=r30,r31
16c: e1 f9 38 82 pavgsub1 r10=r30,r31
170: 00 50 78 3e ce 20 \[MII\] pavgsub2 r10=r30,r31
176: a0 f0 7c 48 41 40 pcmp1\.eq r10=r30,r31
17c: e1 f9 90 83 pcmp2\.eq r10=r30,r31
180: 00 50 78 3e a4 22 \[MII\] pcmp4\.eq r10=r30,r31
186: a0 f0 7c 4a 41 40 pcmp1\.gt r10=r30,r31
18c: e1 f9 94 83 pcmp2\.gt r10=r30,r31
190: 00 50 78 3e a5 22 \[MII\] pcmp4\.gt r10=r30,r31
196: a0 58 30 a0 41 40 pshladd2 r10=r11,1,r12
19c: b1 60 48 83 pshladd2 r10=r11,3,r12
1a0: 00 50 2c 18 d8 20 \[MII\] pshradd2 r10=r11,1,r12
1a6: a0 58 30 b2 41 40 pshradd2 r10=r11,2,r12
1ac: 30 20 0c e0 cmp\.eq p2,p3=r3,r4
1b0: 00 10 0c 08 03 39 \[MII\] cmp\.eq p2,p3=3,r4
1b6: 30 18 10 04 70 60 cmp\.eq p3,p2=r3,r4
1bc: 30 20 08 e4 cmp\.eq p3,p2=3,r4
1c0: 00 10 0c 08 03 30 \[MII\] cmp\.lt p2,p3=r3,r4
1c6: 20 18 10 06 62 60 cmp\.lt p2,p3=3,r4
1cc: 40 18 08 c0 cmp\.lt p3,p2=r4,r3
1d0: 00 10 08 08 03 31 \[MII\] cmp\.lt p2,p3=2,r4
1d6: 20 20 0c 06 60 60 cmp\.lt p2,p3=r4,r3
1dc: 20 20 08 c4 cmp\.lt p3,p2=2,r4
1e0: 00 18 0c 08 02 30 \[MII\] cmp\.lt p3,p2=r3,r4
1e6: 30 18 10 04 62 40 cmp\.lt p3,p2=3,r4
1ec: 30 20 0c d0 cmp\.ltu p2,p3=r3,r4
1f0: 00 10 0c 08 03 35 \[MII\] cmp\.ltu p2,p3=3,r4
1f6: 30 20 0c 04 68 40 cmp\.ltu p3,p2=r4,r3
1fc: 20 20 0c d4 cmp\.ltu p2,p3=2,r4
200: 00 10 10 06 03 34 \[MII\] cmp\.ltu p2,p3=r4,r3
206: 30 10 10 04 6a 60 cmp\.ltu p3,p2=2,r4
20c: 30 20 08 d0 cmp\.ltu p3,p2=r3,r4
210: 00 18 0c 08 02 35 \[MII\] cmp\.ltu p3,p2=3,r4
216: 20 1c 10 06 70 40 cmp\.eq\.unc p2,p3=r3,r4
21c: 38 20 0c e4 cmp\.eq\.unc p2,p3=3,r4
220: 00 18 0e 08 02 38 \[MII\] cmp\.eq\.unc p3,p2=r3,r4
226: 30 1c 10 04 72 40 cmp\.eq\.unc p3,p2=3,r4
22c: 38 20 0c c0 cmp\.lt\.unc p2,p3=r3,r4
230: 00 10 0e 08 03 31 \[MII\] cmp\.lt\.unc p2,p3=3,r4
236: 30 24 0c 04 60 40 cmp\.lt\.unc p3,p2=r4,r3
23c: 28 20 0c c4 cmp\.lt\.unc p2,p3=2,r4
240: 00 10 12 06 03 30 \[MII\] cmp\.lt\.unc p2,p3=r4,r3
246: 30 14 10 04 62 60 cmp\.lt\.unc p3,p2=2,r4
24c: 38 20 08 c0 cmp\.lt\.unc p3,p2=r3,r4
250: 00 18 0e 08 02 31 \[MII\] cmp\.lt\.unc p3,p2=3,r4
256: 20 1c 10 06 68 40 cmp\.ltu\.unc p2,p3=r3,r4
25c: 38 20 0c d4 cmp\.ltu\.unc p2,p3=3,r4
260: 00 18 12 06 02 34 \[MII\] cmp\.ltu\.unc p3,p2=r4,r3
266: 20 14 10 06 6a 40 cmp\.ltu\.unc p2,p3=2,r4
26c: 48 18 0c d0 cmp\.ltu\.unc p2,p3=r4,r3
270: 00 18 0a 08 02 35 \[MII\] cmp\.ltu\.unc p3,p2=2,r4
276: 30 1c 10 04 68 60 cmp\.ltu\.unc p3,p2=r3,r4
27c: 38 20 08 d4 cmp\.ltu\.unc p3,p2=3,r4
280: 00 10 0c 08 43 30 \[MII\] cmp\.eq\.and p2,p3=r3,r4
286: 20 18 10 86 62 40 cmp\.eq\.and p2,p3=3,r4
28c: 30 20 0c d1 cmp\.eq\.or p2,p3=r3,r4
290: 00 10 0c 08 43 35 \[MII\] cmp\.eq\.or p2,p3=3,r4
296: 20 18 10 86 70 40 cmp\.eq\.or\.andcm p2,p3=r3,r4
29c: 30 20 0c e5 cmp\.eq\.or\.andcm p2,p3=3,r4
2a0: 00 10 0e 08 43 34 \[MII\] cmp\.ne\.or p2,p3=r3,r4
2a6: 20 1c 10 86 6a 40 cmp\.ne\.or p2,p3=3,r4
2ac: 38 20 0c c1 cmp\.ne\.and p2,p3=r3,r4
2b0: 00 10 0e 08 43 31 \[MII\] cmp\.ne\.and p2,p3=3,r4
2b6: 30 1c 10 84 70 60 cmp\.ne\.or\.andcm p3,p2=r3,r4
2bc: 38 20 08 e5 cmp\.ne\.or\.andcm p3,p2=3,r4
2c0: 00 10 0e 08 43 30 \[MII\] cmp\.ne\.and p2,p3=r3,r4
2c6: 20 1c 10 86 62 40 cmp\.ne\.and p2,p3=3,r4
2cc: 38 20 0c d1 cmp\.ne\.or p2,p3=r3,r4
2d0: 00 10 0e 08 43 35 \[MII\] cmp\.ne\.or p2,p3=3,r4
2d6: 20 1c 10 86 70 40 cmp\.ne\.or\.andcm p2,p3=r3,r4
2dc: 38 20 0c e5 cmp\.ne\.or\.andcm p2,p3=3,r4
2e0: 00 10 0c 08 43 34 \[MII\] cmp\.eq\.or p2,p3=r3,r4
2e6: 20 18 10 86 6a 40 cmp\.eq\.or p2,p3=3,r4
2ec: 30 20 0c c1 cmp\.eq\.and p2,p3=r3,r4
2f0: 00 10 0c 08 43 31 \[MII\] cmp\.eq\.and p2,p3=3,r4
2f6: 30 18 10 84 70 60 cmp\.eq\.or\.andcm p3,p2=r3,r4
2fc: 30 20 08 e5 cmp\.eq\.or\.andcm p3,p2=3,r4
300: 00 10 00 08 43 30 \[MII\] cmp\.eq\.and p2,p3=r0,r4
306: 20 20 00 86 60 40 cmp\.eq\.and p2,p3=r4,r0
30c: 00 20 0c d1 cmp\.eq\.or p2,p3=r0,r4
310: 00 10 10 00 43 34 \[MII\] cmp\.eq\.or p2,p3=r4,r0
316: 20 00 10 86 70 40 cmp\.eq\.or\.andcm p2,p3=r0,r4
31c: 40 00 0c e1 cmp\.eq\.or\.andcm p2,p3=r4,r0
320: 00 10 02 08 43 34 \[MII\] cmp\.ne\.or p2,p3=r0,r4
326: 20 24 00 86 68 40 cmp\.ne\.or p2,p3=r4,r0
32c: 08 20 0c c1 cmp\.ne\.and p2,p3=r0,r4
330: 00 10 12 00 43 30 \[MII\] cmp\.ne\.and p2,p3=r4,r0
336: 30 04 10 84 70 60 cmp\.ne\.or\.andcm p3,p2=r0,r4
33c: 48 00 08 e1 cmp\.ne\.or\.andcm p3,p2=r4,r0
340: 00 10 02 08 43 30 \[MII\] cmp\.ne\.and p2,p3=r0,r4
346: 20 24 00 86 60 40 cmp\.ne\.and p2,p3=r4,r0
34c: 08 20 0c d1 cmp\.ne\.or p2,p3=r0,r4
350: 00 10 12 00 43 34 \[MII\] cmp\.ne\.or p2,p3=r4,r0
356: 20 04 10 86 70 40 cmp\.ne\.or\.andcm p2,p3=r0,r4
35c: 48 00 0c e1 cmp\.ne\.or\.andcm p2,p3=r4,r0
360: 00 10 00 08 43 34 \[MII\] cmp\.eq\.or p2,p3=r0,r4
366: 20 20 00 86 68 40 cmp\.eq\.or p2,p3=r4,r0
36c: 00 20 0c c1 cmp\.eq\.and p2,p3=r0,r4
370: 00 10 10 00 43 30 \[MII\] cmp\.eq\.and p2,p3=r4,r0
376: 30 00 10 84 70 60 cmp\.eq\.or\.andcm p3,p2=r0,r4
37c: 40 00 08 e1 cmp\.eq\.or\.andcm p3,p2=r4,r0
380: 00 10 02 08 43 32 \[MII\] cmp\.lt\.and p2,p3=r0,r4
386: 20 00 10 06 64 40 cmp\.gt\.and p2,p3=r0,r4
38c: 08 20 0c d9 cmp\.lt\.or p2,p3=r0,r4
390: 00 10 00 08 03 36 \[MII\] cmp\.gt\.or p2,p3=r0,r4
396: 20 04 10 86 74 40 cmp\.lt\.or\.andcm p2,p3=r0,r4
39c: 00 20 0c e8 cmp\.gt\.or\.andcm p2,p3=r0,r4
3a0: 00 10 00 08 43 36 \[MII\] cmp\.ge\.or p2,p3=r0,r4
3a6: 20 04 10 06 6c 40 cmp\.le\.or p2,p3=r0,r4
3ac: 00 20 0c c9 cmp\.ge\.and p2,p3=r0,r4
3b0: 00 10 02 08 03 32 \[MII\] cmp\.le\.and p2,p3=r0,r4
3b6: 30 00 10 84 74 60 cmp\.ge\.or\.andcm p3,p2=r0,r4
3bc: 08 20 08 e8 cmp\.le\.or\.andcm p3,p2=r0,r4
3c0: 00 10 02 08 03 32 \[MII\] cmp\.le\.and p2,p3=r0,r4
3c6: 20 00 10 86 64 40 cmp\.ge\.and p2,p3=r0,r4
3cc: 08 20 0c d8 cmp\.le\.or p2,p3=r0,r4
3d0: 00 10 00 08 43 36 \[MII\] cmp\.ge\.or p2,p3=r0,r4
3d6: 20 04 10 06 74 40 cmp\.le\.or\.andcm p2,p3=r0,r4
3dc: 00 20 0c e9 cmp\.ge\.or\.andcm p2,p3=r0,r4
3e0: 00 10 00 08 03 36 \[MII\] cmp\.gt\.or p2,p3=r0,r4
3e6: 20 04 10 86 6c 40 cmp\.lt\.or p2,p3=r0,r4
3ec: 00 20 0c c8 cmp\.gt\.and p2,p3=r0,r4
3f0: 00 10 02 08 43 32 \[MII\] cmp\.lt\.and p2,p3=r0,r4
3f6: 30 00 10 04 74 60 cmp\.gt\.or\.andcm p3,p2=r0,r4
3fc: 08 20 08 e9 cmp\.lt\.or\.andcm p3,p2=r0,r4
400: 00 10 00 08 03 32 \[MII\] cmp\.gt\.and p2,p3=r0,r4
406: 20 04 10 86 64 40 cmp\.lt\.and p2,p3=r0,r4
40c: 00 20 0c d8 cmp\.gt\.or p2,p3=r0,r4
410: 00 10 02 08 43 36 \[MII\] cmp\.lt\.or p2,p3=r0,r4
416: 20 00 10 06 74 40 cmp\.gt\.or\.andcm p2,p3=r0,r4
41c: 08 20 0c e9 cmp\.lt\.or\.andcm p2,p3=r0,r4
420: 00 10 02 08 03 36 \[MII\] cmp\.le\.or p2,p3=r0,r4
426: 20 00 10 86 6c 40 cmp\.ge\.or p2,p3=r0,r4
42c: 08 20 0c c8 cmp\.le\.and p2,p3=r0,r4
430: 00 10 00 08 43 32 \[MII\] cmp\.ge\.and p2,p3=r0,r4
436: 30 04 10 04 74 60 cmp\.le\.or\.andcm p3,p2=r0,r4
43c: 00 20 08 e9 cmp\.ge\.or\.andcm p3,p2=r0,r4
440: 00 10 00 08 43 32 \[MII\] cmp\.ge\.and p2,p3=r0,r4
446: 20 04 10 06 64 40 cmp\.le\.and p2,p3=r0,r4
44c: 00 20 0c d9 cmp\.ge\.or p2,p3=r0,r4
450: 00 10 02 08 03 36 \[MII\] cmp\.le\.or p2,p3=r0,r4
456: 20 00 10 86 74 40 cmp\.ge\.or\.andcm p2,p3=r0,r4
45c: 08 20 0c e8 cmp\.le\.or\.andcm p2,p3=r0,r4
460: 00 10 02 08 43 36 \[MII\] cmp\.lt\.or p2,p3=r0,r4
466: 20 00 10 06 6c 40 cmp\.gt\.or p2,p3=r0,r4
46c: 08 20 0c c9 cmp\.lt\.and p2,p3=r0,r4
470: 00 10 00 08 03 32 \[MII\] cmp\.gt\.and p2,p3=r0,r4
476: 30 04 10 84 74 60 cmp\.lt\.or\.andcm p3,p2=r0,r4
47c: 00 20 08 e8 cmp\.gt\.or\.andcm p3,p2=r0,r4
480: 00 10 0c 08 83 38 \[MII\] cmp4\.eq p2,p3=r3,r4
486: 20 18 10 06 73 60 cmp4\.eq p2,p3=3,r4
48c: 30 20 08 e2 cmp4\.eq p3,p2=r3,r4
490: 00 18 0c 08 82 39 \[MII\] cmp4\.eq p3,p2=3,r4
496: 20 18 10 06 61 40 cmp4\.lt p2,p3=r3,r4
49c: 30 20 0c c6 cmp4\.lt p2,p3=3,r4
4a0: 00 18 10 06 82 30 \[MII\] cmp4\.lt p3,p2=r4,r3
4a6: 20 10 10 06 63 40 cmp4\.lt p2,p3=2,r4
4ac: 40 18 0c c2 cmp4\.lt p2,p3=r4,r3
4b0: 00 18 08 08 82 31 \[MII\] cmp4\.lt p3,p2=2,r4
4b6: 30 18 10 04 61 60 cmp4\.lt p3,p2=r3,r4
4bc: 30 20 08 c6 cmp4\.lt p3,p2=3,r4
4c0: 00 10 0c 08 83 34 \[MII\] cmp4\.ltu p2,p3=r3,r4
4c6: 20 18 10 06 6b 60 cmp4\.ltu p2,p3=3,r4
4cc: 40 18 08 d2 cmp4\.ltu p3,p2=r4,r3
4d0: 00 10 08 08 83 35 \[MII\] cmp4\.ltu p2,p3=2,r4
4d6: 20 20 0c 06 69 60 cmp4\.ltu p2,p3=r4,r3
4dc: 20 20 08 d6 cmp4\.ltu p3,p2=2,r4
4e0: 00 18 0c 08 82 34 \[MII\] cmp4\.ltu p3,p2=r3,r4
4e6: 30 18 10 04 6b 40 cmp4\.ltu p3,p2=3,r4
4ec: 38 20 0c e2 cmp4\.eq\.unc p2,p3=r3,r4
4f0: 00 10 0e 08 83 39 \[MII\] cmp4\.eq\.unc p2,p3=3,r4
4f6: 30 1c 10 04 71 60 cmp4\.eq\.unc p3,p2=r3,r4
4fc: 38 20 08 e6 cmp4\.eq\.unc p3,p2=3,r4
500: 00 10 0e 08 83 30 \[MII\] cmp4\.lt\.unc p2,p3=r3,r4
506: 20 1c 10 06 63 60 cmp4\.lt\.unc p2,p3=3,r4
50c: 48 18 08 c2 cmp4\.lt\.unc p3,p2=r4,r3
510: 00 10 0a 08 83 31 \[MII\] cmp4\.lt\.unc p2,p3=2,r4
516: 20 24 0c 06 61 60 cmp4\.lt\.unc p2,p3=r4,r3
51c: 28 20 08 c6 cmp4\.lt\.unc p3,p2=2,r4
520: 00 18 0e 08 82 30 \[MII\] cmp4\.lt\.unc p3,p2=r3,r4
526: 30 1c 10 04 63 40 cmp4\.lt\.unc p3,p2=3,r4
52c: 38 20 0c d2 cmp4\.ltu\.unc p2,p3=r3,r4
530: 00 10 0e 08 83 35 \[MII\] cmp4\.ltu\.unc p2,p3=3,r4
536: 30 24 0c 04 69 40 cmp4\.ltu\.unc p3,p2=r4,r3
53c: 28 20 0c d6 cmp4\.ltu\.unc p2,p3=2,r4
540: 00 10 12 06 83 34 \[MII\] cmp4\.ltu\.unc p2,p3=r4,r3
546: 30 14 10 04 6b 60 cmp4\.ltu\.unc p3,p2=2,r4
54c: 38 20 08 d2 cmp4\.ltu\.unc p3,p2=r3,r4
550: 00 18 0e 08 82 35 \[MII\] cmp4\.ltu\.unc p3,p2=3,r4
556: 20 18 10 86 61 40 cmp4\.eq\.and p2,p3=r3,r4
55c: 30 20 0c c7 cmp4\.eq\.and p2,p3=3,r4
560: 00 10 0c 08 c3 34 \[MII\] cmp4\.eq\.or p2,p3=r3,r4
566: 20 18 10 86 6b 40 cmp4\.eq\.or p2,p3=3,r4
56c: 30 20 0c e3 cmp4\.eq\.or\.andcm p2,p3=r3,r4
570: 00 10 0c 08 c3 39 \[MII\] cmp4\.eq\.or\.andcm p2,p3=3,r4
576: 20 1c 10 86 69 40 cmp4\.ne\.or p2,p3=r3,r4
57c: 38 20 0c d7 cmp4\.ne\.or p2,p3=3,r4
580: 00 10 0e 08 c3 30 \[MII\] cmp4\.ne\.and p2,p3=r3,r4
586: 20 1c 10 86 63 60 cmp4\.ne\.and p2,p3=3,r4
58c: 38 20 08 e3 cmp4\.ne\.or\.andcm p3,p2=r3,r4
590: 00 18 0e 08 c2 39 \[MII\] cmp4\.ne\.or\.andcm p3,p2=3,r4
596: 20 1c 10 86 61 40 cmp4\.ne\.and p2,p3=r3,r4
59c: 38 20 0c c7 cmp4\.ne\.and p2,p3=3,r4
5a0: 00 10 0e 08 c3 34 \[MII\] cmp4\.ne\.or p2,p3=r3,r4
5a6: 20 1c 10 86 6b 40 cmp4\.ne\.or p2,p3=3,r4
5ac: 38 20 0c e3 cmp4\.ne\.or\.andcm p2,p3=r3,r4
5b0: 00 10 0e 08 c3 39 \[MII\] cmp4\.ne\.or\.andcm p2,p3=3,r4
5b6: 20 18 10 86 69 40 cmp4\.eq\.or p2,p3=r3,r4
5bc: 30 20 0c d7 cmp4\.eq\.or p2,p3=3,r4
5c0: 00 10 0c 08 c3 30 \[MII\] cmp4\.eq\.and p2,p3=r3,r4
5c6: 20 18 10 86 63 60 cmp4\.eq\.and p2,p3=3,r4
5cc: 30 20 08 e3 cmp4\.eq\.or\.andcm p3,p2=r3,r4
5d0: 00 18 0c 08 c2 39 \[MII\] cmp4\.eq\.or\.andcm p3,p2=3,r4
5d6: 20 00 10 86 61 40 cmp4\.eq\.and p2,p3=r0,r4
5dc: 40 00 0c c3 cmp4\.eq\.and p2,p3=r4,r0
5e0: 00 10 00 08 c3 34 \[MII\] cmp4\.eq\.or p2,p3=r0,r4
5e6: 20 20 00 86 69 40 cmp4\.eq\.or p2,p3=r4,r0
5ec: 00 20 0c e3 cmp4\.eq\.or\.andcm p2,p3=r0,r4
5f0: 00 10 10 00 c3 38 \[MII\] cmp4\.eq\.or\.andcm p2,p3=r4,r0
5f6: 20 04 10 86 69 40 cmp4\.ne\.or p2,p3=r0,r4
5fc: 48 00 0c d3 cmp4\.ne\.or p2,p3=r4,r0
600: 00 10 02 08 c3 30 \[MII\] cmp4\.ne\.and p2,p3=r0,r4
606: 20 24 00 86 61 60 cmp4\.ne\.and p2,p3=r4,r0
60c: 08 20 08 e3 cmp4\.ne\.or\.andcm p3,p2=r0,r4
610: 00 18 12 00 c2 38 \[MII\] cmp4\.ne\.or\.andcm p3,p2=r4,r0
616: 20 04 10 86 61 40 cmp4\.ne\.and p2,p3=r0,r4
61c: 48 00 0c c3 cmp4\.ne\.and p2,p3=r4,r0
620: 00 10 02 08 c3 34 \[MII\] cmp4\.ne\.or p2,p3=r0,r4
626: 20 24 00 86 69 40 cmp4\.ne\.or p2,p3=r4,r0
62c: 08 20 0c e3 cmp4\.ne\.or\.andcm p2,p3=r0,r4
630: 00 10 12 00 c3 38 \[MII\] cmp4\.ne\.or\.andcm p2,p3=r4,r0
636: 20 00 10 86 69 40 cmp4\.eq\.or p2,p3=r0,r4
63c: 40 00 0c d3 cmp4\.eq\.or p2,p3=r4,r0
640: 00 10 00 08 c3 30 \[MII\] cmp4\.eq\.and p2,p3=r0,r4
646: 20 20 00 86 61 60 cmp4\.eq\.and p2,p3=r4,r0
64c: 00 20 08 e3 cmp4\.eq\.or\.andcm p3,p2=r0,r4
650: 00 18 10 00 c2 38 \[MII\] cmp4\.eq\.or\.andcm p3,p2=r4,r0
656: 20 04 10 86 65 40 cmp4\.lt\.and p2,p3=r0,r4
65c: 00 20 0c ca cmp4\.gt\.and p2,p3=r0,r4
660: 00 10 02 08 c3 36 \[MII\] cmp4\.lt\.or p2,p3=r0,r4
666: 20 00 10 06 6d 40 cmp4\.gt\.or p2,p3=r0,r4
66c: 08 20 0c eb cmp4\.lt\.or\.andcm p2,p3=r0,r4
670: 00 10 00 08 83 3a \[MII\] cmp4\.gt\.or\.andcm p2,p3=r0,r4
676: 20 00 10 86 6d 40 cmp4\.ge\.or p2,p3=r0,r4
67c: 08 20 0c da cmp4\.le\.or p2,p3=r0,r4
680: 00 10 00 08 c3 32 \[MII\] cmp4\.ge\.and p2,p3=r0,r4
686: 20 04 10 06 65 60 cmp4\.le\.and p2,p3=r0,r4
68c: 00 20 08 eb cmp4\.ge\.or\.andcm p3,p2=r0,r4
690: 00 18 02 08 82 3a \[MII\] cmp4\.le\.or\.andcm p3,p2=r0,r4
696: 20 04 10 06 65 40 cmp4\.le\.and p2,p3=r0,r4
69c: 00 20 0c cb cmp4\.ge\.and p2,p3=r0,r4
6a0: 00 10 02 08 83 36 \[MII\] cmp4\.le\.or p2,p3=r0,r4
6a6: 20 00 10 86 6d 40 cmp4\.ge\.or p2,p3=r0,r4
6ac: 08 20 0c ea cmp4\.le\.or\.andcm p2,p3=r0,r4
6b0: 00 10 00 08 c3 3a \[MII\] cmp4\.ge\.or\.andcm p2,p3=r0,r4
6b6: 20 00 10 06 6d 40 cmp4\.gt\.or p2,p3=r0,r4
6bc: 08 20 0c db cmp4\.lt\.or p2,p3=r0,r4
6c0: 00 10 00 08 83 32 \[MII\] cmp4\.gt\.and p2,p3=r0,r4
6c6: 20 04 10 86 65 60 cmp4\.lt\.and p2,p3=r0,r4
6cc: 00 20 08 ea cmp4\.gt\.or\.andcm p3,p2=r0,r4
6d0: 00 18 02 08 c2 3a \[MII\] cmp4\.lt\.or\.andcm p3,p2=r0,r4
6d6: 20 00 10 06 65 40 cmp4\.gt\.and p2,p3=r0,r4
6dc: 08 20 0c cb cmp4\.lt\.and p2,p3=r0,r4
6e0: 00 10 00 08 83 36 \[MII\] cmp4\.gt\.or p2,p3=r0,r4
6e6: 20 04 10 86 6d 40 cmp4\.lt\.or p2,p3=r0,r4
6ec: 00 20 0c ea cmp4\.gt\.or\.andcm p2,p3=r0,r4
6f0: 00 10 02 08 c3 3a \[MII\] cmp4\.lt\.or\.andcm p2,p3=r0,r4
6f6: 20 04 10 06 6d 40 cmp4\.le\.or p2,p3=r0,r4
6fc: 00 20 0c db cmp4\.ge\.or p2,p3=r0,r4
700: 00 10 02 08 83 32 \[MII\] cmp4\.le\.and p2,p3=r0,r4
706: 20 00 10 86 65 60 cmp4\.ge\.and p2,p3=r0,r4
70c: 08 20 08 ea cmp4\.le\.or\.andcm p3,p2=r0,r4
710: 00 18 00 08 c2 3a \[MII\] cmp4\.ge\.or\.andcm p3,p2=r0,r4
716: 20 00 10 86 65 40 cmp4\.ge\.and p2,p3=r0,r4
71c: 08 20 0c ca cmp4\.le\.and p2,p3=r0,r4
720: 00 10 00 08 c3 36 \[MII\] cmp4\.ge\.or p2,p3=r0,r4
726: 20 04 10 06 6d 40 cmp4\.le\.or p2,p3=r0,r4
72c: 00 20 0c eb cmp4\.ge\.or\.andcm p2,p3=r0,r4
730: 00 10 02 08 83 3a \[MII\] cmp4\.le\.or\.andcm p2,p3=r0,r4
736: 20 04 10 86 6d 40 cmp4\.lt\.or p2,p3=r0,r4
73c: 00 20 0c da cmp4\.gt\.or p2,p3=r0,r4
740: 00 10 02 08 c3 32 \[MII\] cmp4\.lt\.and p2,p3=r0,r4
746: 20 00 10 06 65 60 cmp4\.gt\.and p2,p3=r0,r4
74c: 08 20 08 eb cmp4\.lt\.or\.andcm p3,p2=r0,r4
750: 01 18 00 08 82 3a \[MII\] cmp4\.gt\.or\.andcm p3,p2=r0,r4
756: 00 00 00 02 00 00 nop\.i 0x0
75c: 00 00 04 00 nop\.i 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-srlz.d
0,0 → 1,24
# as: -xauto -mtune=itanium1
# objdump: -d
# name ia64 dv-srlz
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <start>:
0: 0a 00 00 02 34 04 \[MMI\] ptc\.e r1;;
6: 00 00 00 60 00 00 srlz\.d
c: 00 00 04 00 nop\.i 0x0
10: 1d 08 00 04 18 10 \[MFB\] ld8 r1=\[r2\]
16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 0b 00 00 02 34 04 \[MMI\] ptc\.e r1;;
26: 00 00 00 62 00 00 srlz\.i
2c: 00 00 04 00 nop\.i 0x0;;
30: 17 00 00 00 10 00 \[BBB\] epc
36: 00 00 00 00 10 00 nop\.b 0x0
3c: 00 00 00 20 nop\.b 0x0;;
40: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
46: 00 00 00 02 00 00 nop\.f 0x0
4c: 00 00 20 00 rfi;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-imply.d
0,0 → 1,45
# as: -xexplicit -mtune=itanium1
# objdump: -d
# name ia64 dv-mutex
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <L-0xc0>:
0: 3c 20 08 00 00 24 \[MFB\] \(p01\) mov r4=2
6: 00 00 00 02 00 01 nop\.f 0x0
c: c0 00 00 40 \(p02\) br\.cond\.sptk\.few c0 <L>
10: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 1c 20 08 00 00 24 \[MFB\] mov r4=2
26: 00 00 00 02 00 01 nop\.f 0x0
2c: a0 00 00 40 \(p02\) br\.cond\.sptk\.few c0 <L>
30: 3d 20 1c 00 00 24 \[MFB\] \(p01\) mov r4=7
36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 20 00 rfi;;
40: 6a 08 06 04 02 78 \[MMI\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2;;
46: 40 10 00 00 48 00 \(p01\) mov r4=2
4c: 00 00 04 00 nop\.i 0x0
50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
56: 00 00 00 02 80 01 nop\.f 0x0
5c: 70 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
60: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
66: 00 00 00 02 00 00 nop\.f 0x0
6c: 00 00 20 00 rfi;;
70: 62 08 06 04 02 38 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
76: 30 28 18 88 e8 80 cmp\.eq\.or p3,p4=r5,r6;;
7c: 20 00 00 90 \(p01\) mov r4=2
80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
86: 00 00 00 02 80 01 nop\.f 0x0
8c: 40 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
90: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
96: 00 00 00 02 00 00 nop\.f 0x0
9c: 00 00 20 00 rfi;;
a0: 10 08 16 0c 42 70 \[MIB\] cmp\.ne\.and p1,p2=r5,r6
a6: 40 10 00 00 c8 01 \(p01\) mov r4=2
ac: 20 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
b0: 1d 20 1c 00 00 24 \[MFB\] mov r4=7
b6: 00 00 00 02 00 00 nop\.f 0x0
bc: 00 00 20 00 rfi;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/nop_x.s
0,0 → 1,6
.explicit
_start:
{.mlx
nop 0
nop 0
} ;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/alloc.l
0,0 → 1,11
# Currently in the error messages the operand numbers for the constants
# aren't correct, which is why the patterns only check for ranges.
.*: Assembler messages:
.*:7: Error: Operand [345] of .alloc. should be .*
.*:8: Error: Operand [345] of .alloc. should be .*
.*:9: Error: Operand [345] of .alloc. should be .*
.*:10: Error: Operand [56] of .alloc. should be .*
.*:11: Error: Operand [234] of .alloc. should be .*
.*:12: Error: Operand [234] of .alloc. should be .*
.*:13: Error: Operand [234] of .alloc. should be .*
.*:14: Error: Operand [45] of .alloc. should be .*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-war-err.s
0,0 → 1,9
//
// Detect WAR violations. Cases taken from DV tables.
//
.text
.explicit
// PR63
(p63) br.cond.sptk b0
br.wtop.sptk L
L:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/invalid-ar.s
0,0 → 1,135
// AR 0 to AR 47 can be accessed only by M unit.
mov.i r1 = ar0
mov.i r1 = ar1
mov.i r1 = ar2
mov.i r1 = ar3
mov.i r1 = ar4
mov.i r1 = ar5
mov.i r1 = ar6
mov.i r1 = ar7
mov.i r1 = ar8
mov.i r1 = ar9
mov.i r1 = ar10
mov.i r1 = ar11
mov.i r1 = ar12
mov.i r1 = ar13
mov.i r1 = ar14
mov.i r1 = ar15
mov.i r1 = ar16
mov.i r1 = ar17
mov.i r1 = ar18
mov.i r1 = ar19
mov.i r1 = ar20
mov.i r1 = ar21
mov.i r1 = ar22
mov.i r1 = ar23
mov.i r1 = ar24
mov.i r1 = ar25
mov.i r1 = ar26
mov.i r1 = ar27
mov.i r1 = ar28
mov.i r1 = ar29
mov.i r1 = ar30
mov.i r1 = ar31
mov.i r1 = ar32
mov.i r1 = ar33
mov.i r1 = ar34
mov.i r1 = ar35
mov.i r1 = ar36
mov.i r1 = ar37
mov.i r1 = ar38
mov.i r1 = ar39
mov.i r1 = ar40
mov.i r1 = ar41
mov.i r1 = ar42
mov.i r1 = ar43
mov.i r1 = ar44
mov.i r1 = ar45
mov.i r1 = ar46
mov.i r1 = ar47
 
// AR 48 to 63 can be accessed by I or M units.
 
// AR 64 to AR 111 can be accessed only by I unit.
mov.m r1 = ar64
mov.m r1 = ar65
mov.m r1 = ar66
mov.m r1 = ar67
mov.m r1 = ar68
mov.m r1 = ar69
mov.m r1 = ar70
mov.m r1 = ar71
mov.m r1 = ar72
mov.m r1 = ar73
mov.m r1 = ar74
mov.m r1 = ar75
mov.m r1 = ar76
mov.m r1 = ar77
mov.m r1 = ar78
mov.m r1 = ar79
mov.m r1 = ar80
mov.m r1 = ar81
mov.m r1 = ar82
mov.m r1 = ar83
mov.m r1 = ar84
mov.m r1 = ar85
mov.m r1 = ar86
mov.m r1 = ar87
mov.m r1 = ar88
mov.m r1 = ar89
mov.m r1 = ar90
mov.m r1 = ar91
mov.m r1 = ar92
mov.m r1 = ar93
mov.m r1 = ar94
mov.m r1 = ar95
mov.m r1 = ar96
mov.m r1 = ar97
mov.m r1 = ar98
mov.m r1 = ar99
mov.m r1 = ar100
mov.m r1 = ar101
mov.m r1 = ar102
mov.m r1 = ar103
mov.m r1 = ar104
mov.m r1 = ar105
mov.m r1 = ar106
mov.m r1 = ar107
mov.m r1 = ar108
mov.m r1 = ar109
mov.m r1 = ar110
mov.m r1 = ar111
 
// AR 112 to 127 can be accessed by I or M units.
 
// AR K0 to AR ITC can be accessed only by M unit.
mov.i r1 = ar.k0
mov.i r1 = ar.k1
mov.i r1 = ar.k2
mov.i r1 = ar.k3
mov.i r1 = ar.k4
mov.i r1 = ar.k5
mov.i r1 = ar.k6
mov.i r1 = ar.k7
mov.i r1 = ar.rsc
mov.i r1 = ar.bsp
mov.i r1 = ar.bspstore
mov.i r1 = ar.rnat
mov.i r1 = ar.fcr
mov.i r1 = ar.eflag
mov.i r1 = ar.csd
mov.i r1 = ar.ssd
mov.i r1 = ar.cflg
mov.i r1 = ar.fsr
mov.i r1 = ar.fir
mov.i r1 = ar.fdr
mov.i r1 = ar.ccv
mov.i r1 = ar.unat
mov.i r1 = ar.fpsr
mov.i r1 = ar.itc
mov.i r1 = ar.ruc
 
// AR PFS, LC and EC can be accessed only by I unit.
mov.m r1 = ar.pfs
mov.m r1 = ar.lc
mov.m r1 = ar.ec
/trunk/gnu/binutils/gas/testsuite/gas/ia64/operand-or.d
0,0 → 1,30
# as: -xnone -mtune=itanium1
# objdump: -d --disassemble-zeroes
# name: ia64 operand-or
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6: 30 20 80 09 28 00 fclass\.m p3,p4=f4,0x180
c: 00 00 00 20 nop\.b 0x0
10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
16: 30 20 c0 09 28 00 fclass\.m p3,p4=f4,0x1c0
1c: 00 00 00 20 nop\.b 0x0
20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
26: 30 20 c0 89 28 00 fclass\.m p3,p4=f4,0x1c1
2c: 00 00 00 20 nop\.b 0x0
30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
36: 30 20 c0 89 29 00 fclass\.m p3,p4=f4,0x1c3
3c: 00 00 00 20 nop\.b 0x0
40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
46: 30 20 c8 89 29 00 fclass\.m p3,p4=f4,0x1cb
4c: 00 00 00 20 nop\.b 0x0
50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
56: 30 20 d8 89 29 00 fclass\.m p3,p4=f4,0x1db
5c: 00 00 00 20 nop\.b 0x0
60: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
66: 30 20 f8 89 29 00 fclass\.m p3,p4=f4,0x1fb
6c: 00 00 00 20 nop\.b 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-i.d
0,0 → 1,312
# as: -xnone -mtune=itanium1
# objdump: -d
# name: ia64 opc-i
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
6: 40 28 18 8c 38 80 pmpyshr2 r4=r5,r6,0
c: 50 30 68 71 pmpyshr2\.u r4=r5,r6,16
10: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
16: 40 28 18 b4 3a 80 pmpy2\.r r4=r5,r6
1c: 50 30 78 75 pmpy2\.l r4=r5,r6
20: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
26: 40 28 18 20 3a 80 mix1\.r r4=r5,r6
2c: 50 30 40 75 mix2\.r r4=r5,r6
30: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
36: 40 28 18 20 3e 80 mix4\.r r4=r5,r6
3c: 50 30 50 74 mix1\.l r4=r5,r6
40: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
46: 40 28 18 a8 3a 80 mix2\.l r4=r5,r6
4c: 50 30 50 7c mix4\.l r4=r5,r6
50: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
56: 40 28 18 80 3a 80 pack2\.uss r4=r5,r6
5c: 50 30 10 75 pack2\.sss r4=r5,r6
60: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
66: 40 28 18 08 3e 80 pack4\.sss r4=r5,r6
6c: 50 30 20 74 unpack1\.h r4=r5,r6
70: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
76: 40 28 18 90 3a 80 unpack2\.h r4=r5,r6
7c: 50 30 20 7c unpack4\.h r4=r5,r6
80: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
86: 40 28 18 18 3a 80 unpack1\.l r4=r5,r6
8c: 50 30 30 75 unpack2\.l r4=r5,r6
90: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
96: 40 28 18 18 3e 80 unpack4\.l r4=r5,r6
9c: 50 30 08 74 pmin1\.u r4=r5,r6
a0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
a6: 40 28 18 14 3a 80 pmax1\.u r4=r5,r6
ac: 50 30 18 75 pmin2 r4=r5,r6
b0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b6: 40 28 18 9c 3a 80 pmax2 r4=r5,r6
bc: 50 30 58 74 psad1 r4=r5,r6
c0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
c6: 40 28 2c 28 3b 80 mux1 r4=r5,@rev
cc: 50 40 50 76 mux1 r4=r5,@mix
d0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
d6: 40 28 24 28 3b 80 mux1 r4=r5,@shuf
dc: 50 50 50 76 mux1 r4=r5,@alt
e0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
e6: 40 28 00 28 3b 80 mux1 r4=r5,@brcst
ec: 50 00 50 77 mux2 r4=r5,0x0
f0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
f6: 40 28 fc ab 3b 80 mux2 r4=r5,0xff
fc: 50 50 55 77 mux2 r4=r5,0xaa
100: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
106: 40 30 14 88 38 80 pshr2 r4=r5,r6
10c: 00 28 18 73 pshr2 r4=r5,0
110: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
116: 40 80 14 8c 39 80 pshr2 r4=r5,8
11c: e0 2b 18 73 pshr2 r4=r5,31
120: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
126: 40 30 14 08 3c 80 pshr4 r4=r5,r6
12c: 00 28 18 7a pshr4 r4=r5,0
130: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
136: 40 80 14 0c 3d 80 pshr4 r4=r5,8
13c: e0 2b 18 7a pshr4 r4=r5,31
140: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
146: 40 30 14 80 38 80 pshr2\.u r4=r5,r6
14c: 00 28 08 73 pshr2\.u r4=r5,0
150: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
156: 40 80 14 84 39 80 pshr2\.u r4=r5,8
15c: e0 2b 08 73 pshr2\.u r4=r5,31
160: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
166: 40 30 14 00 3c 80 pshr4\.u r4=r5,r6
16c: 00 28 08 7a pshr4\.u r4=r5,0
170: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
176: 40 80 14 04 3d 80 pshr4\.u r4=r5,8
17c: e0 2b 08 7a pshr4\.u r4=r5,31
180: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
186: 40 30 14 88 3c 80 shr r4=r5,r6
18c: 60 28 00 79 shr\.u r4=r5,r6
190: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
196: 40 28 18 90 38 80 pshl2 r4=r5,r6
19c: 50 f8 28 77 pshl2 r4=r5,0
1a0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1a6: 40 28 5c 94 3b 80 pshl2 r4=r5,8
1ac: 50 00 28 77 pshl2 r4=r5,31
1b0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1b6: 40 28 18 10 3c 80 pshl4 r4=r5,r6
1bc: 50 f8 28 7e pshl4 r4=r5,0
1c0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1c6: 40 28 5c 14 3f 80 pshl4 r4=r5,8
1cc: 50 00 28 7e pshl4 r4=r5,31
1d0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1d6: 40 28 18 90 3c 80 shl r4=r5,r6
1dc: 00 28 48 73 popcnt r4=r5
1e0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1e6: 40 28 18 00 2b 80 shrp r4=r5,r6,0
1ec: 50 30 30 56 shrp r4=r5,r6,12
1f0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
1f6: 40 28 18 7e 2b 80 shrp r4=r5,r6,63
1fc: 10 28 3c 52 extr r4=r5,0,16
200: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
206: 40 08 14 7c 29 80 extr r4=r5,0,63
20c: 50 29 9c 52 extr r4=r5,10,40
210: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
216: 40 00 14 1e 29 80 extr\.u r4=r5,0,16
21c: 00 28 f8 52 extr\.u r4=r5,0,63
220: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
226: 40 a0 14 4e 29 80 extr\.u r4=r5,10,40
22c: 50 f8 3d 53 dep\.z r4=r5,0,16
230: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
236: 40 28 fc fc 29 80 dep\.z r4=r5,0,63
23c: 50 a8 9d 53 dep\.z r4=r5,10,40
240: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
246: 40 00 fc 9f 29 80 dep\.z r4=0,0,16
24c: f0 ff fb 53 dep\.z r4=127,0,63
250: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
256: 40 00 e8 e3 2d 80 dep\.z r4=-128,5,50
25c: 50 ad 9f 53 dep\.z r4=85,10,40
260: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
266: 40 f0 17 9e 2b 80 dep r4=0,r5,0,16
26c: e0 2f f8 5f dep r4=-1,r5,0,63
270: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
276: 00 00 00 02 00 80 nop\.f 0x0
27c: 50 30 58 4d dep r4=r5,r6,10,7
280: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
286: 00 00 00 00 00 80 movl r4=0x0
28c: 00 00 00 60
290: 04 00 00 00 01 c0 \[MLX\] nop\.m 0x0
296: ff ff ff ff 7f 80 movl r4=0xffffffffffffffff
29c: f0 f7 ff 6f
2a0: 04 00 00 00 01 80 \[MLX\] nop\.m 0x0
2a6: 90 78 56 34 12 80 movl r4=0x1234567890abcdef
2ac: f0 76 6d 66
2b0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
2b6: 00 00 00 00 00 e0 break\.i 0x0
2bc: ff ff 01 08 break\.i 0x1fffff
2c0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
2c6: 00 00 00 02 00 e0 nop\.i 0x0
2cc: ff ff 05 08 nop\.i 0x1fffff
2d0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
2d6: 30 25 fc ff 04 80 chk\.s\.i r4,0 <_start>
2dc: 00 00 c4 00 mov r4=b0
2e0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
2e6: 00 20 04 80 03 00 mov b0=r4
2ec: 40 00 00 03 mov pr=r4,0x0
2f0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
2f6: a0 21 80 84 01 e0 mov pr=r4,0x1234
2fc: 4f 80 7f 0b mov pr=r4,0xfffffffffffffffe
300: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
306: 00 00 00 00 01 e0 mov pr\.rot=0x0
30c: 7f 00 00 02 mov pr\.rot=0x3ff0000
310: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
316: 00 c0 ff 7f 05 80 mov pr\.rot=0xfffffffffc000000
31c: 00 28 40 00 zxt1 r4=r5
320: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
326: 40 00 14 22 00 80 zxt2 r4=r5
32c: 00 28 48 00 zxt4 r4=r5
330: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
336: 40 00 14 28 00 80 sxt1 r4=r5
33c: 00 28 54 00 sxt2 r4=r5
340: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
346: 40 00 14 2c 00 80 sxt4 r4=r5
34c: 00 28 60 00 czx1\.l r4=r5
350: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
356: 40 00 14 32 00 80 czx2\.l r4=r5
35c: 00 28 70 00 czx1\.r r4=r5
360: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
366: 40 00 14 3a 00 40 czx2\.r r4=r5
36c: 00 20 0c 50 tbit\.z p2,p3=r4,0
370: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
376: 20 14 10 06 28 40 tbit\.z\.unc p2,p3=r4,1
37c: 40 20 0c 58 tbit\.z\.and p2,p3=r4,2
380: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
386: 20 30 10 86 28 40 tbit\.z\.or p2,p3=r4,3
38c: 80 20 0c 59 tbit\.z\.or\.andcm p2,p3=r4,4
390: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
396: 30 54 10 84 28 60 tbit\.nz\.or p3,p2=r4,5
39c: c8 20 08 58 tbit\.nz\.and p3,p2=r4,6
3a0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3a6: 30 74 10 84 2c 60 tbit\.nz\.or\.andcm p3,p2=r4,7
3ac: 00 21 08 50 tbit\.z p3,p2=r4,8
3b0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3b6: 30 94 10 04 28 40 tbit\.z\.unc p3,p2=r4,9
3bc: 48 21 0c 58 tbit\.nz\.and p2,p3=r4,10
3c0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3c6: 20 b4 10 86 28 40 tbit\.nz\.or p2,p3=r4,11
3cc: 88 21 0c 59 tbit\.nz\.or\.andcm p2,p3=r4,12
3d0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3d6: 30 d0 10 84 28 60 tbit\.z\.or p3,p2=r4,13
3dc: c0 21 08 58 tbit\.z\.and p3,p2=r4,14
3e0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3e6: 30 f0 10 84 2c 40 tbit\.z\.or\.andcm p3,p2=r4,15
3ec: 10 20 0c 50 tnat\.z p2,p3=r4
3f0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
3f6: 20 0c 10 06 28 40 tnat\.z\.unc p2,p3=r4
3fc: 10 20 0c 58 tnat\.z\.and p2,p3=r4
400: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
406: 20 08 10 86 28 40 tnat\.z\.or p2,p3=r4
40c: 10 20 0c 59 tnat\.z\.or\.andcm p2,p3=r4
410: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
416: 30 0c 10 84 28 60 tnat\.nz\.or p3,p2=r4
41c: 18 20 08 58 tnat\.nz\.and p3,p2=r4
420: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
426: 30 0c 10 84 2c 60 tnat\.nz\.or\.andcm p3,p2=r4
42c: 10 20 08 50 tnat\.z p3,p2=r4
430: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
436: 30 0c 10 04 28 40 tnat\.z\.unc p3,p2=r4
43c: 18 20 0c 58 tnat\.nz\.and p2,p3=r4
440: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
446: 20 0c 10 86 28 40 tnat\.nz\.or p2,p3=r4
44c: 18 20 0c 59 tnat\.nz\.or\.andcm p2,p3=r4
450: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
456: 30 08 10 84 28 60 tnat\.z\.or p3,p2=r4
45c: 10 20 08 58 tnat\.z\.and p3,p2=r4
460: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
466: 30 08 10 84 2c 60 tnat\.z\.or\.andcm p3,p2=r4
46c: 40 88 08 07 mov b3=r4
470: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
476: 00 00 00 02 00 60 nop\.f 0x0
47c: 40 48 08 07 mov\.imp b3=r4,570 <_start\+0x570>;;
\.\.\.
570: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
576: 30 20 00 84 03 60 mov\.sptk b3=r4,670 <_start\+0x670>
57c: 40 40 08 07 mov\.sptk\.imp b3=r4,670 <_start\+0x670>;;
\.\.\.
670: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
676: 30 20 08 84 03 60 mov\.dptk b3=r4,770 <_start\+0x770>
67c: 40 50 08 07 mov\.dptk\.imp b3=r4,770 <_start\+0x770>;;
\.\.\.
770: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
776: 30 20 14 84 03 60 mov\.ret b3=r4,870 <_start\+0x870>
77c: 40 68 08 07 mov\.ret\.imp b3=r4,870 <_start\+0x870>;;
\.\.\.
870: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
876: 30 20 10 84 03 60 mov\.ret\.sptk b3=r4,970 <_start\+0x970>
87c: 40 60 08 07 mov\.ret\.sptk\.imp b3=r4,970 <_start\+0x970>;;
\.\.\.
970: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
976: 30 20 18 84 03 60 mov\.ret\.dptk b3=r4,a70 <_start\+0xa70>
97c: 40 70 08 07 mov\.ret\.dptk\.imp b3=r4,a70 <_start\+0xa70>;;
\.\.\.
a70: 00 00 00 80 01 00 \[MII\] hint\.m 0x0
a76: 00 00 00 03 00 00 hint\.i 0x0
a7c: 00 00 06 00 hint\.i 0x0
a80: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
a86: f0 ff ff 03 84 03 hint\.i 0x1fffff
a8c: 00 00 06 00 \(p07\) hint\.i 0x0
a90: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
a96: 01 00 00 03 80 03 \(p07\) hint\.i 0x0
a9c: 00 00 06 00 \(p07\) hint\.i 0x0
aa0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
aa6: f1 ff ff 03 84 03 \(p07\) hint\.i 0x1fffff
aac: 00 00 06 00 \(p07\) hint\.i 0x0
ab0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
ab6: 01 00 00 03 80 03 \(p07\) hint\.i 0x0
abc: 00 00 06 00 \(p07\) hint\.i 0x0
ac0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
ac6: f1 ff ff 03 04 40 \(p07\) hint\.i 0x1fffff
acc: f0 04 0c 50 tf\.z p2,p3=39
ad0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
ad6: 20 7c 02 06 28 40 tf\.z\.unc p2,p3=39
adc: f0 04 0c 58 tf\.z\.and p2,p3=39
ae0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
ae6: 20 78 02 86 28 40 tf\.z\.or p2,p3=39
aec: f0 04 0c 59 tf\.z\.or\.andcm p2,p3=39
af0: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
af6: 30 7c 02 84 28 60 tf\.nz\.or p3,p2=39
afc: f8 04 08 58 tf\.nz\.and p3,p2=39
b00: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b06: 30 7c 02 84 2c 60 tf\.nz\.or\.andcm p3,p2=39
b0c: f0 04 08 50 tf\.z p3,p2=39
b10: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b16: 30 7c 02 04 28 40 tf\.z\.unc p3,p2=39
b1c: f8 04 0c 58 tf\.nz\.and p2,p3=39
b20: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b26: 20 7c 02 86 28 40 tf\.nz\.or p2,p3=39
b2c: f8 04 0c 59 tf\.nz\.or\.andcm p2,p3=39
b30: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b36: 30 78 02 84 28 60 tf\.z\.or p3,p2=39
b3c: f0 04 08 58 tf\.z\.and p3,p2=39
b40: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
b46: 30 78 02 84 ac 43 tf\.z\.or\.andcm p3,p2=39
b4c: f0 04 0c 50 \(p07\) tf\.z p2,p3=39
b50: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
b56: 21 7c 02 06 a8 43 \(p07\) tf\.z\.unc p2,p3=39
b5c: f0 04 0c 58 \(p07\) tf\.z\.and p2,p3=39
b60: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
b66: 21 78 02 86 a8 43 \(p07\) tf\.z\.or p2,p3=39
b6c: f0 04 0c 59 \(p07\) tf\.z\.or\.andcm p2,p3=39
b70: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
b76: 31 7c 02 84 a8 63 \(p07\) tf\.nz\.or p3,p2=39
b7c: f8 04 08 58 \(p07\) tf\.nz\.and p3,p2=39
b80: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
b86: 31 7c 02 84 ac 63 \(p07\) tf\.nz\.or\.andcm p3,p2=39
b8c: f0 04 08 50 \(p07\) tf\.z p3,p2=39
b90: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
b96: 31 7c 02 04 a8 43 \(p07\) tf\.z\.unc p3,p2=39
b9c: f8 04 0c 58 \(p07\) tf\.nz\.and p2,p3=39
ba0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
ba6: 21 7c 02 86 a8 43 \(p07\) tf\.nz\.or p2,p3=39
bac: f8 04 0c 59 \(p07\) tf\.nz\.or\.andcm p2,p3=39
bb0: 00 00 00 00 01 c0 \[MII\] nop\.m 0x0
bb6: 31 78 02 84 a8 63 \(p07\) tf\.z\.or p3,p2=39
bbc: f0 04 08 58 \(p07\) tf\.z\.and p3,p2=39
bc0: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
bc6: 00 00 00 02 80 63 nop\.f 0x0
bcc: f0 04 08 59 \(p07\) tf\.z\.or\.andcm p3,p2=39;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ldxmov-1.d
0,0 → 1,19
#as: -mtune=itanium1
#objdump: -dr
#name: ia64 ldxmov-1
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <\.text>:
0: 18 10 00 06 18 10 \[MMB\] ld8 r2=\[r3\]
0: LDXMOV foo
1: LDXMOV \.data
6: 40 00 14 30 20 00 ld8 r4=\[r5\]
c: 00 00 00 20 nop\.b 0x0
10: 19 30 00 0e 18 10 \[MMB\] ld8 r6=\[r7\]
10: LDXMOV foo\+0x64
11: LDXMOV \.data\+0x64
16: 80 00 24 30 20 00 ld8 r8=\[r9\]
1c: 00 00 00 20 nop.b 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/alloc.s
0,0 → 1,14
// Make sure error messages on 'alloc' don't needlessly refer to operand 1
// (which gets parsed late) when only one of the other operands is wrong.
 
.text
 
alloc:
alloc r2 = ar.pfs, x, 0, 0, 0
alloc r2 = ar.pfs, 0, x, 0, 0
alloc r2 = ar.pfs, 0, 0, x, 0
alloc r2 = ar.pfs, 0, 0, 0, x
alloc r3 = x, 0, 0, 0
alloc r3 = 0, x, 0, 0
alloc r3 = 0, 0, x, 0
alloc r3 = 0, 0, 0, x
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-m.d
0,0 → 1,1359
# as: -xnone -mtune=itanium1
# objdump: -d
# name: ia64 opc-m
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
0: 18 20 00 0a 00 10 \[MMB\] ld1 r4=\[r5\]
6: 40 30 14 00 24 00 ld1 r4=\[r5\],r6
c: 00 00 00 20 nop\.b 0x0
10: 18 20 00 0a 00 16 \[MMB\] ld1 r4=\[r5\],-256
16: 40 00 14 04 20 00 ld1\.nt1 r4=\[r5\]
1c: 00 00 00 20 nop\.b 0x0
20: 18 20 18 0a 02 12 \[MMB\] ld1\.nt1 r4=\[r5\],r6
26: 40 68 14 04 2c 00 ld1\.nt1 r4=\[r5\],-243
2c: 00 00 00 20 nop\.b 0x0
30: 18 20 00 0a 06 10 \[MMB\] ld1\.nta r4=\[r5\]
36: 40 30 14 0c 24 00 ld1\.nta r4=\[r5\],r6
3c: 00 00 00 20 nop\.b 0x0
40: 18 20 68 0a 06 16 \[MMB\] ld1\.nta r4=\[r5\],-230
46: 40 00 14 40 20 00 ld1\.s r4=\[r5\]
4c: 00 00 00 20 nop\.b 0x0
50: 18 20 18 0a 20 12 \[MMB\] ld1\.s r4=\[r5\],r6
56: 40 38 15 40 2c 00 ld1\.s r4=\[r5\],-217
5c: 00 00 00 20 nop\.b 0x0
60: 18 20 00 0a 22 10 \[MMB\] ld1\.s\.nt1 r4=\[r5\]
66: 40 30 14 44 24 00 ld1\.s\.nt1 r4=\[r5\],r6
6c: 00 00 00 20 nop\.b 0x0
70: 18 20 d0 0a 22 16 \[MMB\] ld1\.s\.nt1 r4=\[r5\],-204
76: 40 00 14 4c 20 00 ld1\.s\.nta r4=\[r5\]
7c: 00 00 00 20 nop\.b 0x0
80: 18 20 18 0a 26 12 \[MMB\] ld1\.s\.nta r4=\[r5\],r6
86: 40 08 16 4c 2c 00 ld1\.s\.nta r4=\[r5\],-191
8c: 00 00 00 20 nop\.b 0x0
90: 18 20 00 0a 40 10 \[MMB\] ld1\.a r4=\[r5\]
96: 40 30 14 80 24 00 ld1\.a r4=\[r5\],r6
9c: 00 00 00 20 nop\.b 0x0
a0: 18 20 38 0b 40 16 \[MMB\] ld1\.a r4=\[r5\],-178
a6: 40 00 14 84 20 00 ld1\.a\.nt1 r4=\[r5\]
ac: 00 00 00 20 nop\.b 0x0
b0: 18 20 18 0a 42 12 \[MMB\] ld1\.a\.nt1 r4=\[r5\],r6
b6: 40 d8 16 84 2c 00 ld1\.a\.nt1 r4=\[r5\],-165
bc: 00 00 00 20 nop\.b 0x0
c0: 18 20 00 0a 46 10 \[MMB\] ld1\.a\.nta r4=\[r5\]
c6: 40 30 14 8c 24 00 ld1\.a\.nta r4=\[r5\],r6
cc: 00 00 00 20 nop\.b 0x0
d0: 18 20 a0 0b 46 16 \[MMB\] ld1\.a\.nta r4=\[r5\],-152
d6: 40 00 14 c0 20 00 ld1\.sa r4=\[r5\]
dc: 00 00 00 20 nop\.b 0x0
e0: 18 20 18 0a 60 12 \[MMB\] ld1\.sa r4=\[r5\],r6
e6: 40 a8 17 c0 2c 00 ld1\.sa r4=\[r5\],-139
ec: 00 00 00 20 nop\.b 0x0
f0: 18 20 00 0a 62 10 \[MMB\] ld1\.sa\.nt1 r4=\[r5\]
f6: 40 30 14 c4 24 00 ld1\.sa\.nt1 r4=\[r5\],r6
fc: 00 00 00 20 nop\.b 0x0
100: 18 20 08 0a 63 16 \[MMB\] ld1\.sa\.nt1 r4=\[r5\],-126
106: 40 00 14 cc 20 00 ld1\.sa\.nta r4=\[r5\]
10c: 00 00 00 20 nop\.b 0x0
110: 18 20 18 0a 66 12 \[MMB\] ld1\.sa\.nta r4=\[r5\],r6
116: 40 78 14 ce 2c 00 ld1\.sa\.nta r4=\[r5\],-113
11c: 00 00 00 20 nop\.b 0x0
120: 18 20 00 0a 00 11 \[MMB\] ld1\.c\.clr r4=\[r5\]
126: 40 30 14 00 26 00 ld1\.c\.clr r4=\[r5\],r6
12c: 00 00 00 20 nop\.b 0x0
130: 18 20 70 0a 01 17 \[MMB\] ld1\.c\.clr r4=\[r5\],-100
136: 40 00 14 04 22 00 ld1\.c\.clr\.nt1 r4=\[r5\]
13c: 00 00 00 20 nop\.b 0x0
140: 18 20 18 0a 02 13 \[MMB\] ld1\.c\.clr\.nt1 r4=\[r5\],r6
146: 40 48 15 06 2e 00 ld1\.c\.clr\.nt1 r4=\[r5\],-87
14c: 00 00 00 20 nop\.b 0x0
150: 18 20 00 0a 06 11 \[MMB\] ld1\.c\.clr\.nta r4=\[r5\]
156: 40 30 14 0c 26 00 ld1\.c\.clr\.nta r4=\[r5\],r6
15c: 00 00 00 20 nop\.b 0x0
160: 18 20 d8 0a 07 17 \[MMB\] ld1\.c\.clr\.nta r4=\[r5\],-74
166: 40 00 14 40 22 00 ld1\.c\.nc r4=\[r5\]
16c: 00 00 00 20 nop\.b 0x0
170: 18 20 18 0a 20 13 \[MMB\] ld1\.c\.nc r4=\[r5\],r6
176: 40 18 16 42 2e 00 ld1\.c\.nc r4=\[r5\],-61
17c: 00 00 00 20 nop\.b 0x0
180: 18 20 00 0a 22 11 \[MMB\] ld1\.c\.nc\.nt1 r4=\[r5\]
186: 40 30 14 44 26 00 ld1\.c\.nc\.nt1 r4=\[r5\],r6
18c: 00 00 00 20 nop\.b 0x0
190: 18 20 40 0b 23 17 \[MMB\] ld1\.c\.nc\.nt1 r4=\[r5\],-48
196: 40 00 14 4c 22 00 ld1\.c\.nc\.nta r4=\[r5\]
19c: 00 00 00 20 nop\.b 0x0
1a0: 18 20 18 0a 26 13 \[MMB\] ld1\.c\.nc\.nta r4=\[r5\],r6
1a6: 40 e8 16 4e 2e 00 ld1\.c\.nc\.nta r4=\[r5\],-35
1ac: 00 00 00 20 nop\.b 0x0
1b0: 18 20 00 0a 80 10 \[MMB\] ld1\.bias r4=\[r5\]
1b6: 40 30 14 00 25 00 ld1\.bias r4=\[r5\],r6
1bc: 00 00 00 20 nop\.b 0x0
1c0: 18 20 a8 0b 81 16 \[MMB\] ld1\.bias r4=\[r5\],-22
1c6: 40 00 14 04 21 00 ld1\.bias\.nt1 r4=\[r5\]
1cc: 00 00 00 20 nop\.b 0x0
1d0: 18 20 18 0a 82 12 \[MMB\] ld1\.bias\.nt1 r4=\[r5\],r6
1d6: 40 b8 17 06 2d 00 ld1\.bias\.nt1 r4=\[r5\],-9
1dc: 00 00 00 20 nop\.b 0x0
1e0: 18 20 00 0a 86 10 \[MMB\] ld1\.bias\.nta r4=\[r5\]
1e6: 40 30 14 0c 25 00 ld1\.bias\.nta r4=\[r5\],r6
1ec: 00 00 00 20 nop\.b 0x0
1f0: 18 20 10 0a 86 14 \[MMB\] ld1\.bias\.nta r4=\[r5\],4
1f6: 40 00 14 40 21 00 ld1\.acq r4=\[r5\]
1fc: 00 00 00 20 nop\.b 0x0
200: 18 20 18 0a a0 12 \[MMB\] ld1\.acq r4=\[r5\],r6
206: 40 88 14 40 29 00 ld1\.acq r4=\[r5\],17
20c: 00 00 00 20 nop\.b 0x0
210: 18 20 00 0a a2 10 \[MMB\] ld1\.acq\.nt1 r4=\[r5\]
216: 40 30 14 44 25 00 ld1\.acq\.nt1 r4=\[r5\],r6
21c: 00 00 00 20 nop\.b 0x0
220: 18 20 78 0a a2 14 \[MMB\] ld1\.acq\.nt1 r4=\[r5\],30
226: 40 00 14 4c 21 00 ld1\.acq\.nta r4=\[r5\]
22c: 00 00 00 20 nop\.b 0x0
230: 18 20 18 0a a6 12 \[MMB\] ld1\.acq\.nta r4=\[r5\],r6
236: 40 58 15 4c 29 00 ld1\.acq\.nta r4=\[r5\],43
23c: 00 00 00 20 nop\.b 0x0
240: 18 20 00 0a 40 11 \[MMB\] ld1\.c\.clr\.acq r4=\[r5\]
246: 40 30 14 80 26 00 ld1\.c\.clr\.acq r4=\[r5\],r6
24c: 00 00 00 20 nop\.b 0x0
250: 18 20 e0 0a 40 15 \[MMB\] ld1\.c\.clr\.acq r4=\[r5\],56
256: 40 00 14 84 22 00 ld1\.c\.clr\.acq\.nt1 r4=\[r5\]
25c: 00 00 00 20 nop\.b 0x0
260: 18 20 18 0a 42 13 \[MMB\] ld1\.c\.clr\.acq\.nt1 r4=\[r5\],r6
266: 40 28 16 84 2a 00 ld1\.c\.clr\.acq\.nt1 r4=\[r5\],69
26c: 00 00 00 20 nop\.b 0x0
270: 18 20 00 0a 46 11 \[MMB\] ld1\.c\.clr\.acq\.nta r4=\[r5\]
276: 40 30 14 8c 26 00 ld1\.c\.clr\.acq\.nta r4=\[r5\],r6
27c: 00 00 00 20 nop\.b 0x0
280: 18 20 48 0b 46 15 \[MMB\] ld1\.c\.clr\.acq\.nta r4=\[r5\],82
286: 40 00 14 10 20 00 ld2 r4=\[r5\]
28c: 00 00 00 20 nop\.b 0x0
290: 18 20 18 0a 08 12 \[MMB\] ld2 r4=\[r5\],r6
296: 40 f8 16 10 28 00 ld2 r4=\[r5\],95
29c: 00 00 00 20 nop\.b 0x0
2a0: 18 20 00 0a 0a 10 \[MMB\] ld2\.nt1 r4=\[r5\]
2a6: 40 30 14 14 24 00 ld2\.nt1 r4=\[r5\],r6
2ac: 00 00 00 20 nop\.b 0x0
2b0: 18 20 b0 0b 0a 14 \[MMB\] ld2\.nt1 r4=\[r5\],108
2b6: 40 00 14 1c 20 00 ld2\.nta r4=\[r5\]
2bc: 00 00 00 20 nop\.b 0x0
2c0: 18 20 18 0a 0e 12 \[MMB\] ld2\.nta r4=\[r5\],r6
2c6: 40 c8 17 1c 28 00 ld2\.nta r4=\[r5\],121
2cc: 00 00 00 20 nop\.b 0x0
2d0: 18 20 00 0a 28 10 \[MMB\] ld2\.s r4=\[r5\]
2d6: 40 30 14 50 24 00 ld2\.s r4=\[r5\],r6
2dc: 00 00 00 20 nop\.b 0x0
2e0: 18 20 18 0a 29 14 \[MMB\] ld2\.s r4=\[r5\],134
2e6: 40 00 14 54 20 00 ld2\.s\.nt1 r4=\[r5\]
2ec: 00 00 00 20 nop\.b 0x0
2f0: 18 20 18 0a 2a 12 \[MMB\] ld2\.s\.nt1 r4=\[r5\],r6
2f6: 40 98 14 56 28 00 ld2\.s\.nt1 r4=\[r5\],147
2fc: 00 00 00 20 nop\.b 0x0
300: 18 20 00 0a 2e 10 \[MMB\] ld2\.s\.nta r4=\[r5\]
306: 40 30 14 5c 24 00 ld2\.s\.nta r4=\[r5\],r6
30c: 00 00 00 20 nop\.b 0x0
310: 18 20 80 0a 2f 14 \[MMB\] ld2\.s\.nta r4=\[r5\],160
316: 40 00 14 90 20 00 ld2\.a r4=\[r5\]
31c: 00 00 00 20 nop\.b 0x0
320: 18 20 18 0a 48 12 \[MMB\] ld2\.a r4=\[r5\],r6
326: 40 68 15 92 28 00 ld2\.a r4=\[r5\],173
32c: 00 00 00 20 nop\.b 0x0
330: 18 20 00 0a 4a 10 \[MMB\] ld2\.a\.nt1 r4=\[r5\]
336: 40 30 14 94 24 00 ld2\.a\.nt1 r4=\[r5\],r6
33c: 00 00 00 20 nop\.b 0x0
340: 18 20 e8 0a 4b 14 \[MMB\] ld2\.a\.nt1 r4=\[r5\],186
346: 40 00 14 9c 20 00 ld2\.a\.nta r4=\[r5\]
34c: 00 00 00 20 nop\.b 0x0
350: 18 20 18 0a 4e 12 \[MMB\] ld2\.a\.nta r4=\[r5\],r6
356: 40 38 16 9e 28 00 ld2\.a\.nta r4=\[r5\],199
35c: 00 00 00 20 nop\.b 0x0
360: 18 20 00 0a 68 10 \[MMB\] ld2\.sa r4=\[r5\]
366: 40 30 14 d0 24 00 ld2\.sa r4=\[r5\],r6
36c: 00 00 00 20 nop\.b 0x0
370: 18 20 50 0b 69 14 \[MMB\] ld2\.sa r4=\[r5\],212
376: 40 00 14 d4 20 00 ld2\.sa\.nt1 r4=\[r5\]
37c: 00 00 00 20 nop\.b 0x0
380: 18 20 18 0a 6a 12 \[MMB\] ld2\.sa\.nt1 r4=\[r5\],r6
386: 40 08 17 d6 28 00 ld2\.sa\.nt1 r4=\[r5\],225
38c: 00 00 00 20 nop\.b 0x0
390: 18 20 00 0a 6e 10 \[MMB\] ld2\.sa\.nta r4=\[r5\]
396: 40 30 14 dc 24 00 ld2\.sa\.nta r4=\[r5\],r6
39c: 00 00 00 20 nop\.b 0x0
3a0: 18 20 b8 0b 6f 14 \[MMB\] ld2\.sa\.nta r4=\[r5\],238
3a6: 40 00 14 10 22 00 ld2\.c\.clr r4=\[r5\]
3ac: 00 00 00 20 nop\.b 0x0
3b0: 18 20 18 0a 08 13 \[MMB\] ld2\.c\.clr r4=\[r5\],r6
3b6: 40 d8 17 12 2a 00 ld2\.c\.clr r4=\[r5\],251
3bc: 00 00 00 20 nop\.b 0x0
3c0: 18 20 00 0a 0a 11 \[MMB\] ld2\.c\.clr\.nt1 r4=\[r5\]
3c6: 40 30 14 14 26 00 ld2\.c\.clr\.nt1 r4=\[r5\],r6
3cc: 00 00 00 20 nop\.b 0x0
3d0: 18 20 20 0a 0a 17 \[MMB\] ld2\.c\.clr\.nt1 r4=\[r5\],-248
3d6: 40 00 14 1c 22 00 ld2\.c\.clr\.nta r4=\[r5\]
3dc: 00 00 00 20 nop\.b 0x0
3e0: 18 20 18 0a 0e 13 \[MMB\] ld2\.c\.clr\.nta r4=\[r5\],r6
3e6: 40 a8 14 1c 2e 00 ld2\.c\.clr\.nta r4=\[r5\],-235
3ec: 00 00 00 20 nop\.b 0x0
3f0: 18 20 00 0a 28 11 \[MMB\] ld2\.c\.nc r4=\[r5\]
3f6: 40 30 14 50 26 00 ld2\.c\.nc r4=\[r5\],r6
3fc: 00 00 00 20 nop\.b 0x0
400: 18 20 88 0a 28 17 \[MMB\] ld2\.c\.nc r4=\[r5\],-222
406: 40 00 14 54 22 00 ld2\.c\.nc\.nt1 r4=\[r5\]
40c: 00 00 00 20 nop\.b 0x0
410: 18 20 18 0a 2a 13 \[MMB\] ld2\.c\.nc\.nt1 r4=\[r5\],r6
416: 40 78 15 54 2e 00 ld2\.c\.nc\.nt1 r4=\[r5\],-209
41c: 00 00 00 20 nop\.b 0x0
420: 18 20 00 0a 2e 11 \[MMB\] ld2\.c\.nc\.nta r4=\[r5\]
426: 40 30 14 5c 26 00 ld2\.c\.nc\.nta r4=\[r5\],r6
42c: 00 00 00 20 nop\.b 0x0
430: 18 20 f0 0a 2e 17 \[MMB\] ld2\.c\.nc\.nta r4=\[r5\],-196
436: 40 00 14 10 21 00 ld2\.bias r4=\[r5\]
43c: 00 00 00 20 nop\.b 0x0
440: 18 20 18 0a 88 12 \[MMB\] ld2\.bias r4=\[r5\],r6
446: 40 48 16 10 2d 00 ld2\.bias r4=\[r5\],-183
44c: 00 00 00 20 nop\.b 0x0
450: 18 20 00 0a 8a 10 \[MMB\] ld2\.bias\.nt1 r4=\[r5\]
456: 40 30 14 14 25 00 ld2\.bias\.nt1 r4=\[r5\],r6
45c: 00 00 00 20 nop\.b 0x0
460: 18 20 58 0b 8a 16 \[MMB\] ld2\.bias\.nt1 r4=\[r5\],-170
466: 40 00 14 1c 21 00 ld2\.bias\.nta r4=\[r5\]
46c: 00 00 00 20 nop\.b 0x0
470: 18 20 18 0a 8e 12 \[MMB\] ld2\.bias\.nta r4=\[r5\],r6
476: 40 18 17 1c 2d 00 ld2\.bias\.nta r4=\[r5\],-157
47c: 00 00 00 20 nop\.b 0x0
480: 18 20 00 0a a8 10 \[MMB\] ld2\.acq r4=\[r5\]
486: 40 30 14 50 25 00 ld2\.acq r4=\[r5\],r6
48c: 00 00 00 20 nop\.b 0x0
490: 18 20 c0 0b a8 16 \[MMB\] ld2\.acq r4=\[r5\],-144
496: 40 00 14 54 21 00 ld2\.acq\.nt1 r4=\[r5\]
49c: 00 00 00 20 nop\.b 0x0
4a0: 18 20 18 0a aa 12 \[MMB\] ld2\.acq\.nt1 r4=\[r5\],r6
4a6: 40 e8 17 54 2d 00 ld2\.acq\.nt1 r4=\[r5\],-131
4ac: 00 00 00 20 nop\.b 0x0
4b0: 18 20 00 0a ae 10 \[MMB\] ld2\.acq\.nta r4=\[r5\]
4b6: 40 30 14 5c 25 00 ld2\.acq\.nta r4=\[r5\],r6
4bc: 00 00 00 20 nop\.b 0x0
4c0: 18 20 28 0a af 16 \[MMB\] ld2\.acq\.nta r4=\[r5\],-118
4c6: 40 00 14 90 22 00 ld2\.c\.clr\.acq r4=\[r5\]
4cc: 00 00 00 20 nop\.b 0x0
4d0: 18 20 18 0a 48 13 \[MMB\] ld2\.c\.clr\.acq r4=\[r5\],r6
4d6: 40 b8 14 92 2e 00 ld2\.c\.clr\.acq r4=\[r5\],-105
4dc: 00 00 00 20 nop\.b 0x0
4e0: 18 20 00 0a 4a 11 \[MMB\] ld2\.c\.clr\.acq\.nt1 r4=\[r5\]
4e6: 40 30 14 94 26 00 ld2\.c\.clr\.acq\.nt1 r4=\[r5\],r6
4ec: 00 00 00 20 nop\.b 0x0
4f0: 18 20 90 0a 4b 17 \[MMB\] ld2\.c\.clr\.acq\.nt1 r4=\[r5\],-92
4f6: 40 00 14 9c 22 00 ld2\.c\.clr\.acq\.nta r4=\[r5\]
4fc: 00 00 00 20 nop\.b 0x0
500: 18 20 18 0a 4e 13 \[MMB\] ld2\.c\.clr\.acq\.nta r4=\[r5\],r6
506: 40 88 15 9e 2e 00 ld2\.c\.clr\.acq\.nta r4=\[r5\],-79
50c: 00 00 00 20 nop\.b 0x0
510: 18 20 00 0a 10 10 \[MMB\] ld4 r4=\[r5\]
516: 40 30 14 20 24 00 ld4 r4=\[r5\],r6
51c: 00 00 00 20 nop\.b 0x0
520: 18 20 f8 0a 11 16 \[MMB\] ld4 r4=\[r5\],-66
526: 40 00 14 24 20 00 ld4\.nt1 r4=\[r5\]
52c: 00 00 00 20 nop\.b 0x0
530: 18 20 18 0a 12 12 \[MMB\] ld4\.nt1 r4=\[r5\],r6
536: 40 58 16 26 2c 00 ld4\.nt1 r4=\[r5\],-53
53c: 00 00 00 20 nop\.b 0x0
540: 18 20 00 0a 16 10 \[MMB\] ld4\.nta r4=\[r5\]
546: 40 30 14 2c 24 00 ld4\.nta r4=\[r5\],r6
54c: 00 00 00 20 nop\.b 0x0
550: 18 20 60 0b 17 16 \[MMB\] ld4\.nta r4=\[r5\],-40
556: 40 00 14 60 20 00 ld4\.s r4=\[r5\]
55c: 00 00 00 20 nop\.b 0x0
560: 18 20 18 0a 30 12 \[MMB\] ld4\.s r4=\[r5\],r6
566: 40 28 17 62 2c 00 ld4\.s r4=\[r5\],-27
56c: 00 00 00 20 nop\.b 0x0
570: 18 20 00 0a 32 10 \[MMB\] ld4\.s\.nt1 r4=\[r5\]
576: 40 30 14 64 24 00 ld4\.s\.nt1 r4=\[r5\],r6
57c: 00 00 00 20 nop\.b 0x0
580: 18 20 c8 0b 33 16 \[MMB\] ld4\.s\.nt1 r4=\[r5\],-14
586: 40 00 14 6c 20 00 ld4\.s\.nta r4=\[r5\]
58c: 00 00 00 20 nop\.b 0x0
590: 18 20 18 0a 36 12 \[MMB\] ld4\.s\.nta r4=\[r5\],r6
596: 40 f8 17 6e 2c 00 ld4\.s\.nta r4=\[r5\],-1
59c: 00 00 00 20 nop\.b 0x0
5a0: 18 20 00 0a 50 10 \[MMB\] ld4\.a r4=\[r5\]
5a6: 40 30 14 a0 24 00 ld4\.a r4=\[r5\],r6
5ac: 00 00 00 20 nop\.b 0x0
5b0: 18 20 30 0a 50 14 \[MMB\] ld4\.a r4=\[r5\],12
5b6: 40 00 14 a4 20 00 ld4\.a\.nt1 r4=\[r5\]
5bc: 00 00 00 20 nop\.b 0x0
5c0: 18 20 18 0a 52 12 \[MMB\] ld4\.a\.nt1 r4=\[r5\],r6
5c6: 40 c8 14 a4 28 00 ld4\.a\.nt1 r4=\[r5\],25
5cc: 00 00 00 20 nop\.b 0x0
5d0: 18 20 00 0a 56 10 \[MMB\] ld4\.a\.nta r4=\[r5\]
5d6: 40 30 14 ac 24 00 ld4\.a\.nta r4=\[r5\],r6
5dc: 00 00 00 20 nop\.b 0x0
5e0: 18 20 98 0a 56 14 \[MMB\] ld4\.a\.nta r4=\[r5\],38
5e6: 40 00 14 e0 20 00 ld4\.sa r4=\[r5\]
5ec: 00 00 00 20 nop\.b 0x0
5f0: 18 20 18 0a 70 12 \[MMB\] ld4\.sa r4=\[r5\],r6
5f6: 40 98 15 e0 28 00 ld4\.sa r4=\[r5\],51
5fc: 00 00 00 20 nop\.b 0x0
600: 18 20 00 0a 72 10 \[MMB\] ld4\.sa\.nt1 r4=\[r5\]
606: 40 30 14 e4 24 00 ld4\.sa\.nt1 r4=\[r5\],r6
60c: 00 00 00 20 nop\.b 0x0
610: 18 20 00 0b 72 14 \[MMB\] ld4\.sa\.nt1 r4=\[r5\],64
616: 40 00 14 ec 20 00 ld4\.sa\.nta r4=\[r5\]
61c: 00 00 00 20 nop\.b 0x0
620: 18 20 18 0a 76 12 \[MMB\] ld4\.sa\.nta r4=\[r5\],r6
626: 40 68 16 ec 28 00 ld4\.sa\.nta r4=\[r5\],77
62c: 00 00 00 20 nop\.b 0x0
630: 18 20 00 0a 10 11 \[MMB\] ld4\.c\.clr r4=\[r5\]
636: 40 30 14 20 26 00 ld4\.c\.clr r4=\[r5\],r6
63c: 00 00 00 20 nop\.b 0x0
640: 18 20 68 0b 10 15 \[MMB\] ld4\.c\.clr r4=\[r5\],90
646: 40 00 14 24 22 00 ld4\.c\.clr\.nt1 r4=\[r5\]
64c: 00 00 00 20 nop\.b 0x0
650: 18 20 18 0a 12 13 \[MMB\] ld4\.c\.clr\.nt1 r4=\[r5\],r6
656: 40 38 17 24 2a 00 ld4\.c\.clr\.nt1 r4=\[r5\],103
65c: 00 00 00 20 nop\.b 0x0
660: 18 20 00 0a 16 11 \[MMB\] ld4\.c\.clr\.nta r4=\[r5\]
666: 40 30 14 2c 26 00 ld4\.c\.clr\.nta r4=\[r5\],r6
66c: 00 00 00 20 nop\.b 0x0
670: 18 20 d0 0b 16 15 \[MMB\] ld4\.c\.clr\.nta r4=\[r5\],116
676: 40 00 14 60 22 00 ld4\.c\.nc r4=\[r5\]
67c: 00 00 00 20 nop\.b 0x0
680: 18 20 18 0a 30 13 \[MMB\] ld4\.c\.nc r4=\[r5\],r6
686: 40 08 14 62 2a 00 ld4\.c\.nc r4=\[r5\],129
68c: 00 00 00 20 nop\.b 0x0
690: 18 20 00 0a 32 11 \[MMB\] ld4\.c\.nc\.nt1 r4=\[r5\]
696: 40 30 14 64 26 00 ld4\.c\.nc\.nt1 r4=\[r5\],r6
69c: 00 00 00 20 nop\.b 0x0
6a0: 18 20 38 0a 33 15 \[MMB\] ld4\.c\.nc\.nt1 r4=\[r5\],142
6a6: 40 00 14 6c 22 00 ld4\.c\.nc\.nta r4=\[r5\]
6ac: 00 00 00 20 nop\.b 0x0
6b0: 18 20 18 0a 36 13 \[MMB\] ld4\.c\.nc\.nta r4=\[r5\],r6
6b6: 40 d8 14 6e 2a 00 ld4\.c\.nc\.nta r4=\[r5\],155
6bc: 00 00 00 20 nop\.b 0x0
6c0: 18 20 00 0a 90 10 \[MMB\] ld4\.bias r4=\[r5\]
6c6: 40 30 14 20 25 00 ld4\.bias r4=\[r5\],r6
6cc: 00 00 00 20 nop\.b 0x0
6d0: 18 20 a0 0a 91 14 \[MMB\] ld4\.bias r4=\[r5\],168
6d6: 40 00 14 24 21 00 ld4\.bias\.nt1 r4=\[r5\]
6dc: 00 00 00 20 nop\.b 0x0
6e0: 18 20 18 0a 92 12 \[MMB\] ld4\.bias\.nt1 r4=\[r5\],r6
6e6: 40 a8 15 26 29 00 ld4\.bias\.nt1 r4=\[r5\],181
6ec: 00 00 00 20 nop\.b 0x0
6f0: 18 20 00 0a 96 10 \[MMB\] ld4\.bias\.nta r4=\[r5\]
6f6: 40 30 14 2c 25 00 ld4\.bias\.nta r4=\[r5\],r6
6fc: 00 00 00 20 nop\.b 0x0
700: 18 20 08 0b 97 14 \[MMB\] ld4\.bias\.nta r4=\[r5\],194
706: 40 00 14 60 21 00 ld4\.acq r4=\[r5\]
70c: 00 00 00 20 nop\.b 0x0
710: 18 20 18 0a b0 12 \[MMB\] ld4\.acq r4=\[r5\],r6
716: 40 78 16 62 29 00 ld4\.acq r4=\[r5\],207
71c: 00 00 00 20 nop\.b 0x0
720: 18 20 00 0a b2 10 \[MMB\] ld4\.acq\.nt1 r4=\[r5\]
726: 40 30 14 64 25 00 ld4\.acq\.nt1 r4=\[r5\],r6
72c: 00 00 00 20 nop\.b 0x0
730: 18 20 70 0b b3 14 \[MMB\] ld4\.acq\.nt1 r4=\[r5\],220
736: 40 00 14 6c 21 00 ld4\.acq\.nta r4=\[r5\]
73c: 00 00 00 20 nop\.b 0x0
740: 18 20 18 0a b6 12 \[MMB\] ld4\.acq\.nta r4=\[r5\],r6
746: 40 48 17 6e 29 00 ld4\.acq\.nta r4=\[r5\],233
74c: 00 00 00 20 nop\.b 0x0
750: 18 20 00 0a 50 11 \[MMB\] ld4\.c\.clr\.acq r4=\[r5\]
756: 40 30 14 a0 26 00 ld4\.c\.clr\.acq r4=\[r5\],r6
75c: 00 00 00 20 nop\.b 0x0
760: 18 20 d8 0b 51 15 \[MMB\] ld4\.c\.clr\.acq r4=\[r5\],246
766: 40 00 14 a4 22 00 ld4\.c\.clr\.acq\.nt1 r4=\[r5\]
76c: 00 00 00 20 nop\.b 0x0
770: 18 20 18 0a 52 13 \[MMB\] ld4\.c\.clr\.acq\.nt1 r4=\[r5\],r6
776: 40 18 14 a4 2e 00 ld4\.c\.clr\.acq\.nt1 r4=\[r5\],-253
77c: 00 00 00 20 nop\.b 0x0
780: 18 20 00 0a 56 11 \[MMB\] ld4\.c\.clr\.acq\.nta r4=\[r5\]
786: 40 30 14 ac 26 00 ld4\.c\.clr\.acq\.nta r4=\[r5\],r6
78c: 00 00 00 20 nop\.b 0x0
790: 18 20 40 0a 56 17 \[MMB\] ld4\.c\.clr\.acq\.nta r4=\[r5\],-240
796: 40 00 14 30 20 00 ld8 r4=\[r5\]
79c: 00 00 00 20 nop\.b 0x0
7a0: 18 20 18 0a 18 12 \[MMB\] ld8 r4=\[r5\],r6
7a6: 40 e8 14 30 2c 00 ld8 r4=\[r5\],-227
7ac: 00 00 00 20 nop\.b 0x0
7b0: 18 20 00 0a 1a 10 \[MMB\] ld8\.nt1 r4=\[r5\]
7b6: 40 30 14 34 24 00 ld8\.nt1 r4=\[r5\],r6
7bc: 00 00 00 20 nop\.b 0x0
7c0: 18 20 a8 0a 1a 16 \[MMB\] ld8\.nt1 r4=\[r5\],-214
7c6: 40 00 14 3c 20 00 ld8\.nta r4=\[r5\]
7cc: 00 00 00 20 nop\.b 0x0
7d0: 18 20 18 0a 1e 12 \[MMB\] ld8\.nta r4=\[r5\],r6
7d6: 40 b8 15 3c 2c 00 ld8\.nta r4=\[r5\],-201
7dc: 00 00 00 20 nop\.b 0x0
7e0: 18 20 00 0a 38 10 \[MMB\] ld8\.s r4=\[r5\]
7e6: 40 30 14 70 24 00 ld8\.s r4=\[r5\],r6
7ec: 00 00 00 20 nop\.b 0x0
7f0: 18 20 10 0b 38 16 \[MMB\] ld8\.s r4=\[r5\],-188
7f6: 40 00 14 74 20 00 ld8\.s\.nt1 r4=\[r5\]
7fc: 00 00 00 20 nop\.b 0x0
800: 18 20 18 0a 3a 12 \[MMB\] ld8\.s\.nt1 r4=\[r5\],r6
806: 40 88 16 74 2c 00 ld8\.s\.nt1 r4=\[r5\],-175
80c: 00 00 00 20 nop\.b 0x0
810: 18 20 00 0a 3e 10 \[MMB\] ld8\.s\.nta r4=\[r5\]
816: 40 30 14 7c 24 00 ld8\.s\.nta r4=\[r5\],r6
81c: 00 00 00 20 nop\.b 0x0
820: 18 20 78 0b 3e 16 \[MMB\] ld8\.s\.nta r4=\[r5\],-162
826: 40 00 14 b0 20 00 ld8\.a r4=\[r5\]
82c: 00 00 00 20 nop\.b 0x0
830: 18 20 18 0a 58 12 \[MMB\] ld8\.a r4=\[r5\],r6
836: 40 58 17 b0 2c 00 ld8\.a r4=\[r5\],-149
83c: 00 00 00 20 nop\.b 0x0
840: 18 20 00 0a 5a 10 \[MMB\] ld8\.a\.nt1 r4=\[r5\]
846: 40 30 14 b4 24 00 ld8\.a\.nt1 r4=\[r5\],r6
84c: 00 00 00 20 nop\.b 0x0
850: 18 20 e0 0b 5a 16 \[MMB\] ld8\.a\.nt1 r4=\[r5\],-136
856: 40 00 14 bc 20 00 ld8\.a\.nta r4=\[r5\]
85c: 00 00 00 20 nop\.b 0x0
860: 18 20 18 0a 5e 12 \[MMB\] ld8\.a\.nta r4=\[r5\],r6
866: 40 28 14 be 2c 00 ld8\.a\.nta r4=\[r5\],-123
86c: 00 00 00 20 nop\.b 0x0
870: 18 20 00 0a 78 10 \[MMB\] ld8\.sa r4=\[r5\]
876: 40 30 14 f0 24 00 ld8\.sa r4=\[r5\],r6
87c: 00 00 00 20 nop\.b 0x0
880: 18 20 48 0a 79 16 \[MMB\] ld8\.sa r4=\[r5\],-110
886: 40 00 14 f4 20 00 ld8\.sa\.nt1 r4=\[r5\]
88c: 00 00 00 20 nop\.b 0x0
890: 18 20 18 0a 7a 12 \[MMB\] ld8\.sa\.nt1 r4=\[r5\],r6
896: 40 f8 14 f6 2c 00 ld8\.sa\.nt1 r4=\[r5\],-97
89c: 00 00 00 20 nop\.b 0x0
8a0: 18 20 00 0a 7e 10 \[MMB\] ld8\.sa\.nta r4=\[r5\]
8a6: 40 30 14 fc 24 00 ld8\.sa\.nta r4=\[r5\],r6
8ac: 00 00 00 20 nop\.b 0x0
8b0: 18 20 b0 0a 7f 16 \[MMB\] ld8\.sa\.nta r4=\[r5\],-84
8b6: 40 00 14 30 22 00 ld8\.c\.clr r4=\[r5\]
8bc: 00 00 00 20 nop\.b 0x0
8c0: 18 20 18 0a 18 13 \[MMB\] ld8\.c\.clr r4=\[r5\],r6
8c6: 40 c8 15 32 2e 00 ld8\.c\.clr r4=\[r5\],-71
8cc: 00 00 00 20 nop\.b 0x0
8d0: 18 20 00 0a 1a 11 \[MMB\] ld8\.c\.clr\.nt1 r4=\[r5\]
8d6: 40 30 14 34 26 00 ld8\.c\.clr\.nt1 r4=\[r5\],r6
8dc: 00 00 00 20 nop\.b 0x0
8e0: 18 20 18 0b 1b 17 \[MMB\] ld8\.c\.clr\.nt1 r4=\[r5\],-58
8e6: 40 00 14 3c 22 00 ld8\.c\.clr\.nta r4=\[r5\]
8ec: 00 00 00 20 nop\.b 0x0
8f0: 18 20 18 0a 1e 13 \[MMB\] ld8\.c\.clr\.nta r4=\[r5\],r6
8f6: 40 98 16 3e 2e 00 ld8\.c\.clr\.nta r4=\[r5\],-45
8fc: 00 00 00 20 nop\.b 0x0
900: 18 20 00 0a 38 11 \[MMB\] ld8\.c\.nc r4=\[r5\]
906: 40 30 14 70 26 00 ld8\.c\.nc r4=\[r5\],r6
90c: 00 00 00 20 nop\.b 0x0
910: 18 20 80 0b 39 17 \[MMB\] ld8\.c\.nc r4=\[r5\],-32
916: 40 00 14 74 22 00 ld8\.c\.nc\.nt1 r4=\[r5\]
91c: 00 00 00 20 nop\.b 0x0
920: 18 20 18 0a 3a 13 \[MMB\] ld8\.c\.nc\.nt1 r4=\[r5\],r6
926: 40 68 17 76 2e 00 ld8\.c\.nc\.nt1 r4=\[r5\],-19
92c: 00 00 00 20 nop\.b 0x0
930: 18 20 00 0a 3e 11 \[MMB\] ld8\.c\.nc\.nta r4=\[r5\]
936: 40 30 14 7c 26 00 ld8\.c\.nc\.nta r4=\[r5\],r6
93c: 00 00 00 20 nop\.b 0x0
940: 18 20 e8 0b 3f 17 \[MMB\] ld8\.c\.nc\.nta r4=\[r5\],-6
946: 40 00 14 30 21 00 ld8\.bias r4=\[r5\]
94c: 00 00 00 20 nop\.b 0x0
950: 18 20 18 0a 98 12 \[MMB\] ld8\.bias r4=\[r5\],r6
956: 40 38 14 30 29 00 ld8\.bias r4=\[r5\],7
95c: 00 00 00 20 nop\.b 0x0
960: 18 20 00 0a 9a 10 \[MMB\] ld8\.bias\.nt1 r4=\[r5\]
966: 40 30 14 34 25 00 ld8\.bias\.nt1 r4=\[r5\],r6
96c: 00 00 00 20 nop\.b 0x0
970: 18 20 50 0a 9a 14 \[MMB\] ld8\.bias\.nt1 r4=\[r5\],20
976: 40 00 14 3c 21 00 ld8\.bias\.nta r4=\[r5\]
97c: 00 00 00 20 nop\.b 0x0
980: 18 20 18 0a 9e 12 \[MMB\] ld8\.bias\.nta r4=\[r5\],r6
986: 40 08 15 3c 29 00 ld8\.bias\.nta r4=\[r5\],33
98c: 00 00 00 20 nop\.b 0x0
990: 18 20 00 0a b8 10 \[MMB\] ld8\.acq r4=\[r5\]
996: 40 30 14 70 25 00 ld8\.acq r4=\[r5\],r6
99c: 00 00 00 20 nop\.b 0x0
9a0: 18 20 b8 0a b8 14 \[MMB\] ld8\.acq r4=\[r5\],46
9a6: 40 00 14 74 21 00 ld8\.acq\.nt1 r4=\[r5\]
9ac: 00 00 00 20 nop\.b 0x0
9b0: 18 20 18 0a ba 12 \[MMB\] ld8\.acq\.nt1 r4=\[r5\],r6
9b6: 40 d8 15 74 29 00 ld8\.acq\.nt1 r4=\[r5\],59
9bc: 00 00 00 20 nop\.b 0x0
9c0: 18 20 00 0a be 10 \[MMB\] ld8\.acq\.nta r4=\[r5\]
9c6: 40 30 14 7c 25 00 ld8\.acq\.nta r4=\[r5\],r6
9cc: 00 00 00 20 nop\.b 0x0
9d0: 18 20 20 0b be 14 \[MMB\] ld8\.acq\.nta r4=\[r5\],72
9d6: 40 00 14 b0 22 00 ld8\.c\.clr\.acq r4=\[r5\]
9dc: 00 00 00 20 nop\.b 0x0
9e0: 18 20 18 0a 58 13 \[MMB\] ld8\.c\.clr\.acq r4=\[r5\],r6
9e6: 40 a8 16 b0 2a 00 ld8\.c\.clr\.acq r4=\[r5\],85
9ec: 00 00 00 20 nop\.b 0x0
9f0: 18 20 00 0a 5a 11 \[MMB\] ld8\.c\.clr\.acq\.nt1 r4=\[r5\]
9f6: 40 30 14 b4 26 00 ld8\.c\.clr\.acq\.nt1 r4=\[r5\],r6
9fc: 00 00 00 20 nop\.b 0x0
a00: 18 20 88 0b 5a 15 \[MMB\] ld8\.c\.clr\.acq\.nt1 r4=\[r5\],98
a06: 40 00 14 bc 22 00 ld8\.c\.clr\.acq\.nta r4=\[r5\]
a0c: 00 00 00 20 nop\.b 0x0
a10: 18 20 18 0a 5e 13 \[MMB\] ld8\.c\.clr\.acq\.nta r4=\[r5\],r6
a16: 40 78 17 bc 2a 00 ld8\.c\.clr\.acq\.nta r4=\[r5\],111
a1c: 00 00 00 20 nop\.b 0x0
a20: 18 20 00 0a d8 10 \[MMB\] ld8\.fill r4=\[r5\]
a26: 40 30 14 b0 25 00 ld8\.fill r4=\[r5\],r6
a2c: 00 00 00 20 nop\.b 0x0
a30: 18 20 f0 0b d8 14 \[MMB\] ld8\.fill r4=\[r5\],124
a36: 40 00 14 b4 21 00 ld8\.fill\.nt1 r4=\[r5\]
a3c: 00 00 00 20 nop\.b 0x0
a40: 18 20 18 0a da 12 \[MMB\] ld8\.fill\.nt1 r4=\[r5\],r6
a46: 40 48 14 b6 29 00 ld8\.fill\.nt1 r4=\[r5\],137
a4c: 00 00 00 20 nop\.b 0x0
a50: 18 20 00 0a de 10 \[MMB\] ld8\.fill\.nta r4=\[r5\]
a56: 40 30 14 bc 25 00 ld8\.fill\.nta r4=\[r5\],r6
a5c: 00 00 00 20 nop\.b 0x0
a60: 18 20 58 0a df 14 \[MMB\] ld8\.fill\.nta r4=\[r5\],150
a66: 00 28 10 00 23 00 st1 \[r4\]=r5
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a70: 18 18 15 08 81 15 \[MMB\] st1 \[r4\]=r5,163
a76: 00 28 10 0c 23 00 st1\.nta \[r4\]=r5
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a80: 18 80 15 08 87 15 \[MMB\] st1\.nta \[r4\]=r5,176
a86: 00 28 10 10 23 00 st2 \[r4\]=r5
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aa6: 00 28 10 20 23 00 st4 \[r4\]=r5
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ab6: 00 28 10 2c 23 00 st4\.nta \[r4\]=r5
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ac6: 00 28 10 30 23 00 st8 \[r4\]=r5
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ad6: 00 28 10 3c 23 00 st8\.nta \[r4\]=r5
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ae0: 18 f0 17 08 9f 15 \[MMB\] st8\.nta \[r4\]=r5,254
ae6: 00 28 10 40 23 00 st1\.rel \[r4\]=r5
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af6: 00 28 10 4c 23 00 st1\.rel\.nta \[r4\]=r5
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b00: 18 c0 14 08 a6 17 \[MMB\] st1\.rel\.nta \[r4\]=r5,-232
b06: 00 28 10 50 23 00 st2\.rel \[r4\]=r5
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b10: 18 28 15 08 a8 17 \[MMB\] st2\.rel \[r4\]=r5,-219
b16: 00 28 10 5c 23 00 st2\.rel\.nta \[r4\]=r5
b1c: 00 00 00 20 nop\.b 0x0
b20: 18 90 15 08 ae 17 \[MMB\] st2\.rel\.nta \[r4\]=r5,-206
b26: 00 28 10 60 23 00 st4\.rel \[r4\]=r5
b2c: 00 00 00 20 nop\.b 0x0
b30: 18 f8 15 08 b0 17 \[MMB\] st4\.rel \[r4\]=r5,-193
b36: 00 28 10 6c 23 00 st4\.rel\.nta \[r4\]=r5
b3c: 00 00 00 20 nop\.b 0x0
b40: 18 60 16 08 b6 17 \[MMB\] st4\.rel\.nta \[r4\]=r5,-180
b46: 00 28 10 70 23 00 st8\.rel \[r4\]=r5
b4c: 00 00 00 20 nop\.b 0x0
b50: 18 c8 16 08 b8 17 \[MMB\] st8\.rel \[r4\]=r5,-167
b56: 00 28 10 7c 23 00 st8\.rel\.nta \[r4\]=r5
b5c: 00 00 00 20 nop\.b 0x0
b60: 18 30 17 08 be 17 \[MMB\] st8\.rel\.nta \[r4\]=r5,-154
b66: 00 28 10 b0 23 00 st8\.spill \[r4\]=r5
b6c: 00 00 00 20 nop\.b 0x0
b70: 18 98 17 08 d8 17 \[MMB\] st8\.spill \[r4\]=r5,-141
b76: 00 28 10 bc 23 00 st8\.spill\.nta \[r4\]=r5
b7c: 00 00 00 20 nop\.b 0x0
b80: 18 00 14 08 df 17 \[MMB\] st8\.spill\.nta \[r4\]=r5,-128
b86: 40 00 14 20 30 00 ldfs f4=\[r5\]
b8c: 00 00 00 20 nop\.b 0x0
b90: 18 20 18 0a 10 1a \[MMB\] ldfs f4=\[r5\],r6
b96: 40 68 14 22 3c 00 ldfs f4=\[r5\],-115
b9c: 00 00 00 20 nop\.b 0x0
ba0: 18 20 00 0a 12 18 \[MMB\] ldfs\.nt1 f4=\[r5\]
ba6: 40 30 14 24 34 00 ldfs\.nt1 f4=\[r5\],r6
bac: 00 00 00 20 nop\.b 0x0
bb0: 18 20 68 0a 13 1e \[MMB\] ldfs\.nt1 f4=\[r5\],-102
bb6: 40 00 14 2c 30 00 ldfs\.nta f4=\[r5\]
bbc: 00 00 00 20 nop\.b 0x0
bc0: 18 20 18 0a 16 1a \[MMB\] ldfs\.nta f4=\[r5\],r6
bc6: 40 38 15 2e 3c 00 ldfs\.nta f4=\[r5\],-89
bcc: 00 00 00 20 nop\.b 0x0
bd0: 18 20 00 0a 30 18 \[MMB\] ldfs\.s f4=\[r5\]
bd6: 40 30 14 60 34 00 ldfs\.s f4=\[r5\],r6
bdc: 00 00 00 20 nop\.b 0x0
be0: 18 20 d0 0a 31 1e \[MMB\] ldfs\.s f4=\[r5\],-76
be6: 40 00 14 64 30 00 ldfs\.s\.nt1 f4=\[r5\]
bec: 00 00 00 20 nop\.b 0x0
bf0: 18 20 18 0a 32 1a \[MMB\] ldfs\.s\.nt1 f4=\[r5\],r6
bf6: 40 08 16 66 3c 00 ldfs\.s\.nt1 f4=\[r5\],-63
bfc: 00 00 00 20 nop\.b 0x0
c00: 18 20 00 0a 36 18 \[MMB\] ldfs\.s\.nta f4=\[r5\]
c06: 40 30 14 6c 34 00 ldfs\.s\.nta f4=\[r5\],r6
c0c: 00 00 00 20 nop\.b 0x0
c10: 18 20 38 0b 37 1e \[MMB\] ldfs\.s\.nta f4=\[r5\],-50
c16: 40 00 14 a0 30 00 ldfs\.a f4=\[r5\]
c1c: 00 00 00 20 nop\.b 0x0
c20: 18 20 18 0a 50 1a \[MMB\] ldfs\.a f4=\[r5\],r6
c26: 40 d8 16 a2 3c 00 ldfs\.a f4=\[r5\],-37
c2c: 00 00 00 20 nop\.b 0x0
c30: 18 20 00 0a 52 18 \[MMB\] ldfs\.a\.nt1 f4=\[r5\]
c36: 40 30 14 a4 34 00 ldfs\.a\.nt1 f4=\[r5\],r6
c3c: 00 00 00 20 nop\.b 0x0
c40: 18 20 a0 0b 53 1e \[MMB\] ldfs\.a\.nt1 f4=\[r5\],-24
c46: 40 00 14 ac 30 00 ldfs\.a\.nta f4=\[r5\]
c4c: 00 00 00 20 nop\.b 0x0
c50: 18 20 18 0a 56 1a \[MMB\] ldfs\.a\.nta f4=\[r5\],r6
c56: 40 a8 17 ae 3c 00 ldfs\.a\.nta f4=\[r5\],-11
c5c: 00 00 00 20 nop\.b 0x0
c60: 18 20 00 0a 70 18 \[MMB\] ldfs\.sa f4=\[r5\]
c66: 40 30 14 e0 34 00 ldfs\.sa f4=\[r5\],r6
c6c: 00 00 00 20 nop\.b 0x0
c70: 18 20 08 0a 70 1c \[MMB\] ldfs\.sa f4=\[r5\],2
c76: 40 00 14 e4 30 00 ldfs\.sa\.nt1 f4=\[r5\]
c7c: 00 00 00 20 nop\.b 0x0
c80: 18 20 18 0a 72 1a \[MMB\] ldfs\.sa\.nt1 f4=\[r5\],r6
c86: 40 78 14 e4 38 00 ldfs\.sa\.nt1 f4=\[r5\],15
c8c: 00 00 00 20 nop\.b 0x0
c90: 18 20 00 0a 76 18 \[MMB\] ldfs\.sa\.nta f4=\[r5\]
c96: 40 30 14 ec 34 00 ldfs\.sa\.nta f4=\[r5\],r6
c9c: 00 00 00 20 nop\.b 0x0
ca0: 18 20 70 0a 76 1c \[MMB\] ldfs\.sa\.nta f4=\[r5\],28
ca6: 40 00 14 20 32 00 ldfs\.c\.clr f4=\[r5\]
cac: 00 00 00 20 nop\.b 0x0
cb0: 18 20 18 0a 10 1b \[MMB\] ldfs\.c\.clr f4=\[r5\],r6
cb6: 40 48 15 20 3a 00 ldfs\.c\.clr f4=\[r5\],41
cbc: 00 00 00 20 nop\.b 0x0
cc0: 18 20 00 0a 12 19 \[MMB\] ldfs\.c\.clr\.nt1 f4=\[r5\]
cc6: 40 30 14 24 36 00 ldfs\.c\.clr\.nt1 f4=\[r5\],r6
ccc: 00 00 00 20 nop\.b 0x0
cd0: 18 20 d8 0a 12 1d \[MMB\] ldfs\.c\.clr\.nt1 f4=\[r5\],54
cd6: 40 00 14 2c 32 00 ldfs\.c\.clr\.nta f4=\[r5\]
cdc: 00 00 00 20 nop\.b 0x0
ce0: 18 20 18 0a 16 1b \[MMB\] ldfs\.c\.clr\.nta f4=\[r5\],r6
ce6: 40 18 16 2c 3a 00 ldfs\.c\.clr\.nta f4=\[r5\],67
cec: 00 00 00 20 nop\.b 0x0
cf0: 18 20 00 0a 30 19 \[MMB\] ldfs\.c\.nc f4=\[r5\]
cf6: 40 30 14 60 36 00 ldfs\.c\.nc f4=\[r5\],r6
cfc: 00 00 00 20 nop\.b 0x0
d00: 18 20 40 0b 30 1d \[MMB\] ldfs\.c\.nc f4=\[r5\],80
d06: 40 00 14 64 32 00 ldfs\.c\.nc\.nt1 f4=\[r5\]
d0c: 00 00 00 20 nop\.b 0x0
d10: 18 20 18 0a 32 1b \[MMB\] ldfs\.c\.nc\.nt1 f4=\[r5\],r6
d16: 40 e8 16 64 3a 00 ldfs\.c\.nc\.nt1 f4=\[r5\],93
d1c: 00 00 00 20 nop\.b 0x0
d20: 18 20 00 0a 36 19 \[MMB\] ldfs\.c\.nc\.nta f4=\[r5\]
d26: 40 30 14 6c 36 00 ldfs\.c\.nc\.nta f4=\[r5\],r6
d2c: 00 00 00 20 nop\.b 0x0
d30: 18 20 a8 0b 36 1d \[MMB\] ldfs\.c\.nc\.nta f4=\[r5\],106
d36: 40 00 14 30 30 00 ldfd f4=\[r5\]
d3c: 00 00 00 20 nop\.b 0x0
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1936: 40 28 14 26 21 00 fetchadd4\.acq\.nt1 r4=\[r5\],-8
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1940: 18 20 18 0a 97 10 \[MMB\] fetchadd4\.acq\.nta r4=\[r5\],-4
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1950: 18 20 0c 0a 9b 10 \[MMB\] fetchadd8\.acq\.nt1 r4=\[r5\],1
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1970: 18 20 10 0a b7 10 \[MMB\] fetchadd4\.rel\.nta r4=\[r5\],-16
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1a9c: 00 00 00 20 nop\.b 0x0
1aa0: 18 00 00 00 01 00 \[MMB\] nop\.m 0x0
1aa6: f0 ff 1f 02 00 00 nop\.m 0x1ffff
1aac: 00 00 00 20 nop\.b 0x0
1ab0: 18 20 18 0a 38 04 \[MMB\] probe\.r r4=r5,r6
1ab6: 40 30 14 72 08 00 probe\.w r4=r5,r6
1abc: 00 00 00 20 nop\.b 0x0
1ac0: 18 20 00 0a 18 04 \[MMB\] probe\.r r4=r5,0
1ac6: 40 08 14 32 08 00 probe\.w r4=r5,1
1acc: 00 00 00 20 nop\.b 0x0
1ad0: 18 00 08 06 32 04 \[MMB\] probe\.r\.fault r3,2
1ad6: 00 18 0c 66 08 00 probe\.w\.fault r3,3
1adc: 00 00 00 20 nop\.b 0x0
1ae0: 18 00 00 06 31 04 \[MMB\] probe\.rw\.fault r3,0
1ae6: 00 00 00 02 00 00 nop\.m 0x0
1aec: 00 00 00 20 nop\.b 0x0
1af0: 0b 00 20 00 2e 04 \[MMI\] itc\.d r8;;
1af6: 00 00 00 02 00 00 nop\.m 0x0
1afc: 00 00 04 00 nop\.i 0x0;;
1b00: 0a 00 24 00 2f 04 \[MMI\] itc\.i r9;;
1b06: 40 23 01 08 00 00 sum 0x1234
1b0c: 00 00 04 00 nop\.i 0x0
1b10: 18 50 55 d5 25 00 \[MMB\] rum 0x5aaaaa
1b16: f0 ff ff 6d 04 00 ssm 0xffffff
1b1c: 00 00 00 20 nop\.b 0x0
1b20: 18 00 00 00 27 00 \[MMB\] rsm 0x400000
1b26: 00 28 10 12 08 00 ptc\.l r4,r5
1b2c: 00 00 00 20 nop\.b 0x0
1b30: 0a 00 14 08 0a 04 \[MMI\] ptc\.g r4,r5;;
1b36: 00 00 00 02 00 00 nop\.m 0x0
1b3c: 00 00 04 00 nop\.i 0x0
1b40: 0a 00 14 08 0b 04 \[MMI\] ptc\.ga r4,r5;;
1b46: 00 00 00 02 00 00 nop\.m 0x0
1b4c: 00 00 04 00 nop\.i 0x0
1b50: 18 00 14 08 0c 04 \[MMB\] ptr\.d r4,r5
1b56: 00 28 10 1a 08 00 ptr\.i r4,r5
1b5c: 00 00 00 20 nop\.b 0x0
1b60: 18 20 00 0a 1a 04 \[MMB\] thash r4=r5
1b66: 40 00 14 36 08 00 ttag r4=r5
1b6c: 00 00 00 20 nop\.b 0x0
1b70: 18 20 00 0a 1e 04 \[MMB\] tpa r4=r5
1b76: 40 00 14 3e 08 00 tak r4=r5
1b7c: 00 00 00 20 nop\.b 0x0
1b80: 18 00 00 80 01 00 \[MMB\] hint\.m 0x0
1b86: 00 00 00 03 00 00 hint\.m 0x0
1b8c: 00 00 00 20 nop\.b 0x0
1b90: 18 f8 ff 8f 01 00 \[MMB\] hint\.m 0x1ffff
1b96: 40 30 14 02 22 00 cmp8xchg16\.acq r4=\[r5\],r6,ar\.csd,ar\.ccv
1b9c: 00 00 00 20 nop\.b 0x0
1ba0: 18 20 18 0a 03 11 \[MMB\] cmp8xchg16\.acq\.nt1 r4=\[r5\],r6,ar\.csd,ar\.ccv
1ba6: 40 30 14 0e 22 00 cmp8xchg16\.acq\.nta r4=\[r5\],r6,ar\.csd,ar\.ccv
1bac: 00 00 00 20 nop\.b 0x0
1bb0: 18 20 18 0a 21 11 \[MMB\] cmp8xchg16\.rel r4=\[r5\],r6,ar\.csd,ar\.ccv
1bb6: 40 30 14 46 22 00 cmp8xchg16\.rel\.nt1 r4=\[r5\],r6,ar\.csd,ar\.ccv
1bbc: 00 00 00 20 nop\.b 0x0
1bc0: 18 20 18 0a 27 11 \[MMB\] cmp8xchg16\.rel\.nta r4=\[r5\],r6,ar\.csd,ar\.ccv
1bc6: 00 00 10 60 0c 00 fc\.i r4
1bcc: 00 00 00 20 nop\.b 0x0
1bd0: 18 20 00 0a 41 11 \[MMB\] ld16 r4,ar\.csd=\[r5\]
1bd6: 40 00 14 86 22 00 ld16\.nt1 r4,ar\.csd=\[r5\]
1bdc: 00 00 00 20 nop\.b 0x0
1be0: 18 20 00 0a 47 11 \[MMB\] ld16\.nta r4,ar\.csd=\[r5\]
1be6: 40 00 14 c2 22 00 ld16\.acq r4,ar\.csd=\[r5\]
1bec: 00 00 00 20 nop\.b 0x0
1bf0: 18 20 00 0a 63 11 \[MMB\] ld16\.acq\.nt1 r4,ar\.csd=\[r5\]
1bf6: 40 00 14 ce 22 00 ld16\.acq\.nta r4,ar\.csd=\[r5\]
1bfc: 00 00 00 20 nop\.b 0x0
1c00: 18 00 14 08 81 11 \[MMB\] st16 \[r4\]=r5,ar\.csd
1c06: 00 28 10 0e 23 00 st16\.nta \[r4\]=r5,ar\.csd
1c0c: 00 00 00 20 nop\.b 0x0
1c10: 19 00 14 08 a1 11 \[MMB\] st16\.rel \[r4\]=r5,ar\.csd
1c16: 00 28 10 4e 23 00 st16\.rel\.nta \[r4\]=r5,ar\.csd
1c1c: 00 00 00 20 nop\.b 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pseudo.s
0,0 → 1,19
_start:
alloc r8 = 0, 0, 0, 0
cmp.eq p6 = r0, r0
cmp.eq p7 = 0, r0
cmp4.eq p8 = r0, r0
cmp4.eq p9 = 0, r0
cmp8xchg16.acq r9 = [r0], r0
cmpxchg4.acq r10 = [r0], r0
fclass.m p10 = f0, @pos
fcmp.eq p11 = f0, f0
ld16 r11 = [r0]
mov pr = r0
st16 [r0] = r0
tbit.nz p12 = r0, 0
tnat.nz p13 = r0
 
# instructions added by SDM2.2:
 
tf.nz p2, p3 = 33
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-a.s
0,0 → 1,396
.text
.type _start,@function
_start:
 
add r101 = r102, r103
(p1) add r104 = r105, r106
add r107 = r108, r109, 1
(p2) add r110 = r111, r112, 1
 
adds r20 = 0, r10
(p1) adds r21 = 1, r10
adds r22 = -1, r10
adds r23 = -0x2000, r10
(p2) adds r24 = 0x1FFF, r10
 
addl r30 = 0, r1
addl r31 = 1, r1
(p1) addl r32 = -1, r1
addl r33 = -0x2000, r1
addl r34 = 0x1FFF, r1
addl r35 = -0x200000, r1
addl r36 = 0x1FFFFF, r1
 
add r11 = 0, r10
add r12 = 0x1234, r10
add r13 = 0x1234, r1
add r14 = 0x12345, r1
 
addp4 r20 = r3, r10
(p1) addp4 r21 = 1, r10
addp4 r22 = -1, r10
 
sub r101 = r102, r103
(p2) sub r110 = r111, r112, 1
sub r120 = 0, r3
sub r121 = 1, r3
sub r122 = -1, r3
sub r123 = -128, r3
sub r124 = 127, r3
 
and r8 = r9, r10
(p3) and r11 = -128, r12
 
(p4) or r8 = r9, r10
or r11 = -128, r12
 
xor r8 = r9, r10
xor r11 = -128, r12
 
andcm r8 = r9, r10
andcm r11 = -128, r12
 
shladd r8 = r30, 1, r31
shladd r9 = r30, 2, r31
shladd r10 = r30, 3, r31
shladd r11 = r30, 4, r31
 
shladdp4 r8 = r30, 1, r31
shladdp4 r9 = r30, 2, r31
shladdp4 r10 = r30, 3, r31
shladdp4 r11 = r30, 4, r31
 
padd1 r10 = r30, r31
padd1.sss r11 = r30, r31
padd1.uus r12 = r30, r31
padd1.uuu r13 = r30, r31
padd2 r14 = r30, r31
padd2.sss r15 = r30, r31
padd2.uus r16 = r30, r31
padd2.uuu r17 = r30, r31
padd4 r18 = r30, r31
 
psub1 r10 = r30, r31
psub1.sss r11 = r30, r31
psub1.uus r12 = r30, r31
psub1.uuu r13 = r30, r31
psub2 r14 = r30, r31
psub2.sss r15 = r30, r31
psub2.uus r16 = r30, r31
psub2.uuu r17 = r30, r31
psub4 r18 = r30, r31
 
pavg1 r10 = r30, r31
pavg1.raz r10 = r30, r31
pavg2 r10 = r30, r31
pavg2.raz r10 = r30, r31
 
pavgsub1 r10 = r30, r31
pavgsub2 r10 = r30, r31
 
pcmp1.eq r10 = r30, r31
pcmp2.eq r10 = r30, r31
pcmp4.eq r10 = r30, r31
pcmp1.gt r10 = r30, r31
pcmp2.gt r10 = r30, r31
pcmp4.gt r10 = r30, r31
 
pshladd2 r10 = r11, 1, r12
pshladd2 r10 = r11, 3, r12
 
pshradd2 r10 = r11, 1, r12
pshradd2 r10 = r11, 2, r12
 
cmp.eq p2, p3 = r3, r4
cmp.eq p2, p3 = 3, r4
cmp.ne p2, p3 = r3, r4
cmp.ne p2, p3 = 3, r4
cmp.lt p2, p3 = r3, r4
cmp.lt p2, p3 = 3, r4
cmp.le p2, p3 = r3, r4
cmp.le p2, p3 = 3, r4
cmp.gt p2, p3 = r3, r4
cmp.gt p2, p3 = 3, r4
cmp.ge p2, p3 = r3, r4
cmp.ge p2, p3 = 3, r4
cmp.ltu p2, p3 = r3, r4
cmp.ltu p2, p3 = 3, r4
cmp.leu p2, p3 = r3, r4
cmp.leu p2, p3 = 3, r4
cmp.gtu p2, p3 = r3, r4
cmp.gtu p2, p3 = 3, r4
cmp.geu p2, p3 = r3, r4
cmp.geu p2, p3 = 3, r4
 
cmp.eq.unc p2, p3 = r3, r4
cmp.eq.unc p2, p3 = 3, r4
cmp.ne.unc p2, p3 = r3, r4
cmp.ne.unc p2, p3 = 3, r4
cmp.lt.unc p2, p3 = r3, r4
cmp.lt.unc p2, p3 = 3, r4
cmp.le.unc p2, p3 = r3, r4
cmp.le.unc p2, p3 = 3, r4
cmp.gt.unc p2, p3 = r3, r4
cmp.gt.unc p2, p3 = 3, r4
cmp.ge.unc p2, p3 = r3, r4
cmp.ge.unc p2, p3 = 3, r4
cmp.ltu.unc p2, p3 = r3, r4
cmp.ltu.unc p2, p3 = 3, r4
cmp.leu.unc p2, p3 = r3, r4
cmp.leu.unc p2, p3 = 3, r4
cmp.gtu.unc p2, p3 = r3, r4
cmp.gtu.unc p2, p3 = 3, r4
cmp.geu.unc p2, p3 = r3, r4
cmp.geu.unc p2, p3 = 3, r4
 
cmp.eq.and p2, p3 = r3, r4
cmp.eq.and p2, p3 = 3, r4
cmp.eq.or p2, p3 = r3, r4
cmp.eq.or p2, p3 = 3, r4
cmp.eq.or.andcm p2, p3 = r3, r4
cmp.eq.or.andcm p2, p3 = 3, r4
cmp.eq.orcm p2, p3 = r3, r4
cmp.eq.orcm p2, p3 = 3, r4
cmp.eq.andcm p2, p3 = r3, r4
cmp.eq.andcm p2, p3 = 3, r4
cmp.eq.and.orcm p2, p3 = r3, r4
cmp.eq.and.orcm p2, p3 = 3, r4
 
cmp.ne.and p2, p3 = r3, r4
cmp.ne.and p2, p3 = 3, r4
cmp.ne.or p2, p3 = r3, r4
cmp.ne.or p2, p3 = 3, r4
cmp.ne.or.andcm p2, p3 = r3, r4
cmp.ne.or.andcm p2, p3 = 3, r4
cmp.ne.orcm p2, p3 = r3, r4
cmp.ne.orcm p2, p3 = 3, r4
cmp.ne.andcm p2, p3 = r3, r4
cmp.ne.andcm p2, p3 = 3, r4
cmp.ne.and.orcm p2, p3 = r3, r4
cmp.ne.and.orcm p2, p3 = 3, r4
 
cmp.eq.and p2, p3 = r0, r4
cmp.eq.and p2, p3 = r4, r0
cmp.eq.or p2, p3 = r0, r4
cmp.eq.or p2, p3 = r4, r0
cmp.eq.or.andcm p2, p3 = r0, r4
cmp.eq.or.andcm p2, p3 = r4, r0
cmp.eq.orcm p2, p3 = r0, r4
cmp.eq.orcm p2, p3 = r4, r0
cmp.eq.andcm p2, p3 = r0, r4
cmp.eq.andcm p2, p3 = r4, r0
cmp.eq.and.orcm p2, p3 = r0, r4
cmp.eq.and.orcm p2, p3 = r4, r0
 
cmp.ne.and p2, p3 = r0, r4
cmp.ne.and p2, p3 = r4, r0
cmp.ne.or p2, p3 = r0, r4
cmp.ne.or p2, p3 = r4, r0
cmp.ne.or.andcm p2, p3 = r0, r4
cmp.ne.or.andcm p2, p3 = r4, r0
cmp.ne.orcm p2, p3 = r0, r4
cmp.ne.orcm p2, p3 = r4, r0
cmp.ne.andcm p2, p3 = r0, r4
cmp.ne.andcm p2, p3 = r4, r0
cmp.ne.and.orcm p2, p3 = r0, r4
cmp.ne.and.orcm p2, p3 = r4, r0
 
cmp.lt.and p2, p3 = r0, r4
cmp.lt.and p2, p3 = r4, r0
cmp.lt.or p2, p3 = r0, r4
cmp.lt.or p2, p3 = r4, r0
cmp.lt.or.andcm p2, p3 = r0, r4
cmp.lt.or.andcm p2, p3 = r4, r0
cmp.lt.orcm p2, p3 = r0, r4
cmp.lt.orcm p2, p3 = r4, r0
cmp.lt.andcm p2, p3 = r0, r4
cmp.lt.andcm p2, p3 = r4, r0
cmp.lt.and.orcm p2, p3 = r0, r4
cmp.lt.and.orcm p2, p3 = r4, r0
 
cmp.le.and p2, p3 = r0, r4
cmp.le.and p2, p3 = r4, r0
cmp.le.or p2, p3 = r0, r4
cmp.le.or p2, p3 = r4, r0
cmp.le.or.andcm p2, p3 = r0, r4
cmp.le.or.andcm p2, p3 = r4, r0
cmp.le.orcm p2, p3 = r0, r4
cmp.le.orcm p2, p3 = r4, r0
cmp.le.andcm p2, p3 = r0, r4
cmp.le.andcm p2, p3 = r4, r0
cmp.le.and.orcm p2, p3 = r0, r4
cmp.le.and.orcm p2, p3 = r4, r0
 
cmp.gt.and p2, p3 = r0, r4
cmp.gt.and p2, p3 = r4, r0
cmp.gt.or p2, p3 = r0, r4
cmp.gt.or p2, p3 = r4, r0
cmp.gt.or.andcm p2, p3 = r0, r4
cmp.gt.or.andcm p2, p3 = r4, r0
cmp.gt.orcm p2, p3 = r0, r4
cmp.gt.orcm p2, p3 = r4, r0
cmp.gt.andcm p2, p3 = r0, r4
cmp.gt.andcm p2, p3 = r4, r0
cmp.gt.and.orcm p2, p3 = r0, r4
cmp.gt.and.orcm p2, p3 = r4, r0
 
cmp.ge.and p2, p3 = r0, r4
cmp.ge.and p2, p3 = r4, r0
cmp.ge.or p2, p3 = r0, r4
cmp.ge.or p2, p3 = r4, r0
cmp.ge.or.andcm p2, p3 = r0, r4
cmp.ge.or.andcm p2, p3 = r4, r0
cmp.ge.orcm p2, p3 = r0, r4
cmp.ge.orcm p2, p3 = r4, r0
cmp.ge.andcm p2, p3 = r0, r4
cmp.ge.andcm p2, p3 = r4, r0
cmp.ge.and.orcm p2, p3 = r0, r4
cmp.ge.and.orcm p2, p3 = r4, r0
 
cmp4.eq p2, p3 = r3, r4
cmp4.eq p2, p3 = 3, r4
cmp4.ne p2, p3 = r3, r4
cmp4.ne p2, p3 = 3, r4
cmp4.lt p2, p3 = r3, r4
cmp4.lt p2, p3 = 3, r4
cmp4.le p2, p3 = r3, r4
cmp4.le p2, p3 = 3, r4
cmp4.gt p2, p3 = r3, r4
cmp4.gt p2, p3 = 3, r4
cmp4.ge p2, p3 = r3, r4
cmp4.ge p2, p3 = 3, r4
cmp4.ltu p2, p3 = r3, r4
cmp4.ltu p2, p3 = 3, r4
cmp4.leu p2, p3 = r3, r4
cmp4.leu p2, p3 = 3, r4
cmp4.gtu p2, p3 = r3, r4
cmp4.gtu p2, p3 = 3, r4
cmp4.geu p2, p3 = r3, r4
cmp4.geu p2, p3 = 3, r4
 
cmp4.eq.unc p2, p3 = r3, r4
cmp4.eq.unc p2, p3 = 3, r4
cmp4.ne.unc p2, p3 = r3, r4
cmp4.ne.unc p2, p3 = 3, r4
cmp4.lt.unc p2, p3 = r3, r4
cmp4.lt.unc p2, p3 = 3, r4
cmp4.le.unc p2, p3 = r3, r4
cmp4.le.unc p2, p3 = 3, r4
cmp4.gt.unc p2, p3 = r3, r4
cmp4.gt.unc p2, p3 = 3, r4
cmp4.ge.unc p2, p3 = r3, r4
cmp4.ge.unc p2, p3 = 3, r4
cmp4.ltu.unc p2, p3 = r3, r4
cmp4.ltu.unc p2, p3 = 3, r4
cmp4.leu.unc p2, p3 = r3, r4
cmp4.leu.unc p2, p3 = 3, r4
cmp4.gtu.unc p2, p3 = r3, r4
cmp4.gtu.unc p2, p3 = 3, r4
cmp4.geu.unc p2, p3 = r3, r4
cmp4.geu.unc p2, p3 = 3, r4
 
cmp4.eq.and p2, p3 = r3, r4
cmp4.eq.and p2, p3 = 3, r4
cmp4.eq.or p2, p3 = r3, r4
cmp4.eq.or p2, p3 = 3, r4
cmp4.eq.or.andcm p2, p3 = r3, r4
cmp4.eq.or.andcm p2, p3 = 3, r4
cmp4.eq.orcm p2, p3 = r3, r4
cmp4.eq.orcm p2, p3 = 3, r4
cmp4.eq.andcm p2, p3 = r3, r4
cmp4.eq.andcm p2, p3 = 3, r4
cmp4.eq.and.orcm p2, p3 = r3, r4
cmp4.eq.and.orcm p2, p3 = 3, r4
 
cmp4.ne.and p2, p3 = r3, r4
cmp4.ne.and p2, p3 = 3, r4
cmp4.ne.or p2, p3 = r3, r4
cmp4.ne.or p2, p3 = 3, r4
cmp4.ne.or.andcm p2, p3 = r3, r4
cmp4.ne.or.andcm p2, p3 = 3, r4
cmp4.ne.orcm p2, p3 = r3, r4
cmp4.ne.orcm p2, p3 = 3, r4
cmp4.ne.andcm p2, p3 = r3, r4
cmp4.ne.andcm p2, p3 = 3, r4
cmp4.ne.and.orcm p2, p3 = r3, r4
cmp4.ne.and.orcm p2, p3 = 3, r4
 
cmp4.eq.and p2, p3 = r0, r4
cmp4.eq.and p2, p3 = r4, r0
cmp4.eq.or p2, p3 = r0, r4
cmp4.eq.or p2, p3 = r4, r0
cmp4.eq.or.andcm p2, p3 = r0, r4
cmp4.eq.or.andcm p2, p3 = r4, r0
cmp4.eq.orcm p2, p3 = r0, r4
cmp4.eq.orcm p2, p3 = r4, r0
cmp4.eq.andcm p2, p3 = r0, r4
cmp4.eq.andcm p2, p3 = r4, r0
cmp4.eq.and.orcm p2, p3 = r0, r4
cmp4.eq.and.orcm p2, p3 = r4, r0
 
cmp4.ne.and p2, p3 = r0, r4
cmp4.ne.and p2, p3 = r4, r0
cmp4.ne.or p2, p3 = r0, r4
cmp4.ne.or p2, p3 = r4, r0
cmp4.ne.or.andcm p2, p3 = r0, r4
cmp4.ne.or.andcm p2, p3 = r4, r0
cmp4.ne.orcm p2, p3 = r0, r4
cmp4.ne.orcm p2, p3 = r4, r0
cmp4.ne.andcm p2, p3 = r0, r4
cmp4.ne.andcm p2, p3 = r4, r0
cmp4.ne.and.orcm p2, p3 = r0, r4
cmp4.ne.and.orcm p2, p3 = r4, r0
 
cmp4.lt.and p2, p3 = r0, r4
cmp4.lt.and p2, p3 = r4, r0
cmp4.lt.or p2, p3 = r0, r4
cmp4.lt.or p2, p3 = r4, r0
cmp4.lt.or.andcm p2, p3 = r0, r4
cmp4.lt.or.andcm p2, p3 = r4, r0
cmp4.lt.orcm p2, p3 = r0, r4
cmp4.lt.orcm p2, p3 = r4, r0
cmp4.lt.andcm p2, p3 = r0, r4
cmp4.lt.andcm p2, p3 = r4, r0
cmp4.lt.and.orcm p2, p3 = r0, r4
cmp4.lt.and.orcm p2, p3 = r4, r0
 
cmp4.le.and p2, p3 = r0, r4
cmp4.le.and p2, p3 = r4, r0
cmp4.le.or p2, p3 = r0, r4
cmp4.le.or p2, p3 = r4, r0
cmp4.le.or.andcm p2, p3 = r0, r4
cmp4.le.or.andcm p2, p3 = r4, r0
cmp4.le.orcm p2, p3 = r0, r4
cmp4.le.orcm p2, p3 = r4, r0
cmp4.le.andcm p2, p3 = r0, r4
cmp4.le.andcm p2, p3 = r4, r0
cmp4.le.and.orcm p2, p3 = r0, r4
cmp4.le.and.orcm p2, p3 = r4, r0
 
cmp4.gt.and p2, p3 = r0, r4
cmp4.gt.and p2, p3 = r4, r0
cmp4.gt.or p2, p3 = r0, r4
cmp4.gt.or p2, p3 = r4, r0
cmp4.gt.or.andcm p2, p3 = r0, r4
cmp4.gt.or.andcm p2, p3 = r4, r0
cmp4.gt.orcm p2, p3 = r0, r4
cmp4.gt.orcm p2, p3 = r4, r0
cmp4.gt.andcm p2, p3 = r0, r4
cmp4.gt.andcm p2, p3 = r4, r0
cmp4.gt.and.orcm p2, p3 = r0, r4
cmp4.gt.and.orcm p2, p3 = r4, r0
 
cmp4.ge.and p2, p3 = r0, r4
cmp4.ge.and p2, p3 = r4, r0
cmp4.ge.or p2, p3 = r0, r4
cmp4.ge.or p2, p3 = r4, r0
cmp4.ge.or.andcm p2, p3 = r0, r4
cmp4.ge.or.andcm p2, p3 = r4, r0
cmp4.ge.orcm p2, p3 = r0, r4
cmp4.ge.orcm p2, p3 = r4, r0
cmp4.ge.andcm p2, p3 = r0, r4
cmp4.ge.andcm p2, p3 = r4, r0
cmp4.ge.and.orcm p2, p3 = r0, r4
cmp4.ge.and.orcm p2, p3 = r4, r0
 
nop.i 0; nop.i 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-srlz.s
0,0 → 1,13
//
// Auto-insertion of instruction and data serialization
//
.text
start:
// Requires data serialization
ptc.e r1
ld8 r1 = [r2]
rfi
// Requires instruction serialization
ptc.e r1
epc
rfi
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-imply.s
0,0 → 1,44
//
// Test various implies relations
//
.text
// User-supplied hint
.pred.rel.imply p1, p2
(p1) mov r4 = 2
(p2) br.cond.sptk L
mov r4 = 7
rfi
// Symmetric to previous example
.pred.rel.imply p1, p2
mov r4 = 2
(p2) br.cond.sptk L
(p1) mov r4 = 7
rfi
 
// Verify that the implies relationship caused by the unconditional compare
// prevents RAW on r4.
(p3) cmp.eq.unc p1, p2 = r1, r2;; // p1,p2 imply p3
(p1) mov r4 = 2
(p3) br.cond.sptk L
mov r4 = 7
rfi
// An instance of cmp.rel.or should not affect an implies relation.
(p3) cmp.eq.unc p1, p2 = r1, r2 // p1,p2 imply p3
cmp.eq.or p3, p4 = r5, r6;; // doesn't affect implies rel
(p1) mov r4 = 2
(p3) br.cond.sptk L
mov r4 = 7
rfi
// An instance of cmp.rel.and only affects imply targets
.pred.rel.imply p1,p3
cmp.ne.and p1, p2 = r5, r6 // doesn't affect imply source
(p1) mov r4 = 2
(p3) br.cond.sptk L
mov r4 = 7
rfi
// FIXME -- add tests for and.orcm and or.andcm
L:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/real.d
0,0 → 1,10
#objdump: -s -j .data
#name: ia64 real10 and real16 (LSB)
 
.*: +file format .*
 
Contents of section .data:
0000 ffcdcccc cccccccc ccfc3f00 00000000 ................
0010 cdcccccc cccccccc fc3fffcd cccccccc ................
0020 ccccccfb 3f000000 00000000 00000000 ................
0030 cdcccccc cccccccc fb3f0000 00000000 ................
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc-uw-ilp32.d
0,0 → 1,15
#objdump: -r
#name: ia64 unwind relocations (ilp32)
#as: -milp32
#source: reloc-uw.s
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.IA_64\.unwind\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0*00 SEGREL32[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*04 SEGREL32[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*08 SEGREL32[ML]SB[[:space:]]+\.IA_64\.unwind_info(\+0x[[:xdigit:]]*[048c])?
0*0c SEGREL32[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*10 SEGREL32[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*14 SEGREL32[ML]SB[[:space:]]+\.IA_64\.unwind_info(\+0x[[:xdigit:]]*[048c])?
/trunk/gnu/binutils/gas/testsuite/gas/ia64/operand-or.s
0,0 → 1,11
.text
.type _start,@function
_start:
 
fclass.m p3, p4 = f4, @nat|@qnan
fclass.m p3, p4 = f4, @nat|@qnan|@snan
fclass.m p3, p4 = f4, @nat|@qnan|@snan|@pos
fclass.m p3, p4 = f4, @nat|@qnan|@snan|@pos|@neg
fclass.m p3, p4 = f4, @nat|@qnan|@snan|@pos|@neg|@unorm
fclass.m p3, p4 = f4, @nat|@qnan|@snan|@pos|@neg|@unorm|@norm
fclass.m p3, p4 = f4, @nat|@qnan|@snan|@pos|@neg|@unorm|@norm|@inf
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-i.s
0,0 → 1,258
.text
.type _start,@function
_start:
 
pmpyshr2 r4 = r5, r6, 0
pmpyshr2.u r4 = r5, r6, 16
 
pmpy2.r r4 = r5, r6
pmpy2.l r4 = r5, r6
 
mix1.r r4 = r5, r6
mix2.r r4 = r5, r6
mix4.r r4 = r5, r6
mix1.l r4 = r5, r6
mix2.l r4 = r5, r6
mix4.l r4 = r5, r6
 
pack2.uss r4 = r5, r6
pack2.sss r4 = r5, r6
pack4.sss r4 = r5, r6
 
unpack1.h r4 = r5, r6
unpack2.h r4 = r5, r6
unpack4.h r4 = r5, r6
unpack1.l r4 = r5, r6
unpack2.l r4 = r5, r6
unpack4.l r4 = r5, r6
 
pmin1.u r4 = r5, r6
pmax1.u r4 = r5, r6
 
pmin2 r4 = r5, r6
pmax2 r4 = r5, r6
 
psad1 r4 = r5, r6
 
mux1 r4 = r5, @rev
mux1 r4 = r5, @mix
mux1 r4 = r5, @shuf
mux1 r4 = r5, @alt
mux1 r4 = r5, @brcst
 
mux2 r4 = r5, 0
mux2 r4 = r5, 0xff
mux2 r4 = r5, 0xaa
 
pshr2 r4 = r5, r6
pshr2 r4 = r5, 0
pshr2 r4 = r5, 8
pshr2 r4 = r5, 31
 
pshr4 r4 = r5, r6
pshr4 r4 = r5, 0
pshr4 r4 = r5, 8
pshr4 r4 = r5, 31
 
pshr2.u r4 = r5, r6
pshr2.u r4 = r5, 0
pshr2.u r4 = r5, 8
pshr2.u r4 = r5, 31
 
pshr4.u r4 = r5, r6
pshr4.u r4 = r5, 0
pshr4.u r4 = r5, 8
pshr4.u r4 = r5, 31
 
shr r4 = r5, r6
shr.u r4 = r5, r6
 
pshl2 r4 = r5, r6
pshl2 r4 = r5, 0
pshl2 r4 = r5, 8
pshl2 r4 = r5, 31
 
pshl4 r4 = r5, r6
pshl4 r4 = r5, 0
pshl4 r4 = r5, 8
pshl4 r4 = r5, 31
 
shl r4 = r5, r6
 
popcnt r4 = r5
 
shrp r4 = r5, r6, 0
shrp r4 = r5, r6, 12
shrp r4 = r5, r6, 63
 
extr r4 = r5, 0, 16
extr r4 = r5, 0, 63
extr r4 = r5, 10, 40
extr.u r4 = r5, 0, 16
extr.u r4 = r5, 0, 63
extr.u r4 = r5, 10, 40
dep.z r4 = r5, 0, 16
dep.z r4 = r5, 0, 63
dep.z r4 = r5, 10, 40
dep.z r4 = 0, 0, 16
dep.z r4 = 127, 0, 63
dep.z r4 = -128, 5, 50
dep.z r4 = 0x55, 10, 40
 
dep r4 = 0, r5, 0, 16
dep r4 = -1, r5, 0, 63
// Insert padding NOPs to force the same template selection as IAS.
nop.m 0
nop.f 0
dep r4 = r5, r6, 10, 7
 
movl r4 = 0
movl r4 = 0xffffffffffffffff
movl r4 = 0x1234567890abcdef
 
break.i 0
break.i 0x1fffff
 
nop.i 0
nop.i 0x1fffff
 
chk.s.i r4, _start
 
mov r4 = b0
mov b0 = r4
 
mov pr = r4, 0
mov pr = r4, 0x1234
mov pr = r4, 0x1ffff
 
mov pr.rot = 0
// ??? This was originally 0x3ffffff, but that generates an assembler warning
// that the testsuite infrastructure isn't set up to ignore.
mov pr.rot = 0x3ff0000
mov pr.rot = -0x4000000
 
zxt1 r4 = r5
zxt2 r4 = r5
zxt4 r4 = r5
 
sxt1 r4 = r5
sxt2 r4 = r5
sxt4 r4 = r5
 
czx1.l r4 = r5
czx2.l r4 = r5
czx1.r r4 = r5
czx2.r r4 = r5
 
tbit.z p2, p3 = r4, 0
tbit.z.unc p2, p3 = r4, 1
tbit.z.and p2, p3 = r4, 2
tbit.z.or p2, p3 = r4, 3
tbit.z.or.andcm p2, p3 = r4, 4
tbit.z.orcm p2, p3 = r4, 5
tbit.z.andcm p2, p3 = r4, 6
tbit.z.and.orcm p2, p3 = r4, 7
tbit.nz p2, p3 = r4, 8
tbit.nz.unc p2, p3 = r4, 9
tbit.nz.and p2, p3 = r4, 10
tbit.nz.or p2, p3 = r4, 11
tbit.nz.or.andcm p2, p3 = r4, 12
tbit.nz.orcm p2, p3 = r4, 13
tbit.nz.andcm p2, p3 = r4, 14
tbit.nz.and.orcm p2, p3 = r4, 15
 
tnat.z p2, p3 = r4
tnat.z.unc p2, p3 = r4
tnat.z.and p2, p3 = r4
tnat.z.or p2, p3 = r4
tnat.z.or.andcm p2, p3 = r4
tnat.z.orcm p2, p3 = r4
tnat.z.andcm p2, p3 = r4
tnat.z.and.orcm p2, p3 = r4
tnat.nz p2, p3 = r4
tnat.nz.unc p2, p3 = r4
tnat.nz.and p2, p3 = r4
tnat.nz.or p2, p3 = r4
tnat.nz.or.andcm p2, p3 = r4
tnat.nz.orcm p2, p3 = r4
tnat.nz.andcm p2, p3 = r4
tnat.nz.and.orcm p2, p3 = r4
 
mov b3 = r4, .L1
mov.imp b3 = r4, .L1
.space 240
.L1:
mov.sptk b3 = r4, .L2
mov.sptk.imp b3 = r4, .L2
.space 240
.L2:
mov.dptk b3 = r4, .L3
mov.dptk.imp b3 = r4, .L3
.space 240
.L3:
 
mov.ret b3 = r4, .L4
mov.ret.imp b3 = r4, .L4
.space 240
.L4:
mov.ret.sptk b3 = r4, .L5
mov.ret.sptk.imp b3 = r4, .L5
.space 240
.L5:
mov.ret.dptk b3 = r4, .L6
mov.ret.dptk.imp b3 = r4, .L6
.space 240
.L6:
 
# instructions added by SDM2.1:
 
hint @pause
hint.i 0
hint.i @pause
hint.i 0x1fffff
(p7) hint @pause
(p7) hint.i 0
(p7) hint.i @pause
(p7) hint.i 0x1fffff
(p7) hint @pause
(p7) hint.i 0
(p7) hint.i @pause
(p7) hint.i 0x1fffff
 
# instructions added by SDM2.2:
 
tf.z p2, p3 = 39
tf.z.unc p2, p3 = 39
tf.z.and p2, p3 = 39
tf.z.or p2, p3 = 39
tf.z.or.andcm p2, p3 = 39
tf.z.orcm p2, p3 = 39
tf.z.andcm p2, p3 = 39
tf.z.and.orcm p2, p3 = 39
tf.nz p2, p3 = 39
tf.nz.unc p2, p3 = 39
tf.nz.and p2, p3 = 39
tf.nz.or p2, p3 = 39
tf.nz.or.andcm p2, p3 = 39
tf.nz.orcm p2, p3 = 39
tf.nz.andcm p2, p3 = 39
tf.nz.and.orcm p2, p3 = 39
 
(p7) tf.z p2, p3 = 39
(p7) tf.z.unc p2, p3 = 39
(p7) tf.z.and p2, p3 = 39
(p7) tf.z.or p2, p3 = 39
(p7) tf.z.or.andcm p2, p3 = 39
(p7) tf.z.orcm p2, p3 = 39
(p7) tf.z.andcm p2, p3 = 39
(p7) tf.z.and.orcm p2, p3 = 39
(p7) tf.nz p2, p3 = 39
(p7) tf.nz.unc p2, p3 = 39
(p7) tf.nz.and p2, p3 = 39
(p7) tf.nz.or p2, p3 = 39
(p7) tf.nz.or.andcm p2, p3 = 39
(p7) tf.nz.orcm p2, p3 = 39
(p7) tf.nz.andcm p2, p3 = 39
(p7) tf.nz.and.orcm p2, p3 = 39
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ldxmov-1.s
0,0 → 1,8
.text
ld8.mov r2 = [r3], foo#
ld8.mov r4 = [r5], bar#
ld8.mov r6 = [r7], foo# + 100
ld8.mov r8 = [r9], bar# + 100
.data
bar:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/regval.l
0,0 → 1,17
.*: Assembler messages:
.*:11: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 0
.*:11: Warning: Only the first path encountering the conflict is reported
.*:10: Warning: This is the location of the conflicting usage
#...
.*:25: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 0
.*:25: Warning: Only the first path encountering the conflict is reported
.*:24: Warning: This is the location of the conflicting usage
#...
.*:32: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\)
.*:32: Warning: Only the first path encountering the conflict is reported
.*:31: Warning: This is the location of the conflicting usage
#...
.*:46: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 0
.*:46: Warning: Only the first path encountering the conflict is reported
.*:45: Warning: This is the location of the conflicting usage
#pass
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-m.s
0,0 → 1,1037
.text
.type _start,@function
_start:
ld1 r4 = [r5]
ld1 r4 = [r5], r6
ld1 r4 = [r5], -256
ld1.nt1 r4 = [r5]
ld1.nt1 r4 = [r5], r6
ld1.nt1 r4 = [r5], -243
ld1.nta r4 = [r5]
ld1.nta r4 = [r5], r6
ld1.nta r4 = [r5], -230
 
ld1.s r4 = [r5]
ld1.s r4 = [r5], r6
ld1.s r4 = [r5], -217
ld1.s.nt1 r4 = [r5]
ld1.s.nt1 r4 = [r5], r6
ld1.s.nt1 r4 = [r5], -204
ld1.s.nta r4 = [r5]
ld1.s.nta r4 = [r5], r6
ld1.s.nta r4 = [r5], -191
 
ld1.a r4 = [r5]
ld1.a r4 = [r5], r6
ld1.a r4 = [r5], -178
ld1.a.nt1 r4 = [r5]
ld1.a.nt1 r4 = [r5], r6
ld1.a.nt1 r4 = [r5], -165
ld1.a.nta r4 = [r5]
ld1.a.nta r4 = [r5], r6
ld1.a.nta r4 = [r5], -152
 
ld1.sa r4 = [r5]
ld1.sa r4 = [r5], r6
ld1.sa r4 = [r5], -139
ld1.sa.nt1 r4 = [r5]
ld1.sa.nt1 r4 = [r5], r6
ld1.sa.nt1 r4 = [r5], -126
ld1.sa.nta r4 = [r5]
ld1.sa.nta r4 = [r5], r6
ld1.sa.nta r4 = [r5], -113
 
ld1.c.clr r4 = [r5]
ld1.c.clr r4 = [r5], r6
ld1.c.clr r4 = [r5], -100
ld1.c.clr.nt1 r4 = [r5]
ld1.c.clr.nt1 r4 = [r5], r6
ld1.c.clr.nt1 r4 = [r5], -87
ld1.c.clr.nta r4 = [r5]
ld1.c.clr.nta r4 = [r5], r6
ld1.c.clr.nta r4 = [r5], -74
 
ld1.c.nc r4 = [r5]
ld1.c.nc r4 = [r5], r6
ld1.c.nc r4 = [r5], -61
ld1.c.nc.nt1 r4 = [r5]
ld1.c.nc.nt1 r4 = [r5], r6
ld1.c.nc.nt1 r4 = [r5], -48
ld1.c.nc.nta r4 = [r5]
ld1.c.nc.nta r4 = [r5], r6
ld1.c.nc.nta r4 = [r5], -35
 
ld1.bias r4 = [r5]
ld1.bias r4 = [r5], r6
ld1.bias r4 = [r5], -22
ld1.bias.nt1 r4 = [r5]
ld1.bias.nt1 r4 = [r5], r6
ld1.bias.nt1 r4 = [r5], -9
ld1.bias.nta r4 = [r5]
ld1.bias.nta r4 = [r5], r6
ld1.bias.nta r4 = [r5], 4
 
ld1.acq r4 = [r5]
ld1.acq r4 = [r5], r6
ld1.acq r4 = [r5], 17
ld1.acq.nt1 r4 = [r5]
ld1.acq.nt1 r4 = [r5], r6
ld1.acq.nt1 r4 = [r5], 30
ld1.acq.nta r4 = [r5]
ld1.acq.nta r4 = [r5], r6
ld1.acq.nta r4 = [r5], 43
 
ld1.c.clr.acq r4 = [r5]
ld1.c.clr.acq r4 = [r5], r6
ld1.c.clr.acq r4 = [r5], 56
ld1.c.clr.acq.nt1 r4 = [r5]
ld1.c.clr.acq.nt1 r4 = [r5], r6
ld1.c.clr.acq.nt1 r4 = [r5], 69
ld1.c.clr.acq.nta r4 = [r5]
ld1.c.clr.acq.nta r4 = [r5], r6
ld1.c.clr.acq.nta r4 = [r5], 82
 
ld2 r4 = [r5]
ld2 r4 = [r5], r6
ld2 r4 = [r5], 95
ld2.nt1 r4 = [r5]
ld2.nt1 r4 = [r5], r6
ld2.nt1 r4 = [r5], 108
ld2.nta r4 = [r5]
ld2.nta r4 = [r5], r6
ld2.nta r4 = [r5], 121
 
ld2.s r4 = [r5]
ld2.s r4 = [r5], r6
ld2.s r4 = [r5], 134
ld2.s.nt1 r4 = [r5]
ld2.s.nt1 r4 = [r5], r6
ld2.s.nt1 r4 = [r5], 147
ld2.s.nta r4 = [r5]
ld2.s.nta r4 = [r5], r6
ld2.s.nta r4 = [r5], 160
 
ld2.a r4 = [r5]
ld2.a r4 = [r5], r6
ld2.a r4 = [r5], 173
ld2.a.nt1 r4 = [r5]
ld2.a.nt1 r4 = [r5], r6
ld2.a.nt1 r4 = [r5], 186
ld2.a.nta r4 = [r5]
ld2.a.nta r4 = [r5], r6
ld2.a.nta r4 = [r5], 199
 
ld2.sa r4 = [r5]
ld2.sa r4 = [r5], r6
ld2.sa r4 = [r5], 212
ld2.sa.nt1 r4 = [r5]
ld2.sa.nt1 r4 = [r5], r6
ld2.sa.nt1 r4 = [r5], 225
ld2.sa.nta r4 = [r5]
ld2.sa.nta r4 = [r5], r6
ld2.sa.nta r4 = [r5], 238
 
ld2.c.clr r4 = [r5]
ld2.c.clr r4 = [r5], r6
ld2.c.clr r4 = [r5], 251
ld2.c.clr.nt1 r4 = [r5]
ld2.c.clr.nt1 r4 = [r5], r6
ld2.c.clr.nt1 r4 = [r5], -248
ld2.c.clr.nta r4 = [r5]
ld2.c.clr.nta r4 = [r5], r6
ld2.c.clr.nta r4 = [r5], -235
 
ld2.c.nc r4 = [r5]
ld2.c.nc r4 = [r5], r6
ld2.c.nc r4 = [r5], -222
ld2.c.nc.nt1 r4 = [r5]
ld2.c.nc.nt1 r4 = [r5], r6
ld2.c.nc.nt1 r4 = [r5], -209
ld2.c.nc.nta r4 = [r5]
ld2.c.nc.nta r4 = [r5], r6
ld2.c.nc.nta r4 = [r5], -196
 
ld2.bias r4 = [r5]
ld2.bias r4 = [r5], r6
ld2.bias r4 = [r5], -183
ld2.bias.nt1 r4 = [r5]
ld2.bias.nt1 r4 = [r5], r6
ld2.bias.nt1 r4 = [r5], -170
ld2.bias.nta r4 = [r5]
ld2.bias.nta r4 = [r5], r6
ld2.bias.nta r4 = [r5], -157
 
ld2.acq r4 = [r5]
ld2.acq r4 = [r5], r6
ld2.acq r4 = [r5], -144
ld2.acq.nt1 r4 = [r5]
ld2.acq.nt1 r4 = [r5], r6
ld2.acq.nt1 r4 = [r5], -131
ld2.acq.nta r4 = [r5]
ld2.acq.nta r4 = [r5], r6
ld2.acq.nta r4 = [r5], -118
 
ld2.c.clr.acq r4 = [r5]
ld2.c.clr.acq r4 = [r5], r6
ld2.c.clr.acq r4 = [r5], -105
ld2.c.clr.acq.nt1 r4 = [r5]
ld2.c.clr.acq.nt1 r4 = [r5], r6
ld2.c.clr.acq.nt1 r4 = [r5], -92
ld2.c.clr.acq.nta r4 = [r5]
ld2.c.clr.acq.nta r4 = [r5], r6
ld2.c.clr.acq.nta r4 = [r5], -79
 
ld4 r4 = [r5]
ld4 r4 = [r5], r6
ld4 r4 = [r5], -66
ld4.nt1 r4 = [r5]
ld4.nt1 r4 = [r5], r6
ld4.nt1 r4 = [r5], -53
ld4.nta r4 = [r5]
ld4.nta r4 = [r5], r6
ld4.nta r4 = [r5], -40
 
ld4.s r4 = [r5]
ld4.s r4 = [r5], r6
ld4.s r4 = [r5], -27
ld4.s.nt1 r4 = [r5]
ld4.s.nt1 r4 = [r5], r6
ld4.s.nt1 r4 = [r5], -14
ld4.s.nta r4 = [r5]
ld4.s.nta r4 = [r5], r6
ld4.s.nta r4 = [r5], -1
 
ld4.a r4 = [r5]
ld4.a r4 = [r5], r6
ld4.a r4 = [r5], 12
ld4.a.nt1 r4 = [r5]
ld4.a.nt1 r4 = [r5], r6
ld4.a.nt1 r4 = [r5], 25
ld4.a.nta r4 = [r5]
ld4.a.nta r4 = [r5], r6
ld4.a.nta r4 = [r5], 38
 
ld4.sa r4 = [r5]
ld4.sa r4 = [r5], r6
ld4.sa r4 = [r5], 51
ld4.sa.nt1 r4 = [r5]
ld4.sa.nt1 r4 = [r5], r6
ld4.sa.nt1 r4 = [r5], 64
ld4.sa.nta r4 = [r5]
ld4.sa.nta r4 = [r5], r6
ld4.sa.nta r4 = [r5], 77
 
ld4.c.clr r4 = [r5]
ld4.c.clr r4 = [r5], r6
ld4.c.clr r4 = [r5], 90
ld4.c.clr.nt1 r4 = [r5]
ld4.c.clr.nt1 r4 = [r5], r6
ld4.c.clr.nt1 r4 = [r5], 103
ld4.c.clr.nta r4 = [r5]
ld4.c.clr.nta r4 = [r5], r6
ld4.c.clr.nta r4 = [r5], 116
 
ld4.c.nc r4 = [r5]
ld4.c.nc r4 = [r5], r6
ld4.c.nc r4 = [r5], 129
ld4.c.nc.nt1 r4 = [r5]
ld4.c.nc.nt1 r4 = [r5], r6
ld4.c.nc.nt1 r4 = [r5], 142
ld4.c.nc.nta r4 = [r5]
ld4.c.nc.nta r4 = [r5], r6
ld4.c.nc.nta r4 = [r5], 155
 
ld4.bias r4 = [r5]
ld4.bias r4 = [r5], r6
ld4.bias r4 = [r5], 168
ld4.bias.nt1 r4 = [r5]
ld4.bias.nt1 r4 = [r5], r6
ld4.bias.nt1 r4 = [r5], 181
ld4.bias.nta r4 = [r5]
ld4.bias.nta r4 = [r5], r6
ld4.bias.nta r4 = [r5], 194
 
ld4.acq r4 = [r5]
ld4.acq r4 = [r5], r6
ld4.acq r4 = [r5], 207
ld4.acq.nt1 r4 = [r5]
ld4.acq.nt1 r4 = [r5], r6
ld4.acq.nt1 r4 = [r5], 220
ld4.acq.nta r4 = [r5]
ld4.acq.nta r4 = [r5], r6
ld4.acq.nta r4 = [r5], 233
 
ld4.c.clr.acq r4 = [r5]
ld4.c.clr.acq r4 = [r5], r6
ld4.c.clr.acq r4 = [r5], 246
ld4.c.clr.acq.nt1 r4 = [r5]
ld4.c.clr.acq.nt1 r4 = [r5], r6
ld4.c.clr.acq.nt1 r4 = [r5], -253
ld4.c.clr.acq.nta r4 = [r5]
ld4.c.clr.acq.nta r4 = [r5], r6
ld4.c.clr.acq.nta r4 = [r5], -240
 
ld8 r4 = [r5]
ld8 r4 = [r5], r6
ld8 r4 = [r5], -227
ld8.nt1 r4 = [r5]
ld8.nt1 r4 = [r5], r6
ld8.nt1 r4 = [r5], -214
ld8.nta r4 = [r5]
ld8.nta r4 = [r5], r6
ld8.nta r4 = [r5], -201
 
ld8.s r4 = [r5]
ld8.s r4 = [r5], r6
ld8.s r4 = [r5], -188
ld8.s.nt1 r4 = [r5]
ld8.s.nt1 r4 = [r5], r6
ld8.s.nt1 r4 = [r5], -175
ld8.s.nta r4 = [r5]
ld8.s.nta r4 = [r5], r6
ld8.s.nta r4 = [r5], -162
 
ld8.a r4 = [r5]
ld8.a r4 = [r5], r6
ld8.a r4 = [r5], -149
ld8.a.nt1 r4 = [r5]
ld8.a.nt1 r4 = [r5], r6
ld8.a.nt1 r4 = [r5], -136
ld8.a.nta r4 = [r5]
ld8.a.nta r4 = [r5], r6
ld8.a.nta r4 = [r5], -123
 
ld8.sa r4 = [r5]
ld8.sa r4 = [r5], r6
ld8.sa r4 = [r5], -110
ld8.sa.nt1 r4 = [r5]
ld8.sa.nt1 r4 = [r5], r6
ld8.sa.nt1 r4 = [r5], -97
ld8.sa.nta r4 = [r5]
ld8.sa.nta r4 = [r5], r6
ld8.sa.nta r4 = [r5], -84
 
ld8.c.clr r4 = [r5]
ld8.c.clr r4 = [r5], r6
ld8.c.clr r4 = [r5], -71
ld8.c.clr.nt1 r4 = [r5]
ld8.c.clr.nt1 r4 = [r5], r6
ld8.c.clr.nt1 r4 = [r5], -58
ld8.c.clr.nta r4 = [r5]
ld8.c.clr.nta r4 = [r5], r6
ld8.c.clr.nta r4 = [r5], -45
 
ld8.c.nc r4 = [r5]
ld8.c.nc r4 = [r5], r6
ld8.c.nc r4 = [r5], -32
ld8.c.nc.nt1 r4 = [r5]
ld8.c.nc.nt1 r4 = [r5], r6
ld8.c.nc.nt1 r4 = [r5], -19
ld8.c.nc.nta r4 = [r5]
ld8.c.nc.nta r4 = [r5], r6
ld8.c.nc.nta r4 = [r5], -6
 
ld8.bias r4 = [r5]
ld8.bias r4 = [r5], r6
ld8.bias r4 = [r5], 7
ld8.bias.nt1 r4 = [r5]
ld8.bias.nt1 r4 = [r5], r6
ld8.bias.nt1 r4 = [r5], 20
ld8.bias.nta r4 = [r5]
ld8.bias.nta r4 = [r5], r6
ld8.bias.nta r4 = [r5], 33
 
ld8.acq r4 = [r5]
ld8.acq r4 = [r5], r6
ld8.acq r4 = [r5], 46
ld8.acq.nt1 r4 = [r5]
ld8.acq.nt1 r4 = [r5], r6
ld8.acq.nt1 r4 = [r5], 59
ld8.acq.nta r4 = [r5]
ld8.acq.nta r4 = [r5], r6
ld8.acq.nta r4 = [r5], 72
 
ld8.c.clr.acq r4 = [r5]
ld8.c.clr.acq r4 = [r5], r6
ld8.c.clr.acq r4 = [r5], 85
ld8.c.clr.acq.nt1 r4 = [r5]
ld8.c.clr.acq.nt1 r4 = [r5], r6
ld8.c.clr.acq.nt1 r4 = [r5], 98
ld8.c.clr.acq.nta r4 = [r5]
ld8.c.clr.acq.nta r4 = [r5], r6
ld8.c.clr.acq.nta r4 = [r5], 111
 
ld8.fill r4 = [r5]
ld8.fill r4 = [r5], r6
ld8.fill r4 = [r5], 124
ld8.fill.nt1 r4 = [r5]
ld8.fill.nt1 r4 = [r5], r6
ld8.fill.nt1 r4 = [r5], 137
ld8.fill.nta r4 = [r5]
ld8.fill.nta r4 = [r5], r6
ld8.fill.nta r4 = [r5], 150
 
st1 [r4] = r5
st1 [r4] = r5, 163
st1.nta [r4] = r5
st1.nta [r4] = r5, 176
 
st2 [r4] = r5
st2 [r4] = r5, 189
st2.nta [r4] = r5
st2.nta [r4] = r5, 202
 
st4 [r4] = r5
st4 [r4] = r5, 215
st4.nta [r4] = r5
st4.nta [r4] = r5, 228
 
st8 [r4] = r5
st8 [r4] = r5, 241
st8.nta [r4] = r5
st8.nta [r4] = r5, 254
 
st1.rel [r4] = r5
st1.rel [r4] = r5, -245
st1.rel.nta [r4] = r5
st1.rel.nta [r4] = r5, -232
 
st2.rel [r4] = r5
st2.rel [r4] = r5, -219
st2.rel.nta [r4] = r5
st2.rel.nta [r4] = r5, -206
 
st4.rel [r4] = r5
st4.rel [r4] = r5, -193
st4.rel.nta [r4] = r5
st4.rel.nta [r4] = r5, -180
 
st8.rel [r4] = r5
st8.rel [r4] = r5, -167
st8.rel.nta [r4] = r5
st8.rel.nta [r4] = r5, -154
 
st8.spill [r4] = r5
st8.spill [r4] = r5, -141
st8.spill.nta [r4] = r5
st8.spill.nta [r4] = r5, -128
 
ldfs f4 = [r5]
ldfs f4 = [r5], r6
ldfs f4 = [r5], -115
ldfs.nt1 f4 = [r5]
ldfs.nt1 f4 = [r5], r6
ldfs.nt1 f4 = [r5], -102
ldfs.nta f4 = [r5]
ldfs.nta f4 = [r5], r6
ldfs.nta f4 = [r5], -89
 
ldfs.s f4 = [r5]
ldfs.s f4 = [r5], r6
ldfs.s f4 = [r5], -76
ldfs.s.nt1 f4 = [r5]
ldfs.s.nt1 f4 = [r5], r6
ldfs.s.nt1 f4 = [r5], -63
ldfs.s.nta f4 = [r5]
ldfs.s.nta f4 = [r5], r6
ldfs.s.nta f4 = [r5], -50
 
ldfs.a f4 = [r5]
ldfs.a f4 = [r5], r6
ldfs.a f4 = [r5], -37
ldfs.a.nt1 f4 = [r5]
ldfs.a.nt1 f4 = [r5], r6
ldfs.a.nt1 f4 = [r5], -24
ldfs.a.nta f4 = [r5]
ldfs.a.nta f4 = [r5], r6
ldfs.a.nta f4 = [r5], -11
 
ldfs.sa f4 = [r5]
ldfs.sa f4 = [r5], r6
ldfs.sa f4 = [r5], 2
ldfs.sa.nt1 f4 = [r5]
ldfs.sa.nt1 f4 = [r5], r6
ldfs.sa.nt1 f4 = [r5], 15
ldfs.sa.nta f4 = [r5]
ldfs.sa.nta f4 = [r5], r6
ldfs.sa.nta f4 = [r5], 28
 
ldfs.c.clr f4 = [r5]
ldfs.c.clr f4 = [r5], r6
ldfs.c.clr f4 = [r5], 41
ldfs.c.clr.nt1 f4 = [r5]
ldfs.c.clr.nt1 f4 = [r5], r6
ldfs.c.clr.nt1 f4 = [r5], 54
ldfs.c.clr.nta f4 = [r5]
ldfs.c.clr.nta f4 = [r5], r6
ldfs.c.clr.nta f4 = [r5], 67
 
ldfs.c.nc f4 = [r5]
ldfs.c.nc f4 = [r5], r6
ldfs.c.nc f4 = [r5], 80
ldfs.c.nc.nt1 f4 = [r5]
ldfs.c.nc.nt1 f4 = [r5], r6
ldfs.c.nc.nt1 f4 = [r5], 93
ldfs.c.nc.nta f4 = [r5]
ldfs.c.nc.nta f4 = [r5], r6
ldfs.c.nc.nta f4 = [r5], 106
 
ldfd f4 = [r5]
ldfd f4 = [r5], r6
ldfd f4 = [r5], 119
ldfd.nt1 f4 = [r5]
ldfd.nt1 f4 = [r5], r6
ldfd.nt1 f4 = [r5], 132
ldfd.nta f4 = [r5]
ldfd.nta f4 = [r5], r6
ldfd.nta f4 = [r5], 145
 
ldfd.s f4 = [r5]
ldfd.s f4 = [r5], r6
ldfd.s f4 = [r5], 158
ldfd.s.nt1 f4 = [r5]
ldfd.s.nt1 f4 = [r5], r6
ldfd.s.nt1 f4 = [r5], 171
ldfd.s.nta f4 = [r5]
ldfd.s.nta f4 = [r5], r6
ldfd.s.nta f4 = [r5], 184
 
ldfd.a f4 = [r5]
ldfd.a f4 = [r5], r6
ldfd.a f4 = [r5], 197
ldfd.a.nt1 f4 = [r5]
ldfd.a.nt1 f4 = [r5], r6
ldfd.a.nt1 f4 = [r5], 210
ldfd.a.nta f4 = [r5]
ldfd.a.nta f4 = [r5], r6
ldfd.a.nta f4 = [r5], 223
 
ldfd.sa f4 = [r5]
ldfd.sa f4 = [r5], r6
ldfd.sa f4 = [r5], 236
ldfd.sa.nt1 f4 = [r5]
ldfd.sa.nt1 f4 = [r5], r6
ldfd.sa.nt1 f4 = [r5], 249
ldfd.sa.nta f4 = [r5]
ldfd.sa.nta f4 = [r5], r6
ldfd.sa.nta f4 = [r5], -250
 
ldfd.c.clr f4 = [r5]
ldfd.c.clr f4 = [r5], r6
ldfd.c.clr f4 = [r5], -237
ldfd.c.clr.nt1 f4 = [r5]
ldfd.c.clr.nt1 f4 = [r5], r6
ldfd.c.clr.nt1 f4 = [r5], -224
ldfd.c.clr.nta f4 = [r5]
ldfd.c.clr.nta f4 = [r5], r6
ldfd.c.clr.nta f4 = [r5], -211
 
ldfd.c.nc f4 = [r5]
ldfd.c.nc f4 = [r5], r6
ldfd.c.nc f4 = [r5], -198
ldfd.c.nc.nt1 f4 = [r5]
ldfd.c.nc.nt1 f4 = [r5], r6
ldfd.c.nc.nt1 f4 = [r5], -185
ldfd.c.nc.nta f4 = [r5]
ldfd.c.nc.nta f4 = [r5], r6
ldfd.c.nc.nta f4 = [r5], -172
 
ldf8 f4 = [r5]
ldf8 f4 = [r5], r6
ldf8 f4 = [r5], -159
ldf8.nt1 f4 = [r5]
ldf8.nt1 f4 = [r5], r6
ldf8.nt1 f4 = [r5], -146
ldf8.nta f4 = [r5]
ldf8.nta f4 = [r5], r6
ldf8.nta f4 = [r5], -133
 
ldf8.s f4 = [r5]
ldf8.s f4 = [r5], r6
ldf8.s f4 = [r5], -120
ldf8.s.nt1 f4 = [r5]
ldf8.s.nt1 f4 = [r5], r6
ldf8.s.nt1 f4 = [r5], -107
ldf8.s.nta f4 = [r5]
ldf8.s.nta f4 = [r5], r6
ldf8.s.nta f4 = [r5], -94
 
ldf8.a f4 = [r5]
ldf8.a f4 = [r5], r6
ldf8.a f4 = [r5], -81
ldf8.a.nt1 f4 = [r5]
ldf8.a.nt1 f4 = [r5], r6
ldf8.a.nt1 f4 = [r5], -68
ldf8.a.nta f4 = [r5]
ldf8.a.nta f4 = [r5], r6
ldf8.a.nta f4 = [r5], -55
 
ldf8.sa f4 = [r5]
ldf8.sa f4 = [r5], r6
ldf8.sa f4 = [r5], -42
ldf8.sa.nt1 f4 = [r5]
ldf8.sa.nt1 f4 = [r5], r6
ldf8.sa.nt1 f4 = [r5], -29
ldf8.sa.nta f4 = [r5]
ldf8.sa.nta f4 = [r5], r6
ldf8.sa.nta f4 = [r5], -16
 
ldf8.c.clr f4 = [r5]
ldf8.c.clr f4 = [r5], r6
ldf8.c.clr f4 = [r5], -3
ldf8.c.clr.nt1 f4 = [r5]
ldf8.c.clr.nt1 f4 = [r5], r6
ldf8.c.clr.nt1 f4 = [r5], 10
ldf8.c.clr.nta f4 = [r5]
ldf8.c.clr.nta f4 = [r5], r6
ldf8.c.clr.nta f4 = [r5], 23
 
ldf8.c.nc f4 = [r5]
ldf8.c.nc f4 = [r5], r6
ldf8.c.nc f4 = [r5], 36
ldf8.c.nc.nt1 f4 = [r5]
ldf8.c.nc.nt1 f4 = [r5], r6
ldf8.c.nc.nt1 f4 = [r5], 49
ldf8.c.nc.nta f4 = [r5]
ldf8.c.nc.nta f4 = [r5], r6
ldf8.c.nc.nta f4 = [r5], 62
 
ldfe f4 = [r5]
ldfe f4 = [r5], r6
ldfe f4 = [r5], 75
ldfe.nt1 f4 = [r5]
ldfe.nt1 f4 = [r5], r6
ldfe.nt1 f4 = [r5], 88
ldfe.nta f4 = [r5]
ldfe.nta f4 = [r5], r6
ldfe.nta f4 = [r5], 101
 
ldfe.s f4 = [r5]
ldfe.s f4 = [r5], r6
ldfe.s f4 = [r5], 114
ldfe.s.nt1 f4 = [r5]
ldfe.s.nt1 f4 = [r5], r6
ldfe.s.nt1 f4 = [r5], 127
ldfe.s.nta f4 = [r5]
ldfe.s.nta f4 = [r5], r6
ldfe.s.nta f4 = [r5], 140
 
ldfe.a f4 = [r5]
ldfe.a f4 = [r5], r6
ldfe.a f4 = [r5], 153
ldfe.a.nt1 f4 = [r5]
ldfe.a.nt1 f4 = [r5], r6
ldfe.a.nt1 f4 = [r5], 166
ldfe.a.nta f4 = [r5]
ldfe.a.nta f4 = [r5], r6
ldfe.a.nta f4 = [r5], 179
 
ldfe.sa f4 = [r5]
ldfe.sa f4 = [r5], r6
ldfe.sa f4 = [r5], 192
ldfe.sa.nt1 f4 = [r5]
ldfe.sa.nt1 f4 = [r5], r6
ldfe.sa.nt1 f4 = [r5], 205
ldfe.sa.nta f4 = [r5]
ldfe.sa.nta f4 = [r5], r6
ldfe.sa.nta f4 = [r5], 218
 
ldfe.c.clr f4 = [r5]
ldfe.c.clr f4 = [r5], r6
ldfe.c.clr f4 = [r5], 231
ldfe.c.clr.nt1 f4 = [r5]
ldfe.c.clr.nt1 f4 = [r5], r6
ldfe.c.clr.nt1 f4 = [r5], 244
ldfe.c.clr.nta f4 = [r5]
ldfe.c.clr.nta f4 = [r5], r6
ldfe.c.clr.nta f4 = [r5], -255
 
ldfe.c.nc f4 = [r5]
ldfe.c.nc f4 = [r5], r6
ldfe.c.nc f4 = [r5], -242
ldfe.c.nc.nt1 f4 = [r5]
ldfe.c.nc.nt1 f4 = [r5], r6
ldfe.c.nc.nt1 f4 = [r5], -229
ldfe.c.nc.nta f4 = [r5]
ldfe.c.nc.nta f4 = [r5], r6
ldfe.c.nc.nta f4 = [r5], -216
 
ldf.fill f4 = [r5]
ldf.fill f4 = [r5], r6
ldf.fill f4 = [r5], -203
ldf.fill.nt1 f4 = [r5]
ldf.fill.nt1 f4 = [r5], r6
ldf.fill.nt1 f4 = [r5], -190
ldf.fill.nta f4 = [r5]
ldf.fill.nta f4 = [r5], r6
ldf.fill.nta f4 = [r5], -177
 
stfs [r4] = f5
stfs [r4] = f5, -164
stfs.nta [r4] = f5
stfs.nta [r4] = f5, -151
 
stfd [r4] = f5
stfd [r4] = f5, -138
stfd.nta [r4] = f5
stfd.nta [r4] = f5, -125
 
stf8 [r4] = f5
stf8 [r4] = f5, -112
stf8.nta [r4] = f5
stf8.nta [r4] = f5, -99
 
stfe [r4] = f5
stfe [r4] = f5, -86
stfe.nta [r4] = f5
stfe.nta [r4] = f5, -73
 
stf.spill [r4] = f5
stf.spill [r4] = f5, -60
stf.spill.nta [r4] = f5
stf.spill.nta [r4] = f5, -47
 
ldfps f4, f5 = [r5]
ldfps f4, f5 = [r5], 8
ldfps.nt1 f4, f5 = [r5]
ldfps.nt1 f4, f5 = [r5], 8
ldfps.nta f4, f5 = [r5]
ldfps.nta f4, f5 = [r5], 8
 
ldfps.s f4, f5 = [r5]
ldfps.s f4, f5 = [r5], 8
ldfps.s.nt1 f4, f5 = [r5]
ldfps.s.nt1 f4, f5 = [r5], 8
ldfps.s.nta f4, f5 = [r5]
ldfps.s.nta f4, f5 = [r5], 8
 
ldfps.a f4, f5 = [r5]
ldfps.a f4, f5 = [r5], 8
ldfps.a.nt1 f4, f5 = [r5]
ldfps.a.nt1 f4, f5 = [r5], 8
ldfps.a.nta f4, f5 = [r5]
ldfps.a.nta f4, f5 = [r5], 8
 
ldfps.sa f4, f5 = [r5]
ldfps.sa f4, f5 = [r5], 8
ldfps.sa.nt1 f4, f5 = [r5]
ldfps.sa.nt1 f4, f5 = [r5], 8
ldfps.sa.nta f4, f5 = [r5]
ldfps.sa.nta f4, f5 = [r5], 8
 
ldfps.c.clr f4, f5 = [r5]
ldfps.c.clr f4, f5 = [r5], 8
ldfps.c.clr.nt1 f4, f5 = [r5]
ldfps.c.clr.nt1 f4, f5 = [r5], 8
ldfps.c.clr.nta f4, f5 = [r5]
ldfps.c.clr.nta f4, f5 = [r5], 8
 
ldfps.c.nc f4, f5 = [r5]
ldfps.c.nc f4, f5 = [r5], 8
ldfps.c.nc.nt1 f4, f5 = [r5]
ldfps.c.nc.nt1 f4, f5 = [r5], 8
ldfps.c.nc.nta f4, f5 = [r5]
ldfps.c.nc.nta f4, f5 = [r5], 8
 
ldfpd f4, f5 = [r5]
ldfpd f4, f5 = [r5], 16
ldfpd.nt1 f4, f5 = [r5]
ldfpd.nt1 f4, f5 = [r5], 16
ldfpd.nta f4, f5 = [r5]
ldfpd.nta f4, f5 = [r5], 16
 
ldfpd.s f4, f5 = [r5]
ldfpd.s f4, f5 = [r5], 16
ldfpd.s.nt1 f4, f5 = [r5]
ldfpd.s.nt1 f4, f5 = [r5], 16
ldfpd.s.nta f4, f5 = [r5]
ldfpd.s.nta f4, f5 = [r5], 16
 
ldfpd.a f4, f5 = [r5]
ldfpd.a f4, f5 = [r5], 16
ldfpd.a.nt1 f4, f5 = [r5]
ldfpd.a.nt1 f4, f5 = [r5], 16
ldfpd.a.nta f4, f5 = [r5]
ldfpd.a.nta f4, f5 = [r5], 16
 
ldfpd.sa f4, f5 = [r5]
ldfpd.sa f4, f5 = [r5], 16
ldfpd.sa.nt1 f4, f5 = [r5]
ldfpd.sa.nt1 f4, f5 = [r5], 16
ldfpd.sa.nta f4, f5 = [r5]
ldfpd.sa.nta f4, f5 = [r5], 16
 
ldfpd.c.clr f4, f5 = [r5]
ldfpd.c.clr f4, f5 = [r5], 16
ldfpd.c.clr.nt1 f4, f5 = [r5]
ldfpd.c.clr.nt1 f4, f5 = [r5], 16
ldfpd.c.clr.nta f4, f5 = [r5]
ldfpd.c.clr.nta f4, f5 = [r5], 16
 
ldfpd.c.nc f4, f5 = [r5]
ldfpd.c.nc f4, f5 = [r5], 16
ldfpd.c.nc.nt1 f4, f5 = [r5]
ldfpd.c.nc.nt1 f4, f5 = [r5], 16
ldfpd.c.nc.nta f4, f5 = [r5]
ldfpd.c.nc.nta f4, f5 = [r5], 16
 
ldfp8 f4, f5 = [r5]
ldfp8 f4, f5 = [r5], 16
ldfp8.nt1 f4, f5 = [r5]
ldfp8.nt1 f4, f5 = [r5], 16
ldfp8.nta f4, f5 = [r5]
ldfp8.nta f4, f5 = [r5], 16
 
ldfp8.s f4, f5 = [r5]
ldfp8.s f4, f5 = [r5], 16
ldfp8.s.nt1 f4, f5 = [r5]
ldfp8.s.nt1 f4, f5 = [r5], 16
ldfp8.s.nta f4, f5 = [r5]
ldfp8.s.nta f4, f5 = [r5], 16
 
ldfp8.a f4, f5 = [r5]
ldfp8.a f4, f5 = [r5], 16
ldfp8.a.nt1 f4, f5 = [r5]
ldfp8.a.nt1 f4, f5 = [r5], 16
ldfp8.a.nta f4, f5 = [r5]
ldfp8.a.nta f4, f5 = [r5], 16
 
ldfp8.sa f4, f5 = [r5]
ldfp8.sa f4, f5 = [r5], 16
ldfp8.sa.nt1 f4, f5 = [r5]
ldfp8.sa.nt1 f4, f5 = [r5], 16
ldfp8.sa.nta f4, f5 = [r5]
ldfp8.sa.nta f4, f5 = [r5], 16
 
ldfp8.c.clr f4, f5 = [r5]
ldfp8.c.clr f4, f5 = [r5], 16
ldfp8.c.clr.nt1 f4, f5 = [r5]
ldfp8.c.clr.nt1 f4, f5 = [r5], 16
ldfp8.c.clr.nta f4, f5 = [r5]
ldfp8.c.clr.nta f4, f5 = [r5], 16
 
ldfp8.c.nc f4, f5 = [r5]
ldfp8.c.nc f4, f5 = [r5], 16
ldfp8.c.nc.nt1 f4, f5 = [r5]
ldfp8.c.nc.nt1 f4, f5 = [r5], 16
ldfp8.c.nc.nta f4, f5 = [r5]
ldfp8.c.nc.nta f4, f5 = [r5], 16
 
lfetch [r4]
lfetch [r4], r5
lfetch [r4], -34
lfetch.nt1 [r4]
lfetch.nt1 [r4], r5
lfetch.nt1 [r4], -21
lfetch.nt2 [r4]
lfetch.nt2 [r4], r5
lfetch.nt2 [r4], -8
lfetch.nta [r4]
lfetch.nta [r4], r5
lfetch.nta [r4], 5
 
lfetch.fault [r4]
lfetch.fault [r4], r5
lfetch.fault [r4], 18
lfetch.fault.nt1 [r4]
lfetch.fault.nt1 [r4], r5
lfetch.fault.nt1 [r4], 31
lfetch.fault.nt2 [r4]
lfetch.fault.nt2 [r4], r5
lfetch.fault.nt2 [r4], 44
lfetch.fault.nta [r4]
lfetch.fault.nta [r4], r5
lfetch.fault.nta [r4], 57
 
lfetch.excl [r4]
lfetch.excl [r4], r5
lfetch.excl [r4], 70
lfetch.excl.nt1 [r4]
lfetch.excl.nt1 [r4], r5
lfetch.excl.nt1 [r4], 83
lfetch.excl.nt2 [r4]
lfetch.excl.nt2 [r4], r5
lfetch.excl.nt2 [r4], 96
lfetch.excl.nta [r4]
lfetch.excl.nta [r4], r5
lfetch.excl.nta [r4], 109
 
lfetch.fault.excl [r4]
lfetch.fault.excl [r4], r5
lfetch.fault.excl [r4], 122
lfetch.fault.excl.nt1 [r4]
lfetch.fault.excl.nt1 [r4], r5
lfetch.fault.excl.nt1 [r4], 135
lfetch.fault.excl.nt2 [r4]
lfetch.fault.excl.nt2 [r4], r5
lfetch.fault.excl.nt2 [r4], 148
lfetch.fault.excl.nta [r4]
lfetch.fault.excl.nta [r4], r5
lfetch.fault.excl.nta [r4], 161
 
cmpxchg1.acq r4 = [r5], r6, ar.ccv
cmpxchg1.acq.nt1 r4 = [r5], r6, ar.ccv
cmpxchg1.acq.nta r4 = [r5], r6, ar.ccv
 
cmpxchg1.rel r4 = [r5], r6, ar.ccv
cmpxchg1.rel.nt1 r4 = [r5], r6, ar.ccv
cmpxchg1.rel.nta r4 = [r5], r6, ar.ccv
 
cmpxchg2.acq r4 = [r5], r6, ar.ccv
cmpxchg2.acq.nt1 r4 = [r5], r6, ar.ccv
cmpxchg2.acq.nta r4 = [r5], r6, ar.ccv
 
cmpxchg2.rel r4 = [r5], r6, ar.ccv
cmpxchg2.rel.nt1 r4 = [r5], r6, ar.ccv
cmpxchg2.rel.nta r4 = [r5], r6, ar.ccv
 
cmpxchg4.acq r4 = [r5], r6, ar.ccv
cmpxchg4.acq.nt1 r4 = [r5], r6, ar.ccv
cmpxchg4.acq.nta r4 = [r5], r6, ar.ccv
 
cmpxchg4.rel r4 = [r5], r6, ar.ccv
cmpxchg4.rel.nt1 r4 = [r5], r6, ar.ccv
cmpxchg4.rel.nta r4 = [r5], r6, ar.ccv
 
cmpxchg8.acq r4 = [r5], r6, ar.ccv
cmpxchg8.acq.nt1 r4 = [r5], r6, ar.ccv
cmpxchg8.acq.nta r4 = [r5], r6, ar.ccv
 
cmpxchg8.rel r4 = [r5], r6, ar.ccv
cmpxchg8.rel.nt1 r4 = [r5], r6, ar.ccv
cmpxchg8.rel.nta r4 = [r5], r6, ar.ccv
 
xchg1 r4 = [r5], r6
xchg1.nt1 r4 = [r5], r6
xchg1.nta r4 = [r5], r6
 
xchg2 r4 = [r5], r6
xchg2.nt1 r4 = [r5], r6
xchg2.nta r4 = [r5], r6
 
xchg4 r4 = [r5], r6
xchg4.nt1 r4 = [r5], r6
xchg4.nta r4 = [r5], r6
 
xchg8 r4 = [r5], r6
xchg8.nt1 r4 = [r5], r6
xchg8.nta r4 = [r5], r6
 
fetchadd4.acq r4 = [r5], -16
fetchadd4.acq.nt1 r4 = [r5], -8
fetchadd4.acq.nta r4 = [r5], -4
 
fetchadd8.acq r4 = [r5], -1
fetchadd8.acq.nt1 r4 = [r5], 1
fetchadd8.acq.nta r4 = [r5], 4
 
fetchadd4.rel r4 = [r5], 8
fetchadd4.rel.nt1 r4 = [r5], 16
fetchadd4.rel.nta r4 = [r5], -16
 
fetchadd8.rel r4 = [r5], -8
fetchadd8.rel.nt1 r4 = [r5], -4
fetchadd8.rel.nta r4 = [r5], -1
 
setf.sig f4 = r5
setf.exp f4 = r5
setf.s f4 = r5
setf.d f4 = r5
 
getf.sig r4 = f5
getf.exp r4 = f5
getf.s r4 = f5
getf.d r4 = f5
 
chk.s.m r4, _start
chk.s f4, _start
chk.a.nc r4, _start
chk.a.clr r4, _start
chk.a.nc f4, _start
chk.a.clr f4, _start
 
invala
fwb
mf
mf.a
srlz.d
srlz.i
sync.i
nop.m 0
nop.i 0;;
 
{ .mii; alloc r4 = ar.pfs, 2, 10, 16, 16;; }
 
{ .mii; flushrs;; }
{ .mii; loadrs }
 
invala.e r4
invala.e f4
 
fc r4
ptc.e r4
 
break.m 0
break.m 0x1ffff
 
nop.m 0
nop.m 0x1ffff
 
probe.r r4 = r5, r6
probe.w r4 = r5, r6
 
probe.r r4 = r5, 0
probe.w r4 = r5, 1
 
probe.r.fault r3, 2
probe.w.fault r3, 3
probe.rw.fault r3, 0
 
{ .mmi; itc.d r8;; nop.m 0x0; nop.i 0x0;; }
itc.i r9;;
sum 0x1234
rum 0x5aaaaa
ssm 0xffffff
rsm 0x400000
 
ptc.l r4, r5
{ .mmi; ptc.g r4, r5;; nop.m 0x0; nop.i 0x0 }
{ .mmi; ptc.ga r4, r5;; nop.m 0x0; nop.i 0x0 }
ptr.d r4, r5
ptr.i r4, r5
 
thash r4 = r5
ttag r4 = r5
tpa r4 = r5
tak r4 = r5
 
# instructions added by SDM2.1:
 
hint.m 0
hint.m @pause
hint.m 0x1ffff
 
cmp8xchg16.acq r4 = [r5], r6, ar25, ar.ccv
cmp8xchg16.acq.nt1 r4 = [r5], r6, ar.csd, ar.ccv
cmp8xchg16.acq.nta r4 = [r5], r6, ar.csd, ar.ccv
 
cmp8xchg16.rel r4 = [r5], r6, ar.csd, ar.ccv
cmp8xchg16.rel.nt1 r4 = [r5], r6, ar.csd, ar.ccv
cmp8xchg16.rel.nta r4 = [r5], r6, ar.csd, ar.ccv
 
fc.i r4
 
ld16 r4, ar25 = [r5]
ld16.nt1 r4, ar.csd = [r5]
ld16.nta r4, ar.csd = [r5]
 
ld16.acq r4, ar25 = [r5]
ld16.acq.nt1 r4, ar.csd = [r5]
ld16.acq.nta r4, ar.csd = [r5]
 
st16 [r4] = r5, ar25
st16.nta [r4] = r5, ar.csd
 
st16.rel [r4] = r5, ar.csd
st16.rel.nta [r4] = r5, ar.csd
/trunk/gnu/binutils/gas/testsuite/gas/ia64/group-1.d
0,0 → 1,32
#readelf: -Sg
#name: ia64 group
 
There are 9 section headers, starting at offset 0x98:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.group GROUP 0000000000000000 00000040
0000000000000008 0000000000000004 7 6 4
\[ 2\] \.text PROGBITS 0000000000000000 00000050
0000000000000000 0000000000000000 AX 0 0 16
\[ 3\] \.data PROGBITS 0000000000000000 00000050
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.bss NOBITS 0000000000000000 00000050
0000000000000000 0000000000000000 WA 0 0 1
\[ 5\] \.text PROGBITS 0000000000000000 00000050
0000000000000010 0000000000000000 AXG 0 0 16
\[ 6\] \.shstrtab STRTAB 0000000000000000 00000060
0000000000000033 0000000000000000 0 0 1
\[ 7\] \.symtab SYMTAB 0000000000000000 000002d8
00000000000000c0 0000000000000018 8 8 8
\[ 8\] \.strtab STRTAB 0000000000000000 00000398
000000000000000c 0000000000000000 0 0 1
Key to Flags:
#...
 
COMDAT group section \[ 1\] `\.group' \[\._foo\] contains 1 sections:
\[Index\] Name
\[ 5\] \.text
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-f.pl
0,0 → 1,174
print ".text\n\t.type _start,@", "function\n_start:\n\n";
 
@sf = ( "", ".s0", ".s1", ".s2", ".s3" );
 
# Arithmetic
 
foreach $i ( "fma", "fma.s", "fma.d", "fpma",
"fms", "fms.s", "fms.d", "fpms",
"fnma", "fnma.s", "fnma.d", "fpnma" ) {
foreach $s (@sf) {
print "\t${i}${s} f4 = f5, f6, f7\n";
}
print "\n";
}
 
foreach $i ( "fmpy", "fmpy.s", "fmpy.d", "fpmpy",
"fadd", "fadd.s", "fadd.d",
"fsub", "fsub.s", "fsub.d",
"fnmpy", "fnmpy.s", "fnmpy.d", "fpnmpy" ) {
foreach $s (@sf) {
print "\t${i}${s} f4 = f5, f6\n";
}
print "\n";
}
 
foreach $i ( "fnorm", "fnorm.s", "fnorm.d" ) {
foreach $s (@sf) {
print "\t${i}${s} f4 = f5\n";
}
print "\n";
}
 
# Fixed Point Multiply Add
 
foreach $s ( ".l", ".lu", ".h", ".hu" ) {
print "\txma${s} f4 = f5, f6, f7\n";
}
print "\n";
 
foreach $s ( ".l", ".lu", ".h", ".hu" ) {
print "\txmpy${s} f4 = f5, f6\n";
}
print "\n";
 
# Parallel Floating Point Select
 
print "\tfselect f4 = f5, f6, f7\n\n";
 
# Floating Point Compare
 
@cmp = ( ".eq", ".lt", ".le", ".unord", ".gt", ".ge", ".neq", ".nlt",
".nle", ".ngt", ".nge", ".ord" );
 
@fctype = ( "", ".unc" );
 
foreach $c (@cmp) {
foreach $u (@fctype) {
foreach $s (@sf) {
print "\tfcmp${c}${u}${s} p3, p4 = f4, f5\n";
}
}
print "\n";
}
 
# Floating Point Class
 
foreach $u (@fctype) {
foreach $c ( '@nat', '@qnan', '@snan', '@pos', '@neg', '@unorm',
'@norm', '@inf', '0x1ff' ) {
foreach $m ( ".m", ".nm" ) {
print "\tfclass${m}${u} p3, p4 = f4, $c\n";
}
}
print "\n";
}
 
# Approximation
 
foreach $i ( "frcpa", "fprcpa" ) {
foreach $s (@sf) {
print "\t${i}${s} f4, p5 = f6, f7\n";
}
print "\n";
}
 
foreach $i ( "frsqrta", "fprsqrta" ) {
foreach $s (@sf) {
print "\t${i}${s} f4, p5 = f6\n";
}
print "\n";
}
 
# Min/Max
 
foreach $i ( "fmin", "fmax", "famin", "famax",
"fpmin", "fpmax", "fpamin", "fpamax" ) {
foreach $s (@sf) {
print "\t${i}${s} f4 = f5, f6\n";
}
print "\n";
}
 
# Parallel Compare
 
foreach $c (@cmp) {
foreach $s (@sf) {
print "\tfpcmp${c}${s} f3 = f4, f5\n";
}
print "\n";
}
 
# Merge and Logical
 
foreach $i ( "fmerge.s", "fmerge.ns", "fmerge.se", "fmix.lr", "fmix.r",
"fmix.l", "fsxt.l", "fpack", "fswap", "fswap.nl", "fswap.nr",
"fand", "fandcm", "for", "fxor", "fpmerge.s", "fpmerge.ns",
"fpmerge.se" ) {
print "\t$i f4 = f5, f6\n";
}
print "\n";
 
foreach $i ( "fabs", "fneg", "fnegabs", "fpabs", "fpneg", "fpnegabs" ) {
print "\t$i f4 = f5\n";
}
print "\n";
 
# Convert Floating to Fixed
 
foreach $b ( "fcvt", "fpcvt" ) {
foreach $f ( ".fx", ".fxu" ) {
foreach $t ( "", ".trunc" ) {
foreach $s (@sf) {
print "\t${b}${f}${t}${s} f4 = f5\n";
}
print "\n";
}
}
}
 
# Convert Fixed to Floating
 
foreach $e ( ".xf", ".xuf" ) {
print "\tfcvt$e f4 = f5\n";
}
print "\n";
 
# Set Controls
 
foreach $s (@sf) {
print "\tfsetc$s 0, 0\n";
print "\tfsetc$s 0x3f, 0x3f\n";
}
print "\n";
 
# Clear flags
 
foreach $s (@sf) {
print "\tfclrf$s\n";
}
print "\n";
 
# Check flags
 
foreach $s (@sf) {
print "\tfchkf$s _start\n";
}
print "\n";
 
# Misc
 
print "\tbreak.f 0\n";
print "\tnop.f 0;;\n";
print "\n";
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/regval.s
0,0 → 1,48
.explicit
rr1:
.reg.val r1, 0xE000000000000000
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr2:
.reg.val r1, 0
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr3:
movl r1 = 0xE000000000000000
;;
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr4:
mov r1 = 0
;;
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr5:
movl r1 = xyz+0xE000000000000000
;;
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr6:
dep.z r1 = 1, 61, 3
;;
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
rr7:
dep.z r1 = -1, 0, 61
;;
mov rr[r0] = r0
mov rr[r1] = r0
br.ret.sptk rp
;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/regs.d
0,0 → 1,2349
#as: -xnone
#objdump: -d
#name: ia64 regs
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+ <_start>:
[ ]*[a-f0-9]+: 01 08 00 00 00 21 \[MII\] mov r1=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 00 00 00 21 \[MII\] mov r2=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 00 00 00 21 \[MII\] mov r3=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 00 00 00 21 \[MII\] mov r4=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 00 00 00 21 \[MII\] mov r5=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 00 00 00 21 \[MII\] mov r6=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 00 00 00 21 \[MII\] mov r7=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 00 00 00 21 \[MII\] mov r8=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 00 00 00 21 \[MII\] mov r9=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 00 00 00 21 \[MII\] mov r10=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 00 00 00 21 \[MII\] mov r11=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 00 00 00 21 \[MII\] mov r12=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 00 00 00 21 \[MII\] mov r13=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 00 00 00 21 \[MII\] mov r14=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 00 00 00 21 \[MII\] mov r15=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 00 00 00 21 \[MII\] mov r16=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 00 00 00 21 \[MII\] mov r17=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 00 00 00 21 \[MII\] mov r18=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 00 00 00 21 \[MII\] mov r19=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 00 00 00 21 \[MII\] mov r20=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 00 00 00 21 \[MII\] mov r21=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 00 00 00 21 \[MII\] mov r22=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 00 00 00 21 \[MII\] mov r23=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 00 00 00 21 \[MII\] mov r24=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 00 00 00 21 \[MII\] mov r25=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 00 00 00 21 \[MII\] mov r26=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 00 00 00 21 \[MII\] mov r27=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 00 00 00 21 \[MII\] mov r28=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 00 00 00 21 \[MII\] mov r29=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 00 00 00 21 \[MII\] mov r30=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 00 00 00 21 \[MII\] mov r31=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 01 00 00 21 \[MII\] mov r32=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 01 00 00 21 \[MII\] mov r33=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 01 00 00 21 \[MII\] mov r34=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 01 00 00 21 \[MII\] mov r35=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 01 00 00 21 \[MII\] mov r36=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 01 00 00 21 \[MII\] mov r37=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 01 00 00 21 \[MII\] mov r38=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 01 00 00 21 \[MII\] mov r39=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 01 00 00 21 \[MII\] mov r40=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 01 00 00 21 \[MII\] mov r41=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 01 00 00 21 \[MII\] mov r42=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 01 00 00 21 \[MII\] mov r43=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 01 00 00 21 \[MII\] mov r44=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 01 00 00 21 \[MII\] mov r45=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 01 00 00 21 \[MII\] mov r46=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 01 00 00 21 \[MII\] mov r47=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 01 00 00 21 \[MII\] mov r48=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 01 00 00 21 \[MII\] mov r49=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 01 00 00 21 \[MII\] mov r50=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 01 00 00 21 \[MII\] mov r51=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 01 00 00 21 \[MII\] mov r52=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 01 00 00 21 \[MII\] mov r53=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 01 00 00 21 \[MII\] mov r54=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 01 00 00 21 \[MII\] mov r55=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 01 00 00 21 \[MII\] mov r56=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 01 00 00 21 \[MII\] mov r57=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 01 00 00 21 \[MII\] mov r58=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 01 00 00 21 \[MII\] mov r59=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 01 00 00 21 \[MII\] mov r60=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 01 00 00 21 \[MII\] mov r61=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 01 00 00 21 \[MII\] mov r62=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 01 00 00 21 \[MII\] mov r63=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 02 00 00 21 \[MII\] mov r64=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 02 00 00 21 \[MII\] mov r65=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 02 00 00 21 \[MII\] mov r66=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 02 00 00 21 \[MII\] mov r67=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 02 00 00 21 \[MII\] mov r68=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 02 00 00 21 \[MII\] mov r69=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 02 00 00 21 \[MII\] mov r70=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 02 00 00 21 \[MII\] mov r71=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 02 00 00 21 \[MII\] mov r72=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 02 00 00 21 \[MII\] mov r73=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 02 00 00 21 \[MII\] mov r74=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 02 00 00 21 \[MII\] mov r75=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 02 00 00 21 \[MII\] mov r76=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 02 00 00 21 \[MII\] mov r77=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 02 00 00 21 \[MII\] mov r78=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 02 00 00 21 \[MII\] mov r79=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 02 00 00 21 \[MII\] mov r80=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 02 00 00 21 \[MII\] mov r81=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 02 00 00 21 \[MII\] mov r82=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 02 00 00 21 \[MII\] mov r83=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 02 00 00 21 \[MII\] mov r84=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 02 00 00 21 \[MII\] mov r85=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 02 00 00 21 \[MII\] mov r86=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 02 00 00 21 \[MII\] mov r87=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 02 00 00 21 \[MII\] mov r88=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 02 00 00 21 \[MII\] mov r89=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 02 00 00 21 \[MII\] mov r90=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 02 00 00 21 \[MII\] mov r91=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 02 00 00 21 \[MII\] mov r92=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 02 00 00 21 \[MII\] mov r93=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 02 00 00 21 \[MII\] mov r94=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 02 00 00 21 \[MII\] mov r95=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 03 00 00 21 \[MII\] mov r96=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 03 00 00 21 \[MII\] mov r97=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 03 00 00 21 \[MII\] mov r98=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 03 00 00 21 \[MII\] mov r99=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 03 00 00 21 \[MII\] mov r100=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 03 00 00 21 \[MII\] mov r101=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 03 00 00 21 \[MII\] mov r102=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 03 00 00 21 \[MII\] mov r103=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 03 00 00 21 \[MII\] mov r104=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 03 00 00 21 \[MII\] mov r105=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 03 00 00 21 \[MII\] mov r106=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 03 00 00 21 \[MII\] mov r107=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 03 00 00 21 \[MII\] mov r108=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 03 00 00 21 \[MII\] mov r109=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 03 00 00 21 \[MII\] mov r110=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 03 00 00 21 \[MII\] mov r111=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 03 00 00 21 \[MII\] mov r112=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 03 00 00 21 \[MII\] mov r113=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 03 00 00 21 \[MII\] mov r114=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 03 00 00 21 \[MII\] mov r115=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 03 00 00 21 \[MII\] mov r116=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 03 00 00 21 \[MII\] mov r117=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 03 00 00 21 \[MII\] mov r118=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 03 00 00 21 \[MII\] mov r119=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 03 00 00 21 \[MII\] mov r120=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 03 00 00 21 \[MII\] mov r121=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 03 00 00 21 \[MII\] mov r122=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 03 00 00 21 \[MII\] mov r123=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 03 00 00 21 \[MII\] mov r124=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 03 00 00 21 \[MII\] mov r125=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 03 00 00 21 \[MII\] mov r126=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 03 00 00 21 \[MII\] mov r127=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 01 00 00 21 \[MII\] mov r32=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 01 00 00 21 \[MII\] mov r33=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 01 00 00 21 \[MII\] mov r34=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 01 00 00 21 \[MII\] mov r35=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 01 00 00 21 \[MII\] mov r36=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 01 00 00 21 \[MII\] mov r37=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 01 00 00 21 \[MII\] mov r38=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 01 00 00 21 \[MII\] mov r39=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 01 00 00 21 \[MII\] mov r40=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 01 00 00 21 \[MII\] mov r41=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 01 00 00 21 \[MII\] mov r42=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 01 00 00 21 \[MII\] mov r43=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 01 00 00 21 \[MII\] mov r44=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 01 00 00 21 \[MII\] mov r45=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 01 00 00 21 \[MII\] mov r46=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 01 00 00 21 \[MII\] mov r47=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 01 00 00 21 \[MII\] mov r48=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 01 00 00 21 \[MII\] mov r49=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 01 00 00 21 \[MII\] mov r50=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 01 00 00 21 \[MII\] mov r51=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 01 00 00 21 \[MII\] mov r52=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 01 00 00 21 \[MII\] mov r53=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 01 00 00 21 \[MII\] mov r54=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 01 00 00 21 \[MII\] mov r55=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 01 00 00 21 \[MII\] mov r56=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 01 00 00 21 \[MII\] mov r57=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 01 00 00 21 \[MII\] mov r58=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 01 00 00 21 \[MII\] mov r59=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 01 00 00 21 \[MII\] mov r60=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 01 00 00 21 \[MII\] mov r61=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 01 00 00 21 \[MII\] mov r62=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 01 00 00 21 \[MII\] mov r63=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 02 00 00 21 \[MII\] mov r64=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 02 00 00 21 \[MII\] mov r65=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 02 00 00 21 \[MII\] mov r66=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 02 00 00 21 \[MII\] mov r67=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 02 00 00 21 \[MII\] mov r68=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 02 00 00 21 \[MII\] mov r69=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 02 00 00 21 \[MII\] mov r70=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 02 00 00 21 \[MII\] mov r71=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 02 00 00 21 \[MII\] mov r72=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 02 00 00 21 \[MII\] mov r73=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 02 00 00 21 \[MII\] mov r74=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 02 00 00 21 \[MII\] mov r75=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 02 00 00 21 \[MII\] mov r76=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 02 00 00 21 \[MII\] mov r77=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 02 00 00 21 \[MII\] mov r78=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 02 00 00 21 \[MII\] mov r79=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 02 00 00 21 \[MII\] mov r80=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 02 00 00 21 \[MII\] mov r81=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 02 00 00 21 \[MII\] mov r82=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 02 00 00 21 \[MII\] mov r83=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 02 00 00 21 \[MII\] mov r84=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 02 00 00 21 \[MII\] mov r85=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 02 00 00 21 \[MII\] mov r86=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 02 00 00 21 \[MII\] mov r87=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 02 00 00 21 \[MII\] mov r88=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 02 00 00 21 \[MII\] mov r89=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 02 00 00 21 \[MII\] mov r90=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 02 00 00 21 \[MII\] mov r91=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 02 00 00 21 \[MII\] mov r92=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 02 00 00 21 \[MII\] mov r93=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 02 00 00 21 \[MII\] mov r94=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 02 00 00 21 \[MII\] mov r95=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 03 00 00 21 \[MII\] mov r96=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 03 00 00 21 \[MII\] mov r97=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 03 00 00 21 \[MII\] mov r98=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 03 00 00 21 \[MII\] mov r99=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 03 00 00 21 \[MII\] mov r100=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 03 00 00 21 \[MII\] mov r101=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 03 00 00 21 \[MII\] mov r102=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 03 00 00 21 \[MII\] mov r103=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 03 00 00 21 \[MII\] mov r104=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 03 00 00 21 \[MII\] mov r105=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 03 00 00 21 \[MII\] mov r106=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 03 00 00 21 \[MII\] mov r107=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 03 00 00 21 \[MII\] mov r108=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 03 00 00 21 \[MII\] mov r109=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 03 00 00 21 \[MII\] mov r110=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 03 00 00 21 \[MII\] mov r111=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 03 00 00 21 \[MII\] mov r112=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 03 00 00 21 \[MII\] mov r113=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 03 00 00 21 \[MII\] mov r114=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 03 00 00 21 \[MII\] mov r115=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 03 00 00 21 \[MII\] mov r116=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 03 00 00 21 \[MII\] mov r117=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 03 00 00 21 \[MII\] mov r118=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 03 00 00 21 \[MII\] mov r119=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 03 00 00 21 \[MII\] mov r120=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 03 00 00 21 \[MII\] mov r121=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 03 00 00 21 \[MII\] mov r122=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 03 00 00 21 \[MII\] mov r123=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 03 00 00 21 \[MII\] mov r124=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 03 00 00 21 \[MII\] mov r125=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 03 00 00 21 \[MII\] mov r126=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 03 00 00 21 \[MII\] mov r127=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 01 00 00 21 \[MII\] mov r32=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 01 00 00 21 \[MII\] mov r33=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 01 00 00 21 \[MII\] mov r34=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 01 00 00 21 \[MII\] mov r35=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 01 00 00 21 \[MII\] mov r36=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 01 00 00 21 \[MII\] mov r37=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 01 00 00 21 \[MII\] mov r38=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 01 00 00 21 \[MII\] mov r39=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 01 00 00 21 \[MII\] mov r40=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 01 00 00 21 \[MII\] mov r41=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 01 00 00 21 \[MII\] mov r42=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 01 00 00 21 \[MII\] mov r43=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 01 00 00 21 \[MII\] mov r44=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 01 00 00 21 \[MII\] mov r45=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 01 00 00 21 \[MII\] mov r46=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 01 00 00 21 \[MII\] mov r47=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 01 00 00 21 \[MII\] mov r48=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 01 00 00 21 \[MII\] mov r49=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 01 00 00 21 \[MII\] mov r50=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 01 00 00 21 \[MII\] mov r51=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 01 00 00 21 \[MII\] mov r52=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 01 00 00 21 \[MII\] mov r53=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 01 00 00 21 \[MII\] mov r54=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 01 00 00 21 \[MII\] mov r55=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 01 00 00 21 \[MII\] mov r56=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 01 00 00 21 \[MII\] mov r57=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 01 00 00 21 \[MII\] mov r58=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 01 00 00 21 \[MII\] mov r59=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 01 00 00 21 \[MII\] mov r60=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 01 00 00 21 \[MII\] mov r61=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 01 00 00 21 \[MII\] mov r62=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 01 00 00 21 \[MII\] mov r63=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 02 00 00 21 \[MII\] mov r64=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 02 00 00 21 \[MII\] mov r65=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 02 00 00 21 \[MII\] mov r66=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 02 00 00 21 \[MII\] mov r67=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 02 00 00 21 \[MII\] mov r68=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 02 00 00 21 \[MII\] mov r69=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 02 00 00 21 \[MII\] mov r70=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 02 00 00 21 \[MII\] mov r71=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 02 00 00 21 \[MII\] mov r72=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 02 00 00 21 \[MII\] mov r73=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 02 00 00 21 \[MII\] mov r74=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 02 00 00 21 \[MII\] mov r75=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 02 00 00 21 \[MII\] mov r76=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 02 00 00 21 \[MII\] mov r77=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 02 00 00 21 \[MII\] mov r78=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 02 00 00 21 \[MII\] mov r79=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 02 00 00 21 \[MII\] mov r80=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 02 00 00 21 \[MII\] mov r81=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 02 00 00 21 \[MII\] mov r82=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 02 00 00 21 \[MII\] mov r83=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 02 00 00 21 \[MII\] mov r84=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 02 00 00 21 \[MII\] mov r85=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 02 00 00 21 \[MII\] mov r86=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 02 00 00 21 \[MII\] mov r87=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 02 00 00 21 \[MII\] mov r88=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 02 00 00 21 \[MII\] mov r89=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 02 00 00 21 \[MII\] mov r90=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 02 00 00 21 \[MII\] mov r91=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 02 00 00 21 \[MII\] mov r92=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 02 00 00 21 \[MII\] mov r93=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 02 00 00 21 \[MII\] mov r94=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 02 00 00 21 \[MII\] mov r95=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 03 00 00 21 \[MII\] mov r96=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 03 00 00 21 \[MII\] mov r97=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 03 00 00 21 \[MII\] mov r98=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 03 00 00 21 \[MII\] mov r99=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 03 00 00 21 \[MII\] mov r100=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 03 00 00 21 \[MII\] mov r101=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 03 00 00 21 \[MII\] mov r102=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 03 00 00 21 \[MII\] mov r103=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 03 00 00 21 \[MII\] mov r104=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 03 00 00 21 \[MII\] mov r105=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 03 00 00 21 \[MII\] mov r106=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 03 00 00 21 \[MII\] mov r107=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 03 00 00 21 \[MII\] mov r108=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 03 00 00 21 \[MII\] mov r109=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 03 00 00 21 \[MII\] mov r110=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 03 00 00 21 \[MII\] mov r111=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 03 00 00 21 \[MII\] mov r112=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 03 00 00 21 \[MII\] mov r113=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 03 00 00 21 \[MII\] mov r114=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 03 00 00 21 \[MII\] mov r115=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 03 00 00 21 \[MII\] mov r116=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 03 00 00 21 \[MII\] mov r117=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 03 00 00 21 \[MII\] mov r118=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 03 00 00 21 \[MII\] mov r119=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 03 00 00 21 \[MII\] mov r120=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 03 00 00 21 \[MII\] mov r121=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 03 00 00 21 \[MII\] mov r122=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 03 00 00 21 \[MII\] mov r123=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 03 00 00 21 \[MII\] mov r124=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 03 00 00 21 \[MII\] mov r125=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 03 00 00 21 \[MII\] mov r126=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 03 00 00 21 \[MII\] mov r127=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 01 00 00 21 \[MII\] mov r32=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 01 00 00 21 \[MII\] mov r33=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 01 00 00 21 \[MII\] mov r34=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 01 00 00 21 \[MII\] mov r35=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 01 00 00 21 \[MII\] mov r36=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 01 00 00 21 \[MII\] mov r37=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 01 00 00 21 \[MII\] mov r38=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 01 00 00 21 \[MII\] mov r39=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 01 00 00 21 \[MII\] mov r40=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 01 00 00 21 \[MII\] mov r41=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 01 00 00 21 \[MII\] mov r42=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 01 00 00 21 \[MII\] mov r43=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 01 00 00 21 \[MII\] mov r44=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 01 00 00 21 \[MII\] mov r45=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 01 00 00 21 \[MII\] mov r46=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 01 00 00 21 \[MII\] mov r47=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 01 00 00 21 \[MII\] mov r48=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 01 00 00 21 \[MII\] mov r49=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 01 00 00 21 \[MII\] mov r50=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 01 00 00 21 \[MII\] mov r51=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 01 00 00 21 \[MII\] mov r52=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 01 00 00 21 \[MII\] mov r53=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 01 00 00 21 \[MII\] mov r54=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 01 00 00 21 \[MII\] mov r55=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 01 00 00 21 \[MII\] mov r56=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 01 00 00 21 \[MII\] mov r57=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 01 00 00 21 \[MII\] mov r58=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 01 00 00 21 \[MII\] mov r59=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 01 00 00 21 \[MII\] mov r60=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 01 00 00 21 \[MII\] mov r61=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 01 00 00 21 \[MII\] mov r62=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 01 00 00 21 \[MII\] mov r63=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 02 00 00 21 \[MII\] mov r64=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 02 00 00 21 \[MII\] mov r65=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 02 00 00 21 \[MII\] mov r66=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 02 00 00 21 \[MII\] mov r67=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 02 00 00 21 \[MII\] mov r68=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 02 00 00 21 \[MII\] mov r69=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 02 00 00 21 \[MII\] mov r70=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 02 00 00 21 \[MII\] mov r71=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 02 00 00 21 \[MII\] mov r72=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 02 00 00 21 \[MII\] mov r73=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 02 00 00 21 \[MII\] mov r74=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 02 00 00 21 \[MII\] mov r75=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 02 00 00 21 \[MII\] mov r76=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 02 00 00 21 \[MII\] mov r77=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 02 00 00 21 \[MII\] mov r78=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 02 00 00 21 \[MII\] mov r79=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 02 00 00 21 \[MII\] mov r80=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 02 00 00 21 \[MII\] mov r81=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 02 00 00 21 \[MII\] mov r82=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 02 00 00 21 \[MII\] mov r83=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 02 00 00 21 \[MII\] mov r84=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 02 00 00 21 \[MII\] mov r85=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 02 00 00 21 \[MII\] mov r86=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 02 00 00 21 \[MII\] mov r87=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 02 00 00 21 \[MII\] mov r88=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 02 00 00 21 \[MII\] mov r89=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 02 00 00 21 \[MII\] mov r90=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 02 00 00 21 \[MII\] mov r91=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 02 00 00 21 \[MII\] mov r92=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 02 00 00 21 \[MII\] mov r93=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 02 00 00 21 \[MII\] mov r94=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 02 00 00 21 \[MII\] mov r95=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 00 03 00 00 21 \[MII\] mov r96=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 03 00 00 21 \[MII\] mov r97=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 10 03 00 00 21 \[MII\] mov r98=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 18 03 00 00 21 \[MII\] mov r99=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 20 03 00 00 21 \[MII\] mov r100=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 28 03 00 00 21 \[MII\] mov r101=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 30 03 00 00 21 \[MII\] mov r102=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 38 03 00 00 21 \[MII\] mov r103=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 03 00 00 21 \[MII\] mov r104=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 03 00 00 21 \[MII\] mov r105=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 03 00 00 21 \[MII\] mov r106=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 03 00 00 21 \[MII\] mov r107=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 60 03 00 00 21 \[MII\] mov r108=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 68 03 00 00 21 \[MII\] mov r109=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 70 03 00 00 21 \[MII\] mov r110=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 78 03 00 00 21 \[MII\] mov r111=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 80 03 00 00 21 \[MII\] mov r112=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 88 03 00 00 21 \[MII\] mov r113=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 90 03 00 00 21 \[MII\] mov r114=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 98 03 00 00 21 \[MII\] mov r115=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a0 03 00 00 21 \[MII\] mov r116=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 a8 03 00 00 21 \[MII\] mov r117=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b0 03 00 00 21 \[MII\] mov r118=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 b8 03 00 00 21 \[MII\] mov r119=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c0 03 00 00 21 \[MII\] mov r120=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 c8 03 00 00 21 \[MII\] mov r121=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d0 03 00 00 21 \[MII\] mov r122=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 d8 03 00 00 21 \[MII\] mov r123=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e0 03 00 00 21 \[MII\] mov r124=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 e8 03 00 00 21 \[MII\] mov r125=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f0 03 00 00 21 \[MII\] mov r126=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 f8 03 00 00 21 \[MII\] mov r127=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 40 00 00 00 21 \[MII\] mov r8=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 48 00 00 00 21 \[MII\] mov r9=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 50 00 00 00 21 \[MII\] mov r10=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 58 00 00 00 21 \[MII\] mov r11=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 00 00 00 21 \[MII\] mov r1=r0
[ ]*[a-f0-9]+: c0 00 00 00 42 a0 mov r12=r0
[ ]*[a-f0-9]+: 01 00 00 84 mov r13=r0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 00 00 20 00 00 mov f2=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 00 00 20 00 00 mov f3=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 00 00 20 00 00 mov f4=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 00 00 20 00 00 mov f5=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 00 00 20 00 00 mov f6=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 00 00 20 00 00 mov f7=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 00 00 20 00 00 mov f8=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 00 00 20 00 00 mov f9=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 00 00 20 00 00 mov f10=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 00 00 20 00 00 mov f11=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 00 00 20 00 00 mov f12=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 00 00 20 00 00 mov f13=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 00 00 20 00 00 mov f14=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 00 00 20 00 00 mov f15=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 01 00 20 00 00 mov f16=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 01 00 20 00 00 mov f17=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 01 00 20 00 00 mov f18=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 01 00 20 00 00 mov f19=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 01 00 20 00 00 mov f20=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 01 00 20 00 00 mov f21=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 01 00 20 00 00 mov f22=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 01 00 20 00 00 mov f23=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 01 00 20 00 00 mov f24=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 01 00 20 00 00 mov f25=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 01 00 20 00 00 mov f26=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 01 00 20 00 00 mov f27=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 01 00 20 00 00 mov f28=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 01 00 20 00 00 mov f29=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 01 00 20 00 00 mov f30=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 01 00 20 00 00 mov f31=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 02 00 20 00 00 mov f32=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 02 00 20 00 00 mov f33=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 02 00 20 00 00 mov f34=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 02 00 20 00 00 mov f35=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 02 00 20 00 00 mov f36=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 02 00 20 00 00 mov f37=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 02 00 20 00 00 mov f38=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 02 00 20 00 00 mov f39=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 02 00 20 00 00 mov f40=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 02 00 20 00 00 mov f41=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 02 00 20 00 00 mov f42=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 02 00 20 00 00 mov f43=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 02 00 20 00 00 mov f44=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 02 00 20 00 00 mov f45=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 02 00 20 00 00 mov f46=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 02 00 20 00 00 mov f47=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 03 00 20 00 00 mov f48=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 03 00 20 00 00 mov f49=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 03 00 20 00 00 mov f50=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 03 00 20 00 00 mov f51=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 03 00 20 00 00 mov f52=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 03 00 20 00 00 mov f53=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 03 00 20 00 00 mov f54=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 03 00 20 00 00 mov f55=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 03 00 20 00 00 mov f56=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 03 00 20 00 00 mov f57=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 03 00 20 00 00 mov f58=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 03 00 20 00 00 mov f59=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 03 00 20 00 00 mov f60=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 03 00 20 00 00 mov f61=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 03 00 20 00 00 mov f62=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 03 00 20 00 00 mov f63=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 04 00 20 00 00 mov f64=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 04 00 20 00 00 mov f65=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 04 00 20 00 00 mov f66=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 04 00 20 00 00 mov f67=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 04 00 20 00 00 mov f68=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 04 00 20 00 00 mov f69=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 04 00 20 00 00 mov f70=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 04 00 20 00 00 mov f71=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 04 00 20 00 00 mov f72=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 04 00 20 00 00 mov f73=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 04 00 20 00 00 mov f74=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 04 00 20 00 00 mov f75=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 04 00 20 00 00 mov f76=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 04 00 20 00 00 mov f77=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 04 00 20 00 00 mov f78=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 04 00 20 00 00 mov f79=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 05 00 20 00 00 mov f80=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 05 00 20 00 00 mov f81=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 05 00 20 00 00 mov f82=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 05 00 20 00 00 mov f83=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 05 00 20 00 00 mov f84=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 05 00 20 00 00 mov f85=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 05 00 20 00 00 mov f86=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 05 00 20 00 00 mov f87=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 05 00 20 00 00 mov f88=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 05 00 20 00 00 mov f89=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 05 00 20 00 00 mov f90=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 05 00 20 00 00 mov f91=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 05 00 20 00 00 mov f92=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 05 00 20 00 00 mov f93=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 05 00 20 00 00 mov f94=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 05 00 20 00 00 mov f95=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 06 00 20 00 00 mov f96=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 06 00 20 00 00 mov f97=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 06 00 20 00 00 mov f98=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 06 00 20 00 00 mov f99=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 06 00 20 00 00 mov f100=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 06 00 20 00 00 mov f101=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 06 00 20 00 00 mov f102=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 06 00 20 00 00 mov f103=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 06 00 20 00 00 mov f104=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 06 00 20 00 00 mov f105=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 06 00 20 00 00 mov f106=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 06 00 20 00 00 mov f107=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 06 00 20 00 00 mov f108=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 06 00 20 00 00 mov f109=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 06 00 20 00 00 mov f110=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 06 00 20 00 00 mov f111=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 07 00 20 00 00 mov f112=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 07 00 20 00 00 mov f113=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 20 07 00 20 00 00 mov f114=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 30 07 00 20 00 00 mov f115=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 40 07 00 20 00 00 mov f116=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 50 07 00 20 00 00 mov f117=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 60 07 00 20 00 00 mov f118=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 70 07 00 20 00 00 mov f119=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 07 00 20 00 00 mov f120=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 07 00 20 00 00 mov f121=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 07 00 20 00 00 mov f122=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 07 00 20 00 00 mov f123=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 07 00 20 00 00 mov f124=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 07 00 20 00 00 mov f125=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 07 00 20 00 00 mov f126=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 07 00 20 00 00 mov f127=f0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 08 04 20 00 00 mov f8=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 08 04 20 00 00 mov f9=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 08 04 20 00 00 mov f10=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 08 04 20 00 00 mov f11=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 08 04 20 00 00 mov f12=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 08 04 20 00 00 mov f13=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 08 04 20 00 00 mov f14=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 08 04 20 00 00 mov f15=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 80 08 04 20 00 00 mov f8=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: 90 08 04 20 00 00 mov f9=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: a0 08 04 20 00 00 mov f10=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: b0 08 04 20 00 00 mov f11=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: c0 08 04 20 00 00 mov f12=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: d0 08 04 20 00 00 mov f13=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: e0 08 04 20 00 00 mov f14=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 0d 00 00 00 01 00 \[MFI\] nop.m 0x0
[ ]*[a-f0-9]+: f0 08 04 20 00 00 mov f15=f1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 08 00 00 00 21 \[MII\] mov r1=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 10 00 00 00 21 \[MII\] \(p01\) mov r2=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 18 00 00 00 21 \[MII\] \(p02\) mov r3=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 20 00 00 00 21 \[MII\] \(p03\) mov r4=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 28 00 00 00 21 \[MII\] \(p04\) mov r5=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 30 00 00 00 21 \[MII\] \(p05\) mov r6=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 38 00 00 00 21 \[MII\] \(p06\) mov r7=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 40 00 00 00 21 \[MII\] \(p07\) mov r8=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 49 00 00 00 21 \[MII\] \(p08\) mov r9=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 51 00 00 00 21 \[MII\] \(p09\) mov r10=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 59 00 00 00 21 \[MII\] \(p10\) mov r11=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 61 00 00 00 21 \[MII\] \(p11\) mov r12=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 69 00 00 00 21 \[MII\] \(p12\) mov r13=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 71 00 00 00 21 \[MII\] \(p13\) mov r14=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 79 00 00 00 21 \[MII\] \(p14\) mov r15=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 81 00 00 00 21 \[MII\] \(p15\) mov r16=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 8a 00 00 00 21 \[MII\] \(p16\) mov r17=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 92 00 00 00 21 \[MII\] \(p17\) mov r18=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 9a 00 00 00 21 \[MII\] \(p18\) mov r19=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 a2 00 00 00 21 \[MII\] \(p19\) mov r20=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 aa 00 00 00 21 \[MII\] \(p20\) mov r21=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 b2 00 00 00 21 \[MII\] \(p21\) mov r22=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 ba 00 00 00 21 \[MII\] \(p22\) mov r23=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 c2 00 00 00 21 \[MII\] \(p23\) mov r24=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 cb 00 00 00 21 \[MII\] \(p24\) mov r25=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 d3 00 00 00 21 \[MII\] \(p25\) mov r26=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 db 00 00 00 21 \[MII\] \(p26\) mov r27=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 e3 00 00 00 21 \[MII\] \(p27\) mov r28=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 eb 00 00 00 21 \[MII\] \(p28\) mov r29=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 f3 00 00 00 21 \[MII\] \(p29\) mov r30=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 fb 00 00 00 21 \[MII\] \(p30\) mov r31=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 03 01 00 00 21 \[MII\] \(p31\) mov r32=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 0c 01 00 00 21 \[MII\] \(p32\) mov r33=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 14 01 00 00 21 \[MII\] \(p33\) mov r34=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 1c 01 00 00 21 \[MII\] \(p34\) mov r35=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 24 01 00 00 21 \[MII\] \(p35\) mov r36=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 2c 01 00 00 21 \[MII\] \(p36\) mov r37=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 34 01 00 00 21 \[MII\] \(p37\) mov r38=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 3c 01 00 00 21 \[MII\] \(p38\) mov r39=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 44 01 00 00 21 \[MII\] \(p39\) mov r40=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 4d 01 00 00 21 \[MII\] \(p40\) mov r41=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 55 01 00 00 21 \[MII\] \(p41\) mov r42=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 5d 01 00 00 21 \[MII\] \(p42\) mov r43=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 65 01 00 00 21 \[MII\] \(p43\) mov r44=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 6d 01 00 00 21 \[MII\] \(p44\) mov r45=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 75 01 00 00 21 \[MII\] \(p45\) mov r46=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 7d 01 00 00 21 \[MII\] \(p46\) mov r47=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 85 01 00 00 21 \[MII\] \(p47\) mov r48=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 8e 01 00 00 21 \[MII\] \(p48\) mov r49=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 96 01 00 00 21 \[MII\] \(p49\) mov r50=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 9e 01 00 00 21 \[MII\] \(p50\) mov r51=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 a6 01 00 00 21 \[MII\] \(p51\) mov r52=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 ae 01 00 00 21 \[MII\] \(p52\) mov r53=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 b6 01 00 00 21 \[MII\] \(p53\) mov r54=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 be 01 00 00 21 \[MII\] \(p54\) mov r55=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 c6 01 00 00 21 \[MII\] \(p55\) mov r56=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 01 cf 01 00 00 21 \[MII\] \(p56\) mov r57=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 21 d7 01 00 00 21 \[MII\] \(p57\) mov r58=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 41 df 01 00 00 21 \[MII\] \(p58\) mov r59=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 61 e7 01 00 00 21 \[MII\] \(p59\) mov r60=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 81 ef 01 00 00 21 \[MII\] \(p60\) mov r61=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: a1 f7 01 00 00 21 \[MII\] \(p61\) mov r62=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: c1 ff 01 00 00 21 \[MII\] \(p62\) mov r63=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: e1 07 02 00 00 21 \[MII\] \(p63\) mov r64=r0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 00 cc 00 mov r1=pr;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b0=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b1=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 40 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b2=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 60 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b3=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 80 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b4=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 a0 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b5=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 c0 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b6=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 e0 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b7=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 00 07 mov b0=r0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 00 44 08 00 mov.m r1=ar.k0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 04 44 08 00 mov.m r1=ar.k1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 08 44 08 00 mov.m r1=ar.k2
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 0c 44 08 00 mov.m r1=ar.k3
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 10 44 08 00 mov.m r1=ar.k4
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 14 44 08 00 mov.m r1=ar.k5
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 18 44 08 00 mov.m r1=ar.k6
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 1c 44 08 00 mov.m r1=ar.k7
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 40 44 08 00 mov.m r1=ar.rsc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 44 44 08 00 mov.m r1=ar.bsp
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 48 44 08 00 mov.m r1=ar.bspstore
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 4c 44 08 00 mov.m r1=ar.rnat
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 54 44 08 00 mov.m r1=ar.fcr
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 60 44 08 00 mov.m r1=ar.eflag
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 64 44 08 00 mov.m r1=ar.csd
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 68 44 08 00 mov.m r1=ar.ssd
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 6c 44 08 00 mov.m r1=ar.cflg
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 70 44 08 00 mov.m r1=ar.fsr
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 74 44 08 00 mov.m r1=ar.fir
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 78 44 08 00 mov.m r1=ar.fdr
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 80 44 08 00 mov.m r1=ar.ccv
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 90 44 08 00 mov.m r1=ar.unat
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 a0 44 08 00 mov.m r1=ar.fpsr
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 b0 44 08 00 mov.m r1=ar.itc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 b4 44 08 00 mov.m r1=ar.ruc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c0 44 08 00 mov.m r1=ar48
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c4 44 08 00 mov.m r1=ar49
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c8 44 08 00 mov.m r1=ar50
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 cc 44 08 00 mov.m r1=ar51
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d0 44 08 00 mov.m r1=ar52
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d4 44 08 00 mov.m r1=ar53
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d8 44 08 00 mov.m r1=ar54
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 dc 44 08 00 mov.m r1=ar55
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e0 44 08 00 mov.m r1=ar56
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e4 44 08 00 mov.m r1=ar57
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e8 44 08 00 mov.m r1=ar58
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 ec 44 08 00 mov.m r1=ar59
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f0 44 08 00 mov.m r1=ar60
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f4 44 08 00 mov.m r1=ar61
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f8 44 08 00 mov.m r1=ar62
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 fc 44 08 00 mov.m r1=ar63
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 00 ca 00 mov.i r1=ar.pfs;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 ca 00 mov.i r1=ar.lc;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 10 ca 00 mov.i r1=ar.ec;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c0 45 08 00 mov.m r1=ar112
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c4 45 08 00 mov.m r1=ar113
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 c8 45 08 00 mov.m r1=ar114
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 cc 45 08 00 mov.m r1=ar115
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d0 45 08 00 mov.m r1=ar116
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d4 45 08 00 mov.m r1=ar117
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 d8 45 08 00 mov.m r1=ar118
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 dc 45 08 00 mov.m r1=ar119
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e0 45 08 00 mov.m r1=ar120
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e4 45 08 00 mov.m r1=ar121
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 e8 45 08 00 mov.m r1=ar122
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 ec 45 08 00 mov.m r1=ar123
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f0 45 08 00 mov.m r1=ar124
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f4 45 08 00 mov.m r1=ar125
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 f8 45 08 00 mov.m r1=ar126
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 fc 45 08 00 mov.m r1=ar127
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 00 44 08 00 mov.m r1=ar.k0
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 04 44 08 00 mov.m r1=ar.k1
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 08 44 08 00 mov.m r1=ar.k2
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 0c 44 08 00 mov.m r1=ar.k3
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 10 44 08 00 mov.m r1=ar.k4
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 14 44 08 00 mov.m r1=ar.k5
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 18 44 08 00 mov.m r1=ar.k6
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 1c 44 08 00 mov.m r1=ar.k7
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 40 44 08 00 mov.m r1=ar.rsc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 44 44 08 00 mov.m r1=ar.bsp
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 48 44 08 00 mov.m r1=ar.bspstore
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 4c 44 08 00 mov.m r1=ar.rnat
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 80 44 08 00 mov.m r1=ar.ccv
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 90 44 08 00 mov.m r1=ar.unat
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 a0 44 08 00 mov.m r1=ar.fpsr
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 b0 44 08 00 mov.m r1=ar.itc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 10 00 b4 44 08 00 mov.m r1=ar.ruc
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 00 ca 00 mov.i r1=ar.pfs;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 08 ca 00 mov.i r1=ar.lc;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 10 ca 00 mov.i r1=ar.ec;;
[ ]*[a-f0-9]+: 1d 08 00 00 24 04 \[MFB\] mov r1=cr.dcr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 02 24 04 \[MFB\] mov r1=cr.itm
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 04 24 04 \[MFB\] mov r1=cr.iva
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 10 24 04 \[MFB\] mov r1=cr.pta
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 12 24 04 \[MFB\] mov r1=cr9
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 20 24 04 \[MFB\] mov r1=cr.ipsr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 22 24 04 \[MFB\] mov r1=cr.isr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 26 24 04 \[MFB\] mov r1=cr.iip
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 28 24 04 \[MFB\] mov r1=cr.ifa
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 2a 24 04 \[MFB\] mov r1=cr.itir
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 2c 24 04 \[MFB\] mov r1=cr.iipa
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 2e 24 04 \[MFB\] mov r1=cr.ifs
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 30 24 04 \[MFB\] mov r1=cr.iim
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 32 24 04 \[MFB\] mov r1=cr.iha
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 80 24 04 \[MFB\] mov r1=cr.lid
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 82 24 04 \[MFB\] mov r1=cr.ivr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 84 24 04 \[MFB\] mov r1=cr.tpr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 86 24 04 \[MFB\] mov r1=cr.eoi
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 88 24 04 \[MFB\] mov r1=cr.irr0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8a 24 04 \[MFB\] mov r1=cr.irr1
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8c 24 04 \[MFB\] mov r1=cr.irr2
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8e 24 04 \[MFB\] mov r1=cr.irr3
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 90 24 04 \[MFB\] mov r1=cr.itv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 92 24 04 \[MFB\] mov r1=cr.pmv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 94 24 04 \[MFB\] mov r1=cr.cmcv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 a0 24 04 \[MFB\] mov r1=cr.lrr0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 a2 24 04 \[MFB\] mov r1=cr.lrr1
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 00 24 04 \[MFB\] mov r1=cr.dcr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 02 24 04 \[MFB\] mov r1=cr.itm
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 04 24 04 \[MFB\] mov r1=cr.iva
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 10 24 04 \[MFB\] mov r1=cr.pta
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 20 24 04 \[MFB\] mov r1=cr.ipsr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 22 24 04 \[MFB\] mov r1=cr.isr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 26 24 04 \[MFB\] mov r1=cr.iip
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 2c 24 04 \[MFB\] mov r1=cr.iipa
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 2e 24 04 \[MFB\] mov r1=cr.ifs
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 30 24 04 \[MFB\] mov r1=cr.iim
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 32 24 04 \[MFB\] mov r1=cr.iha
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 34 24 04 \[MFB\] mov r1=cr.iib0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 36 24 04 \[MFB\] mov r1=cr.iib1
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 80 24 04 \[MFB\] mov r1=cr.lid
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 82 24 04 \[MFB\] mov r1=cr.ivr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 84 24 04 \[MFB\] mov r1=cr.tpr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 86 24 04 \[MFB\] mov r1=cr.eoi
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 88 24 04 \[MFB\] mov r1=cr.irr0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8a 24 04 \[MFB\] mov r1=cr.irr1
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8c 24 04 \[MFB\] mov r1=cr.irr2
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 8e 24 04 \[MFB\] mov r1=cr.irr3
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 90 24 04 \[MFB\] mov r1=cr.itv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 92 24 04 \[MFB\] mov r1=cr.pmv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 a0 24 04 \[MFB\] mov r1=cr.lrr0
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 a2 24 04 \[MFB\] mov r1=cr.lrr1
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 94 24 04 \[MFB\] mov r1=cr.cmcv
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 00 25 04 \[MFB\] mov r1=psr
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 1d 08 00 00 21 04 \[MFB\] mov r1=psr.um
[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.f 0x0
[ ]*[a-f0-9]+: 00 00 00 20 nop.b 0x0;;
[ ]*[a-f0-9]+: 09 00 00 00 01 00 \[MMI\] nop.m 0x0
[ ]*[a-f0-9]+: 00 00 00 02 00 20 nop.m 0x0
[ ]*[a-f0-9]+: 00 00 c0 00 mov r1=ip;;
[ ]*[a-f0-9]+: 09 08 00 06 14 04 \[MMI\] mov r1=pmc\[r3\]
[ ]*[a-f0-9]+: 20 00 10 28 08 00 mov r2=pmc\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 15 04 \[MMI\] mov r1=pmd\[r3\]
[ ]*[a-f0-9]+: 20 00 10 2a 08 00 mov r2=pmd\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 13 04 \[MMI\] mov r1=pkr\[r3\]
[ ]*[a-f0-9]+: 20 00 10 26 08 00 mov r2=pkr\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 10 04 \[MMI\] mov r1=rr\[r3\]
[ ]*[a-f0-9]+: 20 00 10 20 08 00 mov r2=rr\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 12 04 \[MMI\] mov r1=ibr\[r3\]
[ ]*[a-f0-9]+: 20 00 10 24 08 00 mov r2=ibr\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 11 04 \[MMI\] mov r1=dbr\[r3\]
[ ]*[a-f0-9]+: 20 00 10 22 08 00 mov r2=dbr\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 17 04 \[MMI\] mov r1=cpuid\[r3\]
[ ]*[a-f0-9]+: 20 00 10 2e 08 00 mov r2=cpuid\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
[ ]*[a-f0-9]+: 09 08 00 06 17 04 \[MMI\] mov r1=cpuid\[r3\]
[ ]*[a-f0-9]+: 20 00 10 2e 08 00 mov r2=cpuid\[r4\]
[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/xdata.d
0,0 → 1,47
#readelf: -S
#name: ia64 xdata
 
There are 19 section headers, starting at offset 0x[[:xdigit:]]+:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 [[:xdigit:]]+
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000000 0000000000000000 AX 0 0 16
\[ 2\] \.data PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000000 0000000000000000 WA 0 0 1
\[ 3\] \.bss NOBITS 0000000000000000 [[:xdigit:]]+
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.xdata1 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000001 0000000000000000 A 0 0 1
\[ 5\] \.xdata2 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000004 0000000000000000 A 0 0 2
\[ 6\] ,xdata3 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000008 0000000000000000 A 0 0 4
\[ 7\] \.xdata,4 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000010 0000000000000000 A 0 0 8
\[ 8\] "\.xdata5" PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000020 0000000000000000 A 0 0 16
\[ 9\] \.rela"\.xdata5" RELA 0000000000000000 [[:xdigit:]]+
0000000000000030 0000000000000018 17 8 8
\[10\] \.xreal\\1 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000008 0000000000000000 A 0 0 4
\[11\] \.xreal\+2 PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000010 0000000000000000 A 0 0 8
\[12\] \.xreal\(3\) PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000014 0000000000000000 A 0 0 16
\[13\] \.xreal\[4\] PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000020 0000000000000000 A 0 0 16
\[14\] \.xstr<1> PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000003 0000000000000000 A 0 0 1
\[15\] \.xstr\{2\} PROGBITS 0000000000000000 [[:xdigit:]]+
0000000000000004 0000000000000000 A 0 0 1
\[16\] \.shstrtab STRTAB 0000000000000000 [[:xdigit:]]+
[[:xdigit:]]+ 0000000000000000 0 0 1
\[17\] \.symtab SYMTAB 0000000000000000 [[:xdigit:]]+
[[:xdigit:]]+ 0000000000000018 18 15 8
\[18\] \.strtab STRTAB 0000000000000000 [[:xdigit:]]+
[[:xdigit:]]+ 0000000000000000 0 0 1
#pass
/trunk/gnu/binutils/gas/testsuite/gas/ia64/real.s
0,0 → 1,8
.data
.lsb
data1 -1
real10.ua 0.2
real10 0.2
data1 -1
real16.ua 0.1
real16 0.1
/trunk/gnu/binutils/gas/testsuite/gas/ia64/bundling.d
0,0 → 1,14
# objdump: -d
# name: ia64 explicit bundling
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+0 <_start>:
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MII] nop\.m 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.i 0x0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i r31=ar\.lc;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[..B] nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.. 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+br\.ret\.sptk\.few b0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-1.d
0,0 → 1,10
# objdump: -r
# name: ia64 ltoff22x-1
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+000 LTOFF22X foo
 
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pcrel.d
0,0 → 1,63
#as: -mtune=itanium1
#objdump: -rs
#name: ia64 pcrel
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.mov\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0+10[[:space:]]+PCREL22[[:space:]]+esym
0+20[[:space:]]+PCREL22[[:space:]]+esym\+0x0+20
0+30[[:space:]]+PCREL22[[:space:]]+esym
0+40[[:space:]]+PCREL22[[:space:]]+esym\+0xf+e0
 
RELOCATION RECORDS FOR \[\.movl\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0+12[[:space:]]+PCREL64I[[:space:]]+esym
0+22[[:space:]]+PCREL64I[[:space:]]+esym\+0x0+20
0+32[[:space:]]+PCREL64I[[:space:]]+esym
0+42[[:space:]]+PCREL64I[[:space:]]+esym\+0xf+e0
 
RELOCATION RECORDS FOR \[\.data8\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0+10[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
0+20[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0x0+20
0+30[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0xf+e0
 
RELOCATION RECORDS FOR \[\.data4\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0+10[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
0+20[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0x0+20
0+30[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0xf+e0
 
 
Contents of section \.mov:
0+00 1d108001 00240000 00020000 00000020 .*
0+10 1d100000 00240000 00020000 00000020 .*
0+20 1d100000 00240000 00020000 00000020 .*
0+30 1d100000 00240000 00020000 00000020 .*
0+40 1d100000 00240000 00020000 00000020 .*
0+50 1d100000 00240000 00020000 00000020 .*
Contents of section \.movl:
0+00 05000000 01000000 00000040 00060060 .*
0+10 05000000 01000000 00000040 00000060 .*
0+20 05000000 01000000 00000040 00000060 .*
0+30 05000000 01000000 00000040 00000060 .*
0+40 05000000 01000000 00000040 00000060 .*
0+50 05000000 01000000 00000040 00000060 .*
Contents of section \.data8:
0+00 [06]0000000 000000[06]0 00000000 00000000 .*
0+10 00000000 00000000 00000000 00000000 .*
0+20 00000000 00000000 00000000 00000000 .*
0+30 00000000 00000000 00000000 00000000 .*
0+40 00000000 00000000 00000000 00000000 .*
0+50 00000000 00000000 00000000 00000000 .*
Contents of section \.data4:
0+00 [06]00000[06]0 00000000 00000000 00000000 .*
0+10 00000000 00000000 00000000 00000000 .*
0+20 00000000 00000000 00000000 00000000 .*
0+30 00000000 00000000 00000000 00000000 .*
0+40 00000000 00000000 00000000 00000000 .*
0+50 00000000 00000000 00000000 00000000 .*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-5.d
0,0 → 1,11
# objdump: -r
# name: ia64 ltoff22x-5
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+000 LTOFF22X foo
0+010 LDXMOV foo
 
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-mutex.d
0,0 → 1,39
# as: -xexplicit -mtune=itanium1
# objdump: -d
# name ia64 dv-mutex
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <start>:
0: 20 20 08 00 00 a4 \[MII\] \(p01\) mov r4=2
6: 40 28 00 00 c8 81 \(p02\) mov r4=5
c: 70 00 00 90 \(p03\) mov r4=7
10: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 0a 08 04 04 02 78 \[MMI\] cmp\.eq p1,p2=r1,r2;;
26: 40 10 00 00 48 81 \(p01\) mov r4=2
2c: 40 00 00 90 \(p02\) mov r4=4
30: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 20 00 rfi;;
40: 6a 08 06 04 02 78 \[MMI\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2;;
46: 40 10 00 00 48 81 \(p01\) mov r4=2
4c: 40 00 00 90 \(p02\) mov r4=4
50: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
56: 00 00 00 02 00 00 nop\.f 0x0
5c: 00 00 20 00 rfi;;
60: 0a 08 04 04 02 78 \[MMI\] cmp\.eq p1,p2=r1,r2;;
66: 40 10 00 00 48 81 \(p01\) mov r4=2
6c: 40 00 00 90 \(p02\) mov r4=4
70: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
76: 00 00 00 02 00 00 nop\.f 0x0
7c: 00 00 20 00 rfi;;
80: 6a 08 04 04 02 78 \[MMI\] \(p03\) cmp\.eq p1,p2=r1,r2;;
86: 40 10 00 00 48 81 \(p01\) mov r4=2
8c: 40 00 00 90 \(p02\) mov r4=4
90: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
96: 00 00 00 02 00 00 nop\.f 0x0
9c: 00 00 20 00 rfi;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/group-1.s
0,0 → 1,10
.section .text,"axG",@progbits,._foo,comdat
.proc _foo#
_foo:
(p6) br.cond.dptk .L37
.L48:
.L70:
.L37:
.L77:
.L74:
.endp _foo#
/trunk/gnu/binutils/gas/testsuite/gas/ia64/last.l
0,0 → 1,3
.*: Assembler messages:
.*:4: Error: .* must be last in instruction group
.*:10: Error: .* must be last in instruction group
/trunk/gnu/binutils/gas/testsuite/gas/ia64/secname.d
0,0 → 1,26
#readelf: -S
#name: ia64 section name
 
There are 8 section headers, starting at offset 0x80:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000000 0000000000000000 AX 0 0 16
\[ 2\] \.data PROGBITS 0000000000000000 00000040
0000000000000000 0000000000000000 WA 0 0 1
\[ 3\] \.bss NOBITS 0000000000000000 00000040
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.foo PROGBITS 0000000000000000 00000040
0000000000000008 0000000000000000 WA 0 0 8
\[ 5\] \.shstrtab STRTAB 0000000000000000 00000048
0000000000000031 0000000000000000 0 0 1
\[ 6\] \.symtab SYMTAB 0000000000000000 00000280
0000000000000078 0000000000000018 7 5 8
\[ 7\] \.strtab STRTAB 0000000000000000 000002f8
0000000000000001 0000000000000000 0 0 1
Key to Flags:
#...
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dependency-1.d
0,0 → 1,17
# as: -xexplicit
# objdump: -d
# name: IA64 read-before-write dependency
 
# Note - this test is based on a bug reported here:
# http://sources.redhat.com/ml/bug-gnu-utils/2003-03/msg00270.html
# With follows up on the binutils mailing list here:
# http://sources.redhat.com/ml/binutils/2003-04/msg00162.html
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <foo>:
0:.*0b 40 00 40 10 18.*\[MMI\].*ldfs f8=\[r32\];;
6:.*00 40 84 30 33 00.*stfd \[r33\]=f8
c:.*00 00 04 00.*nop\.i 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/regs.s
0,0 → 1,1020
.text
.type _start,@function
_start:
 
// Fixed and stacked integer registers.
{ .mii; mov r1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r3 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r4 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r5 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r6 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r7 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r8 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r9 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r10 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r11 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r12 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r13 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r14 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r15 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r16 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r17 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r18 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r19 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r20 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r21 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r22 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r23 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r24 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r25 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r26 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r27 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r28 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r29 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r30 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r31 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r32 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r33 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r34 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r35 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r36 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r37 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r38 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r39 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r40 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r41 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r42 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r43 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r44 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r45 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r46 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r47 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r48 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r49 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r50 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r51 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r52 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r53 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r54 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r55 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r56 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r57 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r58 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r59 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r60 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r61 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r62 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r63 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r64 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r65 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r66 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r67 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r68 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r69 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r70 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r71 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r72 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r73 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r74 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r75 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r76 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r77 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r78 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r79 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r80 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r81 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r82 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r83 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r84 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r85 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r86 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r87 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r88 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r89 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r90 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r91 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r92 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r93 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r94 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r95 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r96 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r97 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r98 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r99 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r100 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r101 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r102 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r103 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r104 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r105 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r106 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r107 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r108 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r109 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r110 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r111 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r112 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r113 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r114 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r115 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r116 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r117 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r118 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r119 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r120 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r121 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r122 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r123 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r124 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r125 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r126 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r127 = r0; nop.i 0; nop.i 0;; }
 
// Alternate names for input registers
.regstk 96, 0, 0, 0
{ .mii; mov in0 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in3 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in4 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in5 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in6 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in7 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in8 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in9 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in10 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in11 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in12 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in13 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in14 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in15 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in16 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in17 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in18 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in19 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in20 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in21 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in22 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in23 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in24 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in25 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in26 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in27 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in28 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in29 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in30 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in31 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in32 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in33 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in34 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in35 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in36 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in37 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in38 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in39 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in40 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in41 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in42 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in43 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in44 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in45 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in46 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in47 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in48 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in49 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in50 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in51 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in52 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in53 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in54 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in55 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in56 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in57 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in58 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in59 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in60 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in61 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in62 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in63 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in64 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in65 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in66 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in67 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in68 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in69 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in70 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in71 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in72 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in73 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in74 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in75 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in76 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in77 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in78 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in79 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in80 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in81 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in82 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in83 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in84 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in85 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in86 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in87 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in88 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in89 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in90 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in91 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in92 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in93 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in94 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov in95 = r0; nop.i 0; nop.i 0;; }
 
// Alternate names for output registers
.regstk 0, 0, 96, 0
{ .mii; mov out0 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out3 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out4 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out5 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out6 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out7 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out8 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out9 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out10 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out11 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out12 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out13 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out14 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out15 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out16 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out17 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out18 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out19 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out20 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out21 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out22 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out23 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out24 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out25 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out26 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out27 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out28 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out29 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out30 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out31 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out32 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out33 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out34 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out35 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out36 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out37 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out38 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out39 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out40 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out41 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out42 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out43 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out44 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out45 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out46 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out47 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out48 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out49 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out50 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out51 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out52 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out53 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out54 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out55 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out56 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out57 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out58 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out59 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out60 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out61 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out62 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out63 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out64 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out65 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out66 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out67 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out68 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out69 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out70 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out71 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out72 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out73 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out74 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out75 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out76 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out77 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out78 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out79 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out80 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out81 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out82 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out83 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out84 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out85 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out86 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out87 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out88 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out89 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out90 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out91 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out92 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out93 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out94 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov out95 = r0; nop.i 0; nop.i 0;; }
 
// Alternate names for local registers
.regstk 0, 96, 0, 0
{ .mii; mov loc0 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc3 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc4 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc5 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc6 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc7 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc8 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc9 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc10 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc11 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc12 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc13 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc14 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc15 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc16 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc17 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc18 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc19 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc20 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc21 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc22 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc23 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc24 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc25 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc26 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc27 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc28 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc29 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc30 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc31 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc32 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc33 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc34 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc35 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc36 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc37 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc38 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc39 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc40 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc41 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc42 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc43 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc44 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc45 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc46 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc47 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc48 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc49 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc50 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc51 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc52 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc53 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc54 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc55 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc56 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc57 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc58 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc59 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc60 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc61 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc62 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc63 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc64 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc65 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc66 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc67 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc68 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc69 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc70 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc71 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc72 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc73 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc74 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc75 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc76 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc77 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc78 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc79 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc80 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc81 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc82 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc83 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc84 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc85 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc86 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc87 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc88 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc89 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc90 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc91 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc92 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc93 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc94 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov loc95 = r0; nop.i 0; nop.i 0;; }
 
// Return value registers
{ .mii; mov ret0 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov ret1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov ret2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov ret3 = r0; nop.i 0; nop.i 0;; }
 
{ .mii;
mov gp = r0
mov sp = r0
mov tp = r0;; }
 
// Floating point registers
{ .mfi; mov f2 = f0 ;; }
{ .mfi; mov f3 = f0 ;; }
{ .mfi; mov f4 = f0 ;; }
{ .mfi; mov f5 = f0 ;; }
{ .mfi; mov f6 = f0 ;; }
{ .mfi; mov f7 = f0 ;; }
{ .mfi; mov f8 = f0 ;; }
{ .mfi; mov f9 = f0 ;; }
{ .mfi; mov f10 = f0 ;; }
{ .mfi; mov f11 = f0 ;; }
{ .mfi; mov f12 = f0 ;; }
{ .mfi; mov f13 = f0 ;; }
{ .mfi; mov f14 = f0 ;; }
{ .mfi; mov f15 = f0 ;; }
{ .mfi; mov f16 = f0 ;; }
{ .mfi; mov f17 = f0 ;; }
{ .mfi; mov f18 = f0 ;; }
{ .mfi; mov f19 = f0 ;; }
{ .mfi; mov f20 = f0 ;; }
{ .mfi; mov f21 = f0 ;; }
{ .mfi; mov f22 = f0 ;; }
{ .mfi; mov f23 = f0 ;; }
{ .mfi; mov f24 = f0 ;; }
{ .mfi; mov f25 = f0 ;; }
{ .mfi; mov f26 = f0 ;; }
{ .mfi; mov f27 = f0 ;; }
{ .mfi; mov f28 = f0 ;; }
{ .mfi; mov f29 = f0 ;; }
{ .mfi; mov f30 = f0 ;; }
{ .mfi; mov f31 = f0 ;; }
{ .mfi; mov f32 = f0 ;; }
{ .mfi; mov f33 = f0 ;; }
{ .mfi; mov f34 = f0 ;; }
{ .mfi; mov f35 = f0 ;; }
{ .mfi; mov f36 = f0 ;; }
{ .mfi; mov f37 = f0 ;; }
{ .mfi; mov f38 = f0 ;; }
{ .mfi; mov f39 = f0 ;; }
{ .mfi; mov f40 = f0 ;; }
{ .mfi; mov f41 = f0 ;; }
{ .mfi; mov f42 = f0 ;; }
{ .mfi; mov f43 = f0 ;; }
{ .mfi; mov f44 = f0 ;; }
{ .mfi; mov f45 = f0 ;; }
{ .mfi; mov f46 = f0 ;; }
{ .mfi; mov f47 = f0 ;; }
{ .mfi; mov f48 = f0 ;; }
{ .mfi; mov f49 = f0 ;; }
{ .mfi; mov f50 = f0 ;; }
{ .mfi; mov f51 = f0 ;; }
{ .mfi; mov f52 = f0 ;; }
{ .mfi; mov f53 = f0 ;; }
{ .mfi; mov f54 = f0 ;; }
{ .mfi; mov f55 = f0 ;; }
{ .mfi; mov f56 = f0 ;; }
{ .mfi; mov f57 = f0 ;; }
{ .mfi; mov f58 = f0 ;; }
{ .mfi; mov f59 = f0 ;; }
{ .mfi; mov f60 = f0 ;; }
{ .mfi; mov f61 = f0 ;; }
{ .mfi; mov f62 = f0 ;; }
{ .mfi; mov f63 = f0 ;; }
{ .mfi; mov f64 = f0 ;; }
{ .mfi; mov f65 = f0 ;; }
{ .mfi; mov f66 = f0 ;; }
{ .mfi; mov f67 = f0 ;; }
{ .mfi; mov f68 = f0 ;; }
{ .mfi; mov f69 = f0 ;; }
{ .mfi; mov f70 = f0 ;; }
{ .mfi; mov f71 = f0 ;; }
{ .mfi; mov f72 = f0 ;; }
{ .mfi; mov f73 = f0 ;; }
{ .mfi; mov f74 = f0 ;; }
{ .mfi; mov f75 = f0 ;; }
{ .mfi; mov f76 = f0 ;; }
{ .mfi; mov f77 = f0 ;; }
{ .mfi; mov f78 = f0 ;; }
{ .mfi; mov f79 = f0 ;; }
{ .mfi; mov f80 = f0 ;; }
{ .mfi; mov f81 = f0 ;; }
{ .mfi; mov f82 = f0 ;; }
{ .mfi; mov f83 = f0 ;; }
{ .mfi; mov f84 = f0 ;; }
{ .mfi; mov f85 = f0 ;; }
{ .mfi; mov f86 = f0 ;; }
{ .mfi; mov f87 = f0 ;; }
{ .mfi; mov f88 = f0 ;; }
{ .mfi; mov f89 = f0 ;; }
{ .mfi; mov f90 = f0 ;; }
{ .mfi; mov f91 = f0 ;; }
{ .mfi; mov f92 = f0 ;; }
{ .mfi; mov f93 = f0 ;; }
{ .mfi; mov f94 = f0 ;; }
{ .mfi; mov f95 = f0 ;; }
{ .mfi; mov f96 = f0 ;; }
{ .mfi; mov f97 = f0 ;; }
{ .mfi; mov f98 = f0 ;; }
{ .mfi; mov f99 = f0 ;; }
{ .mfi; mov f100 = f0 ;; }
{ .mfi; mov f101 = f0 ;; }
{ .mfi; mov f102 = f0 ;; }
{ .mfi; mov f103 = f0 ;; }
{ .mfi; mov f104 = f0 ;; }
{ .mfi; mov f105 = f0 ;; }
{ .mfi; mov f106 = f0 ;; }
{ .mfi; mov f107 = f0 ;; }
{ .mfi; mov f108 = f0 ;; }
{ .mfi; mov f109 = f0 ;; }
{ .mfi; mov f110 = f0 ;; }
{ .mfi; mov f111 = f0 ;; }
{ .mfi; mov f112 = f0 ;; }
{ .mfi; mov f113 = f0 ;; }
{ .mfi; mov f114 = f0 ;; }
{ .mfi; mov f115 = f0 ;; }
{ .mfi; mov f116 = f0 ;; }
{ .mfi; mov f117 = f0 ;; }
{ .mfi; mov f118 = f0 ;; }
{ .mfi; mov f119 = f0 ;; }
{ .mfi; mov f120 = f0 ;; }
{ .mfi; mov f121 = f0 ;; }
{ .mfi; mov f122 = f0 ;; }
{ .mfi; mov f123 = f0 ;; }
{ .mfi; mov f124 = f0 ;; }
{ .mfi; mov f125 = f0 ;; }
{ .mfi; mov f126 = f0 ;; }
{ .mfi; mov f127 = f0 ;; }
 
// Floating point argument registers
{ .mfi; mov farg0 = f1 ;; }
{ .mfi; mov farg1 = f1 ;; }
{ .mfi; mov farg2 = f1 ;; }
{ .mfi; mov farg3 = f1 ;; }
{ .mfi; mov farg4 = f1 ;; }
{ .mfi; mov farg5 = f1 ;; }
{ .mfi; mov farg6 = f1 ;; }
{ .mfi; mov farg7 = f1 ;; }
 
// Floating point return value registers
{ .mfi; mov fret0 = f1 ;; }
{ .mfi; mov fret1 = f1 ;; }
{ .mfi; mov fret2 = f1 ;; }
{ .mfi; mov fret3 = f1 ;; }
{ .mfi; mov fret4 = f1 ;; }
{ .mfi; mov fret5 = f1 ;; }
{ .mfi; mov fret6 = f1 ;; }
{ .mfi; mov fret7 = f1 ;; }
 
// Predicate registers
{ .mii; (p0) mov r1 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p1) mov r2 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p2) mov r3 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p3) mov r4 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p4) mov r5 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p5) mov r6 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p6) mov r7 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p7) mov r8 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p8) mov r9 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p9) mov r10 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p10) mov r11 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p11) mov r12 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p12) mov r13 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p13) mov r14 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p14) mov r15 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p15) mov r16 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p16) mov r17 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p17) mov r18 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p18) mov r19 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p19) mov r20 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p20) mov r21 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p21) mov r22 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p22) mov r23 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p23) mov r24 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p24) mov r25 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p25) mov r26 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p26) mov r27 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p27) mov r28 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p28) mov r29 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p29) mov r30 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p30) mov r31 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p31) mov r32 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p32) mov r33 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p33) mov r34 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p34) mov r35 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p35) mov r36 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p36) mov r37 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p37) mov r38 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p38) mov r39 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p39) mov r40 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p40) mov r41 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p41) mov r42 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p42) mov r43 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p43) mov r44 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p44) mov r45 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p45) mov r46 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p46) mov r47 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p47) mov r48 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p48) mov r49 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p49) mov r50 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p50) mov r51 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p51) mov r52 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p52) mov r53 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p53) mov r54 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p54) mov r55 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p55) mov r56 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p56) mov r57 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p57) mov r58 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p58) mov r59 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p59) mov r60 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p60) mov r61 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p61) mov r62 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p62) mov r63 = r0; nop.i 0; nop.i 0;; }
{ .mii; (p63) mov r64 = r0; nop.i 0; nop.i 0;; }
 
// Predicates as a unit
{ .mmi; nop.m 0; mov r1 = pr ;; }
// mov r2 = pr.rot
 
// Branch registers.
{ .mmi; mov b0 = r0;; }
{ .mmi; mov b1 = r0;; }
{ .mmi; mov b2 = r0;; }
{ .mmi; mov b3 = r0;; }
{ .mmi; mov b4 = r0;; }
{ .mmi; mov b5 = r0;; }
{ .mmi; mov b6 = r0;; }
{ .mmi; mov b7 = r0;; }
 
{ .mmi; mov rp = r0;; }
 
// Application registers
{ .mmi; nop.m 0; mov r1 = ar0 ;; }
{ .mmi; nop.m 0; mov r1 = ar1 ;; }
{ .mmi; nop.m 0; mov r1 = ar2 ;; }
{ .mmi; nop.m 0; mov r1 = ar3 ;; }
{ .mmi; nop.m 0; mov r1 = ar4 ;; }
{ .mmi; nop.m 0; mov r1 = ar5 ;; }
{ .mmi; nop.m 0; mov r1 = ar6 ;; }
{ .mmi; nop.m 0; mov r1 = ar7 ;; }
// { .mmi; nop.m 0; mov r1 = ar8 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar9 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar10 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar11 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar12 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar13 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar14 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar15 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar16 ;; }
{ .mmi; nop.m 0; mov r1 = ar17 ;; }
{ .mmi; nop.m 0; mov r1 = ar18 ;; }
{ .mmi; nop.m 0; mov r1 = ar19 ;; }
// { .mmi; nop.m 0; mov r1 = ar20 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar21 ;; }
// { .mmi; nop.m 0; mov r1 = ar22 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar23 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar24 ;; }
{ .mmi; nop.m 0; mov r1 = ar25 ;; }
{ .mmi; nop.m 0; mov r1 = ar26 ;; }
{ .mmi; nop.m 0; mov r1 = ar27 ;; }
{ .mmi; nop.m 0; mov r1 = ar28 ;; }
{ .mmi; nop.m 0; mov r1 = ar29 ;; }
{ .mmi; nop.m 0; mov r1 = ar30 ;; }
// { .mmi; nop.m 0; mov r1 = ar31 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar32 ;; }
// { .mmi; nop.m 0; mov r1 = ar33 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar34 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar35 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar36 ;; }
// { .mmi; nop.m 0; mov r1 = ar37 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar38 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar39 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar40 ;; }
// { .mmi; nop.m 0; mov r1 = ar41 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar42 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar43 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar44 ;; }
{ .mmi; nop.m 0; mov r1 = ar45 ;; }
// { .mmi; nop.m 0; mov r1 = ar46 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar47 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar48 ;; }
{ .mmi; nop.m 0; mov r1 = ar49 ;; }
{ .mmi; nop.m 0; mov r1 = ar50 ;; }
{ .mmi; nop.m 0; mov r1 = ar51 ;; }
{ .mmi; nop.m 0; mov r1 = ar52 ;; }
{ .mmi; nop.m 0; mov r1 = ar53 ;; }
{ .mmi; nop.m 0; mov r1 = ar54 ;; }
{ .mmi; nop.m 0; mov r1 = ar55 ;; }
{ .mmi; nop.m 0; mov r1 = ar56 ;; }
{ .mmi; nop.m 0; mov r1 = ar57 ;; }
{ .mmi; nop.m 0; mov r1 = ar58 ;; }
{ .mmi; nop.m 0; mov r1 = ar59 ;; }
{ .mmi; nop.m 0; mov r1 = ar60 ;; }
{ .mmi; nop.m 0; mov r1 = ar61 ;; }
{ .mmi; nop.m 0; mov r1 = ar62 ;; }
{ .mmi; nop.m 0; mov r1 = ar63 ;; }
{ .mmi; nop.m 0; mov r1 = ar64 ;; }
{ .mmi; nop.m 0; mov r1 = ar65 ;; }
{ .mmi; nop.m 0; mov r1 = ar66 ;; }
// { .mmi; nop.m 0; mov r1 = ar67 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar68 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar69 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar70 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar71 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar72 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar73 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar74 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar75 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar76 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar77 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar78 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar79 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar80 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar81 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar82 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar83 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar84 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar85 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar86 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar87 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar88 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar89 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar90 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar91 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar92 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar93 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar94 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar95 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar96 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar97 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar98 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar99 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar100 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar101 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar102 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar103 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar104 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar105 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar106 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar107 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar108 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar109 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar110 ;; } // reserved
// { .mmi; nop.m 0; mov r1 = ar111 ;; } // reserved
{ .mmi; nop.m 0; mov r1 = ar112 ;; }
{ .mmi; nop.m 0; mov r1 = ar113 ;; }
{ .mmi; nop.m 0; mov r1 = ar114 ;; }
{ .mmi; nop.m 0; mov r1 = ar115 ;; }
{ .mmi; nop.m 0; mov r1 = ar116 ;; }
{ .mmi; nop.m 0; mov r1 = ar117 ;; }
{ .mmi; nop.m 0; mov r1 = ar118 ;; }
{ .mmi; nop.m 0; mov r1 = ar119 ;; }
{ .mmi; nop.m 0; mov r1 = ar120 ;; }
{ .mmi; nop.m 0; mov r1 = ar121 ;; }
{ .mmi; nop.m 0; mov r1 = ar122 ;; }
{ .mmi; nop.m 0; mov r1 = ar123 ;; }
{ .mmi; nop.m 0; mov r1 = ar124 ;; }
{ .mmi; nop.m 0; mov r1 = ar125 ;; }
{ .mmi; nop.m 0; mov r1 = ar126 ;; }
{ .mmi; nop.m 0; mov r1 = ar127 ;; }
 
// Application registers by name
{ .mmi; nop.m 0; mov r1 = ar.k0 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k1 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k2 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k3 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k4 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k5 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k6 ;;}
{ .mmi; nop.m 0; mov r1 = ar.k7 ;;}
{ .mmi; nop.m 0; mov r1 = ar.rsc ;; }
{ .mmi; nop.m 0; mov r1 = ar.bsp ;; }
{ .mmi; nop.m 0; mov r1 = ar.bspstore ;; }
{ .mmi; nop.m 0; mov r1 = ar.rnat ;; }
{ .mmi; nop.m 0; mov r1 = ar.ccv ;; }
{ .mmi; nop.m 0; mov r1 = ar.unat ;; }
{ .mmi; nop.m 0; mov r1 = ar.fpsr ;; }
{ .mmi; nop.m 0; mov r1 = ar.itc ;; }
{ .mmi; nop.m 0; mov r1 = ar.ruc ;; }
{ .mmi; nop.m 0; mov r1 = ar.pfs ;; }
{ .mmi; nop.m 0; mov r1 = ar.lc ;; }
{ .mmi; nop.m 0; mov r1 = ar.ec ;; }
 
// Control registers
{ .mfb; mov r1 = cr0 ;; }
{ .mfb; mov r1 = cr1 ;; }
{ .mfb; mov r1 = cr2 ;; }
// { .mfb; mov r1 = cr3 ;; } // reserved
// { .mfb; mov r1 = cr4 ;; } // reserved
// { .mfb; mov r1 = cr5 ;; } // reserved
// { .mfb; mov r1 = cr6 ;; } // reserved
// { .mfb; mov r1 = cr7 ;; } // reserved
{ .mfb; mov r1 = cr8 ;; }
{ .mfb; mov r1 = cr9 ;; }
// { .mfb; mov r1 = cr10 ;; } // reserved
// { .mfb; mov r1 = cr11 ;; } // reserved
// { .mfb; mov r1 = cr12 ;; } // reserved
// { .mfb; mov r1 = cr13 ;; } // reserved
// { .mfb; mov r1 = cr14 ;; } // reserved
// { .mfb; mov r1 = cr15 ;; } // reserved
{ .mfb; mov r1 = cr16 ;; }
{ .mfb; mov r1 = cr17 ;; }
// { .mfb; mov r1 = cr18 ;; } // reserved
{ .mfb; mov r1 = cr19 ;; }
{ .mfb; mov r1 = cr20 ;; }
{ .mfb; mov r1 = cr21 ;; }
{ .mfb; mov r1 = cr22 ;; }
{ .mfb; mov r1 = cr23 ;; }
{ .mfb; mov r1 = cr24 ;; }
{ .mfb; mov r1 = cr25 ;; }
// { .mfb; mov r1 = cr26 ;; } // reserved
// { .mfb; mov r1 = cr27 ;; } // reserved
// { .mfb; mov r1 = cr28 ;; } // reserved
// { .mfb; mov r1 = cr29 ;; } // reserved
// { .mfb; mov r1 = cr30 ;; } // reserved
// { .mfb; mov r1 = cr31 ;; } // reserved
// { .mfb; mov r1 = cr32 ;; } // reserved
// { .mfb; mov r1 = cr33 ;; } // reserved
// { .mfb; mov r1 = cr34 ;; } // reserved
// { .mfb; mov r1 = cr35 ;; } // reserved
// { .mfb; mov r1 = cr36 ;; } // reserved
// { .mfb; mov r1 = cr37 ;; } // reserved
// { .mfb; mov r1 = cr38 ;; } // reserved
// { .mfb; mov r1 = cr39 ;; } // reserved
// { .mfb; mov r1 = cr40 ;; } // reserved
// { .mfb; mov r1 = cr41 ;; } // reserved
// { .mfb; mov r1 = cr42 ;; } // reserved
// { .mfb; mov r1 = cr43 ;; } // reserved
// { .mfb; mov r1 = cr44 ;; } // reserved
// { .mfb; mov r1 = cr45 ;; } // reserved
// { .mfb; mov r1 = cr46 ;; } // reserved
// { .mfb; mov r1 = cr47 ;; } // reserved
// { .mfb; mov r1 = cr48 ;; } // reserved
// { .mfb; mov r1 = cr49 ;; } // reserved
// { .mfb; mov r1 = cr50 ;; } // reserved
// { .mfb; mov r1 = cr51 ;; } // reserved
// { .mfb; mov r1 = cr52 ;; } // reserved
// { .mfb; mov r1 = cr53 ;; } // reserved
// { .mfb; mov r1 = cr54 ;; } // reserved
// { .mfb; mov r1 = cr55 ;; } // reserved
// { .mfb; mov r1 = cr56 ;; } // reserved
// { .mfb; mov r1 = cr57 ;; } // reserved
// { .mfb; mov r1 = cr58 ;; } // reserved
// { .mfb; mov r1 = cr59 ;; } // reserved
// { .mfb; mov r1 = cr60 ;; } // reserved
// { .mfb; mov r1 = cr61 ;; } // reserved
// { .mfb; mov r1 = cr62 ;; } // reserved
// { .mfb; mov r1 = cr63 ;; } // reserved
{ .mfb; mov r1 = cr64 ;; }
{ .mfb; mov r1 = cr65 ;; }
{ .mfb; mov r1 = cr66 ;; }
{ .mfb; mov r1 = cr67 ;; }
{ .mfb; mov r1 = cr68 ;; }
{ .mfb; mov r1 = cr69 ;; }
{ .mfb; mov r1 = cr70 ;; }
{ .mfb; mov r1 = cr71 ;; }
{ .mfb; mov r1 = cr72 ;; }
{ .mfb; mov r1 = cr73 ;; }
{ .mfb; mov r1 = cr74 ;; }
// { .mfb; mov r1 = cr75 ;; } // reserved
// { .mfb; mov r1 = cr76 ;; } // reserved
// { .mfb; mov r1 = cr77 ;; } // reserved
// { .mfb; mov r1 = cr78 ;; } // reserved
// { .mfb; mov r1 = cr79 ;; } // reserved
{ .mfb; mov r1 = cr80 ;; }
{ .mfb; mov r1 = cr81 ;; }
// { .mfb; mov r1 = cr82 ;; } // reserved
// { .mfb; mov r1 = cr83 ;; } // reserved
// { .mfb; mov r1 = cr84 ;; } // reserved
// { .mfb; mov r1 = cr85 ;; } // reserved
// { .mfb; mov r1 = cr86 ;; } // reserved
// { .mfb; mov r1 = cr87 ;; } // reserved
// { .mfb; mov r1 = cr88 ;; } // reserved
// { .mfb; mov r1 = cr89 ;; } // reserved
// { .mfb; mov r1 = cr90 ;; } // reserved
// { .mfb; mov r1 = cr91 ;; } // reserved
// { .mfb; mov r1 = cr92 ;; } // reserved
// { .mfb; mov r1 = cr93 ;; } // reserved
// { .mfb; mov r1 = cr94 ;; } // reserved
// { .mfb; mov r1 = cr95 ;; } // reserved
// { .mfb; mov r1 = cr96 ;; } // reserved
// { .mfb; mov r1 = cr97 ;; } // reserved
// { .mfb; mov r1 = cr98 ;; } // reserved
// { .mfb; mov r1 = cr99 ;; } // reserved
// { .mfb; mov r1 = cr100 ;; } // reserved
// { .mfb; mov r1 = cr101 ;; } // reserved
// { .mfb; mov r1 = cr102 ;; } // reserved
// { .mfb; mov r1 = cr103 ;; } // reserved
// { .mfb; mov r1 = cr104 ;; } // reserved
// { .mfb; mov r1 = cr105 ;; } // reserved
// { .mfb; mov r1 = cr106 ;; } // reserved
// { .mfb; mov r1 = cr107 ;; } // reserved
// { .mfb; mov r1 = cr108 ;; } // reserved
// { .mfb; mov r1 = cr109 ;; } // reserved
// { .mfb; mov r1 = cr110 ;; } // reserved
// { .mfb; mov r1 = cr111 ;; } // reserved
// { .mfb; mov r1 = cr112 ;; } // reserved
// { .mfb; mov r1 = cr113 ;; } // reserved
// { .mfb; mov r1 = cr114 ;; } // reserved
// { .mfb; mov r1 = cr115 ;; } // reserved
// { .mfb; mov r1 = cr116 ;; } // reserved
// { .mfb; mov r1 = cr117 ;; } // reserved
// { .mfb; mov r1 = cr118 ;; } // reserved
// { .mfb; mov r1 = cr119 ;; } // reserved
// { .mfb; mov r1 = cr120 ;; } // reserved
// { .mfb; mov r1 = cr121 ;; } // reserved
// { .mfb; mov r1 = cr122 ;; } // reserved
// { .mfb; mov r1 = cr123 ;; } // reserved
// { .mfb; mov r1 = cr124 ;; } // reserved
// { .mfb; mov r1 = cr125 ;; } // reserved
// { .mfb; mov r1 = cr126 ;; } // reserved
// { .mfb; mov r1 = cr127 ;; } // reserved
 
// Control registers by name
{ .mfb; mov r1 = cr.dcr ;; }
{ .mfb; mov r1 = cr.itm ;; }
{ .mfb; mov r1 = cr.iva ;; }
{ .mfb; mov r1 = cr.pta ;; }
{ .mfb; mov r1 = cr.ipsr ;; }
{ .mfb; mov r1 = cr.isr ;; }
{ .mfb; mov r1 = cr.iip ;; }
{ .mfb; mov r1 = cr.iipa ;; }
{ .mfb; mov r1 = cr.ifs ;; }
{ .mfb; mov r1 = cr.iim ;; }
{ .mfb; mov r1 = cr.iha ;; }
{ .mfb; mov r1 = cr.iib0 ;; }
{ .mfb; mov r1 = cr.iib1 ;; }
{ .mfb; mov r1 = cr.lid ;; }
{ .mfb; mov r1 = cr.ivr ;; }
{ .mfb; mov r1 = cr.tpr ;; }
{ .mfb; mov r1 = cr.eoi ;; }
{ .mfb; mov r1 = cr.irr0 ;; }
{ .mfb; mov r1 = cr.irr1 ;; }
{ .mfb; mov r1 = cr.irr2 ;; }
{ .mfb; mov r1 = cr.irr3 ;; }
{ .mfb; mov r1 = cr.itv ;; }
{ .mfb; mov r1 = cr.pmv ;; }
{ .mfb; mov r1 = cr.lrr0 ;; }
{ .mfb; mov r1 = cr.lrr1 ;; }
{ .mfb; mov r1 = cr.cmcv ;; }
 
// Other registers
{ .mfb; mov r1 = psr ;; }
// { .mfb; mov r1 = psr.l ;; }
{ .mfb; mov r1 = psr.um ;; }
{ .mmi; mov r1 = ip ;; }
 
// Indirect register files
{ .mmi
mov r1 = pmc[r3]
mov r2 = pmc[r4]
nop.i 0;; }
{ .mmi
mov r1 = pmd[r3]
mov r2 = pmd[r4]
nop.i 0;; }
{ .mmi
mov r1 = pkr[r3]
mov r2 = pkr[r4]
nop.i 0;; }
{ .mmi
mov r1 = rr[r3]
mov r2 = rr[r4]
nop.i 0;; }
{ .mmi
mov r1 = ibr[r3]
mov r2 = ibr[r4]
nop.i 0;; }
{ .mmi
mov r1 = dbr[r3]
mov r2 = dbr[r4]
nop.i 0;; }
{ .mmi
mov r1 = CPUID[r3]
mov r2 = CPUID[r4]
nop.i 0;; }
{ .mmi
mov r1 = cpuid[r3]
mov r2 = cpuid[r4]
nop.i 0;; }
/trunk/gnu/binutils/gas/testsuite/gas/ia64/xdata.s
0,0 → 1,45
// Note that most of the section names used here aren't legal as operands
// to either .section or .xdata/.xreal/.xstring (quoted strings aren't in
// general), but since generic code accepts them for .section we also test
// this here for our target specific directives. This could be viewed as a
// shortcut of a pair of .section/.secalias for each of them.
 
.section .xdata1, "a", @progbits
.section ".xdata2", "a", @progbits
.section ",xdata3", "a", @progbits
.section ".xdata,4", "a", @progbits
.section "\".xdata5\"", "a", @progbits
 
.section ".xreal\\1", "a", @progbits
.section ".xreal+2", "a", @progbits
.section ".xreal(3)", "a", @progbits
.section ".xreal[4]", "a", @progbits
 
.section ".xstr<1>", "a", @progbits
.section ".xstr{2}", "a", @progbits
 
.text
 
.xdata1 .xdata1, 1
.xdata2 ".xdata2", 2
.xdata4 ",xdata3", 3
.xdata8 ".xdata,4", 4
.xdata16 "\".xdata5\"", @iplt(_start)
 
.xdata2.ua ".xdata2", 2
.xdata4.ua ",xdata3", 3
.xdata8.ua ".xdata,4", 4
.xdata16.ua "\".xdata5\"", @iplt(_start)
 
.xreal4 ".xreal\\1", 1
.xreal8 ".xreal+2", 2
.xreal10 ".xreal(3)", 3
.xreal16 ".xreal[4]", 4
 
.xreal4.ua ".xreal\\1", 1
.xreal8.ua ".xreal+2", 2
.xreal10.ua ".xreal(3)", 3
.xreal16.ua ".xreal[4]", 4
 
.xstring ".xstr<1>", "abc"
.xstringz ".xstr{2}", "xyz"
/trunk/gnu/binutils/gas/testsuite/gas/ia64/bundling.s
0,0 → 1,15
.explicit
.proc _start
_start:
.prologue
{.mii
nop.m 0
;;
.save ar.lc, r31
mov r31 = ar.lc
} ;;
.body
{.mfb
br.ret.sptk rp
} ;;
.endp _start
/trunk/gnu/binutils/gas/testsuite/gas/ia64/last.s
0,0 → 1,12
.explicit
_start:
{.mib
itc.d r0
} ;;
{.mib
cover
} ;;
{.mbb
cover
nop 0
} ;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-1.s
0,0 → 1,4
.text
addl r3 = @ltoffx(foo#), gp
nop.i 0
nop.i 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pcrel.s
0,0 → 1,87
.explicit
.global esym
 
.altmacro
 
.macro begin n, attr
.section .&n, attr, @progbits
.align 16
_&n:
.endm
.macro end n
.align 16
_e&n:
.endm
 
.macro m1 op, opnd1
.align 16
op opnd1 _e&op - _&op
.endm
.macro m2 op, opnd1
.align 16
op opnd1 @pcrel(esym)
.endm
.macro m3 op, opnd1
.align 16
op opnd1 esym - _&op
.endm
.macro m4 op, opnd1
.align 16
op opnd1 esym - .
.endm
.macro m5 op, opnd1
.align 16
op opnd1 esym - _e&op
.endm
.macro m6 op, opnd1
.align 16
op opnd1 0
.endm
 
begin mov, "ax"
m1 mov, r2 =
;;
m2 mov, r2 =
;;
m3 mov, r2 =
;;
m4 mov, r2 =
;;
m5 mov, r2 =
;;
m6 mov, r2 =
;;
end mov
 
begin movl, "ax"
m1 movl, r2 =
;;
m2 movl, r2 =
;;
m3 movl, r2 =
;;
m4 movl, r2 =
;;
m5 movl, r2 =
;;
m6 movl, r2 =
;;
end movl
 
begin data8, "a"
m1 data8
m2 data8
m3 data8
m4 data8
m5 data8
m6 data8
end data8
 
begin data4, "a"
m1 data4
m2 data4
m3 data4
m4 data4
m5 data4
m6 data4
end data4
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-a.pl
0,0 → 1,142
$AT = '@';
print <<END
.text
.type _start,${AT}function
_start:
 
add r101 = r102, r103
(p1) add r104 = r105, r106
add r107 = r108, r109, 1
(p2) add r110 = r111, r112, 1
 
adds r20 = 0, r10
(p1) adds r21 = 1, r10
adds r22 = -1, r10
adds r23 = -0x2000, r10
(p2) adds r24 = 0x1FFF, r10
 
addl r30 = 0, r1
addl r31 = 1, r1
(p1) addl r32 = -1, r1
addl r33 = -0x2000, r1
addl r34 = 0x1FFF, r1
addl r35 = -0x200000, r1
addl r36 = 0x1FFFFF, r1
 
add r11 = 0, r10
add r12 = 0x1234, r10
add r13 = 0x1234, r1
add r14 = 0x12345, r1
 
addp4 r20 = r3, r10
(p1) addp4 r21 = 1, r10
addp4 r22 = -1, r10
 
sub r101 = r102, r103
(p2) sub r110 = r111, r112, 1
sub r120 = 0, r3
sub r121 = 1, r3
sub r122 = -1, r3
sub r123 = -128, r3
sub r124 = 127, r3
 
and r8 = r9, r10
(p3) and r11 = -128, r12
 
(p4) or r8 = r9, r10
or r11 = -128, r12
 
xor r8 = r9, r10
xor r11 = -128, r12
 
andcm r8 = r9, r10
andcm r11 = -128, r12
 
shladd r8 = r30, 1, r31
shladd r9 = r30, 2, r31
shladd r10 = r30, 3, r31
shladd r11 = r30, 4, r31
 
shladdp4 r8 = r30, 1, r31
shladdp4 r9 = r30, 2, r31
shladdp4 r10 = r30, 3, r31
shladdp4 r11 = r30, 4, r31
 
padd1 r10 = r30, r31
padd1.sss r11 = r30, r31
padd1.uus r12 = r30, r31
padd1.uuu r13 = r30, r31
padd2 r14 = r30, r31
padd2.sss r15 = r30, r31
padd2.uus r16 = r30, r31
padd2.uuu r17 = r30, r31
padd4 r18 = r30, r31
 
psub1 r10 = r30, r31
psub1.sss r11 = r30, r31
psub1.uus r12 = r30, r31
psub1.uuu r13 = r30, r31
psub2 r14 = r30, r31
psub2.sss r15 = r30, r31
psub2.uus r16 = r30, r31
psub2.uuu r17 = r30, r31
psub4 r18 = r30, r31
 
pavg1 r10 = r30, r31
pavg1.raz r10 = r30, r31
pavg2 r10 = r30, r31
pavg2.raz r10 = r30, r31
 
pavgsub1 r10 = r30, r31
pavgsub2 r10 = r30, r31
 
pcmp1.eq r10 = r30, r31
pcmp2.eq r10 = r30, r31
pcmp4.eq r10 = r30, r31
pcmp1.gt r10 = r30, r31
pcmp2.gt r10 = r30, r31
pcmp4.gt r10 = r30, r31
 
pshladd2 r10 = r11, 1, r12
pshladd2 r10 = r11, 3, r12
 
pshradd2 r10 = r11, 1, r12
pshradd2 r10 = r11, 2, r12
 
END
;
 
@cmp2 = ( ".eq", ".ne" );
@cmp6 = ( @cmp2, ".lt", ".le", ".gt", ".ge" );
@cmp10 = ( @cmp6, ".ltu", ".leu", ".gtu", ".geu" );
 
@ctype = ( ".and", ".or", ".or.andcm", ".orcm", ".andcm", ".and.orcm" );
 
foreach $C ( "cmp", "cmp4" ) {
foreach $u ( "", ".unc" ) {
foreach $i (@cmp10) {
print "\t${C}${i}${u} p2, p3 = r3, r4\n";
print "\t${C}${i}${u} p2, p3 = 3, r4\n";
}
print "\n";
}
foreach $i (@cmp2) {
foreach $c (@ctype) {
print "\t${C}${i}${c} p2, p3 = r3, r4\n";
print "\t${C}${i}${c} p2, p3 = 3, r4\n";
}
print "\n";
}
foreach $i (@cmp6) {
foreach $c (@ctype) {
print "\t${C}${i}${c} p2, p3 = r0, r4\n";
print "\t${C}${i}${c} p2, p3 = r4, r0\n";
}
print "\n";
}
}
 
# Pad to a bundle boundary with known nops.
print "nop.i 0; nop.i 0\n";
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-5.s
0,0 → 1,13
.text
addl r3 = @ltoffx(foo#), gp
nop.i 0
nop.i 0
ld8.mov r3 = [r3], foo#
nop.i 0
nop.i 0
.global bar#
.data
bar:
data4 0
.global foo#
foo# = bar#
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-mutex.s
0,0 → 1,36
//
// Test mutex relation handling
//
.text
start:
// user annotation
.pred.rel.mutex p1, p2, p3
(p1) mov r4 = 2
(p2) mov r4 = 5
(p3) mov r4 = 7
rfi
 
// non-predicated compares generate a mutex
cmp.eq p1, p2 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
// unconditional compares generate a mutex
(p3) cmp.eq.unc p1, p2 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
// non-predicated compares don't remove mutex
cmp.eq p1, p2 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
// predicated compares don't remove mutex
(p3) cmp.eq p1, p2 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
L:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/alias.d
0,0 → 1,35
#readelf: -Ss
#name: ia64 alias and secalias
 
There are 8 section headers, starting at offset 0x78:
 
Section Headers:
+\[Nr\] +Name +Type +Address +Offset
+Size +EntSize +Flags +Link +Info +Align
+\[ 0\] +NULL +0000000000000000 +00000000
+0000000000000000 +0000000000000000 +0 +0 +0
+\[ 1\] \.text +PROGBITS +0000000000000000 +00000040
+0000000000000000 +0000000000000000 +AX +0 +0 +16
+\[ 2\] \.data +PROGBITS +0000000000000000 +00000040
+0000000000000000 +0000000000000000 +WA +0 +0 +1
+\[ 3\] \.bss +NOBITS +0000000000000000 +00000040
+0000000000000000 +0000000000000000 +WA +0 +0 +1
+\[ 4\] 1234 +PROGBITS +0000000000000000 +00000040
+0000000000000005 +0000000000000000 +WA +0 +0 +1
+\[ 5\] \.shstrtab +STRTAB +0000000000000000 +00000045
+0000000000000031 +0000000000000000 +0 +0 +1
+\[ 6\] \.symtab +SYMTAB +0000000000000000 +00000278
+0000000000000090 +0000000000000018 +7 +6 +8
+\[ 7\] \.strtab +STRTAB +0000000000000000 +00000308
+0000000000000006 +0000000000000000 +0 +0 +1
Key to Flags:
#...
 
Symbol table '\.symtab' contains 6 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
+0: 0000000000000000 +0 +NOTYPE +LOCAL +DEFAULT +UND
+1: 0000000000000000 +0 +SECTION +LOCAL +DEFAULT +1
+2: 0000000000000000 +0 +SECTION +LOCAL +DEFAULT +2
+3: 0000000000000000 +0 +SECTION +LOCAL +DEFAULT +3
+4: 0000000000000000 +0 +SECTION +LOCAL +DEFAULT +4
+5: 0000000000000000 +0 +NOTYPE +LOCAL +DEFAULT +4 "@D"
/trunk/gnu/binutils/gas/testsuite/gas/ia64/align.d
0,0 → 1,7
#objdump: -s -j .data
#name: ia64 align
 
.*: +file format .*
 
Contents of section .data:
0000 ff[ ]+.[ ]+
/trunk/gnu/binutils/gas/testsuite/gas/ia64/secname.s
0,0 → 1,2
.section .foo#,"aw","progbits"
data8 1234
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dependency-1.s
0,0 → 1,7
.text
.auto
.align 32
foo:
ldfs f8=[r32]
stfd [r33]=f8
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-i.pl
0,0 → 1,189
$AT = '@';
print <<END
.text
.type _start,${AT}function
_start:
 
pmpyshr2 r4 = r5, r6, 0
pmpyshr2.u r4 = r5, r6, 16
 
pmpy2.r r4 = r5, r6
pmpy2.l r4 = r5, r6
 
mix1.r r4 = r5, r6
mix2.r r4 = r5, r6
mix4.r r4 = r5, r6
mix1.l r4 = r5, r6
mix2.l r4 = r5, r6
mix4.l r4 = r5, r6
 
pack2.uss r4 = r5, r6
pack2.sss r4 = r5, r6
pack4.sss r4 = r5, r6
 
unpack1.h r4 = r5, r6
unpack2.h r4 = r5, r6
unpack4.h r4 = r5, r6
unpack1.l r4 = r5, r6
unpack2.l r4 = r5, r6
unpack4.l r4 = r5, r6
 
pmin1.u r4 = r5, r6
pmax1.u r4 = r5, r6
 
pmin2 r4 = r5, r6
pmax2 r4 = r5, r6
 
psad1 r4 = r5, r6
 
mux1 r4 = r5, ${AT}rev
mux1 r4 = r5, ${AT}mix
mux1 r4 = r5, ${AT}shuf
mux1 r4 = r5, ${AT}alt
mux1 r4 = r5, ${AT}brcst
 
mux2 r4 = r5, 0
mux2 r4 = r5, 0xff
mux2 r4 = r5, 0xaa
 
pshr2 r4 = r5, r6
pshr2 r4 = r5, 0
pshr2 r4 = r5, 8
pshr2 r4 = r5, 31
 
pshr4 r4 = r5, r6
pshr4 r4 = r5, 0
pshr4 r4 = r5, 8
pshr4 r4 = r5, 31
 
pshr2.u r4 = r5, r6
pshr2.u r4 = r5, 0
pshr2.u r4 = r5, 8
pshr2.u r4 = r5, 31
 
pshr4.u r4 = r5, r6
pshr4.u r4 = r5, 0
pshr4.u r4 = r5, 8
pshr4.u r4 = r5, 31
 
shr r4 = r5, r6
shr.u r4 = r5, r6
 
pshl2 r4 = r5, r6
pshl2 r4 = r5, 0
pshl2 r4 = r5, 8
pshl2 r4 = r5, 31
 
pshl4 r4 = r5, r6
pshl4 r4 = r5, 0
pshl4 r4 = r5, 8
pshl4 r4 = r5, 31
 
shl r4 = r5, r6
 
popcnt r4 = r5
 
shrp r4 = r5, r6, 0
shrp r4 = r5, r6, 12
shrp r4 = r5, r6, 63
 
extr r4 = r5, 0, 16
extr r4 = r5, 0, 63
extr r4 = r5, 10, 40
extr.u r4 = r5, 0, 16
extr.u r4 = r5, 0, 63
extr.u r4 = r5, 10, 40
dep.z r4 = r5, 0, 16
dep.z r4 = r5, 0, 63
dep.z r4 = r5, 10, 40
dep.z r4 = 0, 0, 16
dep.z r4 = 127, 0, 63
dep.z r4 = -128, 5, 50
dep.z r4 = 0x55, 10, 40
 
dep r4 = 0, r5, 0, 16
dep r4 = -1, r5, 0, 63
// Insert padding NOPs to force the same template selection as IAS.
nop.m 0
nop.f 0
dep r4 = r5, r6, 10, 7
 
movl r4 = 0
movl r4 = 0xffffffffffffffff
movl r4 = 0x1234567890abcdef
 
break.i 0
break.i 0x1fffff
 
nop.i 0
nop.i 0x1fffff
 
chk.s.i r4, _start
 
mov r4 = b0
mov b0 = r4
 
mov pr = r4, 0
mov pr = r4, 0x1234
mov pr = r4, 0x1ffff
 
mov pr.rot = 0
// ??? This was originally 0x3ffffff, but that generates an assembler warning
// that the testsuite infrastructure isn't set up to ignore.
mov pr.rot = 0x3ff0000
mov pr.rot = -0x4000000
 
zxt1 r4 = r5
zxt2 r4 = r5
zxt4 r4 = r5
 
sxt1 r4 = r5
sxt2 r4 = r5
sxt4 r4 = r5
 
czx1.l r4 = r5
czx2.l r4 = r5
czx1.r r4 = r5
czx2.r r4 = r5
 
END
;
 
@ctype = ( "", ".unc", ".and", ".or", ".or.andcm", ".orcm",
".andcm", ".and.orcm" );
 
$i = 0;
foreach $z ( ".z", ".nz" ) {
foreach $c (@ctype) {
print "\ttbit${z}${c} p2, p3 = r4, $i\n";
++$i;
}
}
print "\n";
 
foreach $z ( ".z", ".nz" ) {
foreach $c (@ctype) {
print "\ttnat${z}${c} p2, p3 = r4\n";
}
}
print "\n";
 
 
@mwh = ( "", ".sptk", ".dptk" );
@ih = ( "", ".imp" );
 
$LAB = 1;
 
foreach $b ("", ".ret") {
foreach $w (@mwh) {
foreach $i (@ih) {
print "\tmov${b}${w}${i} b3 = r4, .L${LAB}\n";
}
print ".space 240\n";
print ".L${LAB}:\n";
++$LAB;
}
print "\n";
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-b.d
0,0 → 1,1021
#as: -xnone -mhint.b=ok -mtune=itanium1
#objdump: -d
#name: ia64 opc-b
 
.*: +file format .*
 
Disassembly of section .text:
 
0+000 <.text>:
0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
6: 00 f8 15 00 20 00 \(p02\) br\.cond\.sptk\.few 0x2bf0
c: 00 00 00 40 br\.few 0x0;;
10: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
16: 00 f0 15 00 22 00 \(p02\) br\.cond\.sptk\.few\.clr 0x2bf0
1c: f0 ff ff 4c br\.few\.clr 0x0;;
20: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
26: 00 e8 15 00 20 00 \(p02\) br\.cond\.sptk\.few 0x2bf0
2c: e0 ff ff 48 br\.few 0x0;;
30: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
36: 00 e0 15 00 22 00 \(p02\) br\.cond\.sptk\.few\.clr 0x2bf0
3c: d0 ff ff 4c br\.few\.clr 0x0;;
40: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
46: 00 dc 15 00 20 00 \(p02\) br\.cond\.sptk\.many 0x2bf0
4c: c8 ff ff 48 br\.many 0x0;;
50: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
56: 00 d4 15 00 22 00 \(p02\) br\.cond\.sptk\.many\.clr 0x2bf0
5c: b8 ff ff 4c br\.many\.clr 0x0;;
60: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
66: 00 c8 15 80 20 00 \(p02\) br\.cond\.spnt\.few 0x2bf0
6c: a0 ff ff 49 br\.cond\.spnt\.few 0x0;;
70: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
76: 00 c0 15 80 22 00 \(p02\) br\.cond\.spnt\.few\.clr 0x2bf0
7c: 90 ff ff 4d br\.cond\.spnt\.few\.clr 0x0;;
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ee6: 00 14 00 c0 01 00 \(p02\) br\.cond\.dpnt\.many b2
eec: 28 00 80 03 br\.cond\.dpnt\.many b2;;
ef0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
ef6: 00 14 00 c0 03 00 \(p02\) br\.cond\.dpnt\.many\.clr b2
efc: 28 00 80 07 br\.cond\.dpnt\.many\.clr b2;;
f00: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f06: 00 00 00 00 10 20 nop\.b 0x0
f0c: 20 00 80 00 br\.ia\.sptk\.few b2;;
f10: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f16: 00 00 00 00 10 20 nop\.b 0x0
f1c: 20 00 80 04 br\.ia\.sptk\.few\.clr b2;;
f20: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f26: 00 00 00 00 10 20 nop\.b 0x0
f2c: 20 00 80 00 br\.ia\.sptk\.few b2;;
f30: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f36: 00 00 00 00 10 20 nop\.b 0x0
f3c: 20 00 80 04 br\.ia\.sptk\.few\.clr b2;;
f40: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f46: 00 00 00 00 10 20 nop\.b 0x0
f4c: 28 00 80 00 br\.ia\.sptk\.many b2;;
f50: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f56: 00 00 00 00 10 20 nop\.b 0x0
f5c: 28 00 80 04 br\.ia\.sptk\.many\.clr b2;;
f60: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f66: 00 00 00 00 10 20 nop\.b 0x0
f6c: 20 00 80 01 br\.ia\.spnt\.few b2;;
f70: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f76: 00 00 00 00 10 20 nop\.b 0x0
f7c: 20 00 80 05 br\.ia\.spnt\.few\.clr b2;;
f80: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f86: 00 00 00 00 10 20 nop\.b 0x0
f8c: 20 00 80 01 br\.ia\.spnt\.few b2;;
f90: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
f96: 00 00 00 00 10 20 nop\.b 0x0
f9c: 20 00 80 05 br\.ia\.spnt\.few\.clr b2;;
fa0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
fa6: 00 00 00 00 10 20 nop\.b 0x0
fac: 28 00 80 01 br\.ia\.spnt\.many b2;;
fb0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
fb6: 00 00 00 00 10 20 nop\.b 0x0
fbc: 28 00 80 05 br\.ia\.spnt\.many\.clr b2;;
fc0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
fc6: 00 00 00 00 10 20 nop\.b 0x0
fcc: 20 00 80 02 br\.ia\.dptk\.few b2;;
fd0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
fd6: 00 00 00 00 10 20 nop\.b 0x0
fdc: 20 00 80 06 br\.ia\.dptk\.few\.clr b2;;
fe0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
fe6: 00 00 00 00 10 20 nop\.b 0x0
fec: 20 00 80 02 br\.ia\.dptk\.few b2;;
ff0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
ff6: 00 00 00 00 10 20 nop\.b 0x0
ffc: 20 00 80 06 br\.ia\.dptk\.few\.clr b2;;
1000: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1006: 00 00 00 00 10 20 nop\.b 0x0
100c: 28 00 80 02 br\.ia\.dptk\.many b2;;
1010: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1016: 00 00 00 00 10 20 nop\.b 0x0
101c: 28 00 80 06 br\.ia\.dptk\.many\.clr b2;;
1020: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1026: 00 00 00 00 10 20 nop\.b 0x0
102c: 20 00 80 03 br\.ia\.dpnt\.few b2;;
1030: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1036: 00 00 00 00 10 20 nop\.b 0x0
103c: 20 00 80 07 br\.ia\.dpnt\.few\.clr b2;;
1040: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1046: 00 00 00 00 10 20 nop\.b 0x0
104c: 20 00 80 03 br\.ia\.dpnt\.few b2;;
1050: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1056: 00 00 00 00 10 20 nop\.b 0x0
105c: 20 00 80 07 br\.ia\.dpnt\.few\.clr b2;;
1060: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1066: 00 00 00 00 10 20 nop\.b 0x0
106c: 28 00 80 03 br\.ia\.dpnt\.many b2;;
1070: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
1076: 00 00 00 00 10 20 nop\.b 0x0
107c: 28 00 80 07 br\.ia\.dpnt\.many\.clr b2;;
1080: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1086: 40 10 00 42 00 80 \(p02\) br\.ret\.sptk\.few b2
108c: 20 00 84 00 br\.ret\.sptk\.few b2;;
1090: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1096: 40 10 00 42 02 80 \(p02\) br\.ret\.sptk\.few\.clr b2
109c: 20 00 84 04 br\.ret\.sptk\.few\.clr b2;;
10a0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10a6: 40 10 00 42 00 80 \(p02\) br\.ret\.sptk\.few b2
10ac: 20 00 84 00 br\.ret\.sptk\.few b2;;
10b0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10b6: 40 10 00 42 02 80 \(p02\) br\.ret\.sptk\.few\.clr b2
10bc: 20 00 84 04 br\.ret\.sptk\.few\.clr b2;;
10c0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10c6: 40 14 00 42 00 80 \(p02\) br\.ret\.sptk\.many b2
10cc: 28 00 84 00 br\.ret\.sptk\.many b2;;
10d0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10d6: 40 14 00 42 02 80 \(p02\) br\.ret\.sptk\.many\.clr b2
10dc: 28 00 84 04 br\.ret\.sptk\.many\.clr b2;;
10e0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10e6: 40 10 00 c2 00 80 \(p02\) br\.ret\.spnt\.few b2
10ec: 20 00 84 01 br\.ret\.spnt\.few b2;;
10f0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
10f6: 40 10 00 c2 02 80 \(p02\) br\.ret\.spnt\.few\.clr b2
10fc: 20 00 84 05 br\.ret\.spnt\.few\.clr b2;;
1100: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1106: 40 10 00 c2 00 80 \(p02\) br\.ret\.spnt\.few b2
110c: 20 00 84 01 br\.ret\.spnt\.few b2;;
1110: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1116: 40 10 00 c2 02 80 \(p02\) br\.ret\.spnt\.few\.clr b2
111c: 20 00 84 05 br\.ret\.spnt\.few\.clr b2;;
1120: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1126: 40 14 00 c2 00 80 \(p02\) br\.ret\.spnt\.many b2
112c: 28 00 84 01 br\.ret\.spnt\.many b2;;
1130: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1136: 40 14 00 c2 02 80 \(p02\) br\.ret\.spnt\.many\.clr b2
113c: 28 00 84 05 br\.ret\.spnt\.many\.clr b2;;
1140: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1146: 40 10 00 42 01 80 \(p02\) br\.ret\.dptk\.few b2
114c: 20 00 84 02 br\.ret\.dptk\.few b2;;
1150: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1156: 40 10 00 42 03 80 \(p02\) br\.ret\.dptk\.few\.clr b2
115c: 20 00 84 06 br\.ret\.dptk\.few\.clr b2;;
1160: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1166: 40 10 00 42 01 80 \(p02\) br\.ret\.dptk\.few b2
116c: 20 00 84 02 br\.ret\.dptk\.few b2;;
1170: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1176: 40 10 00 42 03 80 \(p02\) br\.ret\.dptk\.few\.clr b2
117c: 20 00 84 06 br\.ret\.dptk\.few\.clr b2;;
1180: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1186: 40 14 00 42 01 80 \(p02\) br\.ret\.dptk\.many b2
118c: 28 00 84 02 br\.ret\.dptk\.many b2;;
1190: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1196: 40 14 00 42 03 80 \(p02\) br\.ret\.dptk\.many\.clr b2
119c: 28 00 84 06 br\.ret\.dptk\.many\.clr b2;;
11a0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11a6: 40 10 00 c2 01 80 \(p02\) br\.ret\.dpnt\.few b2
11ac: 20 00 84 03 br\.ret\.dpnt\.few b2;;
11b0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11b6: 40 10 00 c2 03 80 \(p02\) br\.ret\.dpnt\.few\.clr b2
11bc: 20 00 84 07 br\.ret\.dpnt\.few\.clr b2;;
11c0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11c6: 40 10 00 c2 01 80 \(p02\) br\.ret\.dpnt\.few b2
11cc: 20 00 84 03 br\.ret\.dpnt\.few b2;;
11d0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11d6: 40 10 00 c2 03 80 \(p02\) br\.ret\.dpnt\.few\.clr b2
11dc: 20 00 84 07 br\.ret\.dpnt\.few\.clr b2;;
11e0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11e6: 40 14 00 c2 01 80 \(p02\) br\.ret\.dpnt\.many b2
11ec: 28 00 84 03 br\.ret\.dpnt\.many b2;;
11f0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
11f6: 40 14 00 c2 03 80 \(p02\) br\.ret\.dpnt\.many\.clr b2
11fc: 28 00 84 07 br\.ret\.dpnt\.many\.clr b2;;
1200: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1206: 00 10 00 40 08 00 \(p02\) br\.call\.sptk\.few b0=b2
120c: 20 00 80 10 br\.call\.sptk\.few b0=b2;;
1210: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1216: 00 10 00 40 0a 00 \(p02\) br\.call\.sptk\.few\.clr b0=b2
121c: 20 00 80 14 br\.call\.sptk\.few\.clr b0=b2;;
1220: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1226: 00 10 00 40 08 00 \(p02\) br\.call\.sptk\.few b0=b2
122c: 20 00 80 10 br\.call\.sptk\.few b0=b2;;
1230: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1236: 00 10 00 40 0a 00 \(p02\) br\.call\.sptk\.few\.clr b0=b2
123c: 20 00 80 14 br\.call\.sptk\.few\.clr b0=b2;;
1240: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1246: 00 14 00 40 08 00 \(p02\) br\.call\.sptk\.many b0=b2
124c: 28 00 80 10 br\.call\.sptk\.many b0=b2;;
1250: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1256: 00 14 00 40 0a 00 \(p02\) br\.call\.sptk\.many\.clr b0=b2
125c: 28 00 80 14 br\.call\.sptk\.many\.clr b0=b2;;
1260: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1266: 00 10 00 c0 08 00 \(p02\) br\.call\.spnt\.few b0=b2
126c: 20 00 80 11 br\.call\.spnt\.few b0=b2;;
1270: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1276: 00 10 00 c0 0a 00 \(p02\) br\.call\.spnt\.few\.clr b0=b2
127c: 20 00 80 15 br\.call\.spnt\.few\.clr b0=b2;;
1280: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1286: 00 10 00 c0 08 00 \(p02\) br\.call\.spnt\.few b0=b2
128c: 20 00 80 11 br\.call\.spnt\.few b0=b2;;
1290: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1296: 00 10 00 c0 0a 00 \(p02\) br\.call\.spnt\.few\.clr b0=b2
129c: 20 00 80 15 br\.call\.spnt\.few\.clr b0=b2;;
12a0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12a6: 00 14 00 c0 08 00 \(p02\) br\.call\.spnt\.many b0=b2
12ac: 28 00 80 11 br\.call\.spnt\.many b0=b2;;
12b0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12b6: 00 14 00 c0 0a 00 \(p02\) br\.call\.spnt\.many\.clr b0=b2
12bc: 28 00 80 15 br\.call\.spnt\.many\.clr b0=b2;;
12c0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12c6: 00 10 00 40 09 00 \(p02\) br\.call\.dptk\.few b0=b2
12cc: 20 00 80 12 br\.call\.dptk\.few b0=b2;;
12d0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12d6: 00 10 00 40 0b 00 \(p02\) br\.call\.dptk\.few\.clr b0=b2
12dc: 20 00 80 16 br\.call\.dptk\.few\.clr b0=b2;;
12e0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12e6: 00 10 00 40 09 00 \(p02\) br\.call\.dptk\.few b0=b2
12ec: 20 00 80 12 br\.call\.dptk\.few b0=b2;;
12f0: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
12f6: 00 10 00 40 0b 00 \(p02\) br\.call\.dptk\.few\.clr b0=b2
12fc: 20 00 80 16 br\.call\.dptk\.few\.clr b0=b2;;
1300: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1306: 00 14 00 40 09 00 \(p02\) br\.call\.dptk\.many b0=b2
130c: 28 00 80 12 br\.call\.dptk\.many b0=b2;;
1310: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1316: 00 14 00 40 0b 00 \(p02\) br\.call\.dptk\.many\.clr b0=b2
131c: 28 00 80 16 br\.call\.dptk\.many\.clr b0=b2;;
1320: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1326: 00 10 00 c0 09 00 \(p02\) br\.call\.dpnt\.few b0=b2
132c: 20 00 80 13 br\.call\.dpnt\.few b0=b2;;
1330: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1336: 00 10 00 c0 0b 00 \(p02\) br\.call\.dpnt\.few\.clr b0=b2
133c: 20 00 80 17 br\.call\.dpnt\.few\.clr b0=b2;;
1340: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1346: 00 10 00 c0 09 00 \(p02\) br\.call\.dpnt\.few b0=b2
134c: 20 00 80 13 br\.call\.dpnt\.few b0=b2;;
1350: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1356: 00 10 00 c0 0b 00 \(p02\) br\.call\.dpnt\.few\.clr b0=b2
135c: 20 00 80 17 br\.call\.dpnt\.few\.clr b0=b2;;
1360: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1366: 00 14 00 c0 09 00 \(p02\) br\.call\.dpnt\.many b0=b2
136c: 28 00 80 13 br\.call\.dpnt\.many b0=b2;;
1370: 17 00 00 00 00 88 \[BBB\] nop\.b 0x0
1376: 00 14 00 c0 0b 00 \(p02\) br\.call\.dpnt\.many\.clr b0=b2
137c: 28 00 80 17 br\.call\.dpnt\.many\.clr b0=b2;;
1380: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1386: 00 00 00 00 10 40 nop\.b 0x0
138c: 80 ec ff 78 brp\.sptk 0x0,0x13a0;;
1390: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1396: 00 00 00 00 10 20 nop\.b 0x0
139c: 70 ec ff 7c brp\.sptk\.imp 0x0,0x13a0;;
13a0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13a6: 00 00 00 00 10 44 nop\.b 0x0
13ac: 60 ec ff 78 brp\.loop 0x0,0x13c0;;
13b0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13b6: 00 00 00 00 10 24 nop\.b 0x0
13bc: 50 ec ff 7c brp\.loop\.imp 0x0,0x13c0;;
13c0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13c6: 00 00 00 00 10 48 nop\.b 0x0
13cc: 40 ec ff 78 brp\.dptk 0x0,0x13e0;;
13d0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13d6: 00 00 00 00 10 28 nop\.b 0x0
13dc: 30 ec ff 7c brp\.dptk\.imp 0x0,0x13e0;;
13e0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13e6: 00 00 00 00 10 4c nop\.b 0x0
13ec: 20 ec ff 78 brp\.exit 0x0,0x1400;;
13f0: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
13f6: 00 00 00 00 10 2c nop\.b 0x0
13fc: 10 ec ff 7c brp\.exit\.imp 0x0,0x1400;;
1400: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1406: 00 00 00 00 10 40 nop\.b 0x0
140c: 30 00 40 20 brp\.sptk b3,0x1420;;
1410: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1416: 00 00 00 00 10 20 nop\.b 0x0
141c: 30 00 40 24 brp\.sptk\.imp b3,0x1420;;
1420: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1426: 00 00 00 00 10 48 nop\.b 0x0
142c: 30 00 40 20 brp\.dptk b3,0x1440;;
1430: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1436: 00 00 00 00 10 28 nop\.b 0x0
143c: 30 00 40 24 brp\.dptk.imp b3,0x1440;;
1440: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1446: 00 00 00 00 10 40 nop\.b 0x0
144c: 30 00 44 20 brp\.ret\.sptk b3,0x1460;;
1450: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1456: 00 00 00 00 10 20 nop\.b 0x0
145c: 30 00 44 24 brp\.ret\.sptk\.imp b3,0x1460;;
1460: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1466: 00 00 00 00 10 48 nop\.b 0x0
146c: 30 00 44 20 brp\.ret\.dptk b3,0x1480;;
1470: 17 00 00 00 00 00 \[BBB\] break\.b 0x0
1476: 00 00 00 00 10 28 nop\.b 0x0
147c: 30 00 44 24 brp\.ret\.dptk.imp b3,0x1480;;
\.\.\.
2b80: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2b86: 00 00 00 00 10 00 nop\.b 0x0
2b8c: 00 00 08 00 cover;;
2b90: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2b96: 00 00 00 00 10 00 nop\.b 0x0
2b9c: 00 00 10 00 clrrrb;;
2ba0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2ba6: 00 00 00 00 10 00 nop\.b 0x0
2bac: 00 00 14 00 clrrrb\.pr;;
2bb0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2bb6: 00 00 00 00 10 00 nop\.b 0x0
2bbc: 00 00 20 00 rfi;;
2bc0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2bc6: 00 00 00 00 10 00 nop\.b 0x0
2bcc: 00 00 30 00 bsw\.0;;
2bd0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2bd6: 00 00 00 00 10 00 nop\.b 0x0
2bdc: 00 00 34 00 bsw\.1;;
2be0: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
2be6: 00 00 00 00 10 00 nop\.b 0x0
2bec: 00 00 40 00 epc;;
2bf0: 16 f8 ff 0f 00 00 \[BBB\] break\.b 0x1ffff
2bf6: 00 00 00 02 10 e0 hint\.b 0x0
2bfc: ff 3f 04 20 hint\.b 0x1ffff
2c00: 17 f8 ff 0f 00 08 \[BBB\] nop\.b 0x1ffff
2c06: 00 00 00 30 00 00 vmsw.0
2c0c: 00 00 64 00 vmsw.1;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-bad.l
0,0 → 1,51
.*: Assembler messages:
.*:8: Error: First operand to \.save\.g must be a positive 4-bit constant
.*:10: Error: First operand to \.save\.g must be a positive 4-bit constant
.*:12: Error: First operand to \.save\.g must be a positive 4-bit constant
.*:16: Warning: Previous .save incomplete
#FIXME .*:18: Error: Register r4 was already saved
.*:20: Error: Operand to \.save\.f must be a positive 20-bit constant
.*:22: Error: Operand to \.save\.f must be a positive 20-bit constant
.*:24: Error: Operand to \.save\.f must be a positive 20-bit constant
.*:28: Warning: Previous .save incomplete
#FIXME .*:30: Error: Register f2 was already saved
.*:32: Error: First operand to \.save\.b must be a positive 5-bit constant
.*:34: Error: First operand to \.save\.b must be a positive 5-bit constant
.*:36: Error: First operand to \.save\.b must be a positive 5-bit constant
.*:40: Warning: Previous .save incomplete
#FIXME .*:42: Error: Register b1 was already saved
.*:44: Error: Operand 2 to \.spillreg must be a writable register
.*:46: Error: Operand 1 to \.spillreg must be a preserved register
.*:48: Error: Operand 1 to \.spillreg must be a preserved register
.*:50: Error: Operand 1 to \.spillreg must be a preserved register
.*:52: Error: Operand 2 to \.spillreg must be a writable register
.*:54: Error: Operand 2 to \.spillreg must be a writable register
.*:56: Error: Operand 1 to \.spillreg must be a preserved register
#FIXME .*:58: Error: Floating point register cannot be spilled to general register
#FIXME .*:60: Error: Floating point register cannot be spilled to branch register
.*:62: Warning: Pointless use of p0 as first operand to \.spillreg\.p
.*:64: Error: Operand 3 to \.spillreg.p must be a writable register
.*:66: Error: Operand 3 to \.spillreg.p must be a writable register
.*:68: Warning: Pointless use of p0 as first operand to \.restorereg\.p
.*:78: Error: Operands to \.save\.gf may not be both zero
.*:80: Error: First operand to \.save\.gf must be a non-negative 4-bit constant
.*:82: Error: Second operand to \.save\.gf must be a non-negative 20-bit constant
.*:84: Error: First operand to \.save\.gf must be a non-negative 4-bit constant
.*:86: Error: Second operand to \.save\.gf must be a non-negative 20-bit constant
.*:90: Warning: Previous .save incomplete
#FIXME .*:92: Error: Register r4 was already saved
#FIXME .*:94: Error: Register f2 was already saved
.*:98: Error: Epilogue count of 2 exceeds number of nested prologues \(1\)
.*:100: Error: Missing \.label_state 2
.*:108: Error: First operand to \.save\.g must be a positive 4-bit constant
#FIXME .*:110: Error: Second operand to \.save\.g must be a writable general registers
.*:112: Error: Second operand to \.save\.g must be the first of 2 general registers
.*:115: Error: First operand to \.save\.b must be a positive 5-bit constant
#FIXME .*:117: Error: Second operand to \.save\.b must be a writable general registers
.*:119: Error: Second operand to \.save\.b must be the first of 2 general registers
.*:128: Error: First operand to \.prologue must be a positive 4-bit constant
.*:134: Warning: Pointless use of zero first operand to \.prologue
.*:140: Error: First operand to \.prologue must be a positive 4-bit constant
#FIXME .*:141: Error: Operand to \.vframe must be a writable general registers
#FIXME .*:147: Error: Second operand to \.prologue must be a writable general registers
.*:153: Error: Second operand to \.prologue must be the first of 2 general registers
/trunk/gnu/binutils/gas/testsuite/gas/ia64/secname-ilp32.d
0,0 → 1,19
#readelf: -S
#name: ia64 section name (ilp32)
#as: -milp32
#source: secname.s
 
There are 8 section headers, starting at offset 0x7c:
 
Section Headers:
\[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al
\[ 0\] NULL 00000000 000000 000000 00 0 0 0
\[ 1\] .text PROGBITS 00000000 000040 000000 00 AX 0 0 16
\[ 2\] .data PROGBITS 00000000 000040 000000 00 WA 0 0 1
\[ 3\] .bss NOBITS 00000000 000040 000000 00 WA 0 0 1
\[ 4\] .foo PROGBITS 00000000 000040 000008 00 WA 0 0 8
\[ 5\] .shstrtab STRTAB 00000000 000048 000031 00 0 0 1
\[ 6\] .symtab SYMTAB 00000000 0001bc 000050 10 7 5 4
\[ 7\] .strtab STRTAB 00000000 00020c 000001 00 0 0 1
Key to Flags:
#...
/trunk/gnu/binutils/gas/testsuite/gas/ia64/rotX.l
0,0 → 1,5
.*: Assembler messages:
.*.s:[[:digit:]]+: Error: [Nn]umber of elements must be positive
.*.s:[[:digit:]]+: Error: [Nn]umber of elements must be positive
.*.s:[[:digit:]]+: Error: [Bb]ad or irreducible absolute expression
#pass
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-f.d
0,0 → 1,1572
# as: -xnone -mtune=itanium1
# objdump: -d --disassemble-zeroes
# name: ia64 opc-f
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6: 40 38 14 0c 40 00 fma\.s0 f4=f5,f6,f7
c: 00 00 00 20 nop\.b 0x0
10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
16: 40 38 14 0c 40 00 fma\.s0 f4=f5,f6,f7
1c: 00 00 00 20 nop\.b 0x0
20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
26: 40 38 14 0c 41 00 fma\.s1 f4=f5,f6,f7
2c: 00 00 00 20 nop\.b 0x0
30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
36: 40 38 14 0c 42 00 fma\.s2 f4=f5,f6,f7
3c: 00 00 00 20 nop\.b 0x0
40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
46: 40 38 14 0c 43 00 fma\.s3 f4=f5,f6,f7
4c: 00 00 00 20 nop\.b 0x0
50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
56: 40 38 14 0c 44 00 fma\.s\.s0 f4=f5,f6,f7
5c: 00 00 00 20 nop\.b 0x0
60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
66: 40 38 14 0c 44 00 fma\.s\.s0 f4=f5,f6,f7
6c: 00 00 00 20 nop\.b 0x0
70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
76: 40 38 14 0c 45 00 fma\.s\.s1 f4=f5,f6,f7
7c: 00 00 00 20 nop\.b 0x0
80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
86: 40 38 14 0c 46 00 fma\.s\.s2 f4=f5,f6,f7
8c: 00 00 00 20 nop\.b 0x0
90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
96: 40 38 14 0c 47 00 fma\.s\.s3 f4=f5,f6,f7
9c: 00 00 00 20 nop\.b 0x0
a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a6: 40 38 14 0c 48 00 fma\.d\.s0 f4=f5,f6,f7
ac: 00 00 00 20 nop\.b 0x0
b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b6: 40 38 14 0c 48 00 fma\.d\.s0 f4=f5,f6,f7
bc: 00 00 00 20 nop\.b 0x0
c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c6: 40 38 14 0c 49 00 fma\.d\.s1 f4=f5,f6,f7
cc: 00 00 00 20 nop\.b 0x0
d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d6: 40 38 14 0c 4a 00 fma\.d\.s2 f4=f5,f6,f7
dc: 00 00 00 20 nop\.b 0x0
e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e6: 40 38 14 0c 4b 00 fma\.d\.s3 f4=f5,f6,f7
ec: 00 00 00 20 nop\.b 0x0
f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f6: 40 38 14 0c 4c 00 fpma\.s0 f4=f5,f6,f7
fc: 00 00 00 20 nop\.b 0x0
100: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
106: 40 38 14 0c 4c 00 fpma\.s0 f4=f5,f6,f7
10c: 00 00 00 20 nop\.b 0x0
110: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
116: 40 38 14 0c 4d 00 fpma\.s1 f4=f5,f6,f7
11c: 00 00 00 20 nop\.b 0x0
120: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
126: 40 38 14 0c 4e 00 fpma\.s2 f4=f5,f6,f7
12c: 00 00 00 20 nop\.b 0x0
130: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
136: 40 38 14 0c 4f 00 fpma\.s3 f4=f5,f6,f7
13c: 00 00 00 20 nop\.b 0x0
140: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
146: 40 38 14 0c 50 00 fms\.s0 f4=f5,f6,f7
14c: 00 00 00 20 nop\.b 0x0
150: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
156: 40 38 14 0c 50 00 fms\.s0 f4=f5,f6,f7
15c: 00 00 00 20 nop\.b 0x0
160: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
166: 40 38 14 0c 51 00 fms\.s1 f4=f5,f6,f7
16c: 00 00 00 20 nop\.b 0x0
170: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
176: 40 38 14 0c 52 00 fms\.s2 f4=f5,f6,f7
17c: 00 00 00 20 nop\.b 0x0
180: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
186: 40 38 14 0c 53 00 fms\.s3 f4=f5,f6,f7
18c: 00 00 00 20 nop\.b 0x0
190: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
196: 40 38 14 0c 54 00 fms\.s\.s0 f4=f5,f6,f7
19c: 00 00 00 20 nop\.b 0x0
1a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1a6: 40 38 14 0c 54 00 fms\.s\.s0 f4=f5,f6,f7
1ac: 00 00 00 20 nop\.b 0x0
1b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1b6: 40 38 14 0c 55 00 fms\.s\.s1 f4=f5,f6,f7
1bc: 00 00 00 20 nop\.b 0x0
1c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1c6: 40 38 14 0c 56 00 fms\.s\.s2 f4=f5,f6,f7
1cc: 00 00 00 20 nop\.b 0x0
1d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1d6: 40 38 14 0c 57 00 fms\.s\.s3 f4=f5,f6,f7
1dc: 00 00 00 20 nop\.b 0x0
1e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e6: 40 38 14 0c 58 00 fms\.d\.s0 f4=f5,f6,f7
1ec: 00 00 00 20 nop\.b 0x0
1f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f6: 40 38 14 0c 58 00 fms\.d\.s0 f4=f5,f6,f7
1fc: 00 00 00 20 nop\.b 0x0
200: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
206: 40 38 14 0c 59 00 fms\.d\.s1 f4=f5,f6,f7
20c: 00 00 00 20 nop\.b 0x0
210: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
216: 40 38 14 0c 5a 00 fms\.d\.s2 f4=f5,f6,f7
21c: 00 00 00 20 nop\.b 0x0
220: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
226: 40 38 14 0c 5b 00 fms\.d\.s3 f4=f5,f6,f7
22c: 00 00 00 20 nop\.b 0x0
230: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
236: 40 38 14 0c 5c 00 fpms\.s0 f4=f5,f6,f7
23c: 00 00 00 20 nop\.b 0x0
240: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
246: 40 38 14 0c 5c 00 fpms\.s0 f4=f5,f6,f7
24c: 00 00 00 20 nop\.b 0x0
250: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
256: 40 38 14 0c 5d 00 fpms\.s1 f4=f5,f6,f7
25c: 00 00 00 20 nop\.b 0x0
260: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
266: 40 38 14 0c 5e 00 fpms\.s2 f4=f5,f6,f7
26c: 00 00 00 20 nop\.b 0x0
270: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
276: 40 38 14 0c 5f 00 fpms\.s3 f4=f5,f6,f7
27c: 00 00 00 20 nop\.b 0x0
280: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
286: 40 38 14 0c 60 00 fnma\.s0 f4=f5,f6,f7
28c: 00 00 00 20 nop\.b 0x0
290: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
296: 40 38 14 0c 60 00 fnma\.s0 f4=f5,f6,f7
29c: 00 00 00 20 nop\.b 0x0
2a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2a6: 40 38 14 0c 61 00 fnma\.s1 f4=f5,f6,f7
2ac: 00 00 00 20 nop\.b 0x0
2b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2b6: 40 38 14 0c 62 00 fnma\.s2 f4=f5,f6,f7
2bc: 00 00 00 20 nop\.b 0x0
2c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2c6: 40 38 14 0c 63 00 fnma\.s3 f4=f5,f6,f7
2cc: 00 00 00 20 nop\.b 0x0
2d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2d6: 40 38 14 0c 64 00 fnma\.s\.s0 f4=f5,f6,f7
2dc: 00 00 00 20 nop\.b 0x0
2e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2e6: 40 38 14 0c 64 00 fnma\.s\.s0 f4=f5,f6,f7
2ec: 00 00 00 20 nop\.b 0x0
2f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2f6: 40 38 14 0c 65 00 fnma\.s\.s1 f4=f5,f6,f7
2fc: 00 00 00 20 nop\.b 0x0
300: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
306: 40 38 14 0c 66 00 fnma\.s\.s2 f4=f5,f6,f7
30c: 00 00 00 20 nop\.b 0x0
310: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
316: 40 38 14 0c 67 00 fnma\.s\.s3 f4=f5,f6,f7
31c: 00 00 00 20 nop\.b 0x0
320: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
326: 40 38 14 0c 68 00 fnma\.d\.s0 f4=f5,f6,f7
32c: 00 00 00 20 nop\.b 0x0
330: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
336: 40 38 14 0c 68 00 fnma\.d\.s0 f4=f5,f6,f7
33c: 00 00 00 20 nop\.b 0x0
340: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
346: 40 38 14 0c 69 00 fnma\.d\.s1 f4=f5,f6,f7
34c: 00 00 00 20 nop\.b 0x0
350: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
356: 40 38 14 0c 6a 00 fnma\.d\.s2 f4=f5,f6,f7
35c: 00 00 00 20 nop\.b 0x0
360: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
366: 40 38 14 0c 6b 00 fnma\.d\.s3 f4=f5,f6,f7
36c: 00 00 00 20 nop\.b 0x0
370: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
376: 40 38 14 0c 6c 00 fpnma\.s0 f4=f5,f6,f7
37c: 00 00 00 20 nop\.b 0x0
380: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
386: 40 38 14 0c 6c 00 fpnma\.s0 f4=f5,f6,f7
38c: 00 00 00 20 nop\.b 0x0
390: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
396: 40 38 14 0c 6d 00 fpnma\.s1 f4=f5,f6,f7
39c: 00 00 00 20 nop\.b 0x0
3a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3a6: 40 38 14 0c 6e 00 fpnma\.s2 f4=f5,f6,f7
3ac: 00 00 00 20 nop\.b 0x0
3b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3b6: 40 38 14 0c 6f 00 fpnma\.s3 f4=f5,f6,f7
3bc: 00 00 00 20 nop\.b 0x0
3c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3c6: 40 00 14 0c 40 00 fmpy\.s0 f4=f5,f6
3cc: 00 00 00 20 nop\.b 0x0
3d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3d6: 40 00 14 0c 40 00 fmpy\.s0 f4=f5,f6
3dc: 00 00 00 20 nop\.b 0x0
3e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3e6: 40 00 14 0c 41 00 fmpy\.s1 f4=f5,f6
3ec: 00 00 00 20 nop\.b 0x0
3f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
3f6: 40 00 14 0c 42 00 fmpy\.s2 f4=f5,f6
3fc: 00 00 00 20 nop\.b 0x0
400: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
406: 40 00 14 0c 43 00 fmpy\.s3 f4=f5,f6
40c: 00 00 00 20 nop\.b 0x0
410: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
416: 40 00 14 0c 44 00 fmpy\.s\.s0 f4=f5,f6
41c: 00 00 00 20 nop\.b 0x0
420: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
426: 40 00 14 0c 44 00 fmpy\.s\.s0 f4=f5,f6
42c: 00 00 00 20 nop\.b 0x0
430: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
436: 40 00 14 0c 45 00 fmpy\.s\.s1 f4=f5,f6
43c: 00 00 00 20 nop\.b 0x0
440: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
446: 40 00 14 0c 46 00 fmpy\.s\.s2 f4=f5,f6
44c: 00 00 00 20 nop\.b 0x0
450: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
456: 40 00 14 0c 47 00 fmpy\.s\.s3 f4=f5,f6
45c: 00 00 00 20 nop\.b 0x0
460: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
466: 40 00 14 0c 48 00 fmpy\.d\.s0 f4=f5,f6
46c: 00 00 00 20 nop\.b 0x0
470: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
476: 40 00 14 0c 48 00 fmpy\.d\.s0 f4=f5,f6
47c: 00 00 00 20 nop\.b 0x0
480: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
486: 40 00 14 0c 49 00 fmpy\.d\.s1 f4=f5,f6
48c: 00 00 00 20 nop\.b 0x0
490: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
496: 40 00 14 0c 4a 00 fmpy\.d\.s2 f4=f5,f6
49c: 00 00 00 20 nop\.b 0x0
4a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4a6: 40 00 14 0c 4b 00 fmpy\.d\.s3 f4=f5,f6
4ac: 00 00 00 20 nop\.b 0x0
4b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4b6: 40 00 14 0c 4c 00 fpmpy\.s0 f4=f5,f6
4bc: 00 00 00 20 nop\.b 0x0
4c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4c6: 40 00 14 0c 4c 00 fpmpy\.s0 f4=f5,f6
4cc: 00 00 00 20 nop\.b 0x0
4d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4d6: 40 00 14 0c 4d 00 fpmpy\.s1 f4=f5,f6
4dc: 00 00 00 20 nop\.b 0x0
4e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4e6: 40 00 14 0c 4e 00 fpmpy\.s2 f4=f5,f6
4ec: 00 00 00 20 nop\.b 0x0
4f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
4f6: 40 00 14 0c 4f 00 fpmpy\.s3 f4=f5,f6
4fc: 00 00 00 20 nop\.b 0x0
500: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
506: 40 30 14 02 40 00 fadd\.s0 f4=f5,f6
50c: 00 00 00 20 nop\.b 0x0
510: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
516: 40 30 14 02 40 00 fadd\.s0 f4=f5,f6
51c: 00 00 00 20 nop\.b 0x0
520: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
526: 40 30 14 02 41 00 fadd\.s1 f4=f5,f6
52c: 00 00 00 20 nop\.b 0x0
530: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
536: 40 30 14 02 42 00 fadd\.s2 f4=f5,f6
53c: 00 00 00 20 nop\.b 0x0
540: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
546: 40 30 14 02 43 00 fadd\.s3 f4=f5,f6
54c: 00 00 00 20 nop\.b 0x0
550: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
556: 40 30 14 02 44 00 fadd\.s\.s0 f4=f5,f6
55c: 00 00 00 20 nop\.b 0x0
560: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
566: 40 30 14 02 44 00 fadd\.s\.s0 f4=f5,f6
56c: 00 00 00 20 nop\.b 0x0
570: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
576: 40 30 14 02 45 00 fadd\.s\.s1 f4=f5,f6
57c: 00 00 00 20 nop\.b 0x0
580: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
586: 40 30 14 02 46 00 fadd\.s\.s2 f4=f5,f6
58c: 00 00 00 20 nop\.b 0x0
590: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
596: 40 30 14 02 47 00 fadd\.s\.s3 f4=f5,f6
59c: 00 00 00 20 nop\.b 0x0
5a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5a6: 40 30 14 02 48 00 fadd\.d\.s0 f4=f5,f6
5ac: 00 00 00 20 nop\.b 0x0
5b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5b6: 40 30 14 02 48 00 fadd\.d\.s0 f4=f5,f6
5bc: 00 00 00 20 nop\.b 0x0
5c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5c6: 40 30 14 02 49 00 fadd\.d\.s1 f4=f5,f6
5cc: 00 00 00 20 nop\.b 0x0
5d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5d6: 40 30 14 02 4a 00 fadd\.d\.s2 f4=f5,f6
5dc: 00 00 00 20 nop\.b 0x0
5e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5e6: 40 30 14 02 4b 00 fadd\.d\.s3 f4=f5,f6
5ec: 00 00 00 20 nop\.b 0x0
5f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
5f6: 40 30 14 02 50 00 fsub\.s0 f4=f5,f6
5fc: 00 00 00 20 nop\.b 0x0
600: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
606: 40 30 14 02 50 00 fsub\.s0 f4=f5,f6
60c: 00 00 00 20 nop\.b 0x0
610: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
616: 40 30 14 02 51 00 fsub\.s1 f4=f5,f6
61c: 00 00 00 20 nop\.b 0x0
620: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
626: 40 30 14 02 52 00 fsub\.s2 f4=f5,f6
62c: 00 00 00 20 nop\.b 0x0
630: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
636: 40 30 14 02 53 00 fsub\.s3 f4=f5,f6
63c: 00 00 00 20 nop\.b 0x0
640: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
646: 40 30 14 02 54 00 fsub\.s\.s0 f4=f5,f6
64c: 00 00 00 20 nop\.b 0x0
650: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
656: 40 30 14 02 54 00 fsub\.s\.s0 f4=f5,f6
65c: 00 00 00 20 nop\.b 0x0
660: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
666: 40 30 14 02 55 00 fsub\.s\.s1 f4=f5,f6
66c: 00 00 00 20 nop\.b 0x0
670: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
676: 40 30 14 02 56 00 fsub\.s\.s2 f4=f5,f6
67c: 00 00 00 20 nop\.b 0x0
680: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
686: 40 30 14 02 57 00 fsub\.s\.s3 f4=f5,f6
68c: 00 00 00 20 nop\.b 0x0
690: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
696: 40 30 14 02 58 00 fsub\.d\.s0 f4=f5,f6
69c: 00 00 00 20 nop\.b 0x0
6a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6a6: 40 30 14 02 58 00 fsub\.d\.s0 f4=f5,f6
6ac: 00 00 00 20 nop\.b 0x0
6b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6b6: 40 30 14 02 59 00 fsub\.d\.s1 f4=f5,f6
6bc: 00 00 00 20 nop\.b 0x0
6c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6c6: 40 30 14 02 5a 00 fsub\.d\.s2 f4=f5,f6
6cc: 00 00 00 20 nop\.b 0x0
6d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6d6: 40 30 14 02 5b 00 fsub\.d\.s3 f4=f5,f6
6dc: 00 00 00 20 nop\.b 0x0
6e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6e6: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
6ec: 00 00 00 20 nop\.b 0x0
6f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
6f6: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
6fc: 00 00 00 20 nop\.b 0x0
700: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
706: 40 00 14 0c 61 00 fnmpy\.s1 f4=f5,f6
70c: 00 00 00 20 nop\.b 0x0
710: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
716: 40 00 14 0c 62 00 fnmpy\.s2 f4=f5,f6
71c: 00 00 00 20 nop\.b 0x0
720: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
726: 40 00 14 0c 63 00 fnmpy\.s3 f4=f5,f6
72c: 00 00 00 20 nop\.b 0x0
730: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
736: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
73c: 00 00 00 20 nop\.b 0x0
740: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
746: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
74c: 00 00 00 20 nop\.b 0x0
750: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
756: 40 00 14 0c 65 00 fnmpy\.s\.s1 f4=f5,f6
75c: 00 00 00 20 nop\.b 0x0
760: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
766: 40 00 14 0c 66 00 fnmpy\.s\.s2 f4=f5,f6
76c: 00 00 00 20 nop\.b 0x0
770: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
776: 40 00 14 0c 67 00 fnmpy\.s\.s3 f4=f5,f6
77c: 00 00 00 20 nop\.b 0x0
780: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
786: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
78c: 00 00 00 20 nop\.b 0x0
790: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
796: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
79c: 00 00 00 20 nop\.b 0x0
7a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7a6: 40 00 14 0c 69 00 fnmpy\.d\.s1 f4=f5,f6
7ac: 00 00 00 20 nop\.b 0x0
7b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7b6: 40 00 14 0c 6a 00 fnmpy\.d\.s2 f4=f5,f6
7bc: 00 00 00 20 nop\.b 0x0
7c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7c6: 40 00 14 0c 6b 00 fnmpy\.d\.s3 f4=f5,f6
7cc: 00 00 00 20 nop\.b 0x0
7d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7d6: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
7dc: 00 00 00 20 nop\.b 0x0
7e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7e6: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
7ec: 00 00 00 20 nop\.b 0x0
7f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
7f6: 40 00 14 0c 6d 00 fpnmpy\.s1 f4=f5,f6
7fc: 00 00 00 20 nop\.b 0x0
800: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
806: 40 00 14 0c 6e 00 fpnmpy\.s2 f4=f5,f6
80c: 00 00 00 20 nop\.b 0x0
810: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
816: 40 00 14 0c 6f 00 fpnmpy\.s3 f4=f5,f6
81c: 00 00 00 20 nop\.b 0x0
820: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
826: 40 00 14 02 40 00 fnorm\.s0 f4=f5
82c: 00 00 00 20 nop\.b 0x0
830: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
836: 40 00 14 02 40 00 fnorm\.s0 f4=f5
83c: 00 00 00 20 nop\.b 0x0
840: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
846: 40 00 14 02 41 00 fnorm\.s1 f4=f5
84c: 00 00 00 20 nop\.b 0x0
850: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
856: 40 00 14 02 42 00 fnorm\.s2 f4=f5
85c: 00 00 00 20 nop\.b 0x0
860: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
866: 40 00 14 02 43 00 fnorm\.s3 f4=f5
86c: 00 00 00 20 nop\.b 0x0
870: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
876: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
87c: 00 00 00 20 nop\.b 0x0
880: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
886: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
88c: 00 00 00 20 nop\.b 0x0
890: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
896: 40 00 14 02 45 00 fnorm\.s\.s1 f4=f5
89c: 00 00 00 20 nop\.b 0x0
8a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8a6: 40 00 14 02 46 00 fnorm\.s\.s2 f4=f5
8ac: 00 00 00 20 nop\.b 0x0
8b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8b6: 40 00 14 02 47 00 fnorm\.s\.s3 f4=f5
8bc: 00 00 00 20 nop\.b 0x0
8c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8c6: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
8cc: 00 00 00 20 nop\.b 0x0
8d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8d6: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
8dc: 00 00 00 20 nop\.b 0x0
8e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8e6: 40 00 14 02 49 00 fnorm\.d\.s1 f4=f5
8ec: 00 00 00 20 nop\.b 0x0
8f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
8f6: 40 00 14 02 4a 00 fnorm\.d\.s2 f4=f5
8fc: 00 00 00 20 nop\.b 0x0
900: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
906: 40 00 14 02 4b 00 fnorm\.d\.s3 f4=f5
90c: 00 00 00 20 nop\.b 0x0
910: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
916: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
91c: 00 00 00 20 nop\.b 0x0
920: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
926: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
92c: 00 00 00 20 nop\.b 0x0
930: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
936: 40 38 14 0c 77 00 xma\.h f4=f5,f6,f7
93c: 00 00 00 20 nop\.b 0x0
940: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
946: 40 38 14 0c 76 00 xma\.hu f4=f5,f6,f7
94c: 00 00 00 20 nop\.b 0x0
950: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
956: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
95c: 00 00 00 20 nop\.b 0x0
960: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
966: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
96c: 00 00 00 20 nop\.b 0x0
970: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
976: 40 00 14 0c 77 00 xmpy\.h f4=f5,f6
97c: 00 00 00 20 nop\.b 0x0
980: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
986: 40 00 14 0c 76 00 xmpy\.hu f4=f5,f6
98c: 00 00 00 20 nop\.b 0x0
990: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
996: 40 38 14 0c 70 00 fselect f4=f5,f6,f7
99c: 00 00 00 20 nop\.b 0x0
9a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9a6: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
9ac: 00 00 00 20 nop\.b 0x0
9b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9b6: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
9bc: 00 00 00 20 nop\.b 0x0
9c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9c6: 30 20 14 08 21 00 fcmp\.eq\.s1 p3,p4=f4,f5
9cc: 00 00 00 20 nop\.b 0x0
9d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9d6: 30 20 14 08 22 00 fcmp\.eq\.s2 p3,p4=f4,f5
9dc: 00 00 00 20 nop\.b 0x0
9e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9e6: 30 20 14 08 23 00 fcmp\.eq\.s3 p3,p4=f4,f5
9ec: 00 00 00 20 nop\.b 0x0
9f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
9f6: 30 24 14 08 20 00 fcmp\.eq\.unc\.s0 p3,p4=f4,f5
9fc: 00 00 00 20 nop\.b 0x0
a00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a06: 30 24 14 08 20 00 fcmp\.eq\.unc\.s0 p3,p4=f4,f5
a0c: 00 00 00 20 nop\.b 0x0
a10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a16: 30 24 14 08 21 00 fcmp\.eq\.unc\.s1 p3,p4=f4,f5
a1c: 00 00 00 20 nop\.b 0x0
a20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a26: 30 24 14 08 22 00 fcmp\.eq\.unc\.s2 p3,p4=f4,f5
a2c: 00 00 00 20 nop\.b 0x0
a30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a36: 30 24 14 08 23 00 fcmp\.eq\.unc\.s3 p3,p4=f4,f5
a3c: 00 00 00 20 nop\.b 0x0
a40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a46: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
a4c: 00 00 00 20 nop\.b 0x0
a50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a56: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
a5c: 00 00 00 20 nop\.b 0x0
a60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a66: 30 20 14 08 25 00 fcmp\.lt\.s1 p3,p4=f4,f5
a6c: 00 00 00 20 nop\.b 0x0
a70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a76: 30 20 14 08 26 00 fcmp\.lt\.s2 p3,p4=f4,f5
a7c: 00 00 00 20 nop\.b 0x0
a80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a86: 30 20 14 08 27 00 fcmp\.lt\.s3 p3,p4=f4,f5
a8c: 00 00 00 20 nop\.b 0x0
a90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
a96: 30 24 14 08 24 00 fcmp\.lt\.unc\.s0 p3,p4=f4,f5
a9c: 00 00 00 20 nop\.b 0x0
aa0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
aa6: 30 24 14 08 24 00 fcmp\.lt\.unc\.s0 p3,p4=f4,f5
aac: 00 00 00 20 nop\.b 0x0
ab0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ab6: 30 24 14 08 25 00 fcmp\.lt\.unc\.s1 p3,p4=f4,f5
abc: 00 00 00 20 nop\.b 0x0
ac0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ac6: 30 24 14 08 26 00 fcmp\.lt\.unc\.s2 p3,p4=f4,f5
acc: 00 00 00 20 nop\.b 0x0
ad0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ad6: 30 24 14 08 27 00 fcmp\.lt\.unc\.s3 p3,p4=f4,f5
adc: 00 00 00 20 nop\.b 0x0
ae0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ae6: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
aec: 00 00 00 20 nop\.b 0x0
af0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
af6: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
afc: 00 00 00 20 nop\.b 0x0
b00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b06: 30 20 14 88 21 00 fcmp\.le\.s1 p3,p4=f4,f5
b0c: 00 00 00 20 nop\.b 0x0
b10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b16: 30 20 14 88 22 00 fcmp\.le\.s2 p3,p4=f4,f5
b1c: 00 00 00 20 nop\.b 0x0
b20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b26: 30 20 14 88 23 00 fcmp\.le\.s3 p3,p4=f4,f5
b2c: 00 00 00 20 nop\.b 0x0
b30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b36: 30 24 14 88 20 00 fcmp\.le\.unc\.s0 p3,p4=f4,f5
b3c: 00 00 00 20 nop\.b 0x0
b40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b46: 30 24 14 88 20 00 fcmp\.le\.unc\.s0 p3,p4=f4,f5
b4c: 00 00 00 20 nop\.b 0x0
b50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b56: 30 24 14 88 21 00 fcmp\.le\.unc\.s1 p3,p4=f4,f5
b5c: 00 00 00 20 nop\.b 0x0
b60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b66: 30 24 14 88 22 00 fcmp\.le\.unc\.s2 p3,p4=f4,f5
b6c: 00 00 00 20 nop\.b 0x0
b70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b76: 30 24 14 88 23 00 fcmp\.le\.unc\.s3 p3,p4=f4,f5
b7c: 00 00 00 20 nop\.b 0x0
b80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b86: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
b8c: 00 00 00 20 nop\.b 0x0
b90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
b96: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
b9c: 00 00 00 20 nop\.b 0x0
ba0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ba6: 30 20 14 88 25 00 fcmp\.unord\.s1 p3,p4=f4,f5
bac: 00 00 00 20 nop\.b 0x0
bb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
bb6: 30 20 14 88 26 00 fcmp\.unord\.s2 p3,p4=f4,f5
bbc: 00 00 00 20 nop\.b 0x0
bc0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
bc6: 30 20 14 88 27 00 fcmp\.unord\.s3 p3,p4=f4,f5
bcc: 00 00 00 20 nop\.b 0x0
bd0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
bd6: 30 24 14 88 24 00 fcmp\.unord\.unc\.s0 p3,p4=f4,f5
bdc: 00 00 00 20 nop\.b 0x0
be0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
be6: 30 24 14 88 24 00 fcmp\.unord\.unc\.s0 p3,p4=f4,f5
bec: 00 00 00 20 nop\.b 0x0
bf0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
bf6: 30 24 14 88 25 00 fcmp\.unord\.unc\.s1 p3,p4=f4,f5
bfc: 00 00 00 20 nop\.b 0x0
c00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c06: 30 24 14 88 26 00 fcmp\.unord\.unc\.s2 p3,p4=f4,f5
c0c: 00 00 00 20 nop\.b 0x0
c10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c16: 30 24 14 88 27 00 fcmp\.unord\.unc\.s3 p3,p4=f4,f5
c1c: 00 00 00 20 nop\.b 0x0
c20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c26: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
c2c: 00 00 00 20 nop\.b 0x0
c30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c36: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
c3c: 00 00 00 20 nop\.b 0x0
c40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c46: 30 28 10 08 25 00 fcmp\.lt\.s1 p3,p4=f5,f4
c4c: 00 00 00 20 nop\.b 0x0
c50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c56: 30 28 10 08 26 00 fcmp\.lt\.s2 p3,p4=f5,f4
c5c: 00 00 00 20 nop\.b 0x0
c60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c66: 30 28 10 08 27 00 fcmp\.lt\.s3 p3,p4=f5,f4
c6c: 00 00 00 20 nop\.b 0x0
c70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c76: 30 2c 10 08 24 00 fcmp\.lt\.unc\.s0 p3,p4=f5,f4
c7c: 00 00 00 20 nop\.b 0x0
c80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c86: 30 2c 10 08 24 00 fcmp\.lt\.unc\.s0 p3,p4=f5,f4
c8c: 00 00 00 20 nop\.b 0x0
c90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
c96: 30 2c 10 08 25 00 fcmp\.lt\.unc\.s1 p3,p4=f5,f4
c9c: 00 00 00 20 nop\.b 0x0
ca0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ca6: 30 2c 10 08 26 00 fcmp\.lt\.unc\.s2 p3,p4=f5,f4
cac: 00 00 00 20 nop\.b 0x0
cb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
cb6: 30 2c 10 08 27 00 fcmp\.lt\.unc\.s3 p3,p4=f5,f4
cbc: 00 00 00 20 nop\.b 0x0
cc0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
cc6: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
ccc: 00 00 00 20 nop\.b 0x0
cd0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
cd6: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
cdc: 00 00 00 20 nop\.b 0x0
ce0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ce6: 30 28 10 88 21 00 fcmp\.le\.s1 p3,p4=f5,f4
cec: 00 00 00 20 nop\.b 0x0
cf0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
cf6: 30 28 10 88 22 00 fcmp\.le\.s2 p3,p4=f5,f4
cfc: 00 00 00 20 nop\.b 0x0
d00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d06: 30 28 10 88 23 00 fcmp\.le\.s3 p3,p4=f5,f4
d0c: 00 00 00 20 nop\.b 0x0
d10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d16: 30 2c 10 88 20 00 fcmp\.le\.unc\.s0 p3,p4=f5,f4
d1c: 00 00 00 20 nop\.b 0x0
d20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d26: 30 2c 10 88 20 00 fcmp\.le\.unc\.s0 p3,p4=f5,f4
d2c: 00 00 00 20 nop\.b 0x0
d30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d36: 30 2c 10 88 21 00 fcmp\.le\.unc\.s1 p3,p4=f5,f4
d3c: 00 00 00 20 nop\.b 0x0
d40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d46: 30 2c 10 88 22 00 fcmp\.le\.unc\.s2 p3,p4=f5,f4
d4c: 00 00 00 20 nop\.b 0x0
d50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d56: 30 2c 10 88 23 00 fcmp\.le\.unc\.s3 p3,p4=f5,f4
d5c: 00 00 00 20 nop\.b 0x0
d60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d66: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
d6c: 00 00 00 20 nop\.b 0x0
d70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d76: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
d7c: 00 00 00 20 nop\.b 0x0
d80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d86: 40 20 14 06 21 00 fcmp\.eq\.s1 p4,p3=f4,f5
d8c: 00 00 00 20 nop\.b 0x0
d90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
d96: 40 20 14 06 22 00 fcmp\.eq\.s2 p4,p3=f4,f5
d9c: 00 00 00 20 nop\.b 0x0
da0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
da6: 40 20 14 06 23 00 fcmp\.eq\.s3 p4,p3=f4,f5
dac: 00 00 00 20 nop\.b 0x0
db0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
db6: 40 24 14 06 20 00 fcmp\.eq\.unc\.s0 p4,p3=f4,f5
dbc: 00 00 00 20 nop\.b 0x0
dc0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
dc6: 40 24 14 06 20 00 fcmp\.eq\.unc\.s0 p4,p3=f4,f5
dcc: 00 00 00 20 nop\.b 0x0
dd0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
dd6: 40 24 14 06 21 00 fcmp\.eq\.unc\.s1 p4,p3=f4,f5
ddc: 00 00 00 20 nop\.b 0x0
de0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
de6: 40 24 14 06 22 00 fcmp\.eq\.unc\.s2 p4,p3=f4,f5
dec: 00 00 00 20 nop\.b 0x0
df0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
df6: 40 24 14 06 23 00 fcmp\.eq\.unc\.s3 p4,p3=f4,f5
dfc: 00 00 00 20 nop\.b 0x0
e00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e06: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
e0c: 00 00 00 20 nop\.b 0x0
e10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e16: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
e1c: 00 00 00 20 nop\.b 0x0
e20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e26: 40 20 14 06 25 00 fcmp\.lt\.s1 p4,p3=f4,f5
e2c: 00 00 00 20 nop\.b 0x0
e30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e36: 40 20 14 06 26 00 fcmp\.lt\.s2 p4,p3=f4,f5
e3c: 00 00 00 20 nop\.b 0x0
e40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e46: 40 20 14 06 27 00 fcmp\.lt\.s3 p4,p3=f4,f5
e4c: 00 00 00 20 nop\.b 0x0
e50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e56: 40 24 14 06 24 00 fcmp\.lt\.unc\.s0 p4,p3=f4,f5
e5c: 00 00 00 20 nop\.b 0x0
e60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e66: 40 24 14 06 24 00 fcmp\.lt\.unc\.s0 p4,p3=f4,f5
e6c: 00 00 00 20 nop\.b 0x0
e70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e76: 40 24 14 06 25 00 fcmp\.lt\.unc\.s1 p4,p3=f4,f5
e7c: 00 00 00 20 nop\.b 0x0
e80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e86: 40 24 14 06 26 00 fcmp\.lt\.unc\.s2 p4,p3=f4,f5
e8c: 00 00 00 20 nop\.b 0x0
e90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
e96: 40 24 14 06 27 00 fcmp\.lt\.unc\.s3 p4,p3=f4,f5
e9c: 00 00 00 20 nop\.b 0x0
ea0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ea6: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
eac: 00 00 00 20 nop\.b 0x0
eb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
eb6: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
ebc: 00 00 00 20 nop\.b 0x0
ec0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ec6: 40 20 14 86 21 00 fcmp\.le\.s1 p4,p3=f4,f5
ecc: 00 00 00 20 nop\.b 0x0
ed0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ed6: 40 20 14 86 22 00 fcmp\.le\.s2 p4,p3=f4,f5
edc: 00 00 00 20 nop\.b 0x0
ee0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ee6: 40 20 14 86 23 00 fcmp\.le\.s3 p4,p3=f4,f5
eec: 00 00 00 20 nop\.b 0x0
ef0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ef6: 40 24 14 86 20 00 fcmp\.le\.unc\.s0 p4,p3=f4,f5
efc: 00 00 00 20 nop\.b 0x0
f00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f06: 40 24 14 86 20 00 fcmp\.le\.unc\.s0 p4,p3=f4,f5
f0c: 00 00 00 20 nop\.b 0x0
f10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f16: 40 24 14 86 21 00 fcmp\.le\.unc\.s1 p4,p3=f4,f5
f1c: 00 00 00 20 nop\.b 0x0
f20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f26: 40 24 14 86 22 00 fcmp\.le\.unc\.s2 p4,p3=f4,f5
f2c: 00 00 00 20 nop\.b 0x0
f30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f36: 40 24 14 86 23 00 fcmp\.le\.unc\.s3 p4,p3=f4,f5
f3c: 00 00 00 20 nop\.b 0x0
f40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f46: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
f4c: 00 00 00 20 nop\.b 0x0
f50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f56: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
f5c: 00 00 00 20 nop\.b 0x0
f60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f66: 40 28 10 06 25 00 fcmp\.lt\.s1 p4,p3=f5,f4
f6c: 00 00 00 20 nop\.b 0x0
f70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f76: 40 28 10 06 26 00 fcmp\.lt\.s2 p4,p3=f5,f4
f7c: 00 00 00 20 nop\.b 0x0
f80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f86: 40 28 10 06 27 00 fcmp\.lt\.s3 p4,p3=f5,f4
f8c: 00 00 00 20 nop\.b 0x0
f90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
f96: 40 2c 10 06 24 00 fcmp\.lt\.unc\.s0 p4,p3=f5,f4
f9c: 00 00 00 20 nop\.b 0x0
fa0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
fa6: 40 2c 10 06 24 00 fcmp\.lt\.unc\.s0 p4,p3=f5,f4
fac: 00 00 00 20 nop\.b 0x0
fb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
fb6: 40 2c 10 06 25 00 fcmp\.lt\.unc\.s1 p4,p3=f5,f4
fbc: 00 00 00 20 nop\.b 0x0
fc0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
fc6: 40 2c 10 06 26 00 fcmp\.lt\.unc\.s2 p4,p3=f5,f4
fcc: 00 00 00 20 nop\.b 0x0
fd0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
fd6: 40 2c 10 06 27 00 fcmp\.lt\.unc\.s3 p4,p3=f5,f4
fdc: 00 00 00 20 nop\.b 0x0
fe0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
fe6: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
fec: 00 00 00 20 nop\.b 0x0
ff0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
ff6: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
ffc: 00 00 00 20 nop\.b 0x0
1000: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1006: 40 28 10 86 21 00 fcmp\.le\.s1 p4,p3=f5,f4
100c: 00 00 00 20 nop\.b 0x0
1010: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1016: 40 28 10 86 22 00 fcmp\.le\.s2 p4,p3=f5,f4
101c: 00 00 00 20 nop\.b 0x0
1020: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1026: 40 28 10 86 23 00 fcmp\.le\.s3 p4,p3=f5,f4
102c: 00 00 00 20 nop\.b 0x0
1030: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1036: 40 2c 10 86 20 00 fcmp\.le\.unc\.s0 p4,p3=f5,f4
103c: 00 00 00 20 nop\.b 0x0
1040: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1046: 40 2c 10 86 20 00 fcmp\.le\.unc\.s0 p4,p3=f5,f4
104c: 00 00 00 20 nop\.b 0x0
1050: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1056: 40 2c 10 86 21 00 fcmp\.le\.unc\.s1 p4,p3=f5,f4
105c: 00 00 00 20 nop\.b 0x0
1060: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1066: 40 2c 10 86 22 00 fcmp\.le\.unc\.s2 p4,p3=f5,f4
106c: 00 00 00 20 nop\.b 0x0
1070: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1076: 40 2c 10 86 23 00 fcmp\.le\.unc\.s3 p4,p3=f5,f4
107c: 00 00 00 20 nop\.b 0x0
1080: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1086: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
108c: 00 00 00 20 nop\.b 0x0
1090: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1096: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
109c: 00 00 00 20 nop\.b 0x0
10a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10a6: 40 20 14 86 25 00 fcmp\.unord\.s1 p4,p3=f4,f5
10ac: 00 00 00 20 nop\.b 0x0
10b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10b6: 40 20 14 86 26 00 fcmp\.unord\.s2 p4,p3=f4,f5
10bc: 00 00 00 20 nop\.b 0x0
10c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10c6: 40 20 14 86 27 00 fcmp\.unord\.s3 p4,p3=f4,f5
10cc: 00 00 00 20 nop\.b 0x0
10d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10d6: 40 24 14 86 24 00 fcmp\.unord\.unc\.s0 p4,p3=f4,f5
10dc: 00 00 00 20 nop\.b 0x0
10e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10e6: 40 24 14 86 24 00 fcmp\.unord\.unc\.s0 p4,p3=f4,f5
10ec: 00 00 00 20 nop\.b 0x0
10f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
10f6: 40 24 14 86 25 00 fcmp\.unord\.unc\.s1 p4,p3=f4,f5
10fc: 00 00 00 20 nop\.b 0x0
1100: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1106: 40 24 14 86 26 00 fcmp\.unord\.unc\.s2 p4,p3=f4,f5
110c: 00 00 00 20 nop\.b 0x0
1110: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1116: 40 24 14 86 27 00 fcmp\.unord\.unc\.s3 p4,p3=f4,f5
111c: 00 00 00 20 nop\.b 0x0
1120: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1126: 30 20 00 09 28 00 fclass\.m p3,p4=f4,0x100
112c: 00 00 00 20 nop\.b 0x0
1130: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1136: 40 20 00 07 28 00 fclass\.m p4,p3=f4,0x100
113c: 00 00 00 20 nop\.b 0x0
1140: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1146: 30 20 80 08 28 00 fclass\.m p3,p4=f4,0x80
114c: 00 00 00 20 nop\.b 0x0
1150: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1156: 40 20 80 06 28 00 fclass\.m p4,p3=f4,0x80
115c: 00 00 00 20 nop\.b 0x0
1160: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1166: 30 20 40 08 28 00 fclass\.m p3,p4=f4,0x40
116c: 00 00 00 20 nop\.b 0x0
1170: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1176: 40 20 40 06 28 00 fclass\.m p4,p3=f4,0x40
117c: 00 00 00 20 nop\.b 0x0
1180: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1186: 30 20 00 88 28 00 fclass\.m p3,p4=f4,0x1
118c: 00 00 00 20 nop\.b 0x0
1190: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1196: 40 20 00 86 28 00 fclass\.m p4,p3=f4,0x1
119c: 00 00 00 20 nop\.b 0x0
11a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11a6: 30 20 00 08 29 00 fclass\.m p3,p4=f4,0x2
11ac: 00 00 00 20 nop\.b 0x0
11b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11b6: 40 20 00 06 29 00 fclass\.m p4,p3=f4,0x2
11bc: 00 00 00 20 nop\.b 0x0
11c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11c6: 30 20 08 88 29 00 fclass\.m p3,p4=f4,0xb
11cc: 00 00 00 20 nop\.b 0x0
11d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11d6: 40 20 08 86 29 00 fclass\.m p4,p3=f4,0xb
11dc: 00 00 00 20 nop\.b 0x0
11e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11e6: 30 20 10 88 29 00 fclass\.m p3,p4=f4,0x13
11ec: 00 00 00 20 nop\.b 0x0
11f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
11f6: 40 20 10 86 29 00 fclass\.m p4,p3=f4,0x13
11fc: 00 00 00 20 nop\.b 0x0
1200: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1206: 30 20 20 88 29 00 fclass\.m p3,p4=f4,0x23
120c: 00 00 00 20 nop\.b 0x0
1210: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1216: 40 20 20 86 29 00 fclass\.m p4,p3=f4,0x23
121c: 00 00 00 20 nop\.b 0x0
1220: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1226: 30 20 fc 89 29 00 fclass\.m p3,p4=f4,0x1ff
122c: 00 00 00 20 nop\.b 0x0
1230: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1236: 40 20 fc 87 29 00 fclass\.m p4,p3=f4,0x1ff
123c: 00 00 00 20 nop\.b 0x0
1240: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1246: 30 24 00 09 28 00 fclass\.m\.unc p3,p4=f4,0x100
124c: 00 00 00 20 nop\.b 0x0
1250: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1256: 40 24 00 07 28 00 fclass\.m\.unc p4,p3=f4,0x100
125c: 00 00 00 20 nop\.b 0x0
1260: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1266: 30 24 80 08 28 00 fclass\.m\.unc p3,p4=f4,0x80
126c: 00 00 00 20 nop\.b 0x0
1270: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1276: 40 24 80 06 28 00 fclass\.m\.unc p4,p3=f4,0x80
127c: 00 00 00 20 nop\.b 0x0
1280: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1286: 30 24 40 08 28 00 fclass\.m\.unc p3,p4=f4,0x40
128c: 00 00 00 20 nop\.b 0x0
1290: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1296: 40 24 40 06 28 00 fclass\.m\.unc p4,p3=f4,0x40
129c: 00 00 00 20 nop\.b 0x0
12a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12a6: 30 24 00 88 28 00 fclass\.m\.unc p3,p4=f4,0x1
12ac: 00 00 00 20 nop\.b 0x0
12b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12b6: 40 24 00 86 28 00 fclass\.m\.unc p4,p3=f4,0x1
12bc: 00 00 00 20 nop\.b 0x0
12c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12c6: 30 24 00 08 29 00 fclass\.m\.unc p3,p4=f4,0x2
12cc: 00 00 00 20 nop\.b 0x0
12d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12d6: 40 24 00 06 29 00 fclass\.m\.unc p4,p3=f4,0x2
12dc: 00 00 00 20 nop\.b 0x0
12e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12e6: 30 24 08 88 29 00 fclass\.m\.unc p3,p4=f4,0xb
12ec: 00 00 00 20 nop\.b 0x0
12f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
12f6: 40 24 08 86 29 00 fclass\.m\.unc p4,p3=f4,0xb
12fc: 00 00 00 20 nop\.b 0x0
1300: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1306: 30 24 10 88 29 00 fclass\.m\.unc p3,p4=f4,0x13
130c: 00 00 00 20 nop\.b 0x0
1310: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1316: 40 24 10 86 29 00 fclass\.m\.unc p4,p3=f4,0x13
131c: 00 00 00 20 nop\.b 0x0
1320: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1326: 30 24 20 88 29 00 fclass\.m\.unc p3,p4=f4,0x23
132c: 00 00 00 20 nop\.b 0x0
1330: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1336: 40 24 20 86 29 00 fclass\.m\.unc p4,p3=f4,0x23
133c: 00 00 00 20 nop\.b 0x0
1340: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1346: 30 24 fc 89 29 00 fclass\.m\.unc p3,p4=f4,0x1ff
134c: 00 00 00 20 nop\.b 0x0
1350: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1356: 40 24 fc 87 29 00 fclass\.m\.unc p4,p3=f4,0x1ff
135c: 00 00 00 20 nop\.b 0x0
1360: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1366: 40 30 1c 8a 00 00 frcpa\.s0 f4,p5=f6,f7
136c: 00 00 00 20 nop\.b 0x0
1370: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1376: 40 30 1c 8a 00 00 frcpa\.s0 f4,p5=f6,f7
137c: 00 00 00 20 nop\.b 0x0
1380: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1386: 40 30 1c 8a 01 00 frcpa\.s1 f4,p5=f6,f7
138c: 00 00 00 20 nop\.b 0x0
1390: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1396: 40 30 1c 8a 02 00 frcpa\.s2 f4,p5=f6,f7
139c: 00 00 00 20 nop\.b 0x0
13a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13a6: 40 30 1c 8a 03 00 frcpa\.s3 f4,p5=f6,f7
13ac: 00 00 00 20 nop\.b 0x0
13b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13b6: 40 30 1c 8a 08 00 fprcpa\.s0 f4,p5=f6,f7
13bc: 00 00 00 20 nop\.b 0x0
13c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13c6: 40 30 1c 8a 08 00 fprcpa\.s0 f4,p5=f6,f7
13cc: 00 00 00 20 nop\.b 0x0
13d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13d6: 40 30 1c 8a 09 00 fprcpa\.s1 f4,p5=f6,f7
13dc: 00 00 00 20 nop\.b 0x0
13e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13e6: 40 30 1c 8a 0a 00 fprcpa\.s2 f4,p5=f6,f7
13ec: 00 00 00 20 nop\.b 0x0
13f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
13f6: 40 30 1c 8a 0b 00 fprcpa\.s3 f4,p5=f6,f7
13fc: 00 00 00 20 nop\.b 0x0
1400: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1406: 40 00 18 8a 04 00 frsqrta\.s0 f4,p5=f6
140c: 00 00 00 20 nop\.b 0x0
1410: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1416: 40 00 18 8a 04 00 frsqrta\.s0 f4,p5=f6
141c: 00 00 00 20 nop\.b 0x0
1420: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1426: 40 00 18 8a 05 00 frsqrta\.s1 f4,p5=f6
142c: 00 00 00 20 nop\.b 0x0
1430: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1436: 40 00 18 8a 06 00 frsqrta\.s2 f4,p5=f6
143c: 00 00 00 20 nop\.b 0x0
1440: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1446: 40 00 18 8a 07 00 frsqrta\.s3 f4,p5=f6
144c: 00 00 00 20 nop\.b 0x0
1450: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1456: 40 00 18 8a 0c 00 fprsqrta\.s0 f4,p5=f6
145c: 00 00 00 20 nop\.b 0x0
1460: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1466: 40 00 18 8a 0c 00 fprsqrta\.s0 f4,p5=f6
146c: 00 00 00 20 nop\.b 0x0
1470: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1476: 40 00 18 8a 0d 00 fprsqrta\.s1 f4,p5=f6
147c: 00 00 00 20 nop\.b 0x0
1480: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1486: 40 00 18 8a 0e 00 fprsqrta\.s2 f4,p5=f6
148c: 00 00 00 20 nop\.b 0x0
1490: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1496: 40 00 18 8a 0f 00 fprsqrta\.s3 f4,p5=f6
149c: 00 00 00 20 nop\.b 0x0
14a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14a6: 40 28 18 28 00 00 fmin\.s0 f4=f5,f6
14ac: 00 00 00 20 nop\.b 0x0
14b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14b6: 40 28 18 28 00 00 fmin\.s0 f4=f5,f6
14bc: 00 00 00 20 nop\.b 0x0
14c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14c6: 40 28 18 28 01 00 fmin\.s1 f4=f5,f6
14cc: 00 00 00 20 nop\.b 0x0
14d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14d6: 40 28 18 28 02 00 fmin\.s2 f4=f5,f6
14dc: 00 00 00 20 nop\.b 0x0
14e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14e6: 40 28 18 28 03 00 fmin\.s3 f4=f5,f6
14ec: 00 00 00 20 nop\.b 0x0
14f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
14f6: 40 28 18 2a 00 00 fmax\.s0 f4=f5,f6
14fc: 00 00 00 20 nop\.b 0x0
1500: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1506: 40 28 18 2a 00 00 fmax\.s0 f4=f5,f6
150c: 00 00 00 20 nop\.b 0x0
1510: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1516: 40 28 18 2a 01 00 fmax\.s1 f4=f5,f6
151c: 00 00 00 20 nop\.b 0x0
1520: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1526: 40 28 18 2a 02 00 fmax\.s2 f4=f5,f6
152c: 00 00 00 20 nop\.b 0x0
1530: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1536: 40 28 18 2a 03 00 fmax\.s3 f4=f5,f6
153c: 00 00 00 20 nop\.b 0x0
1540: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1546: 40 28 18 2c 00 00 famin\.s0 f4=f5,f6
154c: 00 00 00 20 nop\.b 0x0
1550: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1556: 40 28 18 2c 00 00 famin\.s0 f4=f5,f6
155c: 00 00 00 20 nop\.b 0x0
1560: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1566: 40 28 18 2c 01 00 famin\.s1 f4=f5,f6
156c: 00 00 00 20 nop\.b 0x0
1570: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1576: 40 28 18 2c 02 00 famin\.s2 f4=f5,f6
157c: 00 00 00 20 nop\.b 0x0
1580: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1586: 40 28 18 2c 03 00 famin\.s3 f4=f5,f6
158c: 00 00 00 20 nop\.b 0x0
1590: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1596: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
159c: 00 00 00 20 nop\.b 0x0
15a0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15a6: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
15ac: 00 00 00 20 nop\.b 0x0
15b0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15b6: 40 28 18 2e 01 00 famax\.s1 f4=f5,f6
15bc: 00 00 00 20 nop\.b 0x0
15c0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15c6: 40 28 18 2e 02 00 famax\.s2 f4=f5,f6
15cc: 00 00 00 20 nop\.b 0x0
15d0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15d6: 40 28 18 2e 03 00 famax\.s3 f4=f5,f6
15dc: 00 00 00 20 nop\.b 0x0
15e0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15e6: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
15ec: 00 00 00 20 nop\.b 0x0
15f0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
15f6: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
15fc: 00 00 00 20 nop\.b 0x0
1600: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1606: 40 28 18 28 09 00 fpmin\.s1 f4=f5,f6
160c: 00 00 00 20 nop\.b 0x0
1610: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1616: 40 28 18 28 0a 00 fpmin\.s2 f4=f5,f6
161c: 00 00 00 20 nop\.b 0x0
1620: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1626: 40 28 18 28 0b 00 fpmin\.s3 f4=f5,f6
162c: 00 00 00 20 nop\.b 0x0
1630: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1636: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
163c: 00 00 00 20 nop\.b 0x0
1640: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1646: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
164c: 00 00 00 20 nop\.b 0x0
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1de0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1de6: 40 28 00 30 0b 00 fpcvt\.fx\.s3 f4=f5
1dec: 00 00 00 20 nop\.b 0x0
1df0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1df6: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
1dfc: 00 00 00 20 nop\.b 0x0
1e00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e06: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
1e0c: 00 00 00 20 nop\.b 0x0
1e10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e16: 40 28 00 34 09 00 fpcvt\.fx\.trunc\.s1 f4=f5
1e1c: 00 00 00 20 nop\.b 0x0
1e20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e26: 40 28 00 34 0a 00 fpcvt\.fx\.trunc\.s2 f4=f5
1e2c: 00 00 00 20 nop\.b 0x0
1e30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e36: 40 28 00 34 0b 00 fpcvt\.fx\.trunc\.s3 f4=f5
1e3c: 00 00 00 20 nop\.b 0x0
1e40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e46: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
1e4c: 00 00 00 20 nop\.b 0x0
1e50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e56: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
1e5c: 00 00 00 20 nop\.b 0x0
1e60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e66: 40 28 00 32 09 00 fpcvt\.fxu\.s1 f4=f5
1e6c: 00 00 00 20 nop\.b 0x0
1e70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e76: 40 28 00 32 0a 00 fpcvt\.fxu\.s2 f4=f5
1e7c: 00 00 00 20 nop\.b 0x0
1e80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e86: 40 28 00 32 0b 00 fpcvt\.fxu\.s3 f4=f5
1e8c: 00 00 00 20 nop\.b 0x0
1e90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1e96: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
1e9c: 00 00 00 20 nop\.b 0x0
1ea0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ea6: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
1eac: 00 00 00 20 nop\.b 0x0
1eb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1eb6: 40 28 00 36 09 00 fpcvt\.fxu\.trunc\.s1 f4=f5
1ebc: 00 00 00 20 nop\.b 0x0
1ec0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ec6: 40 28 00 36 0a 00 fpcvt\.fxu\.trunc\.s2 f4=f5
1ecc: 00 00 00 20 nop\.b 0x0
1ed0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ed6: 40 28 00 36 0b 00 fpcvt\.fxu\.trunc\.s3 f4=f5
1edc: 00 00 00 20 nop\.b 0x0
1ee0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ee6: 40 28 00 38 00 00 fcvt\.xf f4=f5
1eec: 00 00 00 20 nop\.b 0x0
1ef0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ef6: 40 00 14 02 40 00 fnorm\.s0 f4=f5
1efc: 00 00 00 20 nop\.b 0x0
1f00: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f06: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
1f0c: 00 00 00 20 nop\.b 0x0
1f10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f16: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
1f1c: 00 00 00 20 nop\.b 0x0
1f20: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f26: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
1f2c: 00 00 00 20 nop\.b 0x0
1f30: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f36: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
1f3c: 00 00 00 20 nop\.b 0x0
1f40: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f46: 00 00 00 08 01 00 fsetc\.s1 0x0,0x0
1f4c: 00 00 00 20 nop\.b 0x0
1f50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f56: 00 f8 fd 08 01 00 fsetc\.s1 0x3f,0x3f
1f5c: 00 00 00 20 nop\.b 0x0
1f60: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f66: 00 00 00 08 02 00 fsetc\.s2 0x0,0x0
1f6c: 00 00 00 20 nop\.b 0x0
1f70: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f76: 00 f8 fd 08 02 00 fsetc\.s2 0x3f,0x3f
1f7c: 00 00 00 20 nop\.b 0x0
1f80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f86: 00 00 00 08 03 00 fsetc\.s3 0x0,0x0
1f8c: 00 00 00 20 nop\.b 0x0
1f90: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1f96: 00 f8 fd 08 03 00 fsetc\.s3 0x3f,0x3f
1f9c: 00 00 00 20 nop\.b 0x0
1fa0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1fa6: 00 00 00 0a 00 00 fclrf\.s0
1fac: 00 00 00 20 nop\.b 0x0
1fb0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1fb6: 00 00 00 0a 00 00 fclrf\.s0
1fbc: 00 00 00 20 nop\.b 0x0
1fc0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1fc6: 00 00 00 0a 01 00 fclrf\.s1
1fcc: 00 00 00 20 nop\.b 0x0
1fd0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1fd6: 00 00 00 0a 02 00 fclrf\.s2
1fdc: 00 00 00 20 nop\.b 0x0
1fe0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1fe6: 00 00 00 0a 03 00 fclrf\.s3
1fec: 00 00 00 20 nop\.b 0x0
1ff0: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
1ff6: 10 e0 ff 10 04 00 fchkf\.s0 0 <_start>
1ffc: 00 00 00 20 nop\.b 0x0
2000: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2006: 00 e0 ff 10 04 00 fchkf\.s0 0 <_start>
200c: 00 00 00 20 nop\.b 0x0
2010: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2016: f0 df ff 10 05 00 fchkf\.s1 0 <_start>
201c: 00 00 00 20 nop\.b 0x0
2020: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2026: e0 df ff 10 06 00 fchkf\.s2 0 <_start>
202c: 00 00 00 20 nop\.b 0x0
2030: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2036: d0 df ff 10 07 00 fchkf\.s3 0 <_start>
203c: 00 00 00 20 nop\.b 0x0
2040: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2046: 00 00 00 00 00 00 break\.f 0x0
204c: 00 00 00 20 nop\.b 0x0
2050: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
2056: 00 00 00 02 00 00 nop\.f 0x0
205c: 00 00 00 20 nop\.b 0x0;;
2060: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2066: 00 00 00 03 00 00 hint\.f 0x0
206c: 00 00 00 20 nop\.b 0x0
2070: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
2076: 00 00 00 03 00 00 hint\.f 0x0
207c: 00 00 00 20 nop\.b 0x0
2080: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
2086: f0 ff 1f 03 00 00 hint\.f 0x1ffff
208c: 00 00 00 20 nop\.b 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-bad.s
0,0 → 1,155
.text
 
.proc full1
full1:
 
.prologue
.spill 0
.save.g 0
nop 0
.save.g 0x10
nop 0
.save.g -1
nop 0
.save.g 0x3
nop 0
.save.g 0x4
nop 0
.save.g 0x1
nop 0
.save.f 0
nop 0
.save.f 0x100000
nop 0
.save.f -1
nop 0
.save.f 0x3
nop 0
.save.f 0x4
nop 0
.save.f 0x1
nop 0
.save.b 0
nop 0
.save.b 0x20
nop 0
.save.b -1
nop 0
.save.b 0x3
nop 0
.save.b 0x4
nop 0
.save.b 0x1
nop 0
.spillreg r4, r0
nop 0
.spillreg r3, r2
nop 0
.spillreg r8, r9
nop 0
.spillreg b6, r10
nop 0
.spillreg f2, f0
nop 0
.spillreg f3, f1
nop 0
.spillreg f6, f7
nop 0
.spillreg f4, r11
nop 0
.spillreg f5, b0
nop 0
.spillreg.p p0, r4, r3
nop 0
.spillreg.p p1, r4, r0
nop 0
.spillreg.p p1, f16, f0
nop 0
.restorereg.p p0, r4
nop 0
.body
br.ret.sptk rp
.endp full1
 
.proc full2
full2:
.prologue
.spill 0
.save.gf 0, 0
nop 0
.save.gf 0x10, 0
nop 0
.save.gf 0, 0x100000
nop 0
.save.gf ~0, 0
nop 0
.save.gf 0, ~0
nop 0
.save.gf 1, 1
nop 0
.save.gf 2, 0
nop 0
.save.gf 1, 0
nop 0
.save.gf 0, 1
nop 0
.body
.label_state 1
.restore sp, 1
nop.x 0
.copy_state 2
br.ret.sptk rp
.endp full2
 
.proc full3
full3:
.prologue
.spill 0
.save.g 0x10, r16
nop 0
.save.g 0x01, r0
nop 0
.save.g 0x06, r127
nop 0
nop 0
.save.b 0x20, r16
nop 0
.save.b 0x01, r0
nop 0
.save.b 0x18, r127
nop 0
nop 0
.body
br.ret.sptk rp
.endp full3
 
.proc simple1
simple1:
.prologue 0x10, r2
br.ret.sptk rp
.endp simple1
 
.proc simple2
simple2:
.prologue 0, r2
br.ret.sptk rp
.endp simple2
 
.proc simple3
simple3:
.prologue -1, r2
.vframe r0
br.ret.sptk rp
.endp simple3
 
.proc simple4
simple4:
.prologue 0x1, r0
br.ret.sptk rp
.endp simple4
 
.proc simple5
simple5:
.prologue 0xc, r127
br.ret.sptk rp
.endp simple5
/trunk/gnu/binutils/gas/testsuite/gas/ia64/alias.s
0,0 → 1,11
.section .foo,"aw","progbits"
.secalias .foo,"1234"
.secalias .foo,"1234"
.alias foo, "\"\80\84\""
.alias foo, "\"\80\84\""
foo:
stringz "\"\80\84\""
.secalias .foo,"1234"
.secalias .foo,"1234"
.alias foo, "\"\80\84\""
.alias foo, "\"\80\84\""
/trunk/gnu/binutils/gas/testsuite/gas/ia64/align.s
0,0 → 1,3
.data
.align 256
.byte -1
/trunk/gnu/binutils/gas/testsuite/gas/ia64/order.d
0,0 → 1,36
#objdump: -j .foo -j .bar -rs
#name: ia64 byte order
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[.foo\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+00008 DIR64MSB foo
0+00018 DIR64MSB foo
0+00028 DIR64LSB foo
0+00038 DIR64LSB foo
 
 
RELOCATION RECORDS FOR \[.bar\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+00010 DIR64LSB foo
0+00040 DIR64LSB foo
0+00058 DIR64MSB foo
0+00080 DIR64MSB foo
 
 
Contents of section .foo:
0000 12340000 12345678 00000000 00000000 ................
0010 01234567 89abcdef 00000000 00000000 ................
0020 34120000 78563412 00000000 00000000 ................
0030 efcdab89 67452301 00000000 00000000 ................
Contents of section .bar:
0000 cdcccc3d 00000000 9a999999 9999c93f ................
0010 00000000 00000000 00000000 00000000 ................
0020 cdcccccc cccccccc fd3f0000 00000000 ................
0030 cdcccccc cccccccc fe3f0000 00000000 ................
0040 00000000 00000000 3dcccccd 00000000 ................
0050 3fc99999 9999999a 00000000 00000000 ................
0060 3ffdcccc cccccccc cccd0000 00000000 ................
0070 3ffecccc cccccccc cccd0000 00000000 ................
0080 00000000 00000000 ........
/trunk/gnu/binutils/gas/testsuite/gas/ia64/rotX.s
0,0 → 1,4
.regstk 0, 8, 0, 8
.rotr a[8], b[-8]
.rotp c[8], d[0]
.rotf e[8], f[x]
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-b.s
0,0 → 1,837
.L0:
 
{ .bbb; nop.b 0
(p2) br.cond.sptk .L1
br.cond.sptk .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.clr .L1
br.cond.sptk.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.few .L1
br.cond.sptk.few .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.few.clr .L1
br.cond.sptk.few.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.many .L1
br.cond.sptk.many .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.many.clr .L1
br.cond.sptk.many.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt .L1
br.cond.spnt .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt.clr .L1
br.cond.spnt.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt.few .L1
br.cond.spnt.few .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt.few.clr .L1
br.cond.spnt.few.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt.many .L1
br.cond.spnt.many .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.spnt.many.clr .L1
br.cond.spnt.many.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk .L1
br.cond.dptk .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk.clr .L1
br.cond.dptk.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk.few .L1
br.cond.dptk.few .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk.few.clr .L1
br.cond.dptk.few.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk.many .L1
br.cond.dptk.many .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dptk.many.clr .L1
br.cond.dptk.many.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt .L1
br.cond.dpnt .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt.clr .L1
br.cond.dpnt.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt.few .L1
br.cond.dpnt.few .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt.few.clr .L1
br.cond.dpnt.few.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt.many .L1
br.cond.dpnt.many .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.dpnt.many.clr .L1
br.cond.dpnt.many.clr .L0
;; }
 
{ .bbb; (p2) br.wexit.sptk .L1 ;; }
{ .bbb; br.wexit.sptk .L1 ;; }
{ .bbb; (p2) br.wexit.sptk.clr .L1 ;; }
{ .bbb; br.wexit.sptk.clr .L1 ;; }
{ .bbb; (p2) br.wexit.sptk.few .L1 ;; }
{ .bbb; br.wexit.sptk.few .L1 ;; }
{ .bbb; (p2) br.wexit.sptk.few.clr .L1 ;; }
{ .bbb; br.wexit.sptk.few.clr .L1 ;; }
{ .bbb; (p2) br.wexit.sptk.many .L1 ;; }
{ .bbb; br.wexit.sptk.many .L1 ;; }
{ .bbb; (p2) br.wexit.sptk.many.clr .L1 ;; }
{ .bbb; br.wexit.sptk.many.clr .L1 ;; }
{ .bbb; (p2) br.wexit.spnt .L1 ;; }
{ .bbb; br.wexit.spnt .L1 ;; }
{ .bbb; (p2) br.wexit.spnt.clr .L1 ;; }
{ .bbb; br.wexit.spnt.clr .L1 ;; }
{ .bbb; (p2) br.wexit.spnt.few .L1 ;; }
{ .bbb; br.wexit.spnt.few .L1 ;; }
{ .bbb; (p2) br.wexit.spnt.few.clr .L1 ;; }
{ .bbb; br.wexit.spnt.few.clr .L1 ;; }
{ .bbb; (p2) br.wexit.spnt.many .L1 ;; }
{ .bbb; br.wexit.spnt.many .L1 ;; }
{ .bbb; (p2) br.wexit.spnt.many.clr .L1 ;; }
{ .bbb; br.wexit.spnt.many.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dptk .L1 ;; }
{ .bbb; br.wexit.dptk .L1 ;; }
{ .bbb; (p2) br.wexit.dptk.clr .L1 ;; }
{ .bbb; br.wexit.dptk.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dptk.few .L1 ;; }
{ .bbb; br.wexit.dptk.few .L1 ;; }
{ .bbb; (p2) br.wexit.dptk.few.clr .L1 ;; }
{ .bbb; br.wexit.dptk.few.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dptk.many .L1 ;; }
{ .bbb; br.wexit.dptk.many .L1 ;; }
{ .bbb; (p2) br.wexit.dptk.many.clr .L1 ;; }
{ .bbb; br.wexit.dptk.many.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt .L1 ;; }
{ .bbb; br.wexit.dpnt .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt.clr .L1 ;; }
{ .bbb; br.wexit.dpnt.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt.few .L1 ;; }
{ .bbb; br.wexit.dpnt.few .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt.few.clr .L1 ;; }
{ .bbb; br.wexit.dpnt.few.clr .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt.many .L1 ;; }
{ .bbb; br.wexit.dpnt.many .L1 ;; }
{ .bbb; (p2) br.wexit.dpnt.many.clr .L1 ;; }
{ .bbb; br.wexit.dpnt.many.clr .L1 ;; }
 
{ .bbb; (p2) br.wtop.sptk .L1 ;; }
{ .bbb; br.wtop.sptk .L1 ;; }
{ .bbb; (p2) br.wtop.sptk.clr .L1 ;; }
{ .bbb; br.wtop.sptk.clr .L1 ;; }
{ .bbb; (p2) br.wtop.sptk.few .L1 ;; }
{ .bbb; br.wtop.sptk.few .L1 ;; }
{ .bbb; (p2) br.wtop.sptk.few.clr .L1 ;; }
{ .bbb; br.wtop.sptk.few.clr .L1 ;; }
{ .bbb; (p2) br.wtop.sptk.many .L1 ;; }
{ .bbb; br.wtop.sptk.many .L1 ;; }
{ .bbb; (p2) br.wtop.sptk.many.clr .L1 ;; }
{ .bbb; br.wtop.sptk.many.clr .L1 ;; }
{ .bbb; (p2) br.wtop.spnt .L1 ;; }
{ .bbb; br.wtop.spnt .L1 ;; }
{ .bbb; (p2) br.wtop.spnt.clr .L1 ;; }
{ .bbb; br.wtop.spnt.clr .L1 ;; }
{ .bbb; (p2) br.wtop.spnt.few .L1 ;; }
{ .bbb; br.wtop.spnt.few .L1 ;; }
{ .bbb; (p2) br.wtop.spnt.few.clr .L1 ;; }
{ .bbb; br.wtop.spnt.few.clr .L1 ;; }
{ .bbb; (p2) br.wtop.spnt.many .L1 ;; }
{ .bbb; br.wtop.spnt.many .L1 ;; }
{ .bbb; (p2) br.wtop.spnt.many.clr .L1 ;; }
{ .bbb; br.wtop.spnt.many.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dptk .L1 ;; }
{ .bbb; br.wtop.dptk .L1 ;; }
{ .bbb; (p2) br.wtop.dptk.clr .L1 ;; }
{ .bbb; br.wtop.dptk.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dptk.few .L1 ;; }
{ .bbb; br.wtop.dptk.few .L1 ;; }
{ .bbb; (p2) br.wtop.dptk.few.clr .L1 ;; }
{ .bbb; br.wtop.dptk.few.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dptk.many .L1 ;; }
{ .bbb; br.wtop.dptk.many .L1 ;; }
{ .bbb; (p2) br.wtop.dptk.many.clr .L1 ;; }
{ .bbb; br.wtop.dptk.many.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt .L1 ;; }
{ .bbb; br.wtop.dpnt .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt.clr .L1 ;; }
{ .bbb; br.wtop.dpnt.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt.few .L1 ;; }
{ .bbb; br.wtop.dpnt.few .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt.few.clr .L1 ;; }
{ .bbb; br.wtop.dpnt.few.clr .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt.many .L1 ;; }
{ .bbb; br.wtop.dpnt.many .L1 ;; }
{ .bbb; (p2) br.wtop.dpnt.many.clr .L1 ;; }
{ .bbb; br.wtop.dpnt.many.clr .L1 ;; }
 
{ .bbb; br.cloop.sptk .L1 ;; }
{ .bbb; br.cloop.sptk.clr .L1 ;; }
{ .bbb; br.cloop.sptk.few .L1 ;; }
{ .bbb; br.cloop.sptk.few.clr .L1 ;; }
{ .bbb; br.cloop.sptk.many .L1 ;; }
{ .bbb; br.cloop.sptk.many.clr .L1 ;; }
{ .bbb; br.cloop.spnt .L1 ;; }
{ .bbb; br.cloop.spnt.clr .L1 ;; }
{ .bbb; br.cloop.spnt.few .L1 ;; }
{ .bbb; br.cloop.spnt.few.clr .L1 ;; }
{ .bbb; br.cloop.spnt.many .L1 ;; }
{ .bbb; br.cloop.spnt.many.clr .L1 ;; }
{ .bbb; br.cloop.dptk .L1 ;; }
{ .bbb; br.cloop.dptk.clr .L1 ;; }
{ .bbb; br.cloop.dptk.few .L1 ;; }
{ .bbb; br.cloop.dptk.few.clr .L1 ;; }
{ .bbb; br.cloop.dptk.many .L1 ;; }
{ .bbb; br.cloop.dptk.many.clr .L1 ;; }
{ .bbb; br.cloop.dpnt .L1 ;; }
{ .bbb; br.cloop.dpnt.clr .L1 ;; }
{ .bbb; br.cloop.dpnt.few .L1 ;; }
{ .bbb; br.cloop.dpnt.few.clr .L1 ;; }
{ .bbb; br.cloop.dpnt.many .L1 ;; }
{ .bbb; br.cloop.dpnt.many.clr .L1 ;; }
 
{ .bbb; br.cexit.sptk .L1 ;; }
{ .bbb; br.cexit.sptk.clr .L1 ;; }
{ .bbb; br.cexit.sptk.few .L1 ;; }
{ .bbb; br.cexit.sptk.few.clr .L1 ;; }
{ .bbb; br.cexit.sptk.many .L1 ;; }
{ .bbb; br.cexit.sptk.many.clr .L1 ;; }
{ .bbb; br.cexit.spnt .L1 ;; }
{ .bbb; br.cexit.spnt.clr .L1 ;; }
{ .bbb; br.cexit.spnt.few .L1 ;; }
{ .bbb; br.cexit.spnt.few.clr .L1 ;; }
{ .bbb; br.cexit.spnt.many .L1 ;; }
{ .bbb; br.cexit.spnt.many.clr .L1 ;; }
{ .bbb; br.cexit.dptk .L1 ;; }
{ .bbb; br.cexit.dptk.clr .L1 ;; }
{ .bbb; br.cexit.dptk.few .L1 ;; }
{ .bbb; br.cexit.dptk.few.clr .L1 ;; }
{ .bbb; br.cexit.dptk.many .L1 ;; }
{ .bbb; br.cexit.dptk.many.clr .L1 ;; }
{ .bbb; br.cexit.dpnt .L1 ;; }
{ .bbb; br.cexit.dpnt.clr .L1 ;; }
{ .bbb; br.cexit.dpnt.few .L1 ;; }
{ .bbb; br.cexit.dpnt.few.clr .L1 ;; }
{ .bbb; br.cexit.dpnt.many .L1 ;; }
{ .bbb; br.cexit.dpnt.many.clr .L1 ;; }
 
{ .bbb; br.ctop.sptk .L1 ;; }
{ .bbb; br.ctop.sptk.clr .L1 ;; }
{ .bbb; br.ctop.sptk.few .L1 ;; }
{ .bbb; br.ctop.sptk.few.clr .L1 ;; }
{ .bbb; br.ctop.sptk.many .L1 ;; }
{ .bbb; br.ctop.sptk.many.clr .L1 ;; }
{ .bbb; br.ctop.spnt .L1 ;; }
{ .bbb; br.ctop.spnt.clr .L1 ;; }
{ .bbb; br.ctop.spnt.few .L1 ;; }
{ .bbb; br.ctop.spnt.few.clr .L1 ;; }
{ .bbb; br.ctop.spnt.many .L1 ;; }
{ .bbb; br.ctop.spnt.many.clr .L1 ;; }
{ .bbb; br.ctop.dptk .L1 ;; }
{ .bbb; br.ctop.dptk.clr .L1 ;; }
{ .bbb; br.ctop.dptk.few .L1 ;; }
{ .bbb; br.ctop.dptk.few.clr .L1 ;; }
{ .bbb; br.ctop.dptk.many .L1 ;; }
{ .bbb; br.ctop.dptk.many.clr .L1 ;; }
{ .bbb; br.ctop.dpnt .L1 ;; }
{ .bbb; br.ctop.dpnt.clr .L1 ;; }
{ .bbb; br.ctop.dpnt.few .L1 ;; }
{ .bbb; br.ctop.dpnt.few.clr .L1 ;; }
{ .bbb; br.ctop.dpnt.many .L1 ;; }
{ .bbb; br.ctop.dpnt.many.clr .L1 ;; }
 
{ .bbb; nop.b 0
(p2) br.call.sptk b0 = .L1
br.call.sptk b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.sptk.clr b0 = .L1
br.call.sptk.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.sptk.few b0 = .L1
br.call.sptk.few b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.sptk.few.clr b0 = .L1
br.call.sptk.few.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.sptk.many b0 = .L1
br.call.sptk.many b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.sptk.many.clr b0 = .L1
br.call.sptk.many.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt b0 = .L1
br.call.spnt b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt.clr b0 = .L1
br.call.spnt.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt.few b0 = .L1
br.call.spnt.few b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt.few.clr b0 = .L1
br.call.spnt.few.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt.many b0 = .L1
br.call.spnt.many b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.spnt.many.clr b0 = .L1
br.call.spnt.many.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk b0 = .L1
br.call.dptk b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk.clr b0 = .L1
br.call.dptk.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk.few b0 = .L1
br.call.dptk.few b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk.few.clr b0 = .L1
br.call.dptk.few.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk.many b0 = .L1
br.call.dptk.many b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dptk.many.clr b0 = .L1
br.call.dptk.many.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt b0 = .L1
br.call.dpnt b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt.clr b0 = .L1
br.call.dpnt.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt.few b0 = .L1
br.call.dpnt.few b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt.few.clr b0 = .L1
br.call.dpnt.few.clr b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt.many b0 = .L1
br.call.dpnt.many b0 = .L0
;; }
{ .bbb; nop.b 0
(p2) br.call.dpnt.many.clr b0 = .L1
br.call.dpnt.many.clr b0 = .L0
;; }
 
{ .bbb; nop.b 0;
(p2) br.cond.sptk b2
br.cond.sptk b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.sptk.clr b2
br.cond.sptk.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.sptk.few b2
br.cond.sptk.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.sptk.few.clr b2
br.cond.sptk.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.sptk.many b2
br.cond.sptk.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.sptk.many.clr b2
br.cond.sptk.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt b2
br.cond.spnt b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt.clr b2
br.cond.spnt.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt.few b2
br.cond.spnt.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt.few.clr b2
br.cond.spnt.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt.many b2
br.cond.spnt.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.spnt.many.clr b2
br.cond.spnt.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk b2
br.cond.dptk b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk.clr b2
br.cond.dptk.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk.few b2
br.cond.dptk.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk.few.clr b2
br.cond.dptk.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk.many b2
br.cond.dptk.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dptk.many.clr b2
br.cond.dptk.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt b2
br.cond.dpnt b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt.clr b2
br.cond.dpnt.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt.few b2
br.cond.dpnt.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt.few.clr b2
br.cond.dpnt.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt.many b2
br.cond.dpnt.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.cond.dpnt.many.clr b2
br.cond.dpnt.many.clr b2
;; }
 
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk.few b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk.few.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk.many b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.sptk.many.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt.few b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt.few.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt.many b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.spnt.many.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk.few b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk.few.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk.many b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dptk.many.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt.few b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt.few.clr b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt.many b2
;; }
{ .bbb; nop.b 0;
nop.b 0
br.ia.dpnt.many.clr b2
;; }
 
{ .bbb; nop.b 0;
(p2) br.ret.sptk b2
br.ret.sptk b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.sptk.clr b2
br.ret.sptk.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.sptk.few b2
br.ret.sptk.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.sptk.few.clr b2
br.ret.sptk.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.sptk.many b2
br.ret.sptk.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.sptk.many.clr b2
br.ret.sptk.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt b2
br.ret.spnt b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt.clr b2
br.ret.spnt.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt.few b2
br.ret.spnt.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt.few.clr b2
br.ret.spnt.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt.many b2
br.ret.spnt.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.spnt.many.clr b2
br.ret.spnt.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk b2
br.ret.dptk b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk.clr b2
br.ret.dptk.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk.few b2
br.ret.dptk.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk.few.clr b2
br.ret.dptk.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk.many b2
br.ret.dptk.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dptk.many.clr b2
br.ret.dptk.many.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt b2
br.ret.dpnt b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt.clr b2
br.ret.dpnt.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt.few b2
br.ret.dpnt.few b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt.few.clr b2
br.ret.dpnt.few.clr b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt.many b2
br.ret.dpnt.many b2
;; }
{ .bbb; nop.b 0;
(p2) br.ret.dpnt.many.clr b2
br.ret.dpnt.many.clr b2
;; }
 
{ .bbb; nop.b 0;
(p2) br.call.sptk b0 = b2
br.call.sptk b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.sptk.clr b0 = b2
br.call.sptk.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.sptk.few b0 = b2
br.call.sptk.few b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.sptk.few.clr b0 = b2
br.call.sptk.few.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.sptk.many b0 = b2
br.call.sptk.many b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.sptk.many.clr b0 = b2
br.call.sptk.many.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt b0 = b2
br.call.spnt b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt.clr b0 = b2
br.call.spnt.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt.few b0 = b2
br.call.spnt.few b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt.few.clr b0 = b2
br.call.spnt.few.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt.many b0 = b2
br.call.spnt.many b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.spnt.many.clr b0 = b2
br.call.spnt.many.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk b0 = b2
br.call.dptk b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk.clr b0 = b2
br.call.dptk.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk.few b0 = b2
br.call.dptk.few b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk.few.clr b0 = b2
br.call.dptk.few.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk.many b0 = b2
br.call.dptk.many b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dptk.many.clr b0 = b2
br.call.dptk.many.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt b0 = b2
br.call.dpnt b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt.clr b0 = b2
br.call.dpnt.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt.few b0 = b2
br.call.dpnt.few b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt.few.clr b0 = b2
br.call.dpnt.few.clr b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt.many b0 = b2
br.call.dpnt.many b0 = b2
;; }
{ .bbb; nop.b 0;
(p2) br.call.dpnt.many.clr b0 = b2
br.call.dpnt.many.clr b0 = b2
;; }
 
{ .bbb; break.b 0; nop.b 0
brp.sptk .L0, .L2
;; }
{ .bbb; break.b 0; nop.b 0
brp.sptk.imp .L0, .L2
;; }
.L2:
{ .bbb; break.b 0; nop.b 0
brp.loop .L0, .L3
;; }
{ .bbb; break.b 0; nop.b 0
brp.loop.imp .L0, .L3
;; }
.L3:
{ .bbb; break.b 0; nop.b 0
brp.dptk .L0, .L4
;; }
{ .bbb; break.b 0; nop.b 0
brp.dptk.imp .L0, .L4
;; }
.L4:
{ .bbb; break.b 0; nop.b 0
brp.exit .L0, .L5
;; }
{ .bbb; break.b 0; nop.b 0
brp.exit.imp .L0, .L5
;; }
.L5:
 
{ .bbb; break.b 0; nop.b 0
brp.sptk b3, .L6
;; }
{ .bbb; break.b 0; nop.b 0
brp.sptk.imp b3, .L6
;; }
.L6:
{ .bbb; break.b 0; nop.b 0
brp.dptk b3, .L7
;; }
{ .bbb; break.b 0; nop.b 0
brp.dptk.imp b3, .L7
;; }
.L7:
 
{ .bbb; break.b 0; nop.b 0
brp.ret.sptk b3, .L8
;; }
{ .bbb; break.b 0; nop.b 0
brp.ret.sptk.imp b3, .L8
;; }
.L8:
{ .bbb; break.b 0; nop.b 0
brp.ret.dptk b3, .L9
;; }
{ .bbb; break.b 0; nop.b 0
brp.ret.dptk.imp b3, .L9
;; }
.L9:
 
.space 5888
{ .bbb; nop.b 0; nop.b 0; cover ;; }
{ .bbb; nop.b 0; nop.b 0; clrrrb ;; }
{ .bbb; nop.b 0; nop.b 0; clrrrb.pr ;; }
{ .bbb; nop.b 0; nop.b 0; rfi ;; }
{ .bbb; nop.b 0; nop.b 0; bsw.0 ;; }
{ .bbb; nop.b 0; nop.b 0; bsw.1 ;; }
{ .bbb; nop.b 0; nop.b 0; epc ;; }
 
.L1:
 
# instructions added by SDM2.1:
 
break.b 0x1ffff
hint.b @pause
hint.b 0x1ffff
nop.b 0x1ffff
 
# instructions added by SDM2.2:
vmsw.0
vmsw.1
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ldxmov-2.l
0,0 → 1,5
.*: Assembler messages:
.*:5: Warning: Use of 'ld8.mov' violates RAW dependency .*number is 2
.*:4: Warning: This is the location of the conflicting usage
.*:8: Warning: Use of 'mov' violates RAW dependency .*number is 2
.*:7: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/operands.l
0,0 → 1,5
.*: Assembler messages:
.*:3: Error: .* output .*
.*:4: Error: .* input .*
.*:5: Error: .* 1 .*
.*:6: Error: .* 2 .*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-f.s
0,0 → 1,612
.text
.type _start,@function
_start:
 
fma f4 = f5, f6, f7
fma.s0 f4 = f5, f6, f7
fma.s1 f4 = f5, f6, f7
fma.s2 f4 = f5, f6, f7
fma.s3 f4 = f5, f6, f7
 
fma.s f4 = f5, f6, f7
fma.s.s0 f4 = f5, f6, f7
fma.s.s1 f4 = f5, f6, f7
fma.s.s2 f4 = f5, f6, f7
fma.s.s3 f4 = f5, f6, f7
 
fma.d f4 = f5, f6, f7
fma.d.s0 f4 = f5, f6, f7
fma.d.s1 f4 = f5, f6, f7
fma.d.s2 f4 = f5, f6, f7
fma.d.s3 f4 = f5, f6, f7
 
fpma f4 = f5, f6, f7
fpma.s0 f4 = f5, f6, f7
fpma.s1 f4 = f5, f6, f7
fpma.s2 f4 = f5, f6, f7
fpma.s3 f4 = f5, f6, f7
 
fms f4 = f5, f6, f7
fms.s0 f4 = f5, f6, f7
fms.s1 f4 = f5, f6, f7
fms.s2 f4 = f5, f6, f7
fms.s3 f4 = f5, f6, f7
 
fms.s f4 = f5, f6, f7
fms.s.s0 f4 = f5, f6, f7
fms.s.s1 f4 = f5, f6, f7
fms.s.s2 f4 = f5, f6, f7
fms.s.s3 f4 = f5, f6, f7
 
fms.d f4 = f5, f6, f7
fms.d.s0 f4 = f5, f6, f7
fms.d.s1 f4 = f5, f6, f7
fms.d.s2 f4 = f5, f6, f7
fms.d.s3 f4 = f5, f6, f7
 
fpms f4 = f5, f6, f7
fpms.s0 f4 = f5, f6, f7
fpms.s1 f4 = f5, f6, f7
fpms.s2 f4 = f5, f6, f7
fpms.s3 f4 = f5, f6, f7
 
fnma f4 = f5, f6, f7
fnma.s0 f4 = f5, f6, f7
fnma.s1 f4 = f5, f6, f7
fnma.s2 f4 = f5, f6, f7
fnma.s3 f4 = f5, f6, f7
 
fnma.s f4 = f5, f6, f7
fnma.s.s0 f4 = f5, f6, f7
fnma.s.s1 f4 = f5, f6, f7
fnma.s.s2 f4 = f5, f6, f7
fnma.s.s3 f4 = f5, f6, f7
 
fnma.d f4 = f5, f6, f7
fnma.d.s0 f4 = f5, f6, f7
fnma.d.s1 f4 = f5, f6, f7
fnma.d.s2 f4 = f5, f6, f7
fnma.d.s3 f4 = f5, f6, f7
 
fpnma f4 = f5, f6, f7
fpnma.s0 f4 = f5, f6, f7
fpnma.s1 f4 = f5, f6, f7
fpnma.s2 f4 = f5, f6, f7
fpnma.s3 f4 = f5, f6, f7
 
fmpy f4 = f5, f6
fmpy.s0 f4 = f5, f6
fmpy.s1 f4 = f5, f6
fmpy.s2 f4 = f5, f6
fmpy.s3 f4 = f5, f6
 
fmpy.s f4 = f5, f6
fmpy.s.s0 f4 = f5, f6
fmpy.s.s1 f4 = f5, f6
fmpy.s.s2 f4 = f5, f6
fmpy.s.s3 f4 = f5, f6
 
fmpy.d f4 = f5, f6
fmpy.d.s0 f4 = f5, f6
fmpy.d.s1 f4 = f5, f6
fmpy.d.s2 f4 = f5, f6
fmpy.d.s3 f4 = f5, f6
 
fpmpy f4 = f5, f6
fpmpy.s0 f4 = f5, f6
fpmpy.s1 f4 = f5, f6
fpmpy.s2 f4 = f5, f6
fpmpy.s3 f4 = f5, f6
 
fadd f4 = f5, f6
fadd.s0 f4 = f5, f6
fadd.s1 f4 = f5, f6
fadd.s2 f4 = f5, f6
fadd.s3 f4 = f5, f6
 
fadd.s f4 = f5, f6
fadd.s.s0 f4 = f5, f6
fadd.s.s1 f4 = f5, f6
fadd.s.s2 f4 = f5, f6
fadd.s.s3 f4 = f5, f6
 
fadd.d f4 = f5, f6
fadd.d.s0 f4 = f5, f6
fadd.d.s1 f4 = f5, f6
fadd.d.s2 f4 = f5, f6
fadd.d.s3 f4 = f5, f6
 
fsub f4 = f5, f6
fsub.s0 f4 = f5, f6
fsub.s1 f4 = f5, f6
fsub.s2 f4 = f5, f6
fsub.s3 f4 = f5, f6
 
fsub.s f4 = f5, f6
fsub.s.s0 f4 = f5, f6
fsub.s.s1 f4 = f5, f6
fsub.s.s2 f4 = f5, f6
fsub.s.s3 f4 = f5, f6
 
fsub.d f4 = f5, f6
fsub.d.s0 f4 = f5, f6
fsub.d.s1 f4 = f5, f6
fsub.d.s2 f4 = f5, f6
fsub.d.s3 f4 = f5, f6
 
fnmpy f4 = f5, f6
fnmpy.s0 f4 = f5, f6
fnmpy.s1 f4 = f5, f6
fnmpy.s2 f4 = f5, f6
fnmpy.s3 f4 = f5, f6
 
fnmpy.s f4 = f5, f6
fnmpy.s.s0 f4 = f5, f6
fnmpy.s.s1 f4 = f5, f6
fnmpy.s.s2 f4 = f5, f6
fnmpy.s.s3 f4 = f5, f6
 
fnmpy.d f4 = f5, f6
fnmpy.d.s0 f4 = f5, f6
fnmpy.d.s1 f4 = f5, f6
fnmpy.d.s2 f4 = f5, f6
fnmpy.d.s3 f4 = f5, f6
 
fpnmpy f4 = f5, f6
fpnmpy.s0 f4 = f5, f6
fpnmpy.s1 f4 = f5, f6
fpnmpy.s2 f4 = f5, f6
fpnmpy.s3 f4 = f5, f6
 
fnorm f4 = f5
fnorm.s0 f4 = f5
fnorm.s1 f4 = f5
fnorm.s2 f4 = f5
fnorm.s3 f4 = f5
 
fnorm.s f4 = f5
fnorm.s.s0 f4 = f5
fnorm.s.s1 f4 = f5
fnorm.s.s2 f4 = f5
fnorm.s.s3 f4 = f5
 
fnorm.d f4 = f5
fnorm.d.s0 f4 = f5
fnorm.d.s1 f4 = f5
fnorm.d.s2 f4 = f5
fnorm.d.s3 f4 = f5
 
xma.l f4 = f5, f6, f7
xma.lu f4 = f5, f6, f7
xma.h f4 = f5, f6, f7
xma.hu f4 = f5, f6, f7
 
xmpy.l f4 = f5, f6
xmpy.lu f4 = f5, f6
xmpy.h f4 = f5, f6
xmpy.hu f4 = f5, f6
 
fselect f4 = f5, f6, f7
 
fcmp.eq p3, p4 = f4, f5
fcmp.eq.s0 p3, p4 = f4, f5
fcmp.eq.s1 p3, p4 = f4, f5
fcmp.eq.s2 p3, p4 = f4, f5
fcmp.eq.s3 p3, p4 = f4, f5
fcmp.eq.unc p3, p4 = f4, f5
fcmp.eq.unc.s0 p3, p4 = f4, f5
fcmp.eq.unc.s1 p3, p4 = f4, f5
fcmp.eq.unc.s2 p3, p4 = f4, f5
fcmp.eq.unc.s3 p3, p4 = f4, f5
 
fcmp.lt p3, p4 = f4, f5
fcmp.lt.s0 p3, p4 = f4, f5
fcmp.lt.s1 p3, p4 = f4, f5
fcmp.lt.s2 p3, p4 = f4, f5
fcmp.lt.s3 p3, p4 = f4, f5
fcmp.lt.unc p3, p4 = f4, f5
fcmp.lt.unc.s0 p3, p4 = f4, f5
fcmp.lt.unc.s1 p3, p4 = f4, f5
fcmp.lt.unc.s2 p3, p4 = f4, f5
fcmp.lt.unc.s3 p3, p4 = f4, f5
 
fcmp.le p3, p4 = f4, f5
fcmp.le.s0 p3, p4 = f4, f5
fcmp.le.s1 p3, p4 = f4, f5
fcmp.le.s2 p3, p4 = f4, f5
fcmp.le.s3 p3, p4 = f4, f5
fcmp.le.unc p3, p4 = f4, f5
fcmp.le.unc.s0 p3, p4 = f4, f5
fcmp.le.unc.s1 p3, p4 = f4, f5
fcmp.le.unc.s2 p3, p4 = f4, f5
fcmp.le.unc.s3 p3, p4 = f4, f5
 
fcmp.unord p3, p4 = f4, f5
fcmp.unord.s0 p3, p4 = f4, f5
fcmp.unord.s1 p3, p4 = f4, f5
fcmp.unord.s2 p3, p4 = f4, f5
fcmp.unord.s3 p3, p4 = f4, f5
fcmp.unord.unc p3, p4 = f4, f5
fcmp.unord.unc.s0 p3, p4 = f4, f5
fcmp.unord.unc.s1 p3, p4 = f4, f5
fcmp.unord.unc.s2 p3, p4 = f4, f5
fcmp.unord.unc.s3 p3, p4 = f4, f5
 
fcmp.gt p3, p4 = f4, f5
fcmp.gt.s0 p3, p4 = f4, f5
fcmp.gt.s1 p3, p4 = f4, f5
fcmp.gt.s2 p3, p4 = f4, f5
fcmp.gt.s3 p3, p4 = f4, f5
fcmp.gt.unc p3, p4 = f4, f5
fcmp.gt.unc.s0 p3, p4 = f4, f5
fcmp.gt.unc.s1 p3, p4 = f4, f5
fcmp.gt.unc.s2 p3, p4 = f4, f5
fcmp.gt.unc.s3 p3, p4 = f4, f5
 
fcmp.ge p3, p4 = f4, f5
fcmp.ge.s0 p3, p4 = f4, f5
fcmp.ge.s1 p3, p4 = f4, f5
fcmp.ge.s2 p3, p4 = f4, f5
fcmp.ge.s3 p3, p4 = f4, f5
fcmp.ge.unc p3, p4 = f4, f5
fcmp.ge.unc.s0 p3, p4 = f4, f5
fcmp.ge.unc.s1 p3, p4 = f4, f5
fcmp.ge.unc.s2 p3, p4 = f4, f5
fcmp.ge.unc.s3 p3, p4 = f4, f5
 
fcmp.neq p3, p4 = f4, f5
fcmp.neq.s0 p3, p4 = f4, f5
fcmp.neq.s1 p3, p4 = f4, f5
fcmp.neq.s2 p3, p4 = f4, f5
fcmp.neq.s3 p3, p4 = f4, f5
fcmp.neq.unc p3, p4 = f4, f5
fcmp.neq.unc.s0 p3, p4 = f4, f5
fcmp.neq.unc.s1 p3, p4 = f4, f5
fcmp.neq.unc.s2 p3, p4 = f4, f5
fcmp.neq.unc.s3 p3, p4 = f4, f5
 
fcmp.nlt p3, p4 = f4, f5
fcmp.nlt.s0 p3, p4 = f4, f5
fcmp.nlt.s1 p3, p4 = f4, f5
fcmp.nlt.s2 p3, p4 = f4, f5
fcmp.nlt.s3 p3, p4 = f4, f5
fcmp.nlt.unc p3, p4 = f4, f5
fcmp.nlt.unc.s0 p3, p4 = f4, f5
fcmp.nlt.unc.s1 p3, p4 = f4, f5
fcmp.nlt.unc.s2 p3, p4 = f4, f5
fcmp.nlt.unc.s3 p3, p4 = f4, f5
 
fcmp.nle p3, p4 = f4, f5
fcmp.nle.s0 p3, p4 = f4, f5
fcmp.nle.s1 p3, p4 = f4, f5
fcmp.nle.s2 p3, p4 = f4, f5
fcmp.nle.s3 p3, p4 = f4, f5
fcmp.nle.unc p3, p4 = f4, f5
fcmp.nle.unc.s0 p3, p4 = f4, f5
fcmp.nle.unc.s1 p3, p4 = f4, f5
fcmp.nle.unc.s2 p3, p4 = f4, f5
fcmp.nle.unc.s3 p3, p4 = f4, f5
 
fcmp.ngt p3, p4 = f4, f5
fcmp.ngt.s0 p3, p4 = f4, f5
fcmp.ngt.s1 p3, p4 = f4, f5
fcmp.ngt.s2 p3, p4 = f4, f5
fcmp.ngt.s3 p3, p4 = f4, f5
fcmp.ngt.unc p3, p4 = f4, f5
fcmp.ngt.unc.s0 p3, p4 = f4, f5
fcmp.ngt.unc.s1 p3, p4 = f4, f5
fcmp.ngt.unc.s2 p3, p4 = f4, f5
fcmp.ngt.unc.s3 p3, p4 = f4, f5
 
fcmp.nge p3, p4 = f4, f5
fcmp.nge.s0 p3, p4 = f4, f5
fcmp.nge.s1 p3, p4 = f4, f5
fcmp.nge.s2 p3, p4 = f4, f5
fcmp.nge.s3 p3, p4 = f4, f5
fcmp.nge.unc p3, p4 = f4, f5
fcmp.nge.unc.s0 p3, p4 = f4, f5
fcmp.nge.unc.s1 p3, p4 = f4, f5
fcmp.nge.unc.s2 p3, p4 = f4, f5
fcmp.nge.unc.s3 p3, p4 = f4, f5
 
fcmp.ord p3, p4 = f4, f5
fcmp.ord.s0 p3, p4 = f4, f5
fcmp.ord.s1 p3, p4 = f4, f5
fcmp.ord.s2 p3, p4 = f4, f5
fcmp.ord.s3 p3, p4 = f4, f5
fcmp.ord.unc p3, p4 = f4, f5
fcmp.ord.unc.s0 p3, p4 = f4, f5
fcmp.ord.unc.s1 p3, p4 = f4, f5
fcmp.ord.unc.s2 p3, p4 = f4, f5
fcmp.ord.unc.s3 p3, p4 = f4, f5
 
fclass.m p3, p4 = f4, @nat
fclass.nm p3, p4 = f4, @nat
fclass.m p3, p4 = f4, @qnan
fclass.nm p3, p4 = f4, @qnan
fclass.m p3, p4 = f4, @snan
fclass.nm p3, p4 = f4, @snan
fclass.m p3, p4 = f4, @pos
fclass.nm p3, p4 = f4, @pos
fclass.m p3, p4 = f4, @neg
fclass.nm p3, p4 = f4, @neg
fclass.m p3, p4 = f4, @unorm
fclass.nm p3, p4 = f4, @unorm
fclass.m p3, p4 = f4, @norm
fclass.nm p3, p4 = f4, @norm
fclass.m p3, p4 = f4, @inf
fclass.nm p3, p4 = f4, @inf
fclass.m p3, p4 = f4, 0x1ff
fclass.nm p3, p4 = f4, 0x1ff
 
fclass.m.unc p3, p4 = f4, @nat
fclass.nm.unc p3, p4 = f4, @nat
fclass.m.unc p3, p4 = f4, @qnan
fclass.nm.unc p3, p4 = f4, @qnan
fclass.m.unc p3, p4 = f4, @snan
fclass.nm.unc p3, p4 = f4, @snan
fclass.m.unc p3, p4 = f4, @pos
fclass.nm.unc p3, p4 = f4, @pos
fclass.m.unc p3, p4 = f4, @neg
fclass.nm.unc p3, p4 = f4, @neg
fclass.m.unc p3, p4 = f4, @unorm
fclass.nm.unc p3, p4 = f4, @unorm
fclass.m.unc p3, p4 = f4, @norm
fclass.nm.unc p3, p4 = f4, @norm
fclass.m.unc p3, p4 = f4, @inf
fclass.nm.unc p3, p4 = f4, @inf
fclass.m.unc p3, p4 = f4, 0x1ff
fclass.nm.unc p3, p4 = f4, 0x1ff
 
frcpa f4, p5 = f6, f7
frcpa.s0 f4, p5 = f6, f7
frcpa.s1 f4, p5 = f6, f7
frcpa.s2 f4, p5 = f6, f7
frcpa.s3 f4, p5 = f6, f7
 
fprcpa f4, p5 = f6, f7
fprcpa.s0 f4, p5 = f6, f7
fprcpa.s1 f4, p5 = f6, f7
fprcpa.s2 f4, p5 = f6, f7
fprcpa.s3 f4, p5 = f6, f7
 
frsqrta f4, p5 = f6
frsqrta.s0 f4, p5 = f6
frsqrta.s1 f4, p5 = f6
frsqrta.s2 f4, p5 = f6
frsqrta.s3 f4, p5 = f6
 
fprsqrta f4, p5 = f6
fprsqrta.s0 f4, p5 = f6
fprsqrta.s1 f4, p5 = f6
fprsqrta.s2 f4, p5 = f6
fprsqrta.s3 f4, p5 = f6
 
fmin f4 = f5, f6
fmin.s0 f4 = f5, f6
fmin.s1 f4 = f5, f6
fmin.s2 f4 = f5, f6
fmin.s3 f4 = f5, f6
 
fmax f4 = f5, f6
fmax.s0 f4 = f5, f6
fmax.s1 f4 = f5, f6
fmax.s2 f4 = f5, f6
fmax.s3 f4 = f5, f6
 
famin f4 = f5, f6
famin.s0 f4 = f5, f6
famin.s1 f4 = f5, f6
famin.s2 f4 = f5, f6
famin.s3 f4 = f5, f6
 
famax f4 = f5, f6
famax.s0 f4 = f5, f6
famax.s1 f4 = f5, f6
famax.s2 f4 = f5, f6
famax.s3 f4 = f5, f6
 
fpmin f4 = f5, f6
fpmin.s0 f4 = f5, f6
fpmin.s1 f4 = f5, f6
fpmin.s2 f4 = f5, f6
fpmin.s3 f4 = f5, f6
 
fpmax f4 = f5, f6
fpmax.s0 f4 = f5, f6
fpmax.s1 f4 = f5, f6
fpmax.s2 f4 = f5, f6
fpmax.s3 f4 = f5, f6
 
fpamin f4 = f5, f6
fpamin.s0 f4 = f5, f6
fpamin.s1 f4 = f5, f6
fpamin.s2 f4 = f5, f6
fpamin.s3 f4 = f5, f6
 
fpamax f4 = f5, f6
fpamax.s0 f4 = f5, f6
fpamax.s1 f4 = f5, f6
fpamax.s2 f4 = f5, f6
fpamax.s3 f4 = f5, f6
 
fpcmp.eq f3 = f4, f5
fpcmp.eq.s0 f3 = f4, f5
fpcmp.eq.s1 f3 = f4, f5
fpcmp.eq.s2 f3 = f4, f5
fpcmp.eq.s3 f3 = f4, f5
 
fpcmp.lt f3 = f4, f5
fpcmp.lt.s0 f3 = f4, f5
fpcmp.lt.s1 f3 = f4, f5
fpcmp.lt.s2 f3 = f4, f5
fpcmp.lt.s3 f3 = f4, f5
 
fpcmp.le f3 = f4, f5
fpcmp.le.s0 f3 = f4, f5
fpcmp.le.s1 f3 = f4, f5
fpcmp.le.s2 f3 = f4, f5
fpcmp.le.s3 f3 = f4, f5
 
fpcmp.unord f3 = f4, f5
fpcmp.unord.s0 f3 = f4, f5
fpcmp.unord.s1 f3 = f4, f5
fpcmp.unord.s2 f3 = f4, f5
fpcmp.unord.s3 f3 = f4, f5
 
fpcmp.gt f3 = f4, f5
fpcmp.gt.s0 f3 = f4, f5
fpcmp.gt.s1 f3 = f4, f5
fpcmp.gt.s2 f3 = f4, f5
fpcmp.gt.s3 f3 = f4, f5
 
fpcmp.ge f3 = f4, f5
fpcmp.ge.s0 f3 = f4, f5
fpcmp.ge.s1 f3 = f4, f5
fpcmp.ge.s2 f3 = f4, f5
fpcmp.ge.s3 f3 = f4, f5
 
fpcmp.neq f3 = f4, f5
fpcmp.neq.s0 f3 = f4, f5
fpcmp.neq.s1 f3 = f4, f5
fpcmp.neq.s2 f3 = f4, f5
fpcmp.neq.s3 f3 = f4, f5
 
fpcmp.nlt f3 = f4, f5
fpcmp.nlt.s0 f3 = f4, f5
fpcmp.nlt.s1 f3 = f4, f5
fpcmp.nlt.s2 f3 = f4, f5
fpcmp.nlt.s3 f3 = f4, f5
 
fpcmp.nle f3 = f4, f5
fpcmp.nle.s0 f3 = f4, f5
fpcmp.nle.s1 f3 = f4, f5
fpcmp.nle.s2 f3 = f4, f5
fpcmp.nle.s3 f3 = f4, f5
 
fpcmp.ngt f3 = f4, f5
fpcmp.ngt.s0 f3 = f4, f5
fpcmp.ngt.s1 f3 = f4, f5
fpcmp.ngt.s2 f3 = f4, f5
fpcmp.ngt.s3 f3 = f4, f5
 
fpcmp.nge f3 = f4, f5
fpcmp.nge.s0 f3 = f4, f5
fpcmp.nge.s1 f3 = f4, f5
fpcmp.nge.s2 f3 = f4, f5
fpcmp.nge.s3 f3 = f4, f5
 
fpcmp.ord f3 = f4, f5
fpcmp.ord.s0 f3 = f4, f5
fpcmp.ord.s1 f3 = f4, f5
fpcmp.ord.s2 f3 = f4, f5
fpcmp.ord.s3 f3 = f4, f5
 
fmerge.s f4 = f5, f6
fmerge.ns f4 = f5, f6
fmerge.se f4 = f5, f6
fmix.lr f4 = f5, f6
fmix.r f4 = f5, f6
fmix.l f4 = f5, f6
fsxt.l f4 = f5, f6
fpack f4 = f5, f6
fswap f4 = f5, f6
fswap.nl f4 = f5, f6
fswap.nr f4 = f5, f6
fand f4 = f5, f6
fandcm f4 = f5, f6
for f4 = f5, f6
fxor f4 = f5, f6
fpmerge.s f4 = f5, f6
fpmerge.ns f4 = f5, f6
fpmerge.se f4 = f5, f6
 
fabs f4 = f5
fneg f4 = f5
fnegabs f4 = f5
fpabs f4 = f5
fpneg f4 = f5
fpnegabs f4 = f5
 
fcvt.fx f4 = f5
fcvt.fx.s0 f4 = f5
fcvt.fx.s1 f4 = f5
fcvt.fx.s2 f4 = f5
fcvt.fx.s3 f4 = f5
 
fcvt.fx.trunc f4 = f5
fcvt.fx.trunc.s0 f4 = f5
fcvt.fx.trunc.s1 f4 = f5
fcvt.fx.trunc.s2 f4 = f5
fcvt.fx.trunc.s3 f4 = f5
 
fcvt.fxu f4 = f5
fcvt.fxu.s0 f4 = f5
fcvt.fxu.s1 f4 = f5
fcvt.fxu.s2 f4 = f5
fcvt.fxu.s3 f4 = f5
 
fcvt.fxu.trunc f4 = f5
fcvt.fxu.trunc.s0 f4 = f5
fcvt.fxu.trunc.s1 f4 = f5
fcvt.fxu.trunc.s2 f4 = f5
fcvt.fxu.trunc.s3 f4 = f5
 
fpcvt.fx f4 = f5
fpcvt.fx.s0 f4 = f5
fpcvt.fx.s1 f4 = f5
fpcvt.fx.s2 f4 = f5
fpcvt.fx.s3 f4 = f5
 
fpcvt.fx.trunc f4 = f5
fpcvt.fx.trunc.s0 f4 = f5
fpcvt.fx.trunc.s1 f4 = f5
fpcvt.fx.trunc.s2 f4 = f5
fpcvt.fx.trunc.s3 f4 = f5
 
fpcvt.fxu f4 = f5
fpcvt.fxu.s0 f4 = f5
fpcvt.fxu.s1 f4 = f5
fpcvt.fxu.s2 f4 = f5
fpcvt.fxu.s3 f4 = f5
 
fpcvt.fxu.trunc f4 = f5
fpcvt.fxu.trunc.s0 f4 = f5
fpcvt.fxu.trunc.s1 f4 = f5
fpcvt.fxu.trunc.s2 f4 = f5
fpcvt.fxu.trunc.s3 f4 = f5
 
fcvt.xf f4 = f5
fcvt.xuf f4 = f5
 
fsetc 0, 0
fsetc 0x3f, 0x3f
fsetc.s0 0, 0
fsetc.s0 0x3f, 0x3f
fsetc.s1 0, 0
fsetc.s1 0x3f, 0x3f
fsetc.s2 0, 0
fsetc.s2 0x3f, 0x3f
fsetc.s3 0, 0
fsetc.s3 0x3f, 0x3f
 
fclrf
fclrf.s0
fclrf.s1
fclrf.s2
fclrf.s3
 
fchkf _start
fchkf.s0 _start
fchkf.s1 _start
fchkf.s2 _start
fchkf.s3 _start
 
break.f 0
nop.f 0;;
 
# instructions added by SDM2.1:
 
hint.f 0
hint.f @pause
hint.f 0x1ffff
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ldxmov-2.s
0,0 → 1,8
.text
.explicit
 
mov r2 = r0
ld8.mov r3 = [r2], foo#
;;
ld8.mov r2 = [r0], foo#
mov r3 = r2
/trunk/gnu/binutils/gas/testsuite/gas/ia64/order.s
0,0 → 1,37
.global foo#
.section .foo,"aw","progbits"
.msb
data2 0x1234
data4 0x12345678
data8 foo#
.section .bar,"aw","progbits"
.lsb
real4 0.1
real8 0.2
data8 foo#
.section .foo,"aw","progbits"
data8 0x123456789abcdef
// data16 0x123456789abcdef
data8 foo#
.section .bar,"aw","progbits"
real10 0.4
real16 0.8
data8 foo#
.section .foo,"aw","progbits"
.lsb
data2 0x1234
data4 0x12345678
data8 foo#
.section .bar,"aw","progbits"
.msb
real4 0.1
real8 0.2
data8 foo#
.section .foo,"aw","progbits"
data8 0x123456789abcdef
// data16 0x123456789abcdef
data8 foo#
.section .bar,"aw","progbits"
real10 0.4
real16 0.8
data8 foo#
/trunk/gnu/binutils/gas/testsuite/gas/ia64/operands.s
0,0 → 1,6
.text
_start:
zxt1 r1, r2 = r3
zxt2 r4 = r5, r6
zxt4 p1 = r8
sxt1 r7 = 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/slotcount.d
0,0 → 1,10
#objdump: -s -j .slot_test
#name: ia64 slotcount
 
.*: +file format .*
 
Contents of section .slot_test:
0000 04000000 01000000 02000000 03000000 ................
0010 04000000 05000000 06000000 07000000 ................
0020 08000000 02000000 06000000 03000000 ................
0030 02000000 ....
/trunk/gnu/binutils/gas/testsuite/gas/ia64/group-2.d
0,0 → 1,41
#readelf: -Sg
#as: -x
#name: ia64 unwind group
 
There are 12 section headers, starting at offset 0x100:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.group GROUP 0000000000000000 00000040
0000000000000010 0000000000000004 10 5 4
\[ 2\] \.text PROGBITS 0000000000000000 00000050
0000000000000000 0000000000000000 AX 0 0 16
\[ 3\] \.data PROGBITS 0000000000000000 00000050
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.bss NOBITS 0000000000000000 00000050
0000000000000000 0000000000000000 WA 0 0 1
\[ 5\] \.gnu\.linkonce\.t\.f PROGBITS 0000000000000000 00000050
0000000000000000 0000000000000000 AXG 0 0 16
\[ 6\] \.gnu\.linkonce\.ia6 PROGBITS 0000000000000000 00000050
0000000000000010 0000000000000000 AG 0 0 8
\[ 7\] \.gnu\.linkonce\.ia6 IA_64_UNWIND 0000000000000000 00000060
0000000000000018 0000000000000000 ALG 5 5 8
\[ 8\] \.rela\.gnu\.linkonc RELA 0000000000000000 000004e0
0000000000000048 0000000000000018 10 7 8
\[ 9\] \.shstrtab STRTAB 0000000000000000 00000078
0000000000000081 0000000000000000 0 0 1
\[10\] \.symtab SYMTAB 0000000000000000 00000400
00000000000000d8 0000000000000018 11 9 8
\[11\] \.strtab STRTAB 0000000000000000 000004d8
0000000000000005 0000000000000000 0 0 1
Key to Flags:
#...
 
COMDAT group section \[ 1\] `\.group' \[foo\] contains 3 sections:
\[Index\] Name
\[ 5\] \.gnu\.linkonce\.t\.foo
\[ 6\] \.gnu\.linkonce\.ia64unwi\.foo
\[ 7\] \.gnu\.linkonce\.ia64unw\.foo
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-a-err.l
0,0 → 1,18
.*: Assembler messages:
.*:1: Error: Operand 2 of `adds' should be a 14-bit .*
.*:2: Error: Operand 2 of `adds' should be a 14-bit .*
.*:4: Error: Operand 2 of `addl' should be a 22-bit .*
.*:5: Error: Operand 2 of `addl' should be a 22-bit .*
.*:6: Error: Operand 3 of `addl' should be a general register r0-r3
.*:8: Error: Operand 2 of `sub' should be .*
.*:9: Error: Operand 2 of `sub' should be .*
.*:11: Error: Operand 2 of `and' should be .*
.*:12: Error: Operand 2 of `and' should be .*
.*:14: Error: Operand 2 of `or' should be .*
.*:15: Error: Operand 2 of `or' should be .*
.*:17: Error: Operand 2 of `xor' should be .*
.*:18: Error: Operand 2 of `xor' should be .*
.*:20: Error: Operand 2 of `andcm' should be .*
.*:21: Error: Operand 2 of `andcm' should be .*
.*:23: Error: Operand [34] of `cmp4.lt.or' should be r0
.*:24: Error: Operand [34] of `cmp4.lt.or' should be r0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/mov-ar.d
0,0 → 1,26
# objdump: -d
# name: ia64 app reg moves
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+0 <_start>:
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar.k0=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar127=r0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar47=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar112=r0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar48=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar111=r0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar63=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar.pfs=r0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar112=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar63=r0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MFI\][[:space:]]+mov\.m ar127=r0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop\.f 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+mov\.i ar48=r0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc.d
0,0 → 1,64
#objdump: -r
#name: ia64 relocations
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
[[:xdigit:]]+[012][[:space:]]+IMM14[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+IMM22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+IMM64[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+GPREL22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+GPREL64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PLTOFF22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PLTOFF64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+FPTR64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL60B[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL21B[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL21M[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL21F[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+PCREL64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF22X[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LDXMOV[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+TPREL14[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+TPREL22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+TPREL64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF_TPREL22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPMOD22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+DTPREL14[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+DTPREL22[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+DTPREL64I[[:space:]]+esym
[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPREL22[[:space:]]+esym
 
RELOCATION RECORDS FOR \[\.rodata\.4\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
[[:xdigit:]]+[048cC][[:space:]]+DIR32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+GPREL32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+FPTR32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+PCREL32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+LTOFF_FPTR32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+SEGREL32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+SECREL32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+LTV32[LM]SB[[:space:]]+esym
[[:xdigit:]]+[048cC][[:space:]]+DTPREL32[LM]SB[[:space:]]+esym
 
RELOCATION RECORDS FOR \[\.rodata\.8\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
[[:xdigit:]]+[08][[:space:]]+DIR64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+GPREL64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+PLTOFF64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+FPTR64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+PCREL64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+LTOFF_FPTR64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+SEGREL64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+SECREL64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+LTV64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+IPLT[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+TPREL64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+DTPMOD64[LM]SB[[:space:]]+esym
[[:xdigit:]]+[08][[:space:]]+DTPREL64[LM]SB[[:space:]]+esym
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-a-err.s
0,0 → 1,24
adds r25 = -0x2001, r10
adds r26 = 0x2000, r10
 
addl r37 = -0x200001, r1
addl r38 = 0x200000, r1
addl r30 = 0, r10
 
sub r2 = 128, r3
sub r3 = -129, r4
 
and r8 = 129, r9
and r3 = -129, r4
or r8 = 129, r9
or r3 = -129, r4
xor r8 = 129, r9
xor r3 = -129, r4
andcm r8 = 129, r9
andcm r3 = -129, r4
 
cmp4.lt.or p2, p3 = r1, r4
cmp4.lt.or p2, p3 = 1, r4
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-2.d
0,0 → 1,11
# objdump: -r
# name: ia64 ltoff22x-2
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+000 LTOFF22X foo
0+010 LDXMOV foo
 
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/slotcount.s
0,0 → 1,51
.section .slot_test0,"",@progbits
data4.ua @slotcount(.L1-.L0)
 
.text
.align 16
foo:
[.L0:]
mov r2 = r12
[.L1:]
mov r8 = r14
[.L2:]
;;
mov r12 = r2
[.L3:]
{
.mii
nop 0
[.L4:]
nop 0
[.L5:]
nop 0
}
{
[.L6:]
nop 0
[.L7:]
nop 0
[.L8:]
br.ret.sptk.many b0
;;
}
 
.section .slot_test,"",@progbits
// data4.ua @slotcount(.Lundef)
 
data4.ua @slotcount(17)
 
data4.ua @slotcount(.L1-.L0) // 1
data4.ua @slotcount(.L2-.L0) // 2
data4.ua @slotcount(.L3-.L0) // 3
data4.ua @slotcount(.L4-.L0) // 4
data4.ua @slotcount(.L5-.L0) // 5
data4.ua @slotcount(.L6-.L0) // 6
data4.ua @slotcount(.L7-.L0) // 7
data4.ua @slotcount(.L8-.L0) // 8
 
data4.ua @slotcount(.L3-.L1) // 2
data4.ua @slotcount(.L8-.L2) // 6
data4.ua @slotcount(.L4-.L1) // 3
data4.ua @slotcount(.L4-.L2) // 2
// data4.ua @slotcount(.L2-.Lundef)
/trunk/gnu/binutils/gas/testsuite/gas/ia64/group-2.s
0,0 → 1,6
.section .gnu.linkonce.t.foo,"axG",@progbits,foo,comdat
.proc foo#
foo:
.prologue 12, r33
;;
.endp foo#
/trunk/gnu/binutils/gas/testsuite/gas/ia64/proc.l
0,0 → 1,6
.*: Assembler messages:
.*:4: Error: .* already defined.*
.*:7: Error: .* not defined.*
.*:7: Warning: .* not specified.*
.*:12: Error: Empty argument of .proc
.*:13: Error: Empty argument of .endp
/trunk/gnu/binutils/gas/testsuite/gas/ia64/mov-ar.s
0,0 → 1,21
.explicit
_start:
{.mfi
mov ar0 = r0
mov ar127 = r0
} ;; {.mfi
mov ar47 = r0
mov ar112 = r0
} ;; {.mfi
mov ar48 = r0
mov ar111 = r0
} ;; {.mfi
mov ar63 = r0
mov ar64 = r0
} ;; {.mfi
mov ar112 = r0
mov ar63 = r0
} ;; {.mfi
mov ar127 = r0
mov ar48 = r0
} ;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/proc.s
0,0 → 1,13
func1::
br.ret.sptk rp
 
.proc func, func1, func2
func::
br.ret.sptk rp
.endp func, func1, func2
 
func2::
br.ret.sptk rp
 
.proc
.endp
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc.s
0,0 → 1,82
.global esym
.section .rodata.4, "a", @progbits
.section .rodata.8, "a", @progbits
.text
_start:
adds r1 = esym, r0
mov r2 = esym
movl r3 = esym
.xdata4 .rodata.4, esym
.xdata8 .rodata.8, esym
 
mov r2 = @gprel(esym)
movl r3 = @gprel(esym)
.xdata4 .rodata.4, @gprel(esym)
.xdata8 .rodata.8, @gprel(esym)
 
mov r2 = @ltoff(esym)
movl r3 = @ltoff(esym)
 
mov r2 = @pltoff(esym)
movl r3 = @pltoff(esym)
.xdata8 .rodata.8, @pltoff(esym)
 
movl r3 = @fptr(esym)
.xdata4 .rodata.4, @fptr(esym)
.xdata8 .rodata.8, @fptr(esym)
 
brl.call.sptk b1 = esym
br.call.sptk b2 = esym
chk.s r0, esym
fchkf esym
.xdata4 .rodata.4, @pcrel(esym)
.xdata8 .rodata.8, @pcrel(esym)
 
mov r2 = @ltoff(@fptr(esym))
movl r3 = @ltoff(@fptr(esym))
.xdata4 .rodata.4, @ltoff(@fptr(esym))
.xdata8 .rodata.8, @ltoff(@fptr(esym))
 
.xdata4 .rodata.4, @segrel(esym)
.xdata8 .rodata.8, @segrel(esym)
 
.xdata4 .rodata.4, @secrel(esym)
.xdata8 .rodata.8, @secrel(esym)
 
// REL32 only in executables
// REL64 only in executables
 
.xdata4 .rodata.4, @ltv(esym)
.xdata8 .rodata.8, @ltv(esym)
 
//todo PCREL21BI
mov r2 = @pcrel(esym)
movl r3 = @pcrel(esym)
 
.xdata16 .rodata.8, @iplt(esym)
 
// COPY only in executables
 
//todo movl r3 = -esym
 
mov r2 = @ltoffx(esym)
ld8.mov r3 = [r2], esym
 
adds r1 = @tprel(esym), r0
mov r2 = @tprel(esym)
movl r3 = @tprel(esym)
.xdata8 .rodata.8, @tprel(esym)
 
mov r2 = @ltoff(@tprel(esym))
 
.xdata8 .rodata.8, @dtpmod(esym)
 
mov r2 = @ltoff(@dtpmod(esym))
 
adds r1 = @dtprel(esym), r0
mov r2 = @dtprel(esym)
movl r3 = @dtprel(esym)
.xdata4 .rodata.4, @dtprel(esym)
.xdata8 .rodata.8, @dtprel(esym)
 
mov r2 = @ltoff(@dtprel(esym))
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-2.s
0,0 → 1,13
.global foo#
foo# = bar#
.global bar#
.data
bar:
data4 0
.text
addl r3 = @ltoffx(foo#), gp
nop.i 0
nop.i 0
ld8.mov r3 = [r3], foo#
nop.i 0
nop.i 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/regs.pl
0,0 → 1,150
print ".text\n";
print "\t.type _start,@","function\n";
print "_start:\n\n";
 
print "// Fixed and stacked integer registers.\n";
for ($i = 1; $i < 128; ++$i) {
print "\t{ .mii; mov r$i = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "// Alternate names for input registers\n";
print "\t.regstk 96, 0, 0, 0\n";
for ($i = 0; $i < 96; ++$i) {
print "\t{ .mii; mov in$i = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "// Alternate names for output registers\n";
print "\t.regstk 0, 0, 96, 0\n";
for ($i = 0; $i < 96; ++$i) {
print "\t{ .mii; mov out$i = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "// Alternate names for local registers\n";
print "\t.regstk 0, 96, 0, 0\n";
for ($i = 0; $i < 96; ++$i) {
print "\t{ .mii; mov loc$i = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "// Return value registers\n";
for ($i = 0; $i < 4; ++$i) {
print "\t{ .mii; mov ret$i = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "\t{ .mii;\n";
print "\tmov gp = r0\n";
print "\tmov sp = r0\n";
print "\tmov tp = r0;; }\n\n";
 
print "// Floating point registers\n";
for ($i = 2; $i < 128; ++$i) {
print "\t{ .mfi; mov f$i = f0 ;; }\n";
}
print "\n";
 
print "// Floating point argument registers\n";
for ($i = 0; $i < 8; ++$i) {
print "\t{ .mfi; mov farg$i = f1 ;; }\n";
}
print "\n";
 
print "// Floating point return value registers\n";
for ($i = 0; $i < 8; ++$i) {
print "\t{ .mfi; mov fret$i = f1 ;; }\n";
}
print "\n";
 
print "// Predicate registers\n";
for ($i = 0; $i < 64; ++$i) {
print "\t{ .mii; (p$i)\tmov r", $i+1, " = r0; nop.i 0; nop.i 0;; }\n";
}
print "\n";
 
print "// Predicates as a unit\n";
print "\t{ .mmi; nop.m 0; mov r1 = pr ;; }\n";
print "//\tmov r2 = pr.rot\n";
print "\n";
 
print "// Branch registers.\n";
for ($i = 0; $i < 8; ++$i) {
print "\t{ .mmi; mov b$i = r0;; }\n";
}
print "\n";
 
print "\t{ .mmi; mov rp = r0;; }\n";
print "\n";
 
print "// Application registers\n";
@reserved = ( 8..15, 20, 22..23, 31, 33..35, 37..39, 41..47, 67..111 );
%reserved = ();
foreach $i (@reserved) {
$reserved{$i} = 1;
}
for ($i = 0; $i < 128; ++$i) {
print "//" if $reserved{$i};
print "\t{ .mmi; nop.m 0; mov r1 = ar$i ;; }";
print "\t\t// reserved" if $reserved{$i};
print "\n";
}
print "\n";
 
print "// Application registers by name\n";
for ($i = 0; $i < 8; ++$i) {
print "\t{ .mmi; nop.m 0; mov r1 = ar.k$i ;;}\n";
}
 
@regs = ( "rsc", "bsp", "bspstore", "rnat", "ccv", "unat", "fpsr", "itc",
"pfs", "lc", "ec" );
foreach $i (@regs) {
print "\t{ .mmi; nop.m 0; mov r1 = ar.$i ;; }\n";
}
print "\n";
 
print "// Control registers\n";
@reserved = ( 3..7, 10..15, 18, 26..63, 75..79, 82..127 );
%reserved = ();
foreach $i (@reserved) {
$reserved{$i} = 1;
}
for ($i = 0; $i < 128; ++$i) {
print "//" if $reserved{$i};
print "\t{ .mfb; mov r1 = cr$i ;; }";
print "\t\t// reserved" if $reserved{$i};
print "\n";
}
print "\n";
 
print "// Control registers by name\n";
@regs = ( "dcr", "itm", "iva", "pta", "ipsr", "isr", "iip",
"iipa", "ifs", "iim", "iha", "lid", "ivr",
"tpr", "eoi", "irr0", "irr1", "irr2", "irr3", "itv", "pmv",
"lrr0", "lrr1", "cmcv" );
# ias doesn't accept these, despite documentation to the contrary.
# push @regs, "ida", "idtr", "iitr"
foreach $i (@regs) {
print "\t{ .mfb; mov r1 = cr.$i ;; }\n";
}
print "\n";
 
 
print "// Other registers\n";
print "\t{ .mfb; mov r1 = psr ;; }\n";
print "//\t{ .mfb; mov r1 = psr.l ;; }\n";
print "\t{ .mfb; mov r1 = psr.um ;; }\n";
print "\t{ .mmi; mov r1 = ip ;; }\n";
print "\n";
 
print "// Indirect register files\n";
@regs = ("pmc", "pmd", "pkr", "rr", "ibr", "dbr", "CPUID", "cpuid");
# ias doesn't accept these, despite documentation to the contrary.
# push @regs, "itr", "dtr";
foreach $i (@regs) {
print "\t{ .mmi\n";
print "\tmov r1 = ${i}[r3]\n";
print "\tmov r2 = ${i}[r4]\n";
print "\tnop.i 0;; }\n";
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc-uw.d
0,0 → 1,13
# objdump: -r
# name: ia64 unwind relocations
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.IA_64\.unwind\]:
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
0*00 SEGREL64[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*08 SEGREL64[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*10 SEGREL64[ML]SB[[:space:]]+\.IA_64\.unwind_info(\+0x[[:xdigit:]]*[08])?
0*18 SEGREL64[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*20 SEGREL64[ML]SB[[:space:]]+\.text(\+0x[[:xdigit:]]*0)?
0*28 SEGREL64[ML]SB[[:space:]]+\.IA_64\.unwind_info(\+0x[[:xdigit:]]*[08])?
/trunk/gnu/binutils/gas/testsuite/gas/ia64/hint.b-warn.l
0,0 → 1,3
.*: Assembler messages:
.*:1: Warning: hint.b may be treated as nop
.*:2: Warning: hint.b may be treated as nop
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-branch.d
0,0 → 1,15
# as: -xexplicit
# objdump: -d
# name ia64 dv-branch
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <\.text>:
0: d0 08 00 10 18 90 \[MIB\] \(p06\) ld8 r1=\[r8\]
6: 61 10 04 80 03 03 \(p06\) mov b6=r2
c: 68 00 80 10 \(p06\) br\.call\.sptk\.many b0=b6
10: 11 08 00 3c 00 21 \[MIB\] mov r1=r30
16: 00 00 00 02 00 03 nop\.i 0x0
1c: f0 ff ff 48 \(p06\) br\.cond\.sptk\.few 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/forward.d
0,0 → 1,15
# as: -xexplicit
# objdump: -d
# name ia64 forward references
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+ <_start>:
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MIB\][[:space:]]+alloc r31=ar.pfs,12,6,8
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+[[:space:]]+dep.z r2=1,5,7
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\(p0?6\)[[:space:]]+br.cond.sptk.few 0+ <_start>;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MIB\][[:space:]]+alloc r31=ar.pfs,0,0,0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+[[:space:]]+dep.z r3=-1,1,1
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\(p0?7\)[[:space:]]+br(\.cond)?\.sptk(\.few)? [[:xdigit:]]+0 <.*>;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/hint.b-warn.s
0,0 → 1,2
hint.b @pause
hint.b 0x1ffff
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-mutex-err.l
0,0 → 1,13
.*: Assembler messages:
.*:9: Warning: Use of 'ld8' .* RAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 26
.*:9: Warning: Only the first path encountering the conflict is reported
.*:8: Warning: This is the location of the conflicting usage
.*:14: Warning: Use of 'mov' may violate WAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 4
.*:14: Warning: Only the first path encountering the conflict is reported
.*:13: Warning: This is the location of the conflicting usage
.*:20: Warning: Use of 'mov' may violate WAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 4
.*:19: Warning: This is the location of the conflicting usage
.*:26: Warning: Use of 'mov' may violate WAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 4
.*:25: Warning: This is the location of the conflicting usage
.*:32: Warning: Use of 'mov' may violate WAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 4
.*:31: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reg-err.l
0,0 → 1,14
.*: Assembler messages:
.*:3: (Error|Warning): Invalid use of `r0' as output operand
.*:4: (Error|Warning): Invalid use of `r0' as base update address operand
.*:5: (Error|Warning): Invalid duplicate use of `r1'
.*:6: (Error|Warning): Invalid use of `r0' as base update address operand
.*:7: (Error|Warning): Invalid duplicate use of `p1'
.*:8: (Error|Warning): Invalid use of `f0' as output operand
.*:9: (Error|Warning): Invalid use of `f1' as output operand
.*:10: (Error|Warning): Invalid use of `f0' as output operand
.*:11: (Error|Warning): Invalid use of `f1' as output operand
.*:12: (Error|Warning): Invalid use of `f0' as output operand
.*:12: (Error|Warning): Invalid use of `f1' as output operand
.*:13: (Error|Warning): Invalid simultaneous use of `f2' and `f4'
.*:14: (Error|Warning): Dangerous simultaneous use of `f31' and `f32'
/trunk/gnu/binutils/gas/testsuite/gas/ia64/slot2.l
0,0 → 1,3
.*: Assembler messages:
.*:11: Error: .* must be last in bundle
.*:16: Error: .* must be last in bundle
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc-uw.s
0,0 → 1,13
.text
 
.macro uw, type
.proc uw\type
.\type uw\type
uw\type:
.unwentry
br.ret.sptk rp
.endp uw\type
.endm
 
uw global
uw weak
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ia64.exp
0,0 → 1,97
#
# ia64 tests
#
if [istarget "ia64-*"] then {
 
run_dump_test "regs"
run_dump_test "opc-a"
run_list_test "opc-a-err" ""
run_dump_test "opc-b"
run_dump_test "opc-f"
run_dump_test "opc-i"
run_dump_test "opc-m"
run_dump_test "opc-x"
run_dump_test "pseudo"
run_dump_test "nop_x"
run_dump_test "mov-ar"
run_list_test "operands" ""
run_list_test "reg-err" ""
 
run_list_test "dv-raw-err" ""
run_list_test "dv-waw-err" ""
run_list_test "dv-war-err" ""
run_list_test "dv-entry-err" ""
run_list_test "dv-mutex-err" ""
run_dump_test "dv-branch"
run_dump_test "dv-imply"
run_dump_test "dv-mutex"
gas_test "pred-rel.s" "" "" ".pred.rel alternative forms"
run_dump_test "dv-safe"
run_dump_test "dv-srlz"
run_list_test "regval" ""
run_dump_test "tls"
run_dump_test "ldxmov-1"
run_list_test "ldxmov-2" ""
run_dump_test "ltoff22x-1"
run_dump_test "ltoff22x-2"
run_dump_test "ltoff22x-3"
run_dump_test "ltoff22x-4"
run_dump_test "ltoff22x-5"
 
run_dump_test "nostkreg"
run_list_test "invalid-ar" ""
 
run_dump_test "nostkreg"
run_list_test "invalid-ar" ""
 
run_dump_test "dependency-1"
 
run_dump_test "reloc"
run_list_test "reloc-bad" ""
run_dump_test "pcrel"
 
run_dump_test "real"
run_dump_test "align"
run_dump_test "order"
run_dump_test "global"
if [istarget "ia64-*-hpux*"] then {
run_dump_test "secname-ilp32"
run_dump_test "unwind-ilp32"
run_dump_test "alias-ilp32"
run_dump_test "xdata-ilp32"
run_dump_test "reloc-uw-ilp32"
} else {
run_dump_test "secname"
run_dump_test "unwind"
run_dump_test "alias"
run_dump_test "xdata"
run_dump_test "reloc-uw"
run_dump_test "group-1"
run_dump_test "group-2"
}
 
run_list_test "alloc" ""
run_dump_test "bundling"
run_dump_test "forward"
run_list_test "index" ""
run_list_test "label" ""
run_list_test "last" ""
run_list_test "no-fit" ""
run_list_test "pound" "-al"
run_list_test "proc" "-munwind-check=error"
run_list_test "radix" ""
run_list_test "rotX" ""
run_list_test "slot2" ""
run_dump_test "strange"
run_list_test "unwind-bad" ""
run_list_test "unwind-err" "-munwind-check=error"
run_dump_test "unwind-ok"
run_dump_test "operand-or"
run_list_test "hint.b-err" ""
run_list_test "hint.b-warn" "-mhint.b=warning"
 
if [istarget "ia64-*-*vms*"] then {
run_dump_test "slotcount"
}
 
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-mutex-err.s
0,0 → 1,33
//
// Test mutex relation handling
//
.text
.explicit
start:
cmp.eq p6, p0 = r29, r0
add r26 = r26, r29
ld8 r29 = [r26]
 
.pred.rel.mutex p1, p2
cmp.eq p0, p1 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
.pred.rel.mutex p1, p2
(p3) cmp.eq p0, p1 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
.pred.rel.mutex p1, p2
cmp.eq p2, p3 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
 
.pred.rel.mutex p1, p2
(p3) cmp.eq p2, p3 = r1, r2;;
(p1) mov r4 = 2
(p2) mov r4 = 4
rfi
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reg-err.s
0,0 → 1,14
.text
_start:
mov r0 = r0
ld1 r1 = [r0], 1
ld1 r1 = [r1], 1
st1 [r0] = r0, 1
cmp.eq p1, p1 = 0, r0
mov f0 = f0
mov f1 = f1
ldfs f0 = [r0]
ldfs f1 = [r0]
ldfps f0, f1 = [r0]
ldfps f2, f4 = [r0]
ldfps f31, f32 = [r0]
/trunk/gnu/binutils/gas/testsuite/gas/ia64/slot2.s
0,0 → 1,18
.explicit
_start:
{.mib
br.cloop.sptk start
} ;;
{.mib
nop 0
br.cloop.sptk start
} ;;
{.mbb
br.cloop.sptk start
nop 0
} ;;
{.mbb
nop 0
br.cloop.sptk start
nop 0
} ;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-branch.s
0,0 → 1,16
//
// Verify DV detection on branch variations
//
.text
.explicit
// example from rth
3:
{ .mib
(p6) ld8 gp = [ret0]
(p6) mov b6 = r2
(p6) br.call.sptk.many b0 = b6 // if taken, clears b6/r2 usage
}
{ .mib
mov gp = r30
(p6) br.sptk.few 3b
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/forward.s
0,0 → 1,27
two == 2*one
one = 1
three == 3*one
four = 4*one
 
RA == rA
rA = r2
 
PA == pA
pA = p6
 
.text
_start:
alloc r31 = one + 1, two + 2, three + 3, four + 4
dep.z RA = one, two + 3, three + 4
(PA) br.sptk _start
;;
 
one = -1
rA = r3
pA = p7
 
.L1:
alloc r31 = one + 1, two + 2, three + 3, four - 4
dep.z RA = one, two + 3, three + 4
(PA) br.sptk .L1
;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/fixup-dump.pl
0,0 → 1,12
print "# objdump: -d\n";
print "# name: ia64 $ARGV[0]\n";
shift;
 
while (<>) {
if (/.*file format.*/) {
$_ = ".*: +file format .*\n";
} else {
s/([][().])/\\$1/g;
}
print;
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-b.pl
0,0 → 1,95
@ph = ( "", ".few", ".many" );
@bwh = ( ".sptk", ".spnt", ".dptk", ".dpnt" );
@dh = ( "", ".clr" );
 
@iprel = ( ".cond", ".wexit", ".wtop", ".cloop", ".cexit", ".ctop", ".call" );
@indir = ( ".cond", ".ia", ".ret", ".call" );
%noqual = ( ".ia", 1, ".cloop", 1, ".ctop", 1, ".cexit", 1 );
%slottwo = ( ".cloop", 1, ".ctop", 1, ".cexit", 1, ".wtop", 1, ".wexit", 1 );
 
print ".L0:\n\n";
 
foreach $i (@iprel) {
$call = ($i eq ".call" ? "b0 = " : "");
foreach $b (@bwh) {
foreach $p (@ph) {
foreach $d (@dh) {
if ($slottwo{$i}) {
if (!$noqual{$i}) {
print ("\t{ .bbb; (p2) br${i}${b}${p}${d} ${call}.L1 ;; }\n");
}
print ("\t{ .bbb; br${i}${b}${p}${d} ${call}.L1 ;; }\n");
} else {
print ("\t{ .bbb; nop.b 0\n");
if (!$noqual{$i}) {
print ("(p2)\tbr${i}${b}${p}${d} ${call}.L1\n");
} else {
print ("\tnop.b 0\n");
}
print ("\tbr${i}${b}${p}${d} ${call}.L0\n");
print ("\t;; }\n");
}
}
}
}
print "\n";
}
 
foreach $i (@indir) {
$call = ($i eq ".call" ? "b0 = " : "");
foreach $b (@bwh) {
foreach $p (@ph) {
foreach $d (@dh) {
print ("\t{ .bbb; nop.b 0;\n");
if (!$noqual{$i}) {
print ("(p2)\tbr${i}${b}${p}${d} ${call}b2\n");
} else {
print ("\tnop.b 0\n");
}
print ("\tbr${i}${b}${p}${d} ${call}b2\n");
print ("\t;; }\n");
}
}
}
print "\n";
}
 
@ih = ( "", ".imp" );
@ipwh = ( ".sptk", ".loop", ".dptk", ".exit" );
@indwh = ( ".sptk", ".dptk" );
 
$CTR = 2;
 
foreach $w (@ipwh) {
foreach $i (@ih) {
print ("\t{ .bbb; break.b 0; nop.b 0\n");
print ("\tbrp${w}${i} .L0, .L${CTR}\n");
print ("\t;; }\n");
}
print (".L${CTR}:\n");
++$CTR;
}
 
print "\n";
 
foreach $b ("", ".ret") {
foreach $w (@indwh) {
foreach $i (@ih) {
print ("\t{ .bbb; break.b 0; nop.b 0\n");
print ("\tbrp${b}${w}${i} b3, .L${CTR}\n");
print ("\t;; }\n");
}
print (".L${CTR}:\n");
++$CTR;
}
print "\n";
}
 
print ".space 5888\n";
 
@last = ( "cover", "clrrrb", "clrrrb.pr", "rfi", "bsw.0", "bsw.1", "epc" );
foreach $i (@last) {
print "\t{ .bbb; nop.b 0; nop.b 0; $i ;; }\n";
}
 
print "\n.L1:\n";
/trunk/gnu/binutils/gas/testsuite/gas/ia64/nostkreg.d
0,0 → 1,16
#objdump: -dr
#name: ia64 not stacked registers
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <_start>:
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+\[M[IM]I\][[:space:]]+mov[[:space:]]+r5=0
[[:space:]]+0:[[:space:]]+IMM22[[:space:]]+in00
[[:space:]]+1:[[:space:]]+IMM22[[:space:]]+loc96
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r6=0
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r7=r32
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+\[M[IM]B\][[:space:]]+mov[[:space:]]+r8=r34
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+mov[[:space:]]+r9=r36
[[:space:]]*[[:xdigit:]]+:[[:space:][:xdigit:]]+br\.ret\.sptk\.few[[:space:]]+(b0|rp);;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pound.l
0,0 → 1,58
.*: Assembler messages:
.*:35: Warning: .* WAW .*
#...
.*:41: Error: symbol .esym. .* .efunction.
.*:43: Error: section .\.extra. .* .esection.
GAS LISTING .*
#...
[[:space:]]*[[:digit:]]+[[:space:]]+\.explicit
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+\.global esym#
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+\.section \.extra#, "a", @progbits
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+\.text
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+ break 0
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+\?*[[:space:]]+[[:xdigit:]]+[[:space:]]+\.proc psym
#...
[[:space:]]*[[:digit:]]+[[:space:]]+psym:
[[:space:]]*[[:digit:]]+[[:space:]]+ mov\.ret\.sptk b7 = r0, tag#
[[:space:]]*[[:digit:]]+[[:space:]]+ mov r8 = 0
[[:space:]]*[[:digit:]]+[[:space:]]+\[tag:\] br\.ret\.sptk rp
[[:space:]]*[[:digit:]]+[[:space:]]+\?*[[:space:]]+[[:xdigit:]]+[[:space:]]+\.endp psym
#...
[[:space:]]*[[:digit:]]+[[:space:]]+
[[:space:]]*[[:digit:]]+[[:space:]]+\.proc esym#
[[:space:]]*[[:digit:]]+[[:space:]]+\.entry entry#
[[:space:]]*[[:digit:]]+[[:space:]]+esym:
[[:space:]]*[[:digit:]]+[[:space:]]+\.unwentry
[[:space:]]*[[:digit:]]+[[:space:]]+\.personality psym#
[[:space:]]*[[:digit:]]+[[:space:]]+\.regstk 0, 8, 0, 8
[[:space:]]*[[:digit:]]+[[:space:]]+\.rotp p#\[2\], p1#\[4\]
[[:space:]]*[[:digit:]]+[[:space:]]+\.rotr r#\[2\], r1#\[4\]
[[:space:]]*[[:digit:]]+[[:space:]]+\.reg\.val r#\[1\], 0
[[:space:]]*[[:digit:]]+[[:space:]]+\.reg\.val r1#\[3\], 0
[[:space:]]*[[:digit:]]+[[:space:]]+\(p1#\[1\]\) cmp\.eq p\[0\] = r\[1\], r1#\[1\]
[[:space:]]*[[:digit:]]+[[:space:]]+\(p1#\[3\]\) cmp\.eq p#\[1\] = r#\[1\], r1#\[3\]
[[:space:]]*[[:digit:]]+[[:space:]]+\.pred\.rel "mutex", p#\[0\], p\[1\]
[[:space:]]*[[:digit:]]+[[:space:]]+ nop 0
[[:space:]]*[[:digit:]]+[[:space:]]+ ;;
[[:space:]]*[[:digit:]]+[[:space:]]+entry:
[[:space:]]*[[:digit:]]+[[:space:]]+\?*[[:space:]]+61828446[[:space:]]+\(p\[0\]\) mov r8 = 1
[[:space:]]*[[:digit:]]+[[:space:]]+00781509[[:space:]]*
[[:space:]]*[[:digit:]]+[[:space:]]+95007000[[:space:]]*
[[:space:]]*[[:digit:]]+[[:space:]]+00000400[[:space:]]*
[[:space:]]*[[:digit:]]+[[:space:]]+\(p#\[1\]\) mov r8 = 0
[[:space:]]*[[:digit:]]+[[:space:]]+ br\.ret\.sptk rp
[[:space:]]*[[:digit:]]+[[:space:]]+\.xdata4 \.extra#, -1
[[:space:]]*[[:digit:]]+[[:space:]]+\?*[[:space:]]+11420400+[[:space:]]+\.endp esym#
[[:space:]]*[[:digit:]]+[[:space:]]+00648400[[:space:]]*
[[:space:]]*[[:digit:]]+[[:space:]]+00004880[[:space:]]*
[[:space:]]*[[:digit:]]+[[:space:]]+00008400[[:space:]]*
#...
[[:space:]]*[[:digit:]]+[[:space:]]+\.alias esym#, "efunction"
[[:space:]]*[[:digit:]]+[[:space:]]+\.alias esym, "efunc"
[[:space:]]*[[:digit:]]+[[:space:]]+\.secalias \.extra#, "esection"
[[:space:]]*[[:digit:]]+[[:space:]]+\.secalias \.extra, "esec"
/trunk/gnu/binutils/gas/testsuite/gas/ia64/global.d
0,0 → 1,10
#readelf: --syms
#name: ia64 global label
 
Symbol table '.symtab' contains 5 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
+0: 0+0 +0 +NOTYPE +LOCAL +DEFAULT +UND
+1: 0+0 +0 +SECTION +LOCAL +DEFAULT +1
+2: 0+0 +0 +SECTION +LOCAL +DEFAULT +2
+3: 0+0 +0 +SECTION +LOCAL +DEFAULT +3
+4: 0+0 +0 +NOTYPE +GLOBAL +DEFAULT +2 foo
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pound.s
0,0 → 1,43
.explicit
 
.global esym#
 
.section .extra#, "a", @progbits
 
.text
 
break 0
 
.proc psym
psym:
mov.ret.sptk b7 = r0, tag#
mov r8 = 0
[tag:] br.ret.sptk rp
.endp psym
 
.proc esym#
.entry entry#
esym:
.unwentry
.personality psym#
.regstk 0, 8, 0, 8
.rotp p#[2], p1#[4]
.rotr r#[2], r1#[4]
.reg.val r#[1], 0
.reg.val r1#[3], 0
(p1#[1]) cmp.eq p[0] = r[1], r1#[1]
(p1#[3]) cmp.eq p#[1] = r#[1], r1#[3]
.pred.rel "mutex", p#[0], p[1]
nop 0
;;
entry:
(p[0]) mov r8 = 1
(p#[1]) mov r8 = 0
br.ret.sptk rp
.xdata4 .extra#, -1
.endp esym#
 
.alias esym#, "efunction"
.alias esym, "efunc"
.secalias .extra#, "esection"
.secalias .extra, "esec"
/trunk/gnu/binutils/gas/testsuite/gas/ia64/no-fit.l
0,0 → 1,8
.*: Assembler messages:
.*:5: Error: .nop\.i.[[:space:]]+[^23]*[[:space:]]+MFB[[:space:]]+.*
.*:8: Error: .nop\.f.[[:space:]]+[^23]*[[:space:]]+MLX[[:space:]]+.*
.*:12: Error: .nop\.i.[[:space:]]+.*[[:space:]]+2[[:space:]]+.*[[:space:]]+3[[:space:]]+.*[[:space:]]+MFB[[:space:]]+.*
.*:17: Error: .nop\.i.[[:space:]]+[^2]*[[:space:]]+3[[:space:]]+.*[[:space:]]+MFB[[:space:]]+.*
.*:21: Error: .nop\.f.[[:space:]]+.*[[:space:]]+X[[:space:]]+.*[[:space:]]+MLX[[:space:]]+.*
.*:27: Error: .nop.[[:space:]]+[^23M]*
.*:32: Error: .nop.[[:space:]]+[^23M]*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-3.d
0,0 → 1,11
# objdump: -r
# name: ia64 ltoff22x-3
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+000 LTOFF22X foo
0+010 LDXMOV foo
 
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/nostkreg.s
0,0 → 1,9
_start:
mov r5 = in00
mov r6 = loc96
.regstk 2, 6, 2, 8
.rotr in0I[2], loc1L[2], out2O[2]
mov r7 = in0I[0]
mov r8 = loc1L[0]
mov r9 = out2O[0]
br.ret.sptk rp
/trunk/gnu/binutils/gas/testsuite/gas/ia64/no-fit.s
0,0 → 1,33
.explicit
.text
_start:
{.mfb
nop.i 0
}
{.mlx
nop.f 0
}
{.mfb
nop.m 0
nop.i 0
}
{.mfb
nop.m 0
nop.f 0
nop.i 0
}
{.mlx
nop.m 0
nop.f 0
}
{.mfb
nop 0
nop 0
nop 0
nop 0
}
{.mlx
nop 0
nop 0
nop 0
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-ok.d
0,0 → 1,224
#readelf: -u
#name: ia64 unwind descriptors
 
Unwind section '\.IA_64\.unwind' at offset 0x[[:xdigit:]]+ contains 8 entries:
 
<full1>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x3 \( ?ehandler uhandler\), len=[[:digit:]]+ bytes
[[:space:]]*R1:prologue\(rlen=8\)
[[:space:]]*P6:fr_mem\(frmask=\[f2,f5\]\)
[[:space:]]*P6:gr_mem\(grmask=\[r4,r7\]\)
[[:space:]]*P1:br_mem\(brmask=\[b1,b5\]\)
[[:space:]]*P4:spill_mask\(imask=\[rfb,rfb,--\]\)
[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\)
[[:space:]]*P3:rp_br\(reg=b7\)
[[:space:]]*P10:unwabi\(abi=@svr4,context=0x00\)
[[:space:]]*R1:body\(rlen=25\)
[[:space:]]*X2:spill_reg\(t=0,reg=r4,treg=r2\)
[[:space:]]*X4:spill_reg_p\(qp=p1,t=1,reg=r7,treg=r31\)
[[:space:]]*X1:spill_sprel\(reg=b1,t=2,spoff=0x8\)
[[:space:]]*X3:spill_sprel_p\(qp=p2,t=3,reg=b5,spoff=0x10\)
[[:space:]]*X1:spill_psprel\(reg=f2,t=4,pspoff=0x10-0x28\)
[[:space:]]*X3:spill_psprel_p\(qp=p4,t=5,reg=f5,pspoff=0x10-0x30\)
[[:space:]]*X2:restore\(t=6,reg=f16\)
[[:space:]]*X4:restore_p\(qp=p8,t=7,reg=f31\)
[[:space:]]*X2:spill_reg\(t=8,reg=ar\.bsp,treg=r16\)
[[:space:]]*X2:spill_reg\(t=9,reg=ar\.bspstore,treg=r17\)
[[:space:]]*X2:spill_reg\(t=10,reg=ar\.fpsr,treg=r18\)
[[:space:]]*X2:spill_reg\(t=11,reg=ar\.lc,treg=r19\)
[[:space:]]*X2:spill_reg\(t=12,reg=ar\.pfs,treg=r20\)
[[:space:]]*X2:spill_reg\(t=13,reg=ar\.rnat,treg=r21\)
[[:space:]]*X2:spill_reg\(t=14,reg=ar\.unat,treg=r22\)
[[:space:]]*X2:spill_reg\(t=15,reg=psp,treg=r23\)
[[:space:]]*X2:spill_reg\(t=16,reg=pr,treg=r24\)
[[:space:]]*X2:spill_reg\(t=17,reg=rp,treg=r25\)
[[:space:]]*X2:spill_reg\(t=18,reg=@priunat,treg=r26\)
[[:space:]]*B1:label_state\(label=1\)
[[:space:]]*B2:epilogue\(t=4,ecount=0\)
[[:space:]]*B1:copy_state\(label=1\)
#...
<full2>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R2:prologue_gr\(mask=\[rp,psp,pr\],grsave=r8,rlen=14\)
[[:space:]]*P5:frgr_mem\(grmask=\[r4,r7\],frmask=\[f2,f31\]\)
[[:space:]]*P4:spill_mask\(imask=\[frb,bfr,---,---,--\]\)
[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\)
[[:space:]]*P2:br_gr\(brmask=\[b1,b5\],gr=r32\)
[[:space:]]*X2:spill_reg\(t=6,reg=f31,treg=f31\)
[[:space:]]*X4:spill_reg_p\(qp=p63,t=7,reg=f16,treg=f0\)
[[:space:]]*X1:spill_sprel\(reg=f5,t=8,spoff=0x20\)
[[:space:]]*X3:spill_sprel_p\(qp=p31,t=9,reg=f2,spoff=0x18\)
[[:space:]]*X1:spill_psprel\(reg=b5,t=10,pspoff=0x10-0x20\)
[[:space:]]*X3:spill_psprel_p\(qp=p15,t=11,reg=b1,pspoff=0x10-0x18\)
[[:space:]]*X2:restore\(t=12,reg=r7\)
[[:space:]]*X4:restore_p\(qp=p7,t=13,reg=r4\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=0\)
[[:space:]]*R1:prologue\(rlen=0\)
[[:space:]]*R1:body\(rlen=7\)
[[:space:]]*B4:label_state\(label=32\)
[[:space:]]*B3:epilogue\(t=4,ecount=32\)
[[:space:]]*B4:copy_state\(label=32\)
#...
<full3>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R3:prologue\(rlen=33\)
[[:space:]]*P4:spill_mask\(imask=\[rrb,brr,bb-,---,---,---,---,---,---,---,---\]\)
[[:space:]]*P7:spill_base\(pspoff=0x10-0x10\)
[[:space:]]*P9:gr_gr\(grmask=\[r4,r5\],r32\)
[[:space:]]*P2:br_gr\(brmask=\[b1,b2\],gr=r34\)
[[:space:]]*P9:gr_gr\(grmask=\[r6,r7\],r124\)
[[:space:]]*P2:br_gr\(brmask=\[b4,b5\],gr=r126\)
[[:space:]]*R3:body\(rlen=33\)
#...
<fframe>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R1:prologue\(rlen=1\)
[[:space:]]*P7:mem_stack_f\(t=0,size=0\)
[[:space:]]*R1:body\(rlen=2\)
#...
<vframe>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R1:prologue\(rlen=11\)
[[:space:]]*P7:mem_stack_v\(t=0\)
[[:space:]]*P3:psp_gr\(reg=r16\)
[[:space:]]*P8:bsp_when\(t=1\)
[[:space:]]*P3:bsp_gr\(reg=r17\)
[[:space:]]*P8:bspstore_when\(t=2\)
[[:space:]]*P3:bspstore_gr\(reg=r18\)
[[:space:]]*P7:fpsr_when\(t=3\)
[[:space:]]*P3:fpsr_gr\(reg=r19\)
[[:space:]]*P7:lc_when\(t=4\)
[[:space:]]*P3:lc_gr\(reg=r20\)
[[:space:]]*P7:pfs_when\(t=5\)
[[:space:]]*P3:pfs_gr\(reg=r21\)
[[:space:]]*P8:rnat_when\(t=6\)
[[:space:]]*P3:rnat_gr\(reg=r22\)
[[:space:]]*P7:unat_when\(t=7\)
[[:space:]]*P3:unat_gr\(reg=r23\)
[[:space:]]*P7:pr_when\(t=8\)
[[:space:]]*P3:pr_gr\(reg=r24\)
[[:space:]]*P8:priunat_when_gr\(t=9\)
[[:space:]]*P3:priunat_gr\(reg=r25\)
[[:space:]]*P7:rp_when\(t=10\)
[[:space:]]*P3:rp_gr\(reg=r26\)
[[:space:]]*R1:body\(rlen=1\)
#...
<vframesp>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R1:prologue\(rlen=11\)
[[:space:]]*P7:mem_stack_v\(t=0\)
[[:space:]]*P7:psp_sprel\(spoff=0x0\)
[[:space:]]*P8:bsp_when\(t=1\)
[[:space:]]*P8:bsp_sprel\(spoff=0x8\)
[[:space:]]*P8:bspstore_when\(t=2\)
[[:space:]]*P8:bspstore_sprel\(spoff=0x10\)
[[:space:]]*P7:fpsr_when\(t=3\)
[[:space:]]*P8:fpsr_sprel\(spoff=0x18\)
[[:space:]]*P7:lc_when\(t=4\)
[[:space:]]*P8:lc_sprel\(spoff=0x20\)
[[:space:]]*P7:pfs_when\(t=5\)
[[:space:]]*P8:pfs_sprel\(spoff=0x28\)
[[:space:]]*P8:rnat_when\(t=6\)
[[:space:]]*P8:rnat_sprel\(spoff=0x30\)
[[:space:]]*P7:unat_when\(t=7\)
[[:space:]]*P8:unat_sprel\(spoff=0x38\)
[[:space:]]*P7:pr_when\(t=8\)
[[:space:]]*P8:pr_sprel\(spoff=0x40\)
[[:space:]]*P8:priunat_when_mem\(t=9\)
[[:space:]]*P8:priunat_sprel\(spoff=0x48\)
[[:space:]]*P7:rp_when\(t=10\)
[[:space:]]*P8:rp_sprel\(spoff=0x50\)
[[:space:]]*R1:body\(rlen=1\)
#...
<psp>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
[[:space:]]*R1:prologue\(rlen=11\)
[[:space:]]*P7:mem_stack_v\(t=0\)
[[:space:]]*P7:psp_sprel\(spoff=0x0\)
[[:space:]]*P8:bsp_when\(t=1\)
[[:space:]]*P8:bsp_psprel\(pspoff=0x10-0x18\)
[[:space:]]*P8:bspstore_when\(t=2\)
[[:space:]]*P8:bspstore_psprel\(pspoff=0x10-0x20\)
[[:space:]]*P7:fpsr_when\(t=3\)
[[:space:]]*P7:fpsr_psprel\(pspoff=0x10-0x28\)
[[:space:]]*P7:lc_when\(t=4\)
[[:space:]]*P7:lc_psprel\(pspoff=0x10-0x30\)
[[:space:]]*P7:pfs_when\(t=5\)
[[:space:]]*P7:pfs_psprel\(pspoff=0x10-0x38\)
[[:space:]]*P8:rnat_when\(t=6\)
[[:space:]]*P8:rnat_psprel\(pspoff=0x10-0x40\)
[[:space:]]*P7:unat_when\(t=7\)
[[:space:]]*P7:unat_psprel\(pspoff=0x10-0x48\)
[[:space:]]*P7:pr_when\(t=8\)
[[:space:]]*P7:pr_psprel\(pspoff=0x10-0x50\)
[[:space:]]*P8:priunat_when_mem\(t=9\)
[[:space:]]*P8:priunat_psprel\(pspoff=0x10-0x58\)
[[:space:]]*P7:rp_when\(t=10\)
[[:space:]]*P7:rp_psprel\(pspoff=0x10-0x60\)
[[:space:]]*R1:body\(rlen=1\)
#...
<simple>: \[0x[[:xdigit:]]*0-0x[[:xdigit:]]*0\], info at \+0x[[:xdigit:]]*[08]
[[:space:]]*v[[:digit:]]+, flags=0x0( \(\))?, len=[[:digit:]]+ bytes
#pass
/trunk/gnu/binutils/gas/testsuite/gas/ia64/global.s
0,0 → 1,3
.data
foo::
data1 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/hint.b-err.l
0,0 → 1,3
.*: Assembler messages:
.*:1: Error: hint.b shouldn't be used
.*:2: Error: hint.b shouldn't be used
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-3.s
0,0 → 1,13
.global bar#
.data
bar:
data4 0
.global foo#
foo# = bar#
.text
addl r3 = @ltoffx(foo#), gp
nop.i 0
nop.i 0
ld8.mov r3 = [r3], foo#
nop.i 0
nop.i 0
/trunk/gnu/binutils/gas/testsuite/gas/ia64/hint.b-err.s
0,0 → 1,2
hint.b @pause
hint.b 0x1ffff
/trunk/gnu/binutils/gas/testsuite/gas/ia64/xdata-ilp32.d
0,0 → 1,29
#readelf: -S
#name: ia64 xdata (ilp32)
#as: -milp32
#source: xdata.s
 
There are 19 section headers, starting at offset 0x[[:xdigit:]]+:
 
Section Headers:
\[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al
\[ 0\] NULL 00000000 000000 000000 00 0 0 0
\[ 1\] .text PROGBITS 00000000 [[:xdigit:]]+ 000000 00 AX 0 0 16
\[ 2\] .data PROGBITS 00000000 [[:xdigit:]]+ 000000 00 WA 0 0 1
\[ 3\] .bss NOBITS 00000000 [[:xdigit:]]+ 000000 00 WA 0 0 1
\[ 4\] \.xdata1 PROGBITS 00000000 [[:xdigit:]]+ 000001 00 A 0 0 1
\[ 5\] \.xdata2 PROGBITS 00000000 [[:xdigit:]]+ 000004 00 A 0 0 2
\[ 6\] ,xdata3 PROGBITS 00000000 [[:xdigit:]]+ 000008 00 A 0 0 4
\[ 7\] \.xdata,4 PROGBITS 00000000 [[:xdigit:]]+ 000010 00 A 0 0 8
\[ 8\] "\.xdata5" PROGBITS 00000000 [[:xdigit:]]+ 000020 00 A 0 0 16
\[ 9\] \.rela"\.xdata5" RELA 00000000 [[:xdigit:]]+ 000018 0c 17 8 4
\[10\] \.xreal\\1 PROGBITS 00000000 [[:xdigit:]]+ 000008 00 A 0 0 4
\[11\] \.xreal\+2 PROGBITS 00000000 [[:xdigit:]]+ 000010 00 A 0 0 8
\[12\] \.xreal\(3\) PROGBITS 00000000 [[:xdigit:]]+ 000014 00 A 0 0 16
\[13\] \.xreal\[4\] PROGBITS 00000000 [[:xdigit:]]+ 000020 00 A 0 0 16
\[14\] \.xstr<1> PROGBITS 00000000 [[:xdigit:]]+ 000003 00 A 0 0 1
\[15\] \.xstr\{2\} PROGBITS 00000000 [[:xdigit:]]+ 000004 00 A 0 0 1
\[16\] .shstrtab STRTAB 00000000 [[:xdigit:]]+ [[:xdigit:]]+ 00 0 0 1
\[17\] .symtab SYMTAB 00000000 [[:xdigit:]]+ [[:xdigit:]]+ 10 18 15 4
\[18\] .strtab STRTAB 00000000 [[:xdigit:]]+ [[:xdigit:]]+ 00 0 0 1
#pass
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-ok.s
0,0 → 1,272
.text
.proc personality
personality:
br.ret.sptk rp
.endp personality
 
.proc full1
full1:
 
.prologue
.spill 0
.save.g 0x1
nop 0
.save.f 0x1
nop 0
.save.b 0x01
nop 0
.save.g 0x8
nop 0
.save.f 0x8
nop 0
.save.b 0x10
nop 0
.altrp b7
nop 0
.unwabi @svr4, 0
nop 0
 
.body
.spillreg r4, r2
nop 0
.spillreg.p p1, r7, r127
nop 0
.spillsp b1, 0x08
nop 0
.spillsp.p p2, b5, 0x10
nop 0
.spillpsp f2, 0x18
nop 0
.spillpsp.p p4, f5, 0x20
nop 0
.restorereg f16
nop 0
.restorereg.p p8, f31
nop 0
 
.spillreg ar.bsp, r16
nop 0
.spillreg ar.bspstore, r17
nop 0
.spillreg ar.fpsr, r18
nop 0
.spillreg ar.lc, r19
nop 0
.spillreg ar.pfs, r20
nop 0
.spillreg ar.rnat, r21
nop 0
.spillreg ar.unat, r22
nop 0
.spillreg psp, r23
nop 0
.spillreg pr, r24
nop 0
.spillreg rp, r25
nop 0
.spillreg @priunat, r26
nop 0
 
.label_state 1
nop 0
.restore sp
nop.x 0
.copy_state 1
br.ret.sptk rp
 
.personality personality
.handlerdata
data4 -1
data4 0
 
.endp full1
 
.proc full2
full2:
 
.prologue 0xb, r8
.spill 0
.save.gf 0x1, 0x00001
nop 0
nop 0
.save.b 0x11, r32
nop 0
nop 0
.save.gf 0x8, 0x80000
nop 0
nop 0
.spillreg f31, f127
nop 0
.spillreg.p p63, f16, f32
nop 0
.spillsp f5, 0x20
nop 0
.spillsp.p p31, f2, 0x18
nop 0
.spillpsp b5, 0x10
nop 0
.spillpsp.p p15, b1, 0x08
nop 0
.restorereg r7
nop 0
.restorereg.p p7, r4
nop 0
 
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
.body; .prologue; .body; .prologue; .body; .prologue; .body; .prologue
 
.body
.label_state 32
nop 0
.restore sp, 32
nop.x 0
.copy_state 32
br.ret.sptk rp
.endp full2
 
.proc full3
full3:
 
.prologue
.spill 0
.save.g 0x3, r32
nop 0
nop 0
.save.b 0x03, r34
nop 0
nop 0
.save.g 0xc, r124
nop 0
nop 0
.save.b 0x18, r126
nop 0
nop 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
.body
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
nop.x 0
br.ret.sptk rp
.endp full3
 
.proc fframe
fframe:
.prologue
.fframe 0
nop 0
.body
br.ret.sptk rp
.endp fframe
 
.proc vframe
vframe:
.prologue
.vframe r16
nop 0
.save ar.bsp, r17
nop 0
.save ar.bspstore, r18
nop 0
.save ar.fpsr, r19
nop 0
.save ar.lc, r20
nop 0
.save ar.pfs, r21
nop 0
.save ar.rnat, r22
nop 0
.save ar.unat, r23
nop 0
.save pr, r24
nop 0
.save @priunat, r25
nop 0
.save rp, r26
nop 0
.body
br.ret.sptk rp
.endp vframe
 
.proc vframesp
vframesp:
.prologue
.vframesp 0
nop 0
.savesp ar.bsp, 0x08
nop 0
.savesp ar.bspstore, 0x10
nop 0
.savesp ar.fpsr, 0x18
nop 0
.savesp ar.lc, 0x20
nop 0
.savesp ar.pfs, 0x28
nop 0
.savesp ar.rnat, 0x30
nop 0
.savesp ar.unat, 0x38
nop 0
.savesp pr, 0x40
nop 0
.savesp @priunat, 0x48
nop 0
.savesp rp, 0x50
nop 0
.body
br.ret.sptk rp
.endp vframesp
 
.proc psp
psp:
.prologue
.vframesp 0
nop 0
.savepsp ar.bsp, 0x08
nop 0
.savepsp ar.bspstore, 0x10
nop 0
.savepsp ar.fpsr, 0x18
nop 0
.savepsp ar.lc, 0x20
nop 0
.savepsp ar.pfs, 0x28
nop 0
.savepsp ar.rnat, 0x30
nop 0
.savepsp ar.unat, 0x38
nop 0
.savepsp pr, 0x40
nop 0
.savepsp @priunat, 0x48
nop 0
.savepsp rp, 0x50
nop 0
.body
br.ret.sptk rp
.endp psp
 
.proc simple
simple:
.unwentry
br.ret.sptk rp
.endp simple
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-ilp32.d
0,0 → 1,20
#readelf: -S
#name: ia64 unwind section (ilp32)
#as: -milp32
#source: unwind.s
 
There are 9 section headers, starting at offset 0xa0:
 
Section Headers:
\[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al
\[ 0\] NULL 00000000 000000 000000 00 0 0 0
\[ 1\] .text PROGBITS 00000000 000040 000000 00 AX 0 0 16
\[ 2\] .data PROGBITS 00000000 000040 000000 00 WA 0 0 1
\[ 3\] .bss NOBITS 00000000 000040 000000 00 WA 0 0 1
\[ 4\] .IA_64.unwind_inf PROGBITS 00000000 000040 000008 00 A 0 0 8
\[ 5\] .IA_64.unwind IA_64_UNWIND 00000000 000048 000008 00 AL 1 1 8
\[ 6\] .shstrtab STRTAB 00000000 000050 00004d 00 0 0 1
\[ 7\] .symtab SYMTAB 00000000 000208 000060 10 8 6 4
\[ 8\] .strtab STRTAB 00000000 000268 000001 00 0 0 1
Key to Flags:
#...
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-raw-err.l
0,0 → 1,309
.*: Assembler messages:
.*:10: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[BSP\]' \(impliedf\)
.*:9: Warning: This is the location of the conflicting usage
.*:10: Warning: Use of 'mov\.m' violates RAW dependency 'RSE' \(impliedf\)
.*:9: Warning: This is the location of the conflicting usage
.*:15: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[BSPSTORE\]' \(impliedf\)
.*:14: Warning: This is the location of the conflicting usage
.*:15: Warning: Use of 'mov\.m' violates RAW dependency 'RSE' \(impliedf\)
.*:14: Warning: This is the location of the conflicting usage
.*:20: Warning: Use of 'cmpxchg8\.acq' violates RAW dependency 'AR\[CCV\]' \(impliedf\)
.*:19: Warning: This is the location of the conflicting usage
.*:25: Warning: Use of 'mov\.i' violates RAW dependency 'AR\[EC\]' \(impliedf\)
.*:24: Warning: This is the location of the conflicting usage
.*:30: Warning: Use of 'fpcmp\.eq\.s0' violates RAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:29: Warning: This is the location of the conflicting usage
.*:35: Warning: Use of 'fpcmp\.eq\.s1' violates RAW dependency 'AR\[FPSR\]\.sf1\.controls' \(impliedf\)
.*:34: Warning: This is the location of the conflicting usage
.*:40: Warning: Use of 'fpcmp\.eq\.s2' violates RAW dependency 'AR\[FPSR\]\.sf2\.controls' \(impliedf\)
.*:39: Warning: This is the location of the conflicting usage
.*:45: Warning: Use of 'fpcmp\.eq\.s3' violates RAW dependency 'AR\[FPSR\]\.sf3\.controls' \(impliedf\)
.*:44: Warning: This is the location of the conflicting usage
.*:50: Warning: Use of 'fchkf\.s0' violates RAW dependency 'AR\[FPSR\]\.sf0\.flags' \(impliedf\)
.*:49: Warning: This is the location of the conflicting usage
.*:55: Warning: Use of 'fchkf\.s1' violates RAW dependency 'AR\[FPSR\]\.sf1\.flags' \(impliedf\)
.*:54: Warning: This is the location of the conflicting usage
.*:60: Warning: Use of 'fchkf\.s2' violates RAW dependency 'AR\[FPSR\]\.sf2\.flags' \(impliedf\)
.*:59: Warning: This is the location of the conflicting usage
.*:65: Warning: Use of 'fchkf\.s3' violates RAW dependency 'AR\[FPSR\]\.sf3\.flags' \(impliedf\)
.*:64: Warning: This is the location of the conflicting usage
.*:70: Warning: Use of 'fcmp\.eq\.s3' violates RAW dependency 'AR\[FPSR\]\.sf3\.controls' \(impliedf\)
.*:69: Warning: This is the location of the conflicting usage
.*:70: Warning: Use of 'fcmp\.eq\.s3' violates RAW dependency 'AR\[FPSR\]\.traps' \(impliedf\)
.*:69: Warning: This is the location of the conflicting usage
.*:70: Warning: Use of 'fcmp\.eq\.s3' violates RAW dependency 'AR\[FPSR\]\.rv' \(impliedf\)
.*:69: Warning: This is the location of the conflicting usage
.*:70: Warning: Use of 'fcmp\.eq\.s3' violates WAW dependency 'AR\[FPSR\]\.sf3\.flags' \(impliedf\)
.*:69: Warning: This is the location of the conflicting usage
.*:75: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[ITC\]' \(impliedf\)
.*:74: Warning: This is the location of the conflicting usage
.*:80: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[RUC\]' \(impliedf\)
.*:79: Warning: This is the location of the conflicting usage
.*:85: Warning: Use of 'br\.ia\.sptk' violates RAW dependency 'AR\[K%\], % in[ ]*0[ ]+- 7' \(impliedf\), specific resource number is 1
.*:84: Warning: This is the location of the conflicting usage
.*:90: Warning: Use of 'mov\.i' violates RAW dependency 'AR\[LC\]' \(impliedf\)
.*:89: Warning: This is the location of the conflicting usage
.*:95: Warning: Use of 'epc' violates RAW dependency 'AR\[PFS\]' \(impliedf\)
.*:94: Warning: This is the location of the conflicting usage
.*:99: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[RNAT\]' \(impliedf\)
.*:98: Warning: This is the location of the conflicting usage
.*:99: Warning: Use of 'mov\.m' violates RAW dependency 'RSE' \(impliedf\)
.*:98: Warning: This is the location of the conflicting usage
.*:104: Warning: Use of 'mov\.m' violates RAW dependency 'AR\[RSC\]' \(impliedf\)
.*:103: Warning: This is the location of the conflicting usage
.*:109: Warning: Use of 'ld8\.fill' may violate RAW dependency 'AR\[UNAT\]\{%\}, % in[ ]*0[ ]+- 63' \(impliedf\)
.*:108: Warning: This is the location of the conflicting usage
.*:116: Warning: Use of 'mov' violates RAW dependency 'BR%, % in[ ]*0[ ]+- 7' \(impliedf\), specific resource number is 0
.*:115: Warning: This is the location of the conflicting usage
.*:121: Warning: Use of 'fadd' may violate RAW dependency 'CFM' \(impliedf\)
.*:120: Warning: This is the location of the conflicting usage
.*:126: Warning: Use of 'mov' violates RAW dependency 'CR\[CMCV\]' \(data\)
.*:125: Warning: This is the location of the conflicting usage
.*:131: Warning: Use of 'ld8\.s' violates RAW dependency 'CR\[DCR\]' \(data\)
.*:130: Warning: This is the location of the conflicting usage
.*:138: Warning: Use of 'thash' violates RAW dependency 'CR\[GPTA\]' \(data\)
.*:137: Warning: This is the location of the conflicting usage
.*:144: Warning: Use of 'itc\.i' violates RAW dependency 'CR\[IFA\]' \(implied\)
.*:143: Warning: This is the location of the conflicting usage
.*:149: Warning: Use of 'mov' violates RAW dependency 'CR\[IFS\]' \(data\)
.*:148: Warning: This is the location of the conflicting usage
.*:154: Warning: Use of 'mov' violates RAW dependency 'CR\[IHA\]' \(data\)
.*:153: Warning: This is the location of the conflicting usage
.*:159: Warning: Use of 'mov' violates RAW dependency 'CR\[IIB%\], % in[ ]*0[ ]+- 1' \(data\), specific resource number is 26
.*:158: Warning: This is the location of the conflicting usage
.*:163: Warning: Use of 'mov' violates RAW dependency 'CR\[IIB%\], % in[ ]*0[ ]+- 1' \(data\), specific resource number is 27
.*:162: Warning: This is the location of the conflicting usage
.*:168: Warning: Use of 'mov' violates RAW dependency 'CR\[IIM\]' \(data\)
.*:167: Warning: This is the location of the conflicting usage
.*:173: Warning: Use of 'rfi' violates RAW dependency 'CR\[IIP\]' \(implied\)
.*:172: Warning: This is the location of the conflicting usage
.*:178: Warning: Use of 'mov' violates RAW dependency 'CR\[IIPA\]' \(data\)
.*:177: Warning: This is the location of the conflicting usage
.*:183: Warning: Use of 'rfi' violates RAW dependency 'CR\[IPSR\]' \(implied\)
.*:182: Warning: This is the location of the conflicting usage
.*:188: Warning: Use of 'mov' violates RAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(data\), specific resource number is 68
.*:187: Warning: This is the location of the conflicting usage
.*:193: Warning: Use of 'mov' violates RAW dependency 'CR\[ISR\]' \(data\)
.*:192: Warning: This is the location of the conflicting usage
.*:198: Warning: Use of 'itc\.d' violates RAW dependency 'CR\[ITIR\]' \(implied\)
.*:197: Warning: This is the location of the conflicting usage
.*:203: Warning: Use of 'mov' violates RAW dependency 'CR\[ITM\]' \(data\)
.*:202: Warning: This is the location of the conflicting usage
.*:208: Warning: Use of 'mov' violates RAW dependency 'CR\[ITV\]' \(data\)
.*:207: Warning: This is the location of the conflicting usage
.*:215: Warning: Use of 'mov' violates RAW dependency 'CR\[IVA\]' \(instr\)
.*:214: Warning: This is the location of the conflicting usage
.*:220: Warning: Use of 'mov' violates RAW dependency 'CR\[LID\]' \(other\)
.*:219: Warning: This is the location of the conflicting usage
.*:226: Warning: Use of 'mov' violates RAW dependency 'CR\[LRR%\], % in[ ]*0[ ]+- 1' \(data\), specific resource number is 80
.*:225: Warning: This is the location of the conflicting usage
.*:231: Warning: Use of 'mov' violates RAW dependency 'CR\[PMV\]' \(data\)
.*:230: Warning: This is the location of the conflicting usage
.*:236: Warning: Use of 'thash' violates RAW dependency 'CR\[PTA\]' \(data\)
.*:235: Warning: This is the location of the conflicting usage
.*:241: Warning: Use of 'mov' violates RAW dependency 'CR\[TPR\]' \(data\)
.*:240: Warning: This is the location of the conflicting usage
.*:245: Warning: Use of 'mov' violates RAW dependency 'CR\[TPR\]' \(other\)
.*:244: Warning: This is the location of the conflicting usage
.*:251: Warning: Use of 'mov' may violate RAW dependency 'DBR\#' \(impliedf\)
.*:250: Warning: This is the location of the conflicting usage
.*:255: Warning: Use of 'probe\.r' may violate RAW dependency 'DBR\#' \(data\)
.*:254: Warning: This is the location of the conflicting usage
.*:261: Warning: Use of 'fc' violates RAW dependency 'DTC' \(data\)
.*:260: Warning: This is the location of the conflicting usage
.*:265: Warning: Use of 'ptc\.e' violates RAW dependency 'DTC' \(impliedf\)
.*:264: Warning: This is the location of the conflicting usage
.*:265: Warning: Use of 'ptc\.e' violates WAW dependency 'DTC' \(impliedf\)
.*:264: Warning: This is the location of the conflicting usage
.*:265: Warning: Use of 'ptc\.e' violates WAW dependency 'ITC' \(impliedf\)
.*:264: Warning: This is the location of the conflicting usage
.*:276: Warning: Use of 'tak' violates RAW dependency 'DTC' \(data\)
.*:275: Warning: This is the location of the conflicting usage
.*:276: Warning: Use of 'tak' violates RAW dependency 'DTR' \(data\)
.*:275: Warning: This is the location of the conflicting usage
.*:280: Warning: Use of 'tpa' violates RAW dependency 'DTC' \(data\)
.*:279: Warning: This is the location of the conflicting usage
.*:280: Warning: Use of 'tpa' violates RAW dependency 'DTR' \(data\)
.*:279: Warning: This is the location of the conflicting usage
.*:289: Warning: Use of 'mov' violates RAW dependency 'FR%, % in[ ]*2[ ]+- 127' \(impliedf\), specific resource number is 4
.*:288: Warning: This is the location of the conflicting usage
.*:297: Warning: Use of 'mov' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 3
.*:296: Warning: This is the location of the conflicting usage
.*:302: Warning: Use of 'mov' may violate RAW dependency 'IBR\#' \(impliedf\)
.*:301: Warning: This is the location of the conflicting usage
.*:307: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(data\)
.*:306: Warning: This is the location of the conflicting usage
.*:307: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:306: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(impliedf\)
.*:310: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 71
.*:310: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 70
.*:310: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 69
.*:310: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 68
.*:310: Warning: This is the location of the conflicting usage
.*:311: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:310: Warning: This is the location of the conflicting usage
.*:313: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:311: Warning: This is the location of the conflicting usage
.*:313: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:310: Warning: This is the location of the conflicting usage
.*:314: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:311: Warning: This is the location of the conflicting usage
.*:314: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:310: Warning: This is the location of the conflicting usage
.*:314: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(impliedf\)
.*:313: Warning: This is the location of the conflicting usage
.*:314: Warning: Use of 'mov' violates WAW dependency 'CR\[EOI\]' \(other\)
.*:313: Warning: This is the location of the conflicting usage
.*:314: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:313: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'epc' violates RAW dependency 'ITC' \(instr\)
.*:318: Warning: This is the location of the conflicting usage
.*:328: Warning: Use of 'epc' violates RAW dependency 'ITC' \(instr\)
.*:327: Warning: This is the location of the conflicting usage
.*:328: Warning: Use of 'epc' violates RAW dependency 'ITR' \(instr\)
.*:327: Warning: This is the location of the conflicting usage
.*:335: Warning: Use of 'probe\.r' may violate RAW dependency 'PKR\#' \(data\)
.*:334: Warning: This is the location of the conflicting usage
.*:339: Warning: Use of 'mov' may violate RAW dependency 'PKR\#' \(data\)
.*:338: Warning: This is the location of the conflicting usage
.*:339: Warning: Use of 'mov' may violate RAW dependency 'PKR\#' \(impliedf\)
.*:338: Warning: This is the location of the conflicting usage
.*:345: Warning: Use of 'mov' may violate RAW dependency 'PMC\#' \(impliedf\)
.*:344: Warning: This is the location of the conflicting usage
.*:349: Warning: Use of 'mov' may violate RAW dependency 'PMC\#' \(other\)
.*:348: Warning: This is the location of the conflicting usage
.*:355: Warning: Use of 'mov' may violate RAW dependency 'PMD\#' \(impliedf\)
.*:354: Warning: This is the location of the conflicting usage
.*:360: Warning: Use of 'add' may violate RAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:359: Warning: This is the location of the conflicting usage
.*:363: Warning: Use of 'add' may violate RAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 2
.*:362: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.cond\.sptk' may violate RAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 5
.*:365: Warning: This is the location of the conflicting usage
.*:374: Warning: Use of 'add' may violate RAW dependency 'CFM' \(impliedf\)
.*:373: Warning: This is the location of the conflicting usage
.*:374: Warning: Use of 'add' may violate RAW dependency 'PR63' \(impliedf\)
.*:373: Warning: This is the location of the conflicting usage
.*:377: Warning: Use of 'add' may violate RAW dependency 'PR63' \(impliedf\)
.*:376: Warning: This is the location of the conflicting usage
.*:385: Warning: Use of 'ld8' violates RAW dependency 'PSR\.ac' \(implied\)
.*:384: Warning: This is the location of the conflicting usage
.*:390: Warning: Use of 'ld8' violates RAW dependency 'PSR\.be' \(implied\)
.*:389: Warning: This is the location of the conflicting usage
.*:403: Warning: Use of 'st8' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:402: Warning: This is the location of the conflicting usage
.*:406: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:405: Warning: This is the location of the conflicting usage
.*:409: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:408: Warning: This is the location of the conflicting usage
.*:412: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:411: Warning: This is the location of the conflicting usage
.*:415: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:414: Warning: This is the location of the conflicting usage
.*:418: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:417: Warning: This is the location of the conflicting usage
.*:421: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:420: Warning: This is the location of the conflicting usage
.*:424: Warning: Use of 'mov' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:423: Warning: This is the location of the conflicting usage
.*:433: Warning: Use of 'mov' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:432: Warning: This is the location of the conflicting usage
.*:436: Warning: Use of 'mov' violates RAW dependency 'PSR\.cpl' \(implied\)
.*:435: Warning: This is the location of the conflicting usage
.*:442: Warning: Use of 'ld8' violates RAW dependency 'PSR\.ac' \(data\)
.*:441: Warning: This is the location of the conflicting usage
.*:442: Warning: Use of 'ld8' violates RAW dependency 'PSR\.be' \(data\)
.*:441: Warning: This is the location of the conflicting usage
.*:442: Warning: Use of 'ld8' violates RAW dependency 'PSR\.db' \(data\)
.*:441: Warning: This is the location of the conflicting usage
.*:442: Warning: Use of 'ld8' violates RAW dependency 'PSR\.dt' \(data\)
.*:441: Warning: This is the location of the conflicting usage
.*:442: Warning: Use of 'ld8' violates RAW dependency 'PSR\.pk' \(data\)
.*:441: Warning: This is the location of the conflicting usage
.*:450: Warning: Use of 'mov' violates RAW dependency 'PSR\.dfh' \(data\)
.*:449: Warning: This is the location of the conflicting usage
.*:450: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:449: Warning: This is the location of the conflicting usage
.*:456: Warning: Use of 'mov' violates RAW dependency 'PSR\.dfl' \(data\)
.*:455: Warning: This is the location of the conflicting usage
.*:456: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:455: Warning: This is the location of the conflicting usage
.*:462: Warning: Use of 'mov' violates RAW dependency 'PSR\.di' \(impliedf\)
.*:461: Warning: This is the location of the conflicting usage
.*:467: Warning: Use of 'ld8' violates RAW dependency 'PSR\.dt' \(data\)
.*:466: Warning: This is the location of the conflicting usage
.*:473: Warning: Use of 'mov' violates RAW dependency 'PSR\.i' \(impliedf\)
.*:472: Warning: This is the location of the conflicting usage
.*:479: Warning: Use of 'mov' violates RAW dependency 'PSR\.ic' \(impliedf\)
.*:478: Warning: This is the location of the conflicting usage
.*:483: Warning: Use of 'mov' violates RAW dependency 'PSR\.ic' \(data\)
.*:482: Warning: This is the location of the conflicting usage
.*:496: Warning: Use of 'br\.ret\.sptk' violates RAW dependency 'PSR\.lp' \(data\)
.*:495: Warning: This is the location of the conflicting usage
.*:496: Warning: Use of 'br\.ret\.sptk' violates RAW dependency 'PSR\.tb' \(data\)
.*:495: Warning: This is the location of the conflicting usage
.*:502: Warning: Use of 'mov' violates RAW dependency 'PSR\.mfh' \(impliedf\)
.*:501: Warning: This is the location of the conflicting usage
.*:507: Warning: Use of 'mov' violates RAW dependency 'PSR\.mfl' \(impliedf\)
.*:506: Warning: This is the location of the conflicting usage
.*:512: Warning: Use of 'ld8' violates RAW dependency 'PSR\.pk' \(data\)
.*:511: Warning: This is the location of the conflicting usage
.*:515: Warning: Use of 'mov' violates RAW dependency 'PSR\.pk' \(impliedf\)
.*:514: Warning: This is the location of the conflicting usage
.*:520: Warning: Use of 'mov' violates RAW dependency 'PSR\.pp' \(impliedf\)
.*:519: Warning: This is the location of the conflicting usage
.*:526: Warning: Use of 'flushrs' violates RAW dependency 'PSR\.rt' \(data\)
.*:525: Warning: This is the location of the conflicting usage
.*:532: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.si' \(data\)
.*:531: Warning: This is the location of the conflicting usage
.*:535: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.si' \(data\)
.*:531: Warning: This is the location of the conflicting usage
.*:535: Warning: Use of 'mov\.m' violates RAW dependency 'PSR\.si' \(data\)
.*:534: Warning: This is the location of the conflicting usage
.*:543: Warning: Use of 'mov' violates RAW dependency 'PSR\.sp' \(data\)
.*:542: Warning: This is the location of the conflicting usage
.*:546: Warning: Use of 'rum' violates RAW dependency 'PSR\.sp' \(data\)
.*:542: Warning: This is the location of the conflicting usage
.*:546: Warning: Use of 'rum' violates RAW dependency 'PSR\.sp' \(data\)
.*:545: Warning: This is the location of the conflicting usage
.*:555: Warning: Use of 'chk\.s' violates RAW dependency 'PSR\.tb' \(data\)
.*:554: Warning: This is the location of the conflicting usage
.*:560: Warning: Use of 'mov' violates RAW dependency 'PSR\.up' \(impliedf\)
.*:559: Warning: This is the location of the conflicting usage
.*:566: Warning: Use of 'ld8' may violate RAW dependency 'RR\#' \(data\)
.*:565: Warning: This is the location of the conflicting usage
.*:569: Warning: Use of 'mov' may violate RAW dependency 'RR\#' \(impliedf\)
.*:568: Warning: This is the location of the conflicting usage
.*:578: Warning: Use of 'addl' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 2
.*:577: Warning: This is the location of the conflicting usage
.*:582: Warning: Use of 'mov' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 32
.*:581: Warning: This is the location of the conflicting usage
.*:587: Warning: Use of 'add' may violate RAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:586: Warning: This is the location of the conflicting usage
.*:590: Warning: Use of 'add' may violate RAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 22
.*:589: Warning: This is the location of the conflicting usage
.*:593: Warning: Use of 'add' may violate RAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 23
.*:592: Warning: This is the location of the conflicting usage
.*:596: Warning: Use of 'br\.cond\.sptk' may violate RAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 25
.*:595: Warning: This is the location of the conflicting usage
.*:604: Warning: Use of 'adds' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:603: Warning: This is the location of the conflicting usage
.*:607: Warning: Use of 'adds' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:606: Warning: This is the location of the conflicting usage
.*:610: Warning: Use of 'add' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:609: Warning: This is the location of the conflicting usage
.*:613: Warning: Use of 'ld8' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:612: Warning: This is the location of the conflicting usage
.*:613: Warning: Use of 'ld8' violates WAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:612: Warning: This is the location of the conflicting usage
.*:616: Warning: Use of 'ldfd' violates RAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:615: Warning: This is the location of the conflicting usage
.*:616: Warning: Use of 'ldfd' violates WAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 6
.*:615: Warning: This is the location of the conflicting usage
.*:624: Warning: Use of 'ld8' violates RAW dependency 'PSR\.vm' \(implied\)
.*:623: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc-bad.l
0,0 → 1,43
.*: Assembler messages:
.*:[[:digit:]]+: (Error|Warning): .* GPREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF64[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* PLTOFF14 .*
.*:[[:digit:]]+: (Error|Warning): .* PLTOFF32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* FPTR14 .*
.*:[[:digit:]]+: (Error|Warning): .* FPTR22 .*
.*:[[:digit:]]+: (Error|Warning): .* PCREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_FPTR14 .*
.*:[[:digit:]]+: (Error|Warning): .* SEGREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* SEGREL22 .*
.*:[[:digit:]]+: (Error|Warning): .* SEGREL64I .*
.*:[[:digit:]]+: (Error|Warning): .* SECREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* SECREL22 .*
.*:[[:digit:]]+: (Error|Warning): .* SECREL64I .*
.*:[[:digit:]]+: (Error|Warning): .* LTV14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTV22 .*
.*:[[:digit:]]+: (Error|Warning): .* LTV64I .*
.*:[[:digit:]]+: (Error|Warning): .* IPLT14 .*
.*:[[:digit:]]+: (Error|Warning): .* IPLT22 .*
.*:[[:digit:]]+: (Error|Warning): .* IPLT64I .*
.*:[[:digit:]]+: (Error|Warning): .* IPLT32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* IPLT64[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF14X .*
.*:[[:digit:]]+: (Error|Warning): .* TPREL32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64I .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* DTPMOD14 .*
.*:[[:digit:]]+: (Error|Warning): .* DTPMOD22 .*
.*:[[:digit:]]+: (Error|Warning): .* DTPMOD64I .*
.*:[[:digit:]]+: (Error|Warning): .* DTPMOD32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD64I .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL14 .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64I .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL32[LM]SB .*
.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64[LM]SB .*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-err.l
0,0 → 1,35
.*: Assembler messages:
.*:1: Error: .endp outside of procedure
.*:2: Error: .personality outside of procedure
.*:3: Error: .unwentry outside of procedure
.*:4: Error: .unwabi outside of procedure
.*:5: Error: .handlerdata outside of procedure
.*:6: Error: .prologue outside of procedure
.*:7: Error: .body outside of procedure
.*:8: Error: .spillreg outside of procedure
.*:9: Error: .spillreg.p outside of procedure
.*:10: Error: .spillsp outside of procedure
.*:11: Error: .spillsp.p outside of procedure
.*:12: Error: .spillpsp outside of procedure
.*:13: Error: .spillpsp.p outside of procedure
.*:14: Error: .restorereg outside of procedure
.*:15: Error: .restorereg.p outside of procedure
.*:24: Error: .label_state outside of body region
.*:25: Error: .copy_state outside of body region
.*:26: Error: .fframe outside of prologue
.*:27: Error: .vframe outside of prologue
.*:28: Error: .vframesp outside of prologue
.*:29: Error: .spill outside of prologue
.*:30: Error: .restore outside of body region
.*:31: Error: .save outside of prologue
.*:32: Error: .savesp outside of prologue
.*:33: Error: .savepsp outside of prologue
.*:34: Error: .save.g outside of prologue
.*:35: Error: .save.gf outside of prologue
.*:36: Error: .save.f outside of prologue
.*:37: Error: .save.b outside of prologue
.*:38: Error: .altrp outside of prologue
.*:43: Error: .prologue within prologue
.*:51: Error: .body outside of procedure
.*:58: Warning: Initial .prologue.*
.*:65: Warning: Initial .body.*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-m.pl
0,0 → 1,218
print ".text\n\t.type _start,@", "function\n_start:\n\n";
 
@ldhint = ( "", ".nt1", ".nta" );
@ldspec = ( "", ".s", ".a", ".sa", ".c.clr", ".c.nc" );
@sthint = ( "", ".nta" );
 
$i = 0;
 
# Integer Load
 
foreach $s ( "1", "2", "4", "8" ) {
foreach $e (@ldspec, ".bias", ".acq", ".c.clr.acq") {
foreach $l (@ldhint) {
print "\tld${s}${e}${l} r4 = [r5]\n";
print "\tld${s}${e}${l} r4 = [r5], r6\n";
print "\tld${s}${e}${l} r4 = [r5], ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
}
}
 
# Integer Fill
 
for $l (@ldhint) {
print "\tld8.fill${l} r4 = [r5]\n";
print "\tld8.fill${l} r4 = [r5], r6\n";
print "\tld8.fill${l} r4 = [r5], ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
 
# Integer Store
 
foreach $s ("1", "2", "4", "8", "1.rel", "2.rel", "4.rel", "8.rel", "8.spill") {
for $l (@sthint) {
print "\tst${s}${l} [r4] = r5\n";
print "\tst${s}${l} [r4] = r5, ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
}
 
# Floating Point Load
 
foreach $s ( "fs", "fd", "f8", "fe" ) {
foreach $e (@ldspec) {
foreach $l (@ldhint) {
print "\tld${s}${e}${l} f4 = [r5]\n";
print "\tld${s}${e}${l} f4 = [r5], r6\n";
print "\tld${s}${e}${l} f4 = [r5], ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
}
}
 
# Floating Point Fill
 
for $l (@ldhint) {
print "\tldf.fill${l} f4 = [r5]\n";
print "\tldf.fill${l} f4 = [r5], r6\n";
print "\tldf.fill${l} f4 = [r5], ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
 
# Floating Point Store
 
foreach $s ( "fs", "fd", "f8", "fe", "f.spill" ) {
for $l (@sthint) {
print "\tst${s}${l} [r4] = f5\n";
print "\tst${s}${l} [r4] = f5, ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
}
 
# Floating Point Load Pair
 
foreach $s ( "fps", "fpd", "fp8" ) {
foreach $e (@ldspec) {
foreach $l (@ldhint) {
print "\tld${s}${e}${l} f4, f5 = [r5]\n";
print "\tld${s}${e}${l} f4, f5 = [r5], ", ($s eq "fps" ? 8 : 16), "\n";
}
print "\n";
}
}
 
# Line Prefetch
 
@lfhint = ( "", ".nt1", ".nt2", ".nta" );
 
foreach $e ( "", ".excl" ) {
foreach $f ( "", ".fault" ) {
foreach $h (@lfhint) {
print "\tlfetch${f}${e}${h} [r4]\n";
print "\tlfetch${f}${e}${h} [r4], r5\n";
print "\tlfetch${f}${e}${h} [r4], ", $i - 256, "\n";
$i = ($i + 13) % 512;
}
print "\n";
}
}
 
# Compare and Exchange
 
foreach $s ( "1", "2", "4", "8" ) {
foreach $e ( ".acq", ".rel" ) {
foreach $h (@ldhint) {
print "\tcmpxchg${s}${e}${h} r4 = [r5], r6, ar.ccv\n";
}
print "\n";
}
}
 
# Exchange
 
foreach $s ( "1", "2", "4", "8" ) {
foreach $h (@ldhint) {
print "\txchg${s}${h} r4 = [r5], r6\n";
}
print "\n";
}
 
# Fetch and Add
 
$i = 0;
@inc3 = ( -16, -8, -4, -1, 1, 4, 8, 16 );
foreach $s ( "4.acq", "8.acq", "4.rel", "8.rel" ) {
foreach $h (@ldhint) {
print "\tfetchadd${s}${h} r4 = [r5], ", $inc3[$i], "\n";
$i = ($i + 1) % 8;
}
print "\n";
}
 
# Get/Set FR
 
foreach $e ( ".sig", ".exp", ".s", ".d" ) {
print "\tsetf${e} f4 = r5\n";
}
print "\n";
 
foreach $e ( ".sig", ".exp", ".s", ".d" ) {
print "\tgetf${e} r4 = f5\n";
}
print "\n";
 
# Speculation and Advanced Load Checkso
 
print <<END
chk.s.m r4, _start
chk.s f4, _start
chk.a.nc r4, _start
chk.a.clr r4, _start
chk.a.nc f4, _start
chk.a.clr f4, _start
 
invala
fwb
mf
mf.a
srlz.d
srlz.i
sync.i
nop.m 0
nop.i 0
 
{ .mii; alloc r4 = ar.pfs, 2, 10, 16, 16 }
 
{ .mii; flushrs }
{ .mii; loadrs }
 
invala.e r4
invala.e f4
 
fc r4
ptc.e r4
 
break.m 0
break.m 0x1ffff
 
nop.m 0
break.m 0x1ffff
 
probe.r r4 = r5, r6
probe.w r4 = r5, r6
 
probe.r r4 = r5, 0
probe.w r4 = r5, 1
 
probe.r.fault r3, 2
probe.w.fault r3, 3
probe.rw.fault r3, 0
 
itc.d r8
itc.i r9
 
sum 0x1234
rum 0x5aaaaa
ssm 0xffffff
rsm 0x400000
 
ptc.l r4, r5
ptc.g r4, r5
ptc.ga r4, r5
ptr.d r4, r5
ptr.i r4, r5
 
thash r4 = r5
ttag r4 = r5
tpa r4 = r5
tak r4 = r5
 
END
;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-waw-err.l
0,0 → 1,395
.*: Assembler messages:
.*:8: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[BSP\]' \(impliedf\)
.*:7: Warning: This is the location of the conflicting usage
.*:12: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[BSP\]' \(impliedf\)
.*:11: Warning: This is the location of the conflicting usage
.*:12: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[BSPSTORE\]' \(impliedf\)
.*:11: Warning: This is the location of the conflicting usage
.*:12: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[RNAT\]' \(impliedf\)
.*:11: Warning: This is the location of the conflicting usage
.*:12: Warning: Use of 'mov\.m' violates RAW dependency 'RSE' \(impliedf\)
.*:11: Warning: This is the location of the conflicting usage
.*:12: Warning: Use of 'mov\.m' violates WAW dependency 'RSE' \(impliedf\)
.*:11: Warning: This is the location of the conflicting usage
.*:17: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[CCV\]' \(impliedf\)
.*:16: Warning: This is the location of the conflicting usage
.*:22: Warning: Use of 'mov\.i' violates WAW dependency 'AR\[EC\]' \(impliedf\)
.*:21: Warning: This is the location of the conflicting usage
.*:27: Warning: Use of 'fsetc\.s0' violates RAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:26: Warning: This is the location of the conflicting usage
.*:27: Warning: Use of 'fsetc\.s0' violates WAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:26: Warning: This is the location of the conflicting usage
.*:32: Warning: Use of 'fsetc\.s1' violates RAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:31: Warning: This is the location of the conflicting usage
.*:32: Warning: Use of 'fsetc\.s1' violates WAW dependency 'AR\[FPSR\]\.sf1\.controls' \(impliedf\)
.*:31: Warning: This is the location of the conflicting usage
.*:37: Warning: Use of 'fsetc\.s2' violates RAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:36: Warning: This is the location of the conflicting usage
.*:37: Warning: Use of 'fsetc\.s2' violates WAW dependency 'AR\[FPSR\]\.sf2\.controls' \(impliedf\)
.*:36: Warning: This is the location of the conflicting usage
.*:42: Warning: Use of 'fsetc\.s3' violates RAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:41: Warning: This is the location of the conflicting usage
.*:42: Warning: Use of 'fsetc\.s3' violates WAW dependency 'AR\[FPSR\]\.sf3\.controls' \(impliedf\)
.*:41: Warning: This is the location of the conflicting usage
.*:50: Warning: Use of 'fclrf\.s0' violates WAW dependency 'AR\[FPSR\]\.sf0\.flags' \(impliedf\)
.*:49: Warning: This is the location of the conflicting usage
.*:58: Warning: Use of 'fclrf\.s1' violates WAW dependency 'AR\[FPSR\]\.sf1\.flags' \(impliedf\)
.*:57: Warning: This is the location of the conflicting usage
.*:66: Warning: Use of 'fclrf\.s2' violates WAW dependency 'AR\[FPSR\]\.sf2\.flags' \(impliedf\)
.*:65: Warning: This is the location of the conflicting usage
.*:74: Warning: Use of 'fclrf\.s3' violates WAW dependency 'AR\[FPSR\]\.sf3\.flags' \(impliedf\)
.*:73: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf0\.controls' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf1\.controls' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf2\.controls' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf3\.controls' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf0\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf0\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf1\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf1\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf2\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf2\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf3\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.sf3\.flags' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.rv' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:79: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[FPSR\]\.traps' \(impliedf\)
.*:78: Warning: This is the location of the conflicting usage
.*:84: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[ITC\]' \(impliedf\)
.*:83: Warning: This is the location of the conflicting usage
.*:89: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[RUC\]' \(impliedf\)
.*:88: Warning: This is the location of the conflicting usage
.*:94: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[K%\], % in[ ]*0[ ]+- 7' \(impliedf\), specific resource number is 2
.*:93: Warning: This is the location of the conflicting usage
.*:99: Warning: Use of 'mov\.i' violates WAW dependency 'AR\[LC\]' \(impliedf\)
.*:98: Warning: This is the location of the conflicting usage
.*:104: Warning: Use of 'br\.call\.sptk' violates WAW dependency 'AR\[PFS\]' \(impliedf\)
.*:103: Warning: This is the location of the conflicting usage
.*:109: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[RNAT\]' \(impliedf\)
.*:108: Warning: This is the location of the conflicting usage
.*:114: Warning: Use of 'mov\.m' violates WAW dependency 'AR\[RSC\]' \(impliedf\)
.*:113: Warning: This is the location of the conflicting usage
.*:119: Warning: Use of 'st8\.spill' may violate WAW dependency 'AR\[UNAT\]\{%\}, % in[ ]*0[ ]+- 63' \(impliedf\)
.*:118: Warning: This is the location of the conflicting usage
.*:124: Warning: Use of 'mov' violates WAW dependency 'AR%, % in[ ]*48[ ]+- 63, 112-127' \(impliedf\), specific resource number is 48
.*:123: Warning: This is the location of the conflicting usage
.*:129: Warning: Use of 'mov' violates WAW dependency 'BR%, % in[ ]*0[ ]+- 7' \(impliedf\), specific resource number is 1
.*:128: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates RAW dependency 'AR\[EC\]' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates RAW dependency 'CFM' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'AR\[EC\]' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'CFM' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'PR63' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:134: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'PR63' \(impliedf\)
.*:133: Warning: This is the location of the conflicting usage
.*:139: Warning: Use of 'mov' violates WAW dependency 'CR\[CMCV\]' \(impliedf\)
.*:138: Warning: This is the location of the conflicting usage
.*:144: Warning: Use of 'mov' violates WAW dependency 'CR\[DCR\]' \(impliedf\)
.*:143: Warning: This is the location of the conflicting usage
.*:149: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(impliedf\)
.*:148: Warning: This is the location of the conflicting usage
.*:149: Warning: Use of 'mov' violates WAW dependency 'CR\[EOI\]' \(other\)
.*:148: Warning: This is the location of the conflicting usage
.*:149: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:148: Warning: This is the location of the conflicting usage
.*:155: Warning: Use of 'mov' violates WAW dependency 'CR\[GPTA\]' \(impliedf\)
.*:154: Warning: This is the location of the conflicting usage
.*:160: Warning: Use of 'mov' violates WAW dependency 'CR\[IFA\]' \(impliedf\)
.*:159: Warning: This is the location of the conflicting usage
.*:165: Warning: Use of 'cover' violates WAW dependency 'CR\[IFS\]' \(impliedf\)
.*:164: Warning: This is the location of the conflicting usage
.*:170: Warning: Use of 'mov' violates WAW dependency 'CR\[IHA\]' \(impliedf\)
.*:169: Warning: This is the location of the conflicting usage
.*:175: Warning: Use of 'mov' violates WAW dependency 'CR\[IIB%\], % in[ ]*0[ ]+- 1' \(impliedf\), specific resource number is 26
.*:174: Warning: This is the location of the conflicting usage
.*:179: Warning: Use of 'mov' violates WAW dependency 'CR\[IIB%\], % in[ ]*0[ ]+- 1' \(impliedf\), specific resource number is 27
.*:178: Warning: This is the location of the conflicting usage
.*:184: Warning: Use of 'mov' violates WAW dependency 'CR\[IIM\]' \(impliedf\)
.*:183: Warning: This is the location of the conflicting usage
.*:189: Warning: Use of 'mov' violates WAW dependency 'CR\[IIP\]' \(impliedf\)
.*:188: Warning: This is the location of the conflicting usage
.*:194: Warning: Use of 'mov' violates WAW dependency 'CR\[IIPA\]' \(impliedf\)
.*:193: Warning: This is the location of the conflicting usage
.*:199: Warning: Use of 'mov' violates WAW dependency 'CR\[IPSR\]' \(impliedf\)
.*:198: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(impliedf\)
.*:203: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 71
.*:203: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 70
.*:203: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 69
.*:203: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates WAW dependency 'CR\[IRR%\], % in[ ]*0[ ]+- 3' \(impliedf\), specific resource number is 68
.*:203: Warning: This is the location of the conflicting usage
.*:204: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:203: Warning: This is the location of the conflicting usage
.*:209: Warning: Use of 'mov' violates WAW dependency 'CR\[ISR\]' \(impliedf\)
.*:208: Warning: This is the location of the conflicting usage
.*:214: Warning: Use of 'mov' violates WAW dependency 'CR\[ITIR\]' \(impliedf\)
.*:213: Warning: This is the location of the conflicting usage
.*:219: Warning: Use of 'mov' violates WAW dependency 'CR\[ITM\]' \(impliedf\)
.*:218: Warning: This is the location of the conflicting usage
.*:224: Warning: Use of 'mov' violates WAW dependency 'CR\[ITV\]' \(impliedf\)
.*:223: Warning: This is the location of the conflicting usage
.*:229: Warning: Use of 'mov' violates WAW dependency 'CR\[IVA\]' \(impliedf\)
.*:228: Warning: This is the location of the conflicting usage
.*:236: Warning: Use of 'mov' violates WAW dependency 'CR\[LID\]' \(other\)
.*:235: Warning: This is the location of the conflicting usage
.*:244: Warning: Use of 'mov' violates WAW dependency 'CR\[LRR%\], % in[ ]*0[ ]+- 1' \(impliedf\), specific resource number is 80
.*:243: Warning: This is the location of the conflicting usage
.*:249: Warning: Use of 'mov' violates WAW dependency 'CR\[PMV\]' \(impliedf\)
.*:248: Warning: This is the location of the conflicting usage
.*:254: Warning: Use of 'mov' violates WAW dependency 'CR\[PTA\]' \(impliedf\)
.*:253: Warning: This is the location of the conflicting usage
.*:259: Warning: Use of 'mov' violates WAW dependency 'CR\[TPR\]' \(impliedf\)
.*:258: Warning: This is the location of the conflicting usage
.*:264: Warning: Use of 'mov' may violate WAW dependency 'DBR\#' \(impliedf\)
.*:263: Warning: This is the location of the conflicting usage
.*:273: Warning: Use of 'itc\.i' violates RAW dependency 'DTC' \(impliedf\)
.*:272: Warning: This is the location of the conflicting usage
.*:273: Warning: Use of 'itc\.i' violates RAW dependency 'ITC' \(impliedf\)
.*:272: Warning: This is the location of the conflicting usage
.*:273: Warning: Use of 'itc\.i' violates WAW dependency 'DTC' \(impliedf\)
.*:272: Warning: This is the location of the conflicting usage
.*:273: Warning: Use of 'itc\.i' violates WAW dependency 'ITC' \(impliedf\)
.*:272: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates RAW dependency 'DTC' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates RAW dependency 'DTR' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates RAW dependency 'ITC' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates WAW dependency 'DTC' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates WAW dependency 'DTR' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:285: Warning: Use of 'ptr\.d' violates WAW dependency 'ITC' \(impliedf\)
.*:284: Warning: This is the location of the conflicting usage
.*:291: Warning: Use of 'ldfs\.c\.clr' violates WAW dependency 'FR%, % in[ ]*2[ ]+- 127' \(impliedf\), specific resource number is 3
.*:290: Warning: This is the location of the conflicting usage
.*:296: Warning: Use of 'ld8\.c\.clr' violates WAW dependency 'GR%, % in[ ]*1[ ]+- 127' \(impliedf\), specific resource number is 2
.*:295: Warning: This is the location of the conflicting usage
.*:301: Warning: Use of 'mov' may violate WAW dependency 'IBR\#' \(impliedf\)
.*:300: Warning: This is the location of the conflicting usage
.*:306: Warning: Use of 'mov' violates RAW dependency 'InService\*' \(data\)
.*:305: Warning: This is the location of the conflicting usage
.*:306: Warning: Use of 'mov' violates WAW dependency 'InService\*' \(other\)
.*:305: Warning: This is the location of the conflicting usage
.*:312: Warning: Use of 'itc\.i' violates RAW dependency 'DTC' \(impliedf\)
.*:311: Warning: This is the location of the conflicting usage
.*:312: Warning: Use of 'itc\.i' violates RAW dependency 'ITC' \(impliedf\)
.*:311: Warning: This is the location of the conflicting usage
.*:312: Warning: Use of 'itc\.i' violates WAW dependency 'DTC' \(impliedf\)
.*:311: Warning: This is the location of the conflicting usage
.*:312: Warning: Use of 'itc\.i' violates WAW dependency 'ITC' \(impliedf\)
.*:311: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates RAW dependency 'DTC' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates RAW dependency 'ITC' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates RAW dependency 'ITR' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates WAW dependency 'DTC' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates WAW dependency 'ITC' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:319: Warning: Use of 'ptr\.i' violates WAW dependency 'ITR' \(impliedf\)
.*:318: Warning: This is the location of the conflicting usage
.*:331: Warning: Use of 'mov' violates WAW dependency 'PKR\#' \(impliedf\), specific resource number is 1
.*:330: Warning: This is the location of the conflicting usage
.*:336: Warning: Use of 'mov' may violate WAW dependency 'PMC\#' \(impliedf\)
.*:335: Warning: This is the location of the conflicting usage
.*:341: Warning: Use of 'mov' may violate WAW dependency 'PMD\#' \(impliedf\)
.*:340: Warning: This is the location of the conflicting usage
.*:346: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:345: Warning: This is the location of the conflicting usage
.*:346: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:345: Warning: This is the location of the conflicting usage
.*:349: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:348: Warning: This is the location of the conflicting usage
.*:349: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:348: Warning: This is the location of the conflicting usage
.*:352: Warning: Use of 'cmp\.eq\.or' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:351: Warning: This is the location of the conflicting usage
.*:355: Warning: Use of 'cmp\.eq\.and' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 1
.*:354: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates RAW dependency 'AR\[EC\]' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates RAW dependency 'CFM' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'AR\[EC\]' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'CFM' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'PR63' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:366: Warning: Use of 'br\.wtop\.sptk' violates WAW dependency 'PR63' \(impliedf\)
.*:365: Warning: This is the location of the conflicting usage
.*:369: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR63' \(impliedf\)
.*:368: Warning: This is the location of the conflicting usage
.*:369: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR63' \(impliedf\)
.*:368: Warning: This is the location of the conflicting usage
.*:372: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR63' \(impliedf\)
.*:371: Warning: This is the location of the conflicting usage
.*:372: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR63' \(impliedf\)
.*:371: Warning: This is the location of the conflicting usage
.*:375: Warning: Use of 'cmp\.eq\.or' violates WAW dependency 'PR63' \(impliedf\)
.*:374: Warning: This is the location of the conflicting usage
.*:378: Warning: Use of 'cmp\.eq\.and' violates WAW dependency 'PR63' \(impliedf\)
.*:377: Warning: This is the location of the conflicting usage
.*:389: Warning: Use of 'rum' violates WAW dependency 'PSR\.ac' \(impliedf\)
.*:388: Warning: This is the location of the conflicting usage
.*:394: Warning: Use of 'rum' violates WAW dependency 'PSR\.be' \(impliedf\)
.*:393: Warning: This is the location of the conflicting usage
.*:404: Warning: Use of 'br\.ret\.sptk' violates WAW dependency 'PSR\.cpl' \(impliedf\)
.*:403: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.ac' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.be' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.db' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.dfh' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.dfl' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.di' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.dt' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.i' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.ic' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.lp' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.pk' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.pp' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.rt' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.si' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.sp' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.tb' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:410: Warning: Use of 'mov' violates WAW dependency 'PSR\.up' \(impliedf\)
.*:409: Warning: This is the location of the conflicting usage
.*:418: Warning: Use of 'ssm' violates WAW dependency 'PSR\.dfh' \(impliedf\)
.*:417: Warning: This is the location of the conflicting usage
.*:424: Warning: Use of 'ssm' violates WAW dependency 'PSR\.dfl' \(impliedf\)
.*:423: Warning: This is the location of the conflicting usage
.*:430: Warning: Use of 'rsm' violates WAW dependency 'PSR\.di' \(impliedf\)
.*:429: Warning: This is the location of the conflicting usage
.*:435: Warning: Use of 'rsm' violates WAW dependency 'PSR\.dt' \(impliedf\)
.*:434: Warning: This is the location of the conflicting usage
.*:441: Warning: Use of 'ssm' violates WAW dependency 'PSR\.i' \(impliedf\)
.*:440: Warning: This is the location of the conflicting usage
.*:447: Warning: Use of 'ssm' violates WAW dependency 'PSR\.ic' \(impliedf\)
.*:446: Warning: This is the location of the conflicting usage
.*:458: Warning: Use of 'mov' violates RAW dependency 'PSR\.mfh' \(impliedf\)
.*:457: Warning: This is the location of the conflicting usage
.*:461: Warning: Use of 'ssm' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:460: Warning: This is the location of the conflicting usage
.*:461: Warning: Use of 'ssm' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:460: Warning: This is the location of the conflicting usage
.*:464: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:463: Warning: This is the location of the conflicting usage
.*:464: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:463: Warning: This is the location of the conflicting usage
.*:467: Warning: Use of 'rum' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:466: Warning: This is the location of the conflicting usage
.*:467: Warning: Use of 'rum' violates WAW dependency 'PSR\.mfh' \(impliedf\)
.*:466: Warning: This is the location of the conflicting usage
.*:475: Warning: Use of 'mov' violates RAW dependency 'PSR\.mfl' \(impliedf\)
.*:474: Warning: This is the location of the conflicting usage
.*:478: Warning: Use of 'ssm' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:477: Warning: This is the location of the conflicting usage
.*:478: Warning: Use of 'ssm' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:477: Warning: This is the location of the conflicting usage
.*:481: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:480: Warning: This is the location of the conflicting usage
.*:481: Warning: Use of 'mov' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:480: Warning: This is the location of the conflicting usage
.*:484: Warning: Use of 'rum' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:483: Warning: This is the location of the conflicting usage
.*:484: Warning: Use of 'rum' violates WAW dependency 'PSR\.mfl' \(impliedf\)
.*:483: Warning: This is the location of the conflicting usage
.*:492: Warning: Use of 'rsm' violates WAW dependency 'PSR\.pk' \(impliedf\)
.*:491: Warning: This is the location of the conflicting usage
.*:497: Warning: Use of 'rsm' violates WAW dependency 'PSR\.pp' \(impliedf\)
.*:496: Warning: This is the location of the conflicting usage
.*:505: Warning: Use of 'ssm' violates WAW dependency 'PSR\.si' \(impliedf\)
.*:504: Warning: This is the location of the conflicting usage
.*:510: Warning: Use of 'rsm' violates WAW dependency 'PSR\.sp' \(impliedf\)
.*:509: Warning: This is the location of the conflicting usage
.*:519: Warning: Use of 'rsm' violates WAW dependency 'PSR\.up' \(impliedf\)
.*:518: Warning: This is the location of the conflicting usage
.*:522: Warning: Use of 'mov' violates WAW dependency 'PSR\.up' \(impliedf\)
.*:521: Warning: This is the location of the conflicting usage
.*:527: Warning: Use of 'mov' violates WAW dependency 'RR\#' \(impliedf\), specific resource number is 7
.*:526: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 7
.*:549: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 6
.*:549: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 7
.*:549: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 6
.*:549: Warning: This is the location of the conflicting usage
.*:553: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 7
.*:552: Warning: This is the location of the conflicting usage
.*:553: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 7
.*:552: Warning: This is the location of the conflicting usage
.*:553: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR63' \(impliedf\)
.*:552: Warning: This is the location of the conflicting usage
.*:553: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR63' \(impliedf\)
.*:552: Warning: This is the location of the conflicting usage
.*:556: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 6
.*:555: Warning: This is the location of the conflicting usage
.*:556: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR%, % in[ ]*1[ ]+- 15' \(impliedf\), specific resource number is 6
.*:555: Warning: This is the location of the conflicting usage
.*:556: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR63' \(impliedf\)
.*:555: Warning: This is the location of the conflicting usage
.*:556: Warning: Use of 'cmp\.eq\.and\.orcm' violates WAW dependency 'PR63' \(impliedf\)
.*:555: Warning: This is the location of the conflicting usage
.*:561: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:560: Warning: This is the location of the conflicting usage
.*:561: Warning: Use of 'cmp\.eq' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:560: Warning: This is the location of the conflicting usage
.*:564: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:563: Warning: This is the location of the conflicting usage
.*:564: Warning: Use of 'fcmp\.eq' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:563: Warning: This is the location of the conflicting usage
.*:567: Warning: Use of 'cmp\.eq\.or' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:566: Warning: This is the location of the conflicting usage
.*:570: Warning: Use of 'cmp\.eq\.and' violates WAW dependency 'PR%, % in[ ]*16[ ]+- 62' \(impliedf\), specific resource number is 21
.*:569: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/strange.d
0,0 → 1,19
#objdump: -s
#name: ia64 strange
 
.*: +file format .*
 
Contents of section .text:
0000 0c000000 01001000 00020000 00000400 .*
0010 04000000 01000000 00000020 00000400 .*
0020 0c000000 01002000 00020000 00000400 .*
0030 04000000 01000000 00000040 00000400 .*
0040 1c000000 01003000 00020000 00000020 .*
0050 04000000 01000000 00000080 00000400 .*
0060 04000000 01000000 000000a0 00000400 .*
0070 04000000 01000000 000000c0 00000400 .*
0080 04000000 01000000 000000e0 00000400 .*
0090 0e000000 01000000 00020000 01000400 .*
00a0 1d000000 01009000 00020080 00008400 .*
Contents of section .data:
0000 ffffff .*
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-raw-err.s
0,0 → 1,625
//
// Detect RAW violations. Cases taken from DV tables.
// This test is by no means complete but tries to hit the things that are
// likely to be missed.
//
.text
.explicit
// AR[BSP]
mov ar.bspstore = r0
mov r1 = ar.bsp
;;
 
// AR[BSPSTORE]
mov ar.bspstore = r2
mov r3 = ar.bspstore
;;
// AR[CCV]
mov ar.ccv = r4
cmpxchg8.acq r5 = [r6],r7,ar.ccv
;;
// AR[EC]
br.wtop.sptk L
mov r8 = ar.ec
;;
 
// AR[FPSR].sf0.controls
fsetc.s0 0x7f, 0x0f
fpcmp.eq.s0 f2 = f3, f4
;;
 
// AR[FPSR].sf1.controls
fsetc.s1 0x7f, 0x0f
fpcmp.eq.s1 f2 = f3, f4
;;
 
// AR[FPSR].sf2.controls
fsetc.s2 0x7f, 0x0f
fpcmp.eq.s2 f2 = f3, f4
;;
 
// AR[FPSR].sf3.controls
fsetc.s3 0x7f, 0x0f
fpcmp.eq.s3 f2 = f3, f4
;;
 
// AR[FPSR].sf0.flags
fpcmp.eq.s0 f2 = f3, f4
fchkf.s0 L
;;
 
// AR[FPSR].sf1.flags
fpcmp.eq.s1 f2 = f3, f4
fchkf.s1 L
;;
 
// AR[FPSR].sf2.flags
fpcmp.eq.s2 f2 = f3, f4
fchkf.s2 L
;;
 
// AR[FPSR].sf3.flags
fpcmp.eq.s3 f2 = f3, f4
fchkf.s3 L
;;
 
// AR[FPSR].traps/rv
mov ar.fpsr = r0
fcmp.eq.s3 p1, p2 = f5, f6
;;
 
// AR[ITC]
mov ar.itc = r1
mov r2 = ar.itc
;;
 
// AR[RUC]
mov ar.ruc = r1
mov r2 = ar.ruc
;;
 
// AR[K]
mov ar.k1 = r3
br.ia.sptk b0
;;
// AR[LC]
br.cloop.sptk L
mov r4 = ar.lc
;;
// AR[PFS]
mov ar.pfs = r5
epc
 
// AR[RNAT]
mov ar.bspstore = r8
mov r9 = ar.rnat
;;
// AR[RSC]
mov ar.rsc = r10
mov r11 = ar.rnat
;;
// AR[UNAT]
mov ar.unat = r12
ld8.fill r13 = [r14]
;;
// AR%
 
// BR%
mov b0 = r0
mov r2 = b0
;;
// CFM
br.wtop.sptk L
fadd f2 = f1, f32 // read from rotating register region
;;
// CR[CMCV]
mov cr.cmcv = r1
mov r2 = cr.cmcv
;;
 
// CR[DCR]
mov cr.dcr = r3
ld8.s r4 = [r5]
;;
 
// CR[EOI]
// CR[GPTA]
mov cr.gpta = r6
thash r7 = r8
;;
srlz.d
 
// CR[IFA]
mov cr.ifa = r9
itc.i r10
;;
 
// CR[IFS]
mov cr.ifs = r11
mov r12 = cr.ifs
;;
 
// CR[IHA]
mov cr.iha = r13
mov r14 = cr.iha
;;
 
// CR[IIB%]
mov cr.iib0 = r15
mov r16 = cr.iib0
;;
 
mov cr.iib1 = r15
mov r16 = cr.iib1
;;
 
// CR[IIM]
mov cr.iim = r15
mov r16 = cr.iim
;;
 
// CR[IIP]
mov cr.iip = r17
rfi
;;
 
// CR[IIPA]
mov cr.iipa = r19
mov r20 = cr.iipa
;;
 
// CR[IPSR]
mov cr.ipsr = r21
rfi
;;
 
// CR[IRR%]
mov r22 = cr.ivr
mov r23 = cr.irr0
;;
// CR[ISR]
mov cr.isr = r24
mov r25 = cr.isr
;;
// CR[ITIR]
mov cr.itir = r26
itc.d r27
;;
// CR[ITM]
mov cr.itm = r28
mov r29 = cr.itm
;;
// CR[ITV]
mov cr.itv = r0
mov r1 = cr.itv
;;
// CR[IVR] (all writes are implicit in other resource usage)
// CR[IVA]
mov cr.iva = r0
mov r1 = cr.iva
;;
// CR[LID]
mov cr.lid = r0
mov r1 = cr.lid
;;
srlz.d
// CR[LRR%]
mov cr.lrr0 = r0
mov r1 = cr.lrr0
;;
// CR[PMV]
mov cr.pmv = r0
mov r1 = cr.pmv
;;
// CR[PTA]
mov cr.pta = r0
thash r1 = r2
;;
// CR[TPR]
mov cr.tpr = r0
mov r1 = cr.ivr // data
;;
srlz.d
mov cr.tpr = r2
mov psr.l = r3 // other
;;
srlz.d
// DBR#
mov dbr[r0] = r1
mov r2 = dbr[r3]
;;
srlz.d
mov dbr[r4] = r5
probe.r r6 = r7, r8
;;
srlz.d
// DTC
ptc.e r0
fc r1
;;
srlz.d
itr.i itr[r2] = r3
ptc.e r4
;;
// DTC_LIMIT/ITC_LIMIT
ptc.g r0, r1 // NOTE: GAS automatically emits stops after
ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
;; // longer possible in GAS-generated assembly
srlz.d
 
// DTR
itr.d dtr[r0] = r1
tak r2 = r3
;;
srlz.d
ptr.d r4, r5
tpa r6 = r7
;;
srlz.d
// FR%
ldfs.c.clr f2 = [r1]
mov f3 = f2 // no DV here
;;
mov f4 = f5
mov f6 = f4
;;
 
// GR%
ld8.c.clr r1 = [r1] // no DV here
mov r2 = r0
;;
mov r3 = r4
mov r5 = r3
;;
 
// IBR#
mov ibr[r0] = r1
mov r2 = ibr[r3]
;;
 
// InService
mov cr.eoi = r0
mov r1 = cr.ivr
;;
srlz.d
mov r2 = cr.ivr
mov r3 = cr.ivr // several DVs
;;
mov cr.eoi = r4
mov cr.eoi = r5
;;
// ITC
ptc.e r0
epc
;;
srlz.i
;;
// ITC_LIMIT (see DTC_LIMIT)
// ITR
itr.i itr[r0] = r1
epc
;;
srlz.i
;;
// PKR#
mov pkr[r0] = r1
probe.r r2 = r3, r4
;;
srlz.d
mov pkr[r5] = r6
mov r7 = pkr[r8]
;;
srlz.d
// PMC#
mov pmc[r0] = r1
mov r2 = pmc[r3]
;;
srlz.d
mov pmc[r4] = r5
mov r6 = pmd[r7]
;;
srlz.d
// PMD#
mov pmd[r0] = r1
mov r2 = pmd[r3]
;;
// PR%, 1 - 15
cmp.eq p1, p2 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
(p1) add r2 = r3, r4
;;
mov pr = r5, 0xffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
(p2) add r6 = r7, r8
;;
fcmp.eq p5, p6 = f2, f3 // pr-writer-fp/pr-reader-br
(p5) br.cond.sptk b0
;;
cmp.eq p7, p8 = r11, r12
(p7) br.cond.sptk b1 // no DV here
;;
// PR63
br.wtop.sptk L
(p63) add r3 = r1, r2
;;
fcmp.eq p62, p63 = f2, f3
(p63) add r3 = r4, r5
;;
cmp.eq p62, p63 = r6, r7 // no DV here
(p63) br.cond.sptk b0
;;
 
// PSR.ac
rum (1<<3)
ld8 r2 = [r1]
;;
 
// PSR.be
rum (1<<1)
ld8 r2 = [r1]
;;
// PSR.bn
bsw.0
mov r1 = r15 // no DV here, since gr < 16
;;
bsw.1 // GAS automatically emits a stop after bsw.n
mov r1 = r16 // so this conflict is avoided
;;
// PSR.cpl
epc
st8 [r0] = r1
;;
epc
mov r2 = ar.itc
;;
epc
mov ar.itc = r3
;;
epc
mov r2 = ar.ruc
;;
epc
mov ar.ruc = r3
;;
epc
mov ar.rsc = r4
;;
epc
mov ar.k0 = r5
;;
epc
mov r6 = pmd[r7]
;;
epc
mov ar.bsp = r8 // no DV here
;;
epc
mov r9 = ar.bsp // no DV here
;;
epc
mov cr.ifa = r10 // any mov-to/from-cr is a DV
;;
epc
mov r11 = cr.eoi // any mov-to/from-cr is a DV
;;
 
// PSR.da (rfi is the only writer)
// PSR.db (also ac,be,dt,pk)
mov psr.l = r0
ld8 r1 = [r2]
;;
srlz.d
 
// PSR.dd (rfi is the only writer)
// PSR.dfh
mov psr.l = r0
mov f64 = f65
;;
srlz.d
 
// PSR.dfl
mov psr.l = r0
mov f3 = f4
;;
srlz.d
// PSR.di
rsm (1<<22)
mov r1 = psr
;;
 
// PSR.dt
rsm (1<<17)
ld8 r1 = [r1]
;;
// PSR.ed (rfi is the only writer)
// PSR.i
ssm (1<<14)
mov r1 = psr
;;
// PSR.ia (no DV semantics)
// PSR.ic
ssm (1<<13)
mov r1 = psr
;;
srlz.d
rsm (1<<13)
mov r1 = cr.itir
;;
srlz.d
rsm (1<<13)
mov r1 = cr.irr0 // no DV here
;;
srlz.d
 
// PSR.id (rfi is the only writer)
// PSR.is (br.ia and rfi are the only writers)
// PSR.it (rfi is the only writer)
// PSR.lp
mov psr.l = r0
br.ret.sptk b0
;;
 
// PSR.mc (rfi is the only writer)
// PSR.mfh
mov f32 = f33
mov r1 = psr
;;
 
// PSR.mfl
mov f2 = f3
mov r1 = psr
;;
 
// PSR.pk
rsm (1<<15)
ld8 r1 = [r1]
;;
rsm (1<<15)
mov r2 = psr
;;
 
// PSR.pp
rsm (1<<21)
mov r1 = psr
;;
 
// PSR.ri (no DV semantics)
// PSR.rt
mov psr.l = r0
flushrs
;;
srlz.d
 
// PSR.si
rsm (1<<23)
mov r1 = ar.itc
;;
rsm (1<<23)
mov r1 = ar.ruc
;;
ssm (1<<23)
mov r1 = ar.ec // no DV here
;;
 
// PSR.sp
ssm (1<<20)
mov r1 = pmd[r1]
;;
ssm (1<<20)
rum 0xff
;;
ssm (1<<20)
mov r1 = rr[r1]
;;
 
// PSR.ss (rfi is the only writer)
// PSR.tb
mov psr.l = r0
chk.s r0, L
;;
 
// PSR.up
rsm (1<<2)
mov r1 = psr.um
;;
srlz.d
 
// RR#
mov rr[r0] = r1
ld8 r2 = [r0] // data
;;
mov rr[r4] = r5
mov r6 = rr[r7] // impliedf
;;
srlz.d
;;
// RSE
// GR%, additional cases
// addl
mov r2 = r32
addl r3 = 12345, r2 // impliedf, IA64_OPND_R3_2
;;
// postinc
ld8 r2 = [r32], 8
mov r8 = r32 // impliedf
;;
 
// PR%, 16 - 62
cmp.eq p21, p22 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
(p21) add r2 = r3, r4
;;
mov pr = r5, 0x1ffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
(p22) add r6 = r7, r8
;;
mov pr.rot = 0xffff0000 // mov-to-pr-rotreg/pr-reader-nobr-nomovpr
(p23) add r9 = r10, r11
;;
fcmp.eq p25, p26 = f2, f3 // pr-writer-fp/pr-reader-br
(p25) br.cond.sptk b0
;;
cmp.eq p27, p28 = r11, r12
(p27) br.cond.sptk b1 // no DV here
;;
// postinc
st8 [r6] = r8, 16
add r7 = 8, r6 // impliedf
;;
ldfd f14 = [r6], 16
add r7 = 8, r6 // impliedf
;;
stfd [r6] = f14, 16
add r7 = r8, r6
;;
add r6 = 8, r7
ld8 r8 = [r6], 16 // impliedf, WAW
;;
add r6 = 8, r7
ldfd f14 = [r6], 16 // impliedf, WAW
;;
 
L:
br.ret.sptk rp
 
// PSR.vm. New in SDM 2.2
vmsw.0
ld8 r2 = [r1]
;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-entry-err.l
0,0 → 1,3
.*: Assembler messages:
.*:14: Warning: Use of 'mov' .* WAW dependency 'GR%, % in 1 - 127' \(impliedf\) when entry is at label 'L', specific resource number is 5
.*:13: Warning: This is the location of the conflicting usage
/trunk/gnu/binutils/gas/testsuite/gas/ia64/reloc-bad.s
0,0 → 1,62
.psr abi64
.global esym
.section .rodata, "a", @progbits
.text
_start:
adds r1 = @gprel(esym), r0
 
adds r1 = @ltoff(esym), r0
.xdata4 .rodata, @ltoff(esym)
.xdata8 .rodata, @ltoff(esym)
 
adds r1 = @pltoff(esym), r0
.xdata4 .rodata, @pltoff(esym)
 
adds r1 = @fptr(esym), r0
mov r2 = @fptr(esym)
 
adds r1 = @pcrel(esym), r0
 
adds r1 = @ltoff(@fptr(esym)), r0
 
adds r1 = @segrel(esym), r0
mov r2 = @segrel(esym)
movl r3 = @segrel(esym)
 
adds r1 = @secrel(esym), r0
mov r2 = @secrel(esym)
movl r3 = @secrel(esym)
 
adds r1 = @ltv(esym), r0
mov r2 = @ltv(esym)
movl r3 = @ltv(esym)
 
adds r1 = @iplt(esym), r0
mov r2 = @iplt(esym)
movl r3 = @iplt(esym)
.xdata4 .rodata, @iplt(esym)
.xdata8 .rodata, @iplt(esym)
 
adds r1 = @ltoffx(esym), r0
 
.xdata4 .rodata, @tprel(esym)
 
adds r1 = @ltoff(@tprel(esym)), r0
movl r3 = @ltoff(@tprel(esym))
.xdata4 .rodata, @ltoff(@tprel(esym))
.xdata8 .rodata, @ltoff(@tprel(esym))
 
adds r1 = @dtpmod(esym), r0
mov r2 = @dtpmod(esym)
movl r3 = @dtpmod(esym)
.xdata4 .rodata, @dtpmod(esym)
 
adds r1 = @ltoff(@dtpmod(esym)), r0
movl r3 = @ltoff(@dtpmod(esym))
.xdata4 .rodata, @ltoff(@tprel(esym))
.xdata8 .rodata, @ltoff(@tprel(esym))
 
adds r1 = @ltoff(@dtprel(esym)), r0
movl r3 = @ltoff(@dtprel(esym))
.xdata4 .rodata, @ltoff(@dtprel(esym))
.xdata8 .rodata, @ltoff(@dtprel(esym))
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind-err.s
0,0 → 1,67
.endp xyz
.personality personality
.unwentry
.unwabi @svr4, 0
.handlerdata
.prologue
.body
.spillreg r4, r8
.spillreg.p p1, r4, r8
.spillsp r5, 0
.spillsp.p p2, r5, 0
.spillpsp r6, 0
.spillpsp.p p2, r6, 0
.restorereg r4
.restorereg.p p1, r4
 
.proc personality
personality:
.endp personality
 
.proc start
start:
 
.label_state 1
.copy_state 1
.fframe 0
.vframe r0
.vframesp 0
.spill 0
.restore sp
.save rp, r0
.savesp pr, 0
.savepsp ar.fpsr, 0
.save.g 2
.save.gf 2,2
.save.f 2
.save.b 2
.altrp b7
.body
 
 
.prologue
.prologue
.save ar.lc, r31
mov r31 = ar.lc
.body
.body
br.ret.sptk rp
.personality personality
.handlerdata
.body
 
.endp start
 
.proc late_prologue
late_prologue:
nop 0
.prologue
nop 0
.endp late_prologue
 
.proc late_body
late_body:
nop 0
.body
nop 0
.endp late_body
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-waw-err.s
0,0 → 1,581
//
// Detect WAW violations. Cases taken from DV tables.
//
.text
.explicit
// AR[BSP]
mov ar.bsp = r0
mov ar.bsp = r1
;;
// AR[BSPSTORE]
mov ar.bspstore = r2
mov ar.bspstore = r3
;;
// AR[CCV]
mov ar.ccv = r4
mov ar.ccv = r4
;;
// AR[EC]
br.wtop.sptk L
mov ar.ec = r0
;;
 
// AR[FPSR].sf0.controls
mov ar.fpsr = r0
fsetc.s0 0x7f, 0x0f
;;
 
// AR[FPSR].sf1.controls
mov ar.fpsr = r0
fsetc.s1 0x7f, 0x0f
;;
 
// AR[FPSR].sf2.controls
mov ar.fpsr = r0
fsetc.s2 0x7f, 0x0f
;;
 
// AR[FPSR].sf3.controls
mov ar.fpsr = r0
fsetc.s3 0x7f, 0x0f
;;
 
// AR[FPSR].sf0.flags
fcmp.eq.s0 p1, p2 = f3, f4
fcmp.eq.s0 p3, p4 = f3, f4 // no DV here
;;
fcmp.eq.s0 p1, p2 = f3, f4
fclrf.s0
;;
 
// AR[FPSR].sf1.flags
fcmp.eq.s1 p1, p2 = f3, f4
fcmp.eq.s1 p3, p4 = f3, f4 // no DV here
;;
fcmp.eq.s1 p1, p2 = f3, f4
fclrf.s1
;;
 
// AR[FPSR].sf2.flags
fcmp.eq.s2 p1, p2 = f3, f4
fcmp.eq.s2 p3, p4 = f3, f4 // no DV here
;;
fcmp.eq.s2 p1, p2 = f3, f4
fclrf.s2
;;
 
// AR[FPSR].sf3.flags
fcmp.eq.s3 p1, p2 = f3, f4
fcmp.eq.s3 p3, p4 = f3, f4 // no DV here
;;
fcmp.eq.s3 p1, p2 = f3, f4
fclrf.s3
;;
 
// AR[FPSR].traps/rv plus all controls/flags
mov ar.fpsr = r0
mov ar.fpsr = r0
;;
 
// AR[ITC]
mov ar.itc = r1
mov ar.itc = r1
;;
 
// AR[RUC]
mov ar.ruc = r1
mov ar.ruc = r1
;;
 
// AR[K]
mov ar.k2 = r3
mov ar.k2 = r3
;;
// AR[LC]
br.cloop.sptk L
mov ar.lc = r0
;;
// AR[PFS]
mov ar.pfs = r0
br.call.sptk b0 = L
;;
 
// AR[RNAT] (see also AR[BSPSTORE])
mov ar.rnat = r8
mov ar.rnat = r8
;;
// AR[RSC]
mov ar.rsc = r10
mov ar.rsc = r10
;;
// AR[UNAT]
mov ar.unat = r12
st8.spill [r0] = r1
;;
// AR%
mov ar48 = r0
mov ar48 = r0
;;
 
// BR%
mov b1 = r0
mov b1 = r1
;;
// CFM (and others)
br.wtop.sptk L
br.wtop.sptk L
;;
// CR[CMCV]
mov cr.cmcv = r1
mov cr.cmcv = r2
;;
 
// CR[DCR]
mov cr.dcr = r3
mov cr.dcr = r3
;;
 
// CR[EOI] (and InService)
mov cr.eoi = r0
mov cr.eoi = r0
;;
srlz.d
// CR[GPTA]
mov cr.gpta = r6
mov cr.gpta = r7
;;
 
// CR[IFA]
mov cr.ifa = r9
mov cr.ifa = r10
;;
 
// CR[IFS]
mov cr.ifs = r11
cover
;;
 
// CR[IHA]
mov cr.iha = r13
mov cr.iha = r14
;;
 
// CR[IIB%]
mov cr.iib0 = r15
mov cr.iib0 = r16
;;
 
mov cr.iib1 = r15
mov cr.iib1 = r16
;;
 
// CR[IIM]
mov cr.iim = r15
mov cr.iim = r16
;;
 
// CR[IIP]
mov cr.iip = r17
mov cr.iip = r17
;;
 
// CR[IIPA]
mov cr.iipa = r19
mov cr.iipa = r20
;;
 
// CR[IPSR]
mov cr.ipsr = r21
mov cr.ipsr = r22
;;
 
// CR[IRR%] (and others)
mov r2 = cr.ivr
mov r3 = cr.ivr
;;
// CR[ISR]
mov cr.isr = r24
mov cr.isr = r25
;;
// CR[ITIR]
mov cr.itir = r26
mov cr.itir = r27
;;
// CR[ITM]
mov cr.itm = r28
mov cr.itm = r29
;;
// CR[ITV]
mov cr.itv = r0
mov cr.itv = r1
;;
// CR[IVA]
mov cr.iva = r0
mov cr.iva = r1
;;
// CR[IVR] (no explicit writers)
// CR[LID]
mov cr.lid = r0
mov cr.lid = r1
;;
// CR[LRR%]
mov cr.lrr0 = r0
mov cr.lrr1 = r0 // no DV here
;;
mov cr.lrr0 = r0
mov cr.lrr0 = r0
;;
// CR[PMV]
mov cr.pmv = r0
mov cr.pmv = r1
;;
// CR[PTA]
mov cr.pta = r0
mov cr.pta = r1
;;
// CR[TPR]
mov cr.tpr = r0
mov cr.tpr = r1
;;
// DBR#
mov dbr[r1] = r1
mov dbr[r1] = r2
;;
srlz.d
// DTC
ptc.e r0
ptc.e r1 // no DVs here
;;
ptc.e r0 // (and others)
itc.i r0
;;
srlz.d
// DTC_LIMIT
ptc.g r0, r1 // NOTE: GAS automatically emits stops after
ptc.ga r2, r3 // ptc.g/ptc.ga, so this conflict is no
;; // longer possible in GAS-generated assembly
srlz.d
// DTR
itr.d dtr[r0] = r1 // (and others)
ptr.d r2, r3
;;
srlz.d
// FR%
mov f3 = f2
ldfs.c.clr f3 = [r1]
;;
 
// GR%
mov r2 = r0
ld8.c.clr r2 = [r1]
;;
 
// IBR#
mov ibr[r0] = r2
mov ibr[r1] = r2
;;
 
// InService
mov cr.eoi = r0
mov r1 = cr.ivr
;;
srlz.d
// ITC
ptc.e r0
itc.i r1
;;
srlz.i
;;
// ITR
itr.i itr[r0] = r1
ptr.i r2, r3
;;
srlz.i
;;
// PKR#
.reg.val r1, 0x1
.reg.val r2, ~0x1
mov pkr[r1] = r1
mov pkr[r2] = r1 // no DV here
;;
mov pkr[r1] = r1
mov pkr[r1] = r1
;;
// PMC#
mov pmc[r3] = r1
mov pmc[r4] = r1
;;
// PMD#
mov pmd[r3] = r1
mov pmd[r4] = r1
;;
// PR%, 1 - 15
cmp.eq p1, p0 = r0, r1
cmp.eq p1, p0 = r2, r3
;;
fcmp.eq p1, p2 = f2, f3
fcmp.eq p1, p3 = f2, f3
;;
cmp.eq.and p1, p2 = r0, r1
cmp.eq.or p1, p3 = r2, r3
;;
cmp.eq.or p1, p3 = r2, r3
cmp.eq.and p1, p2 = r0, r1
;;
cmp.eq.and p1, p2 = r0, r1
cmp.eq.and p1, p3 = r2, r3 // no DV here
;;
cmp.eq.or p1, p2 = r0, r1
cmp.eq.or p1, p3 = r2, r3 // no DV here
;;
// PR63
br.wtop.sptk L
br.wtop.sptk L
;;
cmp.eq p63, p0 = r0, r1
cmp.eq p63, p0 = r2, r3
;;
fcmp.eq p63, p2 = f2, f3
fcmp.eq p63, p3 = f2, f3
;;
cmp.eq.and p63, p2 = r0, r1
cmp.eq.or p63, p3 = r2, r3
;;
cmp.eq.or p63, p3 = r2, r3
cmp.eq.and p63, p2 = r0, r1
;;
cmp.eq.and p63, p2 = r0, r1
cmp.eq.and p63, p3 = r2, r3 // no DV here
;;
cmp.eq.or p63, p2 = r0, r1
cmp.eq.or p63, p3 = r2, r3 // no DV here
;;
 
// PSR.ac
rum (1<<3)
rum (1<<3)
;;
 
// PSR.be
rum (1<<1)
rum (1<<1)
;;
// PSR.bn
bsw.0 // GAS automatically emits a stop after bsw.n
bsw.0 // so this conflict is avoided
;;
 
// PSR.cpl
epc
br.ret.sptk b0
;;
 
// PSR.da (rfi is the only writer)
// PSR.db (and others)
mov psr.l = r0
mov psr.l = r1
;;
srlz.d
 
// PSR.dd (rfi is the only writer)
// PSR.dfh
ssm (1<<19)
ssm (1<<19)
;;
srlz.d
 
// PSR.dfl
ssm (1<<18)
ssm (1<<18)
;;
srlz.d
// PSR.di
rsm (1<<22)
rsm (1<<22)
;;
 
// PSR.dt
rsm (1<<17)
rsm (1<<17)
;;
// PSR.ed (rfi is the only writer)
// PSR.i
ssm (1<<14)
ssm (1<<14)
;;
// PSR.ia (no DV semantics)
// PSR.ic
ssm (1<<13)
ssm (1<<13)
;;
 
// PSR.id (rfi is the only writer)
// PSR.is (br.ia and rfi are the only writers)
// PSR.it (rfi is the only writer)
// PSR.lp (see PSR.db)
 
// PSR.mc (rfi is the only writer)
// PSR.mfh
mov f32 = f33
mov r10 = psr
;;
ssm (1<<5)
ssm (1<<5)
;;
ssm (1<<5)
mov psr.um = r10
;;
rum (1<<5)
rum (1<<5)
;;
mov f32 = f33
mov f34 = f35 // no DV here
;;
 
// PSR.mfl
mov f2 = f3
mov r10 = psr
;;
ssm (1<<4)
ssm (1<<4)
;;
ssm (1<<4)
mov psr.um = r10
;;
rum (1<<4)
rum (1<<4)
;;
mov f2 = f3
mov f4 = f5 // no DV here
;;
 
// PSR.pk
rsm (1<<15)
rsm (1<<15)
;;
 
// PSR.pp
rsm (1<<21)
rsm (1<<21)
;;
 
// PSR.ri (no DV semantics)
// PSR.rt (see PSR.db)
 
// PSR.si
rsm (1<<23)
ssm (1<<23)
;;
 
// PSR.sp
ssm (1<<20)
rsm (1<<20)
;;
srlz.d
 
// PSR.ss (rfi is the only writer)
// PSR.tb (see PSR.db)
 
// PSR.up
rsm (1<<2)
rsm (1<<2)
;;
rum (1<<2)
mov psr.um = r0
;;
 
// RR#
mov rr[r2] = r1
mov rr[r2] = r3
;;
 
// PR, additional cases (or.andcm and and.orcm interaction)
cmp.eq.or.andcm p6, p7 = 1, r32
cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
;;
cmp.eq.and.orcm p6, p7 = 1, r32
cmp.eq.and.orcm p6, p7 = 5, r36 // no DV here
;;
cmp.eq.or.andcm p63, p7 = 1, r32
cmp.eq.or.andcm p63, p7 = 5, r36 // no DV here
;;
cmp.eq.or.andcm p6, p63 = 1, r32
cmp.eq.or.andcm p6, p63 = 5, r36 // no DV here
;;
cmp.eq.and.orcm p63, p7 = 1, r32
cmp.eq.and.orcm p63, p7 = 5, r36 // no DV here
;;
cmp.eq.and.orcm p6, p63 = 1, r32
cmp.eq.and.orcm p6, p63 = 5, r36 // no DV here
;;
cmp.eq.or.andcm p6, p7 = 1, r32
cmp.eq.and.orcm p6, p7 = 5, r36
;;
cmp.eq.or.andcm p63, p7 = 1, r32
cmp.eq.and.orcm p63, p7 = 5, r36
;;
cmp.eq.or.andcm p6, p63 = 1, r32
cmp.eq.and.orcm p6, p63 = 5, r36
;;
 
// PR%, 16 - 62
cmp.eq p21, p0 = r0, r1
cmp.eq p21, p0 = r2, r3
;;
fcmp.eq p21, p22 = f2, f3
fcmp.eq p21, p23 = f2, f3
;;
cmp.eq.and p21, p22 = r0, r1
cmp.eq.or p21, p23 = r2, r3
;;
cmp.eq.or p21, p23 = r2, r3
cmp.eq.and p21, p22 = r0, r1
;;
cmp.eq.and p21, p22 = r0, r1
cmp.eq.and p21, p23 = r2, r3 // no DV here
;;
cmp.eq.or p21, p22 = r0, r1
cmp.eq.or p21, p23 = r2, r3 // no DV here
;;
 
// RSE
 
L:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-entry-err.s
0,0 → 1,15
//
// Verify DV detection on multiple paths
//
.text
.explicit
// WAW on r4 is avoided on both paths
// WAW on r5 is avoided on path 0 (from top) but not path 1 (from L)
cmp.eq p1, p2 = r1, r2
cmp.eq p3, p4 = r3, r0;;
(p1) mov r4 = 2
L:
(p2) mov r4 = 5
(p3) mov r5 = r7
(p4) mov r5 = r8
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/index.l
0,0 → 1,42
.*: Assembler messages:
.*.s:6: Error: [Ii]ndex must be a general register
.*.s:7: Error: [Ii]ndex must be a general register
.*.s:8: Error: [Ii]ndex must be a general register
.*.s:9: Error: [Ii]ndex must be a general register
.*.s:13: Error: [Ii]ndirect register index must be a general register
.*.s:14: Error: [Ii]ndirect register index must be a general register
.*.s:15: Error: [Ii]ndirect register index must be a general register
.*.s:16: Error: [Ii]ndirect register index must be a general register
.*.s:20: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:21: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:22: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:23: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:24: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:25: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:27: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:28: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:29: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:30: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:31: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:32: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:37: Error: [Rr]otating register index must be a non-negative constant
.*.s:39: Error: [Ii]ndex out of range 0\.\.[[:digit:]]+
.*.s:40: Error: [Rr]otating register index must be a non-negative constant
.*.s:41: Error: [Rr]otating register index must be a non-negative constant
.*.s:42: Error: [Rr]otating register index must be a non-negative constant
.*.s:44: Error: [Ii]ndirect register index must be a general register
.*.s:45: Error: [Ii]ndirect register index must be a general register
.*.s:46: Error: [Ii]ndirect register index must be a general register
.*.s:47: Error: [Ii]ndirect register index must be a general register
.*.s:51: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:52: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:53: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:54: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:55: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:56: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:58: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:59: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:60: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:61: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:62: Error: [Ii]ndex can only be applied to rotating or indirect registers
.*.s:63: Error: [Ii]ndex can only be applied to rotating or indirect registers
/trunk/gnu/binutils/gas/testsuite/gas/ia64/alias-ilp32.d
0,0 → 1,28
#readelf: -Ss
#name: ia64 alias and secalias (ilp32)
#as: -milp32
#source: alias.s
 
There are 8 section headers, starting at offset 0x78:
 
Section Headers:
+\[Nr\] +Name +Type +Addr +Off +Size +ES +Flg +Lk +Inf +Al
+\[ 0\] +NULL +00000000 000000 000000 00 +0 +0 +0
+\[ 1\] .text +PROGBITS +00000000 000040 000000 00 +AX +0 +0 16
+\[ 2\] .data +PROGBITS +00000000 000040 000000 00 +WA +0 +0 +1
+\[ 3\] .bss +NOBITS +00000000 000040 000000 00 +WA +0 +0 +1
+\[ 4\] 1234 +PROGBITS +00000000 000040 000005 00 +WA +0 +0 +1
+\[ 5\] .shstrtab +STRTAB +00000000 000045 000031 00 +0 +0 +1
+\[ 6\] .symtab +SYMTAB +00000000 0001b8 000060 10 +7 +6 +4
+\[ 7\] .strtab +STRTAB +00000000 000218 000006 00 +0 +0 +1
Key to Flags:
#...
 
Symbol table '.symtab' contains 6 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
+0: 00000000 +0 +NOTYPE +LOCAL +DEFAULT +UND
+1: 00000000 +0 +SECTION +LOCAL +DEFAULT +1
+2: 00000000 +0 +SECTION +LOCAL +DEFAULT +2
+3: 00000000 +0 +SECTION +LOCAL +DEFAULT +3
+4: 00000000 +0 +SECTION +LOCAL +DEFAULT +4
+5: 00000000 +0 +NOTYPE +LOCAL +DEFAULT +4 "@D"
/trunk/gnu/binutils/gas/testsuite/gas/ia64/strange.s
0,0 → 1,18
.explicit
.text
_start:
{.mfi
nop.f 1 } nop.x 1
{.mfi
nop.f 2
} nop.x 2
{.mfb
nop.f 3
.xdata1 .data, -1 } .xdata1 .data, -1
nop.x 4 { nop.x 5
} { nop.x 6 }
nop.x 7 {.mmf
nop.f 8
} .xdata1 .data, -1 { .mfb
nop.f 9
br.ret.sptk rp }
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-safe.d
0,0 → 1,21
# as: -xexplicit -mtune=itanium1
# objdump: -d
# name ia64 dv-safe
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <start>:
0: 02 08 04 04 02 38 \[MII\] cmp\.eq p1,p2=r1,r2
6: 30 18 10 08 70 00 cmp\.eq p3,p4=r3,r4;;
c: 00 00 04 00 nop\.i 0x0
10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
16: 00 00 00 02 80 21 nop\.f 0x0
1c: 30 00 00 50 \(p03\) br\.call\.sptk\.few b1=40 <L>
20: 20 20 08 00 00 a4 \[MII\] \(p01\) mov r4=2
26: 40 28 00 00 c8 a1 \(p02\) mov r4=5
2c: 00 30 00 84 \(p03\) mov r5=r6
30: 9d 28 00 0e 00 21 \[MFB\] \(p04\) mov r5=r7
36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 00 20 nop\.b 0x0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-x.d
0,0 → 1,39
#as: -xnone
#objdump: -d
#name: ia64 opc-x
 
.*: +file format .*
 
Disassembly of section .text:
 
0+000 <_start>:
0: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
6: 00 00 00 00 00 00 break\.x 0x0
c: 00 00 00 00
10: 04 00 00 00 01 c0 \[MLX\] nop\.m 0x0
16: ff ff ff ff 7f e0 break\.x 0x3fffffffffffffff
1c: ff ff 01 08
20: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
26: 00 00 00 00 00 00 nop\.x 0x0
2c: 00 00 04 00
30: 04 00 00 00 01 c0 \[MLX\] nop\.m 0x0
36: ff ff ff ff 7f e0 nop\.x 0x3fffffffffffffff
3c: ff ff 05 08
40: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
46: 00 00 00 00 00 80 movl r4=0x0
4c: 00 00 00 60
50: 04 00 00 00 01 c0 \[MLX\] nop\.m 0x0
56: ff ff ff ff 7f 80 movl r4=0xffffffffffffffff
5c: f0 f7 ff 6f
60: 04 00 00 00 01 80 \[MLX\] nop\.m 0x0
66: 90 78 56 34 12 80 movl r4=0x1234567890abcdef
6c: f0 76 6d 66
70: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
76: 00 00 00 00 00 00 hint\.x 0x0
7c: 00 00 06 00
80: 04 00 00 00 01 00 \[MLX\] nop\.m 0x0
86: 00 00 00 00 00 00 hint\.x 0x0
8c: 00 00 06 00
90: 05 00 00 00 01 c0 \[MLX\] nop\.m 0x0
96: ff ff ff ff 7f e0 hint\.x 0x3fffffffffffffff;;
9c: ff ff 07 08
/trunk/gnu/binutils/gas/testsuite/gas/ia64/index.s
0,0 → 1,63
z == zero
zero == r0
 
.text
_start:
ld8 r2 = [ar.lc]
ld8 r3 = [1]
ld8 r4 = [-1]
ld8 r5 = [xyz]
ld8 r6 = [zero]
ld8 r7 = [z]
 
mov r2 = cpuid[ar.lc]
mov r3 = cpuid[1]
mov r4 = cpuid[-1]
mov r5 = cpuid[xyz]
mov r6 = cpuid[zero]
mov r7 = cpuid[z]
 
mov r2 = b0[ar.lc]
mov r3 = b0[1]
mov r4 = b0[-1]
mov r5 = b0[xyz]
mov r6 = b0[zero]
mov r7 = b0[z]
 
mov r2 = xyz[ar.lc]
mov r3 = xyz[1]
mov r4 = xyz[-1]
mov r5 = xyz[xyz]
mov r6 = xyz[zero]
mov r7 = xyz[z]
 
.regstk 0, 8, 0, 8
.rotr reg[8]
 
mov r2 = reg[ar.lc]
mov r3 = reg[1]
mov r4 = reg[-1]
mov r5 = reg[xyz]
mov r6 = reg[zero]
mov r7 = reg[z]
 
mov r2 = cpuid[ar.lc]
mov r3 = cpuid[1]
mov r4 = cpuid[-1]
mov r5 = cpuid[xyz]
mov r6 = cpuid[zero]
mov r7 = cpuid[z]
 
mov r2 = b0[ar.lc]
mov r3 = b0[1]
mov r4 = b0[-1]
mov r5 = b0[xyz]
mov r6 = b0[zero]
mov r7 = b0[z]
 
mov r2 = xyz[ar.lc]
mov r3 = xyz[1]
mov r4 = xyz[-1]
mov r5 = xyz[xyz]
mov r6 = xyz[zero]
mov r7 = xyz[z]
/trunk/gnu/binutils/gas/testsuite/gas/ia64/label.l
0,0 → 1,3
.*: Assembler messages:
.*:12: Error: Label must be first in a bundle
.*:19: Error: Label must be first in a bundle
/trunk/gnu/binutils/gas/testsuite/gas/ia64/pred-rel.s
0,0 → 1,21
// Make sure all forms of .pred.rel are accepted
_start:
.pred.rel "mutex", p1, p2
.pred.rel "imply", p2, p3
.pred.rel "clear", p1, p2, p3
 
.pred.rel "mutex" p1, p2
.pred.rel "imply" p2, p3
.pred.rel "clear" p1, p2, p3
 
.pred.rel.mutex p1, p2
.pred.rel.imply p2, p3
.pred.rel.clear p1, p2, p3
 
.pred.rel @mutex, p1, p2
.pred.rel @imply, p2, p3
.pred.rel @clear, p1, p2, p3
 
.pred.rel @mutex p1, p2
.pred.rel @imply p2, p3
.pred.rel @clear p1, p2, p3
/trunk/gnu/binutils/gas/testsuite/gas/ia64/label.s
0,0 → 1,26
.explicit
start:
{.mii
label0:
nop 0
nop 0
nop 0
}
{.mii
nop 0
label1:
nop 0
nop 0
}
{.mii
nop 0
nop 0
label2:
nop 0
}
{.mii
nop 0
nop 0
nop 0
label3:
}
/trunk/gnu/binutils/gas/testsuite/gas/ia64/tls.d
0,0 → 1,54
#as: -xnone -mtune=itanium1
#objdump: -dr
#name: ia64 tls
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+000 <foo>:
0: 0d 20 21 0a 80 05 \[MFI\] alloc r36=ar\.pfs,8,5,0
2: LTOFF_TPREL22 x
6: 00 00 00 02 00 00 nop\.f 0x0
c: 04 08 00 90 addl r32=0,r1;;
10: 0b 00 01 40 18 10 \[MMI\] ld8 r32=\[r32\];;
16: 10 02 35 00 40 00 add r33=r32,r13
1c: 00 00 04 00 nop\.i 0x0;;
20: 0b 10 00 1a 00 21 \[MMI\] mov r2=r13;;
21: TPREL22 y
26: 10 02 08 00 48 00 addl r33=0,r2
2c: 00 00 04 00 nop\.i 0x0;;
30: 01 00 01 02 00 21 \[MII\] mov r32=r1
31: LTOFF_DTPMOD22 z
32: LTOFF_DTPREL22 z
36: 50 02 04 00 48 c0 addl r37=0,r1
3c: 04 08 00 90 addl r38=0,r1;;
40: 19 28 01 4a 18 10 \[MMB\] ld8 r37=\[r37\]
42: PCREL21B __tls_get_addr
46: 60 02 98 30 20 00 ld8 r38=\[r38\]
4c: 08 00 00 50 br\.call\.sptk\.many b0=40 <foo\+0x40>;;
50: 0b 08 00 40 00 21 \[MMI\] mov r1=r32;;
51: LTOFF_DTPMOD22 a
52: DTPREL22 a
56: 50 02 04 00 48 c0 addl r37=0,r1
5c: 04 00 00 90 mov r38=0;;
60: 1d 28 01 4a 18 10 \[MFB\] ld8 r37=\[r37\]
62: PCREL21B __tls_get_addr
66: 00 00 00 02 00 00 nop\.f 0x0
6c: 08 00 00 50 br\.call\.sptk\.many b0=60 <foo\+0x60>;;
70: 0b 08 00 40 00 21 \[MMI\] mov r1=r32;;
71: LTOFF_DTPMOD22 b
76: 50 02 04 00 48 c0 addl r37=0,r1
7c: 04 00 00 84 mov r38=r0;;
80: 1d 28 01 4a 18 10 \[MFB\] ld8 r37=\[r37\]
82: PCREL21B __tls_get_addr
86: 00 00 00 02 00 00 nop\.f 0x0
8c: 08 00 00 50 br\.call\.sptk\.many b0=80 <foo\+0x80>;;
90: 02 08 00 40 00 21 \[MII\] mov r1=r32
92: DTPREL22 b
96: 20 00 20 00 42 20 mov r2=r8;;
9c: 04 10 00 90 addl r33=0,r2
a0: 1d 10 01 04 00 24 \[MFB\] addl r34=0,r2
a0: DTPREL22 c
a6: 00 00 00 02 00 80 nop\.f 0x0
ac: 08 00 84 00 br\.ret\.sptk\.many b0;;
/trunk/gnu/binutils/gas/testsuite/gas/ia64/dv-safe.s
0,0 → 1,19
//
// Test predicate safety across calls
//
.text
start:
// user annotation
.pred.safe_across_calls p1-p4
.pred.safe_across_calls p1,p2,p3,p4
.pred.safe_across_calls p1-p2,p3-p4
.pred.safe_across_calls p1-p3,p4
cmp.eq p1, p2 = r1, r2
cmp.eq p3, p4 = r3, r4 ;;
(p3) br.call.sptk b1 = L
(p1) mov r4 = 2
(p2) mov r4 = 5
(p3) mov r5 = r6
(p4) mov r5 = r7
L:
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind.d
0,0 → 1,28
#readelf: -S
#name: ia64 unwind section
 
There are 9 section headers, starting at offset 0xa0:
 
Section Headers:
\[Nr\] Name Type Address Offset
Size EntSize Flags Link Info Align
\[ 0\] NULL 0000000000000000 00000000
0000000000000000 0000000000000000 0 0 0
\[ 1\] \.text PROGBITS 0000000000000000 00000040
0000000000000000 0000000000000000 AX 0 0 16
\[ 2\] \.data PROGBITS 0000000000000000 00000040
0000000000000000 0000000000000000 WA 0 0 1
\[ 3\] \.bss NOBITS 0000000000000000 00000040
0000000000000000 0000000000000000 WA 0 0 1
\[ 4\] \.IA_64\.unwind_inf PROGBITS 0000000000000000 00000040
0000000000000008 0000000000000000 A 0 0 8
\[ 5\] \.IA_64\.unwind IA_64_UNWIND 0000000000000000 00000048
0000000000000008 0000000000000000 AL 1 1 8
\[ 6\] \.shstrtab STRTAB 0000000000000000 00000050
000000000000004d 0000000000000000 0 0 1
\[ 7\] \.symtab SYMTAB 0000000000000000 000002e0
0000000000000090 0000000000000018 8 6 8
\[ 8\] \.strtab STRTAB 0000000000000000 00000370
0000000000000001 0000000000000000 0 0 1
Key to Flags:
#...
/trunk/gnu/binutils/gas/testsuite/gas/ia64/opc-x.s
0,0 → 1,19
.text
.type _start,@function
_start:
 
break.x 0
break.x 0x3fffffffffffffff
 
nop.x 0
nop.x 0x3fffffffffffffff
 
movl r4 = 0
movl r4 = 0xffffffffffffffff
movl r4 = 0x1234567890abcdef
 
# instructions added by SDM2.1:
 
hint.x 0
hint.x @pause
hint.x 0x3fffffffffffffff
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-4.d
0,0 → 1,11
# objdump: -r
# name: ia64 ltoff22x-4
 
.*: +file format .*
 
RELOCATION RECORDS FOR \[\.text\]:
OFFSET[ ]+TYPE[ ]+VALUE
0+000 LTOFF22X foo
0+010 LDXMOV foo
 
 
/trunk/gnu/binutils/gas/testsuite/gas/ia64/radix.l
0,0 → 1,4
.*: Assembler messages:
.*:1: Error: Radix .a. .*invalid
.*:4: Error: Radix .cc. .*invalid
.*:5: Error: Radix .Z. .*invalid
/trunk/gnu/binutils/gas/testsuite/gas/ia64/tls.s
0,0 → 1,64
.section ".tdata", "awT", @progbits
.align 16
.global x#, y#, z#, a#, b#, c#
.protected a#, b#, c#
.type x#,@object
.size x#,4
x: data4 1
.type y#,@object
.size y#,4
y: data4 2
.type z#,@object
.size z#,4
z: data4 3
.align 8
.type a#,@object
.size a#,8
a: data8 4
.type b#,@object
.size b#,8
b: data8 5
.type c#,@object
.size c#,1
c: data1 6
 
.text
.align 16
.global foo#
.proc foo#
foo:
.prologue
alloc r36 = ar.pfs, 0, 5, 3, 0
.body
addl loc0 = @ltoff(@tprel(x)), gp;;
ld8 loc0 = [loc0];;
add loc1 = loc0, r13;;
 
mov r2 = r13;;
addl loc1 = @tprel(y), r2;;
 
mov loc0 = gp
addl out0 = @ltoff(@dtpmod(z)), gp
addl out1 = @ltoff(@dtprel(z)), gp;;
ld8 out0 = [out0]
ld8 out1 = [out1]
br.call.sptk.many b0 = __tls_get_addr;;
mov gp = loc0;;
 
addl out0 = @ltoff(@dtpmod(a)), gp
addl out1 = @dtprel(a), r0;;
ld8 out0 = [out0]
br.call.sptk.many b0 = __tls_get_addr;;
mov gp = loc0;;
 
addl out0 = @ltoff(@dtpmod(b)), gp
mov out1 = r0;;
ld8 out0 = [out0]
br.call.sptk.many b0 = __tls_get_addr;;
mov gp = loc0
mov r2 = ret0;;
addl loc1 = @dtprel(b), r2
addl loc2 = @dtprel(c), r2
 
br.ret.sptk.many b0
.endp foo#
/trunk/gnu/binutils/gas/testsuite/gas/ia64/nop_x.d
0,0 → 1,11
# objdump: -d
# name: ia64 nop.x pseudo
 
.*: +file format .*
 
Disassembly of section \.text:
 
0+0 <_start>:
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+\[MLX][[:space:]]+nop.m 0x0
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+nop.x 0x0;;
[[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+
/trunk/gnu/binutils/gas/testsuite/gas/ia64/unwind.s
0,0 → 1,4
.section .IA_64.unwind_info, "a", "progbits"
data8 1234
.section .IA_64.unwind, "ao", "unwind"
data8 1234
/trunk/gnu/binutils/gas/testsuite/gas/ia64/radix.s
0,0 → 1,5
.radix a
.radix c
.radix C#
.radix cc
.radix Z
/trunk/gnu/binutils/gas/testsuite/gas/ia64/ltoff22x-4.s
0,0 → 1,13
.text
addl r3 = @ltoffx(foo#), gp
nop.i 0
nop.i 0
ld8.mov r3 = [r3], foo#
nop.i 0
nop.i 0
.global foo#
foo# = bar#
.global bar#
.data
bar:
data4 0

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