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URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

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    /open_hitter/trunk
    from Rev 9 to Rev 10
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Rev 9 → Rev 10

/bench/vhdl/hitter_sim.vhd File deleted
/bench/vhdl/parse_price.vhd File deleted
/bench/vhdl/parse_price_sim.vhd File deleted
/bench/vhdl/build.sh
1,10 → 1,10
#!/bin/bash
 
# analysis
ghdl -a parse_price.vhd
ghdl -a parse_price_sim.vhd
ghdl -a ../../rtl/vhdl/parse_price.vhd
ghdl -a ../../sim/rtl_sim/src/parse_price_sim.vhd
ghdl -a parse_price_wrapper.vhd
ghdl -a hitter_sim.vhd
ghdl -a ../../sim/rtl_sim/src/hitter_sim.vhd
ghdl -a hitter_wrapper.vhd
 
# elaboration & run
/rtl/vhdl/parse_price.vhd
0,0 → 1,125
--////////////////////////////////////////////////////////////////////
--// ////
--// parse_price.vhd ////
--// ////
--// This file is part of the open_hitter opencores effort. ////
--// <http://www.opencores.org/cores/open_hitter/> ////
--// ////
--// Module Description: ////
--// Byte stream input, open hitter price output ////
--// ////
--// To Do: ////
--// #LOTS ////
--// ////
--// Author(s): ////
--// - Stephen Hawes ////
--// ////
--////////////////////////////////////////////////////////////////////
--// ////
--// Copyright (C) 2015 Stephen Hawes and OPENCORES.ORG ////
--// ////
--// This source file may be used and distributed without ////
--// restriction provided that this copyright statement is not ////
--// removed from the file and that any derivative work contains ////
--// the original copyright notice and the associated disclaimer. ////
--// ////
--// This source file is free software; you can redistribute it ////
--// and/or modify it under the terms of the GNU Lesser General ////
--// Public License as published by the Free Software Foundation; ////
--// either version 2.1 of the License, or (at your option) any ////
--// later version. ////
--// ////
--// This source is distributed in the hope that it will be ////
--// useful, but WITHOUT ANY WARRANTY; without even the implied ////
--// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
--// PURPOSE. See the GNU Lesser General Public License for more ////
--// details. ////
--// ////
--// You should have received a copy of the GNU Lesser General ////
--// Public License along with this source; if not, download it ////
--// from <http://www.opencores.org/lgpl.shtml> ////
--// ////
--////////////////////////////////////////////////////////////////////
--//
--// \$Id\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
--// CVS Revision History
--//
--// \$Log\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
library ieee;
use ieee.std_logic_1164.all;
 
entity parse_price is
port (
RX_CLK: in std_logic;
in_byte: in std_logic_vector(7 downto 0);
byte_reset: in std_logic;
byte_ready: in std_logic;
price_ready: out std_logic;
-- pxdata: out price_packet
px_type: out std_logic_vector(4 downto 0);
buy_sell: out std_logic_vector(2 downto 0); -- 111 buy, 000 sell
px: out std_logic_vector(15 downto 0); -- price
qty: out std_logic_vector(15 downto 0); -- quantity
sec: out std_logic_vector(55 downto 0); -- 7x 8bits securities identifier
id: out std_logic_vector(15 downto 0) -- unique/identifier/counter
);
end parse_price;
 
architecture parse_price_implementation of parse_price is
signal infield: std_logic_vector(55 downto 0);
signal pos: integer range 0 to 14 := 14;
begin
parse: process (RX_CLK) is
begin
if rising_edge(RX_CLK) then
case pos is
when 0 =>
px_type <= in_byte(7 downto 3);
buy_sell <= in_byte(2 downto 0);
when 2 =>
px(15 downto 8) <= infield(7 downto 0);
px(7 downto 0) <= in_byte;
when 4 =>
qty(15 downto 8) <= infield(7 downto 0);
qty(7 downto 0) <= in_byte;
when 11 =>
sec(55 downto 8) <= infield(47 downto 0);
sec(7 downto 0) <= in_byte;
when 13 =>
id(15 downto 8) <= infield(7 downto 0);
id(7 downto 0) <= in_byte;
price_ready <= std_logic'('1');
when others => null;
end case;
if (byte_reset = '1') then
pos <= 0;
elsif (pos = 14) then
pos <= 14;
elsif (byte_ready = '1') then
pos <= pos+1;
else
pos <= pos;
end if;
 
infield(55 downto 8) <= infield(47 downto 0);
infield(7 downto 0) <= in_byte;
 
end if;
end process parse;
 
end parse_price_implementation;
 
-- 2008: can make price packet generic, eg;
-- generic ( type price_packet );
-- type price_packet is record
-- px_type: std_logic_vector(4 downto 0);
-- buy_sell: std_logic_vector(2 downto 0); -- 111 buy, 000 sell
-- px: std_logic_vector(15 downto 0); -- price
-- qty: std_logic_vector(15 downto 0); -- quantity
-- sec: std_logic_vector(55 downto 0); -- 7x 8bits securities identifier
-- id: std_logic_vector(15 downto 0); -- unique/identifier/counter
-- end record price_packet;
 
/sim/rtl_sim/src/parse_price_sim.vhd
0,0 → 1,147
--////////////////////////////////////////////////////////////////////
--// ////
--// parse_price_sim.vhd ////
--// ////
--// This file is part of the open_hitter opencores effort. ////
--// <http://www.opencores.org/cores/open_hitter/> ////
--// ////
--// Module Description: ////
--// Simulation program (synthesizable) ////
--// Unit test for parse_price.vhd ////
--// ////
--// To Do: ////
--// #LOTS ////
--// ////
--// Author(s): ////
--// - Stephen Hawes ////
--// ////
--////////////////////////////////////////////////////////////////////
--// ////
--// Copyright (C) 2015 Stephen Hawes and OPENCORES.ORG ////
--// ////
--// This source file may be used and distributed without ////
--// restriction provided that this copyright statement is not ////
--// removed from the file and that any derivative work contains ////
--// the original copyright notice and the associated disclaimer. ////
--// ////
--// This source file is free software; you can redistribute it ////
--// and/or modify it under the terms of the GNU Lesser General ////
--// Public License as published by the Free Software Foundation; ////
--// either version 2.1 of the License, or (at your option) any ////
--// later version. ////
--// ////
--// This source is distributed in the hope that it will be ////
--// useful, but WITHOUT ANY WARRANTY; without even the implied ////
--// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
--// PURPOSE. See the GNU Lesser General Public License for more ////
--// details. ////
--// ////
--// You should have received a copy of the GNU Lesser General ////
--// Public License along with this source; if not, download it ////
--// from <http://www.opencores.org/lgpl.shtml> ////
--// ////
--////////////////////////////////////////////////////////////////////
--//
--// \$Id\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
--// CVS Revision History
--//
--// \$Log\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
library ieee;
use ieee.std_logic_1164.all;
 
entity parse_price_sim is
port (
RX_CLK: in std_logic;
restart: in std_logic;
processing: out std_logic;
result_is_ok: out std_logic
);
end parse_price_sim;
architecture behav of parse_price_sim is
component parse_price
port (
RX_CLK: in std_logic;
in_byte: in std_logic_vector(7 downto 0);
byte_reset: in std_logic;
byte_ready: in std_logic;
price_ready: out std_logic;
-- pxdata: out price_packet
px_type: out std_logic_vector(4 downto 0);
buy_sell: out std_logic_vector(2 downto 0); -- 111 buy, 000 sell
px: out std_logic_vector(15 downto 0); -- price
qty: out std_logic_vector(15 downto 0); -- quantity
sec: out std_logic_vector(55 downto 0); -- 7x 8bits securities identifier
id: out std_logic_vector(15 downto 0) -- unique/identifier/counter
);
end component;
-- Specifies which entity is bound with the component.
for parse_price_0: parse_price use entity work.parse_price;
signal in_byte: std_logic_vector(7 downto 0);
signal byte_reset: std_logic;
signal byte_ready: std_logic;
signal price_ready: std_logic;
-- pxdata: price_packet
signal px_type: std_logic_vector(4 downto 0);
signal buy_sell: std_logic_vector(2 downto 0); -- 111 buy, 000 sell
signal px: std_logic_vector(15 downto 0); -- price
signal qty: std_logic_vector(15 downto 0); -- quantity
signal sec: std_logic_vector(55 downto 0); -- 7x 8bits securities identifier
signal id: std_logic_vector(15 downto 0); -- unique/identifier/counter
signal pos: integer;
begin
-- Component instantiation.
parse_price_0: parse_price port map (
RX_CLK => RX_CLK,
in_byte => in_byte,
byte_reset => byte_reset,
byte_ready => byte_ready,
price_ready => price_ready,
-- price_packet
px_type => px_type,
buy_sell => buy_sell,
px => px,
qty => qty,
sec => sec,
id => id
);
process (RX_CLK) is
constant pkt : std_logic_vector(111 downto 0) := X"081234567857484154534543C078";
begin
if rising_edge(RX_CLK) then
if (px_type = B"00001") and (buy_sell = B"000") and (px = B"00010010_00110100") -- 081234
and (qty = B"01010110_01111000") -- 5678
and (sec = B"01010111_01001000_01000001_01010100_01010011_01000101_01000011") -- 57484154534543
and (id = B"11000000_01111000") -- C078
then
result_is_ok <= '1';
processing <= '0';
else
result_is_ok <= '0';
end if;
 
if ((pos > -1) and (pos < 14)) then
in_byte <= pkt(8*pos+7 downto 8*pos);
byte_reset <= '0';
byte_ready <= '1';
else
byte_ready <= '0';
end if;
 
if (pos > -1) then
pos <= pos -1;
end if;
if (restart = '1') then
byte_reset <= '1';
processing <= '1';
pos <= 15;
end if;
 
end if;
end process;
 
 
end behav;
/sim/rtl_sim/src/hitter_sim.vhd
0,0 → 1,109
--////////////////////////////////////////////////////////////////////
--// ////
--// hitter_sim.vhd ////
--// ////
--// This file is part of the open_hitter opencores effort. ////
--// <http://www.opencores.org/cores/open_hitter/> ////
--// ////
--// Module Description: ////
--// Synthesizable simulation class for the class 'hitter' ////
--// * translates button actions/results onto NSEW buttons ////
--// and NSEW LEDs ////
--// * target env: Xilinx Virtex 6 / ML605 ////
--// ////
--// To Do: ////
--// #LOTS ////
--// ////
--// Author(s): ////
--// - Stephen Hawes ////
--// ////
--////////////////////////////////////////////////////////////////////
--// ////
--// Copyright (C) 2015 Stephen Hawes and OPENCORES.ORG ////
--// ////
--// This source file may be used and distributed without ////
--// restriction provided that this copyright statement is not ////
--// removed from the file and that any derivative work contains ////
--// the original copyright notice and the associated disclaimer. ////
--// ////
--// This source file is free software; you can redistribute it ////
--// and/or modify it under the terms of the GNU Lesser General ////
--// Public License as published by the Free Software Foundation; ////
--// either version 2.1 of the License, or (at your option) any ////
--// later version. ////
--// ////
--// This source is distributed in the hope that it will be ////
--// useful, but WITHOUT ANY WARRANTY; without even the implied ////
--// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
--// PURPOSE. See the GNU Lesser General Public License for more ////
--// details. ////
--// ////
--// You should have received a copy of the GNU Lesser General ////
--// Public License along with this source; if not, download it ////
--// from <http://www.opencores.org/lgpl.shtml> ////
--// ////
--////////////////////////////////////////////////////////////////////
--//
--// \$Id\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
--// CVS Revision History
--//
--// \$Log\$ TAKE OUT THE \'s and this comment in order to get this to work
--//
library ieee;
use ieee.std_logic_1164.all;
 
entity hitter_sim is
port (
RX_CLK: in std_logic;
PUSH_BUTTONS_5BITS_TRI_I: in std_logic_vector(4 downto 0);
LEDS_POSITIONS_TRI_O: out std_logic_vector(4 downto 0)
);
end hitter_sim;
 
architecture implementation of hitter_sim is
component parse_price_sim
port (
RX_CLK: in std_logic;
restart: in std_logic;
processing: out std_logic;
result_is_ok: out std_logic
);
end component;
for parse_price_sim_0: parse_price_sim use entity work.parse_price_sim;
--signal RX_CLK: std_logic;
signal restart: std_logic;
signal processing: std_logic;
signal result_is_ok: std_logic;
--
signal alight: std_logic := '0';
signal pos: integer := 0;
begin
parse_price_sim_0: parse_price_sim port map (
RX_CLK => RX_CLK,
restart => restart,
processing => processing,
result_is_ok => result_is_ok
);
--
flasher: process (RX_CLK) is
begin
if rising_edge(RX_CLK) then
if (pos < 4) then -- ghdl flash
-- if (pos < 62500000) then -- 125Mhz timing / 0.5s
pos <= pos + 1;
else
alight <= not alight;
pos <= 0;
end if;
end if;
end process flasher;
 
LEDS_POSITIONS_TRI_O(0) <= alight;
LEDS_POSITIONS_TRI_O(1) <= result_is_ok;
LEDS_POSITIONS_TRI_O(2) <= result_is_ok;
LEDS_POSITIONS_TRI_O(3) <= processing;
LEDS_POSITIONS_TRI_O(4) <= alight;
restart <= PUSH_BUTTONS_5BITS_TRI_I(0);
end implementation;
 

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