URL
https://opencores.org/ocsvn/openarty/openarty/trunk
Subversion Repositories openarty
Compare Revisions
- This comparison shows the changes necessary to convert path
/openarty/trunk
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/sw/startupex.sh
1,6 → 1,6
#!/bin/bash |
|
WBREGS=./wbregs |
WBREGS=host/wbregs |
RED=0x00ff0000 |
GREEN=0x0000ff00 |
WHITE=0x000f0f0f |
/sw/host/regdefs.cpp
83,24 → 83,24
{ R_GPSTX, "GPSTX" }, |
// Scope registers--these scopes may or may not be present depending |
// upon your current configuration. |
{ R_QSCOPE, "SCOPE" }, |
{ R_QSCOPE, "SCOPE" }, // Scope zero |
{ R_QSCOPE, "SCOP" }, |
{ R_QSCOPED, "SCOPDATA" }, |
{ R_QSCOPED, "SCDATA" }, |
{ R_QSCOPED, "SCOPED" }, |
{ R_QSCOPED, "SCOPD" }, |
{ R_GPSCOPE, "GPSSCOPE" }, |
{ R_GPSCOPE, "GPSSCOPE" }, // Scope one |
{ R_GPSCOPE, "GPSSCOP" }, |
{ R_GPSCOPED, "GPSSCDATA" }, |
{ R_GPSCOPED, "GPSSCD" }, |
{ R_GPSCOPED, "GPSDATA" }, |
{ R_ENSCOPE, "ENSCOPE" }, |
{ R_ENSCOPE, "ENSCOP" }, |
{ R_ENSCOPED, "ENSCOPED" }, |
{ R_ENSCOPED, "ENSCOPD" }, |
{ R_RAMSCOPE, "RAMSCOPE" }, |
{ R_RAMSCOPE, "RAMSCOPE" }, // Scope two |
{ R_RAMSCOPE, "RAMSCOP" }, |
{ R_RAMSCOPED, "RAMSCOPD" }, |
{ R_NETSCOPE, "NETSCOPE" }, // Scope three |
{ R_NETSCOPE, "NETSCOP" }, |
{ R_NETSCOPED, "NETSCOPED" }, |
{ R_NETSCOPED, "NETSCOPD" }, |
// RTC registers |
{ R_CLOCK, "CLOCK" }, |
{ R_CLOCK, "TIME" }, |
/sw/host/regdefs.h
61,10 → 61,10
#define R_QSCOPED 0x00000121 // and data |
#define R_GPSCOPE 0x00000122 // GPS configuration scope control |
#define R_GPSCOPED 0x00000123 // and data, uses Mouse scope addrs |
#define R_ENSCOPE 0x00000124 // Next generation UART-WISHBONE |
#define R_ENSCOPED 0x00000125 // conversion scope |
#define R_RAMSCOPE 0x00000126 // DDR3 SDRAM Scope |
#define R_RAMSCOPED 0x00000127 // |
#define R_RAMSCOPE 0x00000124 // DDR3 SDRAM Scope |
#define R_RAMSCOPED 0x00000125 // |
#define R_NETSCOPE 0x00000126 // Ethernet debug scope |
#define R_NETSCOPED 0x00000127 // |
// RTC Clock Registers |
#define R_CLOCK 0x00000128 |
#define R_TIMER 0x00000129 |
164,6 → 164,7
#define FLASHWORDS (1<<22) |
// DDR3 SDRAM memory space |
#define RAMBASE 0x04000000 |
#define SDRAMBASE RAMBASE |
#define RAMWORDS (1<<26) |
// Zip CPU Control and Debug registers |
#define R_ZIPCTRL 0x01000000 |
/sw/host/port.h
41,7 → 41,7
// #define FPGAHOST "lazarus" |
#define FPGAHOST "localhost" |
#define FPGATTY "/dev/ttyUSB1" |
#define FPGAPORT 6502 |
#define FPGAPORT 6510 |
|
#ifndef FORCE_UART |
#define FPGAOPEN(V) V= new FPGA(new NETCOMMS(FPGAHOST, FPGAPORT)) |
/sw/host/Makefile
72,6 → 72,8
$(CXX) -g $^ -o $@ |
wbsettime: $(OBJDIR)/wbsettime.o $(BUSOBJS) |
$(CXX) -g $^ -o $@ |
mtest: $(OBJDIR)/mtest.o $(BUSOBJS) |
$(CXX) -g $^ -o $@ |
wbregs: $(OBJDIR)/wbregs.o $(BUSOBJS) |
$(CXX) -g $^ -o $@ |
dumpflash: $(OBJDIR)/dumpflash.o $(BUSOBJS) |
78,6 → 80,8
$(CXX) -g $^ -o $@ |
eqspiscope: $(OBJDIR)/eqspiscope.o $(OBJDIR)/scopecls.o $(BUSOBJS) |
$(CXX) -g $^ -o $@ |
sdramscope: $(OBJDIR)/sdramscope.o $(OBJDIR)/scopecls.o $(BUSOBJS) |
$(CXX) -g $^ -o $@ |
# ziprun: $(OBJDIR)/ziprun.o $(OBJDIR)/flashdrvr.o $(BUSOBJS) |
# $(CXX) -g $^ -lelf -o $@ |
# zipdbg: zipdbg.cpp $(ZIPD)/zparser.cpp $(ZIPD)/zopcodes.cpp $(ZIPD)/twoc.cpp $(BUSOBJS) |
/sw/host/devbus.h
1,21 → 1,44
//////////////////////////////////////////////////////////////////////////////// |
// |
// |
// Filename: devbus.h |
// |
// Project: UART to WISHBONE FPGA library |
// Project: OpenArty, an entirely open SoC based upon the Arty platform |
// |
// Purpose: The purpose of this file is to document an interface which |
// any devic with a bus, whether it be implemented over a UART, |
// an ethernet, or a PCI express bus, must implement. This |
// describes only an interface, and not how that interface is |
// to be accomplished. |
// an ethernet, or a PCI express bus, must implement. This describes only |
// an interface, and not how that interface is to be accomplished. |
// |
// Creator: Dan Gisselquist |
// Gisselquist Tecnology, LLC |
// |
// Copyright: 2015 |
// Creator: Dan Gisselquist, Ph.D. |
// Gisselquist Technology, LLC |
// |
//////////////////////////////////////////////////////////////////////////////// |
// |
// Copyright (C) 2015-2016, Gisselquist Technology, LLC |
// |
// This program is free software (firmware): you can redistribute it and/or |
// modify it under the terms of the GNU General Public License as published |
// by the Free Software Foundation, either version 3 of the License, or (at |
// your option) any later version. |
// |
// This program is distributed in the hope that it will be useful, but WITHOUT |
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with this program. (It's in the $(ROOT)/doc directory, run make with no |
// target there if the PDF file isn't present.) If not, see |
// <http://www.gnu.org/licenses/> for a copy. |
// |
// License: GPL, v3, as defined and found on www.gnu.org, |
// http://www.gnu.org/licenses/gpl.html |
// |
// |
//////////////////////////////////////////////////////////////////////////////// |
// |
// |
#ifndef DEVBUS_H |
#define DEVBUS_H |
|