OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/core/bench/verilog
    from Rev 33 to Rev 34
    Reverse comparison

Rev 33 → Rev 34

/tb_openMSP430.v
300,12 → 300,12
// Digital I/O
//----------------------------------
 
gpio #(.P1_EN(1),
.P2_EN(1),
.P3_EN(1),
.P4_EN(1),
.P5_EN(1),
.P6_EN(1)) gpio_0 (
omsp_gpio #(.P1_EN(1),
.P2_EN(1),
.P3_EN(1),
.P4_EN(1),
.P5_EN(1),
.P6_EN(1)) gpio_0 (
 
// OUTPUTs
.irq_port1 (irq_port1), // Port 1 interrupt
349,7 → 349,7
// Timers
//----------------------------------
 
timerA timerA_0 (
omsp_timerA timerA_0 (
 
// OUTPUTs
.irq_ta0 (irq_ta0), // Timer A interrupt: TACCR0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.