URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk/core/rtl/verilog
- from Rev 103 to Rev 105
- ↔ Reverse comparison
Rev 103 → Rev 105
/omsp_frontend.v
55,6 → 55,7
inst_dext, // Decoded Inst: destination extended instruction word |
inst_irq_rst, // Decoded Inst: Reset interrupt |
inst_jmp, // Decoded Inst: Conditional jump |
inst_mov, // Decoded Inst: mov instruction |
inst_sext, // Decoded Inst: source extended instruction word |
inst_so, // Decoded Inst: Single-operand arithmetic |
inst_src, // Decoded Inst: source (one hot) |
96,6 → 97,7
output [15:0] inst_dext; // Decoded Inst: destination extended instruction word |
output inst_irq_rst; // Decoded Inst: Reset interrupt |
output [7:0] inst_jmp; // Decoded Inst: Conditional jump |
output inst_mov; // Decoded Inst: mov instruction |
output [15:0] inst_sext; // Decoded Inst: source extended instruction word |
output [7:0] inst_so; // Decoded Inst: Single-operand arithmetic |
output [15:0] inst_src; // Decoded Inst: source (one hot) |
421,7 → 423,12
wire [15:0] inst_to_1hot = one_hot16(ir[15:12]) & {16{inst_type_nxt[`INST_TO]}}; |
wire [11:0] inst_to_nxt = inst_to_1hot[15:4]; |
|
reg inst_mov; |
always @(posedge mclk or posedge puc) |
if (puc) inst_mov <= 1'b0; |
else if (decode) inst_mov <= inst_to_nxt[`MOV]; |
|
|
// |
// 4.5) SOURCE AND DESTINATION REGISTERS |
//--------------------------------------- |
/omsp_dbg_uart.v
92,7 → 92,7
//-------------------------------- |
reg [3:0] rxd_sync; |
always @ (posedge mclk or posedge por) |
if (por) rxd_sync <= 4'h0; |
if (por) rxd_sync <= 4'hf; |
else rxd_sync <= {rxd_sync[2:0], dbg_uart_rxd}; |
|
// Majority decision |
/omsp_execution_unit.v
69,6 → 69,7
inst_dext, // Decoded Inst: destination extended instruction word |
inst_irq_rst, // Decoded Inst: reset interrupt |
inst_jmp, // Decoded Inst: Conditional jump |
inst_mov, // Decoded Inst: mov instruction |
inst_sext, // Decoded Inst: source extended instruction word |
inst_so, // Decoded Inst: Single-operand arithmetic |
inst_src, // Decoded Inst: source (one hot) |
109,6 → 110,7
input [15:0] inst_dext; // Decoded Inst: destination extended instruction word |
input inst_irq_rst; // Decoded Inst: reset interrupt |
input [7:0] inst_jmp; // Decoded Inst: Conditional jump |
input inst_mov; // Decoded Inst: mov instruction |
input [15:0] inst_sext; // Decoded Inst: source extended instruction word |
input [7:0] inst_so; // Decoded Inst: Single-operand arithmetic |
input [15:0] inst_src; // Decoded Inst: source (one hot) |
313,12 → 315,13
//============================================================================= |
|
// Detect memory read/write access |
assign mb_en = ((e_state==`E_IRQ_1) & ~inst_irq_rst) | |
((e_state==`E_IRQ_3) & ~inst_irq_rst) | |
((e_state==`E_SRC_RD) & ~inst_as[`IMM]) | |
(e_state==`E_SRC_WR) | |
((e_state==`E_EXEC) & inst_so[`RETI]) | |
(e_state==`E_DST_RD) | |
assign mb_en = ((e_state==`E_IRQ_1) & ~inst_irq_rst) | |
((e_state==`E_IRQ_3) & ~inst_irq_rst) | |
((e_state==`E_SRC_RD) & ~inst_as[`IMM]) | |
(e_state==`E_SRC_WR) | |
((e_state==`E_EXEC) & inst_so[`RETI]) | |
((e_state==`E_DST_RD) & ~inst_type[`INST_SO] |
& ~inst_mov) | |
(e_state==`E_DST_WR); |
|
wire [1:0] mb_wr_msk = inst_alu[`EXEC_NO_WR] ? 2'b00 : |
/openMSP430.v
206,6 → 206,7
.inst_dext (inst_dext), // Decoded Inst: destination extended instruction word |
.inst_irq_rst (inst_irq_rst), // Decoded Inst: Reset interrupt |
.inst_jmp (inst_jmp), // Decoded Inst: Conditional jump |
.inst_mov (inst_mov), // Decoded Inst: mov instruction |
.inst_sext (inst_sext), // Decoded Inst: source extended instruction word |
.inst_so (inst_so), // Decoded Inst: Single-operand arithmetic |
.inst_src (inst_src), // Decoded Inst: source (one hot) |
267,6 → 268,7
.inst_dext (inst_dext), // Decoded Inst: destination extended instruction word |
.inst_irq_rst (inst_irq_rst), // Decoded Inst: reset interrupt |
.inst_jmp (inst_jmp), // Decoded Inst: Conditional jump |
.inst_mov (inst_mov), // Decoded Inst: mov instruction |
.inst_sext (inst_sext), // Decoded Inst: source extended instruction word |
.inst_so (inst_so), // Decoded Inst: Single-operand arithmetic |
.inst_src (inst_src), // Decoded Inst: source (one hot) |