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URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

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  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/core/rtl/verilog
    from Rev 192 to Rev 200
    Reverse comparison

Rev 192 → Rev 200

/openMSP430_defines.v
26,9 → 26,9
// THE POSSIBILITY OF SUCH DAMAGE
//
//----------------------------------------------------------------------------
//
//
// *File Name: openMSP430_defines.v
//
//
// *Module Description:
// openMSP430 Configuration file
//
144,9 → 144,9
// Indicates the number of interrupt vectors supported
// (16, 32 or 64).
//-------------------------------------------------------
//`define IRQ_16
`define IRQ_16
//`define IRQ_32
`define IRQ_64
//`define IRQ_64
 
 
//-------------------------------------------------------
871,7 → 871,7
// the 16x16 multiplier (1 cycle) instead of the
// default 16x8 multplier (2 cycles)
//`define MPY_16x16
 
//======================================
// CONFIGURATION CHECKS
//======================================
896,7 → 896,7
`endif
`ifdef SMCLK_MUX
CONFIGURATION ERROR: THE SMCLK_MUX CAN ONLY BE ENABLED IF THE LFXT_DOMAIN IS ENABLED AS WELL
`endif
`endif
`ifdef WATCHDOG_MUX
CONFIGURATION ERROR: THE WATCHDOG_MUX CAN ONLY BE ENABLED IF THE LFXT_DOMAIN IS ENABLED AS WELL
`else
906,5 → 906,5
`endif
`ifdef OSCOFF_EN
CONFIGURATION ERROR: THE OSCOFF LOW POWER MODE CAN ONLY BE ENABLED IF THE LFXT_DOMAIN IS ENABLED AS WELL
`endif
`endif
`endif
/openMSP430.v
349,6 → 349,7
// OUTPUTs
.cpuoff (cpuoff), // Turns off the CPU
.dbg_reg_din (dbg_reg_din), // Debug unit CPU register data input
.gie (gie), // General interrupt enable
.mab (eu_mab), // Memory address bus
.mb_en (eu_mb_en), // Memory bus enable
.mb_wr (eu_mb_wr), // Memory bus write transfer
365,7 → 366,6
.dbg_reg_wr (dbg_reg_wr), // Debug unit CPU register write
.e_state (e_state), // Execution state
.exec_done (exec_done), // Execution completed
.gie (gie), // General interrupt enable
.inst_ad (inst_ad), // Decoded Inst: destination addressing mode
.inst_as (inst_as), // Decoded Inst: source addressing mode
.inst_alu (inst_alu), // ALU control signals

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