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URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

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  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/core/rtl/verilog
    from Rev 57 to Rev 60
    Reverse comparison

Rev 57 → Rev 60

/omsp_frontend.v
244,17 → 244,12
// Program counter
reg [15:0] pc;
 
// Detect if PC needs to be incremented
wire pc_inc = (~pc_sw_wr & fetch) & ~(i_state==I_IRQ_FETCH) & ~(i_state==I_IRQ_DONE);
 
// Mux between software update and old PC
wire [15:0] pc_sel = pc_sw_wr ? pc_sw :
// Compute next PC value
wire [15:0] pc_incr = pc + {14'h0000, fetch, 1'b0};
wire [15:0] pc_nxt = pc_sw_wr ? pc_sw :
(i_state==I_IRQ_FETCH) ? irq_addr :
(i_state==I_IRQ_DONE) ? mdb_in : pc;
(i_state==I_IRQ_DONE) ? mdb_in : pc_incr;
 
// Compute next PC value
wire [15:0] pc_nxt = pc_sel + {14'h0000, pc_inc, 1'b0};
 
always @(posedge mclk or posedge puc)
if (puc) pc <= 16'h0000;
else pc <= pc_nxt;

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