OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/core/sim/rtl_sim/run
    from Rev 200 to Rev 202
    Reverse comparison

Rev 200 → Rev 202

/run_disassemble
1,4 → 1,4
if which msp430-elf-gcc >/dev/null; then
if command -v msp430-elf-gcc >/dev/null; then
msp430-elf-objdump -D pmem.elf
else
msp430-objdump -D pmem.elf
/simvision.svcf
0,0 → 1,327
# SimVision Command Script (Thu Mar 05 23:22:58 CET 2015)
#
# Version 05.83.s009
#
# You can restore this configuration with:
#
# simvision -input simvision.svcf
# or simvision -input simvision.svcf database1 database2 ...
#
 
 
#
# preferences
#
preferences set toolbar-Windows-WaveWindow {
usual
hide icheck
position -pos 3
}
preferences set toolbar-Windows-WatchList {
usual
hide icheck
}
 
#
# databases
#
database require tb_openMSP430 -hints {
file ./tb_openMSP430.trn
file /home/user1/temp/openmsp430/core/sim/rtl_sim/run/tb_openMSP430.trn
}
 
#
# groups
#
catch {group new -name CPU -overlay 0}
catch {group new -name {Clock & Reset} -overlay 0}
catch {group new -name Registers -overlay 0}
catch {group new -name {Data Memory} -overlay 0}
catch {group new -name {DMA Interface} -overlay 0}
catch {group new -name {DMEM Interface} -overlay 0}
catch {group new -name {PMEM Interface} -overlay 0}
catch {group new -name {Peripheral Interface} -overlay 0}
 
group using CPU
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.error \
{tb_openMSP430.inst_short[255:0]} \
{tb_openMSP430.inst_full[255:0]} \
{tb_openMSP430.inst_pc[15:0]} \
{tb_openMSP430.inst_number[31:0]} \
{tb_openMSP430.e_state[255:0]} \
{tb_openMSP430.i_state[255:0]}
 
group using {Clock & Reset}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.reset_n \
tb_openMSP430.dut.por \
tb_openMSP430.puc_rst \
tb_openMSP430.dut.dbg_rst \
tb_openMSP430.lfxt_clk \
tb_openMSP430.dco_clk \
tb_openMSP430.mclk \
tb_openMSP430.dut.cpu_mclk \
tb_openMSP430.dut.dma_mclk \
tb_openMSP430.dut.dbg_clk
 
group using Registers
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
{tb_openMSP430.r0[15:0]} \
{tb_openMSP430.r1[15:0]} \
{tb_openMSP430.r2[15:0]} \
{tb_openMSP430.r3[15:0]} \
{tb_openMSP430.r4[15:0]} \
{tb_openMSP430.r5[15:0]} \
{tb_openMSP430.r6[15:0]} \
{tb_openMSP430.r7[15:0]} \
{tb_openMSP430.r8[15:0]} \
{tb_openMSP430.r9[15:0]} \
{tb_openMSP430.r10[15:0]} \
{tb_openMSP430.r11[15:0]} \
{tb_openMSP430.r12[15:0]} \
{tb_openMSP430.r13[15:0]} \
{tb_openMSP430.r14[15:0]} \
{tb_openMSP430.r15[15:0]}
 
group using {Data Memory}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
{tb_openMSP430.mem200[15:0]} \
{tb_openMSP430.mem202[15:0]} \
{tb_openMSP430.mem204[15:0]} \
{tb_openMSP430.mem206[15:0]} \
{tb_openMSP430.mem208[15:0]} \
{tb_openMSP430.mem20A[15:0]} \
{tb_openMSP430.mem20C[15:0]} \
{tb_openMSP430.mem20E[15:0]} \
{tb_openMSP430.mem210[15:0]} \
{tb_openMSP430.mem212[15:0]} \
{tb_openMSP430.mem214[15:0]} \
{tb_openMSP430.mem216[15:0]} \
{tb_openMSP430.mem218[15:0]} \
{tb_openMSP430.mem21A[15:0]} \
{tb_openMSP430.mem21C[15:0]} \
{tb_openMSP430.mem21E[15:0]} \
{tb_openMSP430.mem220[15:0]} \
{tb_openMSP430.mem222[15:0]} \
{tb_openMSP430.mem224[15:0]} \
{tb_openMSP430.mem226[15:0]} \
{tb_openMSP430.mem228[15:0]} \
{tb_openMSP430.mem22A[15:0]} \
{tb_openMSP430.mem22C[15:0]} \
{tb_openMSP430.mem22E[15:0]} \
{tb_openMSP430.mem230[15:0]} \
{tb_openMSP430.mem232[15:0]} \
{tb_openMSP430.mem234[15:0]} \
{tb_openMSP430.mem236[15:0]} \
{tb_openMSP430.mem238[15:0]} \
{tb_openMSP430.mem23A[15:0]} \
{tb_openMSP430.mem23C[15:0]} \
{tb_openMSP430.mem23E[15:0]} \
{tb_openMSP430.mem240[15:0]} \
{tb_openMSP430.mem242[15:0]} \
{tb_openMSP430.mem244[15:0]} \
{tb_openMSP430.mem246[15:0]} \
{tb_openMSP430.mem248[15:0]} \
{tb_openMSP430.mem24A[15:0]} \
{tb_openMSP430.mem24C[15:0]} \
{tb_openMSP430.mem24E[15:0]} \
{tb_openMSP430.mem250[15:0]} \
{tb_openMSP430.mem252[15:0]} \
{tb_openMSP430.mem254[15:0]} \
{tb_openMSP430.mem256[15:0]} \
{tb_openMSP430.mem258[15:0]} \
{tb_openMSP430.mem25A[15:0]} \
{tb_openMSP430.mem25C[15:0]} \
{tb_openMSP430.mem25E[15:0]} \
{tb_openMSP430.mem260[15:0]} \
{tb_openMSP430.mem262[15:0]} \
{tb_openMSP430.mem264[15:0]} \
{tb_openMSP430.mem266[15:0]} \
{tb_openMSP430.mem268[15:0]} \
{tb_openMSP430.mem26A[15:0]} \
{tb_openMSP430.mem26C[15:0]} \
{tb_openMSP430.mem26E[15:0]} \
{tb_openMSP430.mem270[15:0]} \
{tb_openMSP430.mem272[15:0]} \
{tb_openMSP430.mem274[15:0]} \
{tb_openMSP430.mem276[15:0]} \
{tb_openMSP430.mem278[15:0]} \
{tb_openMSP430.mem27A[15:0]} \
{tb_openMSP430.mem27C[15:0]} \
{tb_openMSP430.mem27E[15:0]}
 
group using {DMA Interface}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.dma_rd_error \
tb_openMSP430.dma_wr_error \
tb_openMSP430.dut.dma_priority \
tb_openMSP430.dut.dma_wkup \
tb_openMSP430.dut.dma_en \
{tb_openMSP430.dut.dma_we[1:0]} \
tb_openMSP430.dut.dma_ready \
tb_openMSP430.dut.dma_resp \
{tb_openMSP430.dut.dma_addr[15:1]} \
{tb_openMSP430.dut.dma_din[15:0]} \
{tb_openMSP430.dut.dma_dout[15:0]}
 
group using {DMEM Interface}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.dmem_cen \
{tb_openMSP430.dmem_wen[1:0]} \
{tb_openMSP430.dmem_addr[12:0]} \
{tb_openMSP430.dmem_dout[15:0]} \
{tb_openMSP430.dmem_din[15:0]}
 
group using {PMEM Interface}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.pmem_cen \
{tb_openMSP430.pmem_wen[1:0]} \
{tb_openMSP430.pmem_addr[8:0]} \
{tb_openMSP430.pmem_dout[15:0]} \
{tb_openMSP430.pmem_din[15:0]}
 
group using {Peripheral Interface}
group set -overlay 0
group set -comment {}
group set -parents {}
group set -groups {}
group clear 0 end
 
group insert \
tb_openMSP430.per_en \
{tb_openMSP430.per_we[1:0]} \
{tb_openMSP430.per_addr[13:0]} \
{tb_openMSP430.per_din[15:0]} \
{tb_openMSP430.per_dout[15:0]}
 
#
# cursors
#
set time 1797ns
if {[catch {cursor new -name TimeA -time $time}] != ""} {
cursor set -using TimeA -time $time
}
 
#
# mmaps
#
mmap new -reuse -name {Boolean as Logic} -contents {
{%c=FALSE -edgepriority 1 -shape low}
{%c=TRUE -edgepriority 1 -shape high}
}
mmap new -reuse -name {Example Map} -contents {
{%b=11???? -bgcolor orange -label REG:%x -linecolor yellow -shape bus}
{%x=1F -bgcolor red -label ERROR -linecolor white -shape EVENT}
{%x=2C -bgcolor red -label ERROR -linecolor white -shape EVENT}
{%x=* -label %x -linecolor gray -shape bus}
}
 
#
# Waveform windows
#
if {[catch {window new WaveWindow -name "Waveform 1" -geometry 1680x872+0+0}] != ""} {
window geometry "Waveform 1" 1680x872+0+0
}
window target "Waveform 1" on
waveform using {Waveform 1}
waveform sidebar select designbrowser
waveform set \
-primarycursor TimeA \
-signalnames name \
-signalwidth 175 \
-units ns \
-valuewidth 75
cursor set -using TimeA -time 1797ns
waveform baseline set -time 4,375,000ps
 
set groupId [waveform add -groups CPU]
set glist [waveform hierarchy contents $groupId]
set id [lindex $glist 0]
foreach {name attrs} {
tb_openMSP430.error {}
tb_openMSP430.inst_short {-radix %a}
tb_openMSP430.inst_full {-radix %a}
tb_openMSP430.inst_pc {}
tb_openMSP430.inst_number {}
tb_openMSP430.e_state {-radix %a}
tb_openMSP430.i_state {-radix %a}
} {
set expected [ join [waveform signals -format native $id] ]
if {[string equal $name $expected]} {
if {$attrs != ""} {
eval waveform format $id $attrs
}
}
set glist [lrange $glist 1 end]
set id [lindex $glist 0]
}
 
set groupId [waveform add -groups {{Clock & Reset}}]
waveform hierarchy collapse $groupId
 
set groupId [waveform add -groups Registers]
waveform hierarchy collapse $groupId
 
set groupId [waveform add -groups {{Data Memory}}]
waveform hierarchy collapse $groupId
 
set groupId [waveform add -groups {{DMA Interface}}]
 
set groupId [waveform add -groups {{DMEM Interface}}]
waveform hierarchy collapse $groupId
 
set groupId [waveform add -groups {{PMEM Interface}}]
waveform hierarchy collapse $groupId
 
set groupId [waveform add -groups {{Peripheral Interface}}]
waveform hierarchy collapse $groupId
 
set id [waveform add -signals [list tb_openMSP430.dut.mem_backbone_0.ext_per_sel \
tb_openMSP430.dut.mem_backbone_0.ext_pmem_sel \
tb_openMSP430.dut.mem_backbone_0.ext_mem_en \
tb_openMSP430.dut.mem_backbone_0.ext_dmem_sel ]]
 
waveform xview limits 1797ns 4375ns
/run_all_mpy
6,7 → 6,7
 
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
# Note: default to MSPGCC until GCC RedHat/TI is mature enough
if which msp430-gcc >/dev/null; then
if command -v msp430-gcc >/dev/null; then
MSPGCC_PFX=msp430
else
MSPGCC_PFX=msp430-elf
/run
6,7 → 6,7
 
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
# Note: default to MSPGCC until GCC RedHat/TI is mature enough
if which msp430-gcc >/dev/null; then
if command -v msp430-gcc >/dev/null; then
MSPGCC_PFX=msp430
else
MSPGCC_PFX=msp430-elf
27,4 → 27,4
 
rm -rf cov_work
 
../bin/msp430sim dbg_i2c_onoff
../bin/msp430sim two-op_mov
/run_c
10,7 → 10,7
 
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
# Note: default to MSPGCC until GCC RedHat/TI is mature enough
if which msp430-gcc >/dev/null; then
if command -v msp430-gcc >/dev/null; then
MSPGCC_PFX=msp430
else
MSPGCC_PFX=msp430-elf
/run_all
6,7 → 6,7
 
# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
# Note: default to MSPGCC until GCC RedHat/TI is mature enough
if which msp430-gcc >/dev/null; then
if command -v msp430-gcc >/dev/null; then
MSPGCC_PFX=msp430
else
MSPGCC_PFX=msp430-elf
25,135 → 25,170
OMSP_SIMULATOR=iverilog
export OMSP_SIMULATOR
 
rm -rf ./cov_work
rm -rf ./log/*.log
mkdir ./log
 
# Two-Operand Arithmetic test patterns
../bin/msp430sim two-op_mov | tee ./log/two-op_mov.log
../bin/msp430sim two-op_mov-b | tee ./log/two-op_mov-b.log
../bin/msp430sim two-op_add | tee ./log/two-op_add.log
../bin/msp430sim two-op_add-b | tee ./log/two-op_add-b.log
../bin/msp430sim two-op_addc | tee ./log/two-op_addc.log
../bin/msp430sim two-op_sub | tee ./log/two-op_sub.log
../bin/msp430sim two-op_subc | tee ./log/two-op_subc.log
../bin/msp430sim two-op_cmp | tee ./log/two-op_cmp.log
../bin/msp430sim two-op_bit | tee ./log/two-op_bit.log
../bin/msp430sim two-op_bic | tee ./log/two-op_bic.log
../bin/msp430sim two-op_bis | tee ./log/two-op_bis.log
../bin/msp430sim two-op_xor | tee ./log/two-op_xor.log
../bin/msp430sim two-op_and | tee ./log/two-op_and.log
../bin/msp430sim two-op_dadd | tee ./log/two-op_dadd.log
../bin/msp430sim two-op_autoincr | tee ./log/two-op_autoincr.log
../bin/msp430sim two-op_autoincr-b | tee ./log/two-op_autoincr-b.log
# Argument specifies number of regression loops
if [ $# -ne 1 ]; then
LAST_REGRESSION=0
else
LAST_REGRESSION=$(($1-1))
fi
 
# Conditional Jump test patterns
../bin/msp430sim c-jump_jeq | tee ./log/c-jump_jeq.log
../bin/msp430sim c-jump_jne | tee ./log/c-jump_jne.log
../bin/msp430sim c-jump_jc | tee ./log/c-jump_jc.log
../bin/msp430sim c-jump_jnc | tee ./log/c-jump_jnc.log
../bin/msp430sim c-jump_jn | tee ./log/c-jump_jn.log
../bin/msp430sim c-jump_jge | tee ./log/c-jump_jge.log
../bin/msp430sim c-jump_jl | tee ./log/c-jump_jl.log
../bin/msp430sim c-jump_jmp | tee ./log/c-jump_jmp.log
# Cleanup from previous regression
LOG_DIR=./log
rm -rf $LOG_DIR/*
 
# Single-Operand Arithmetic test patterns
../bin/msp430sim sing-op_rrc | tee ./log/sing-op_rrc.log
../bin/msp430sim sing-op_rra | tee ./log/sing-op_rra.log
../bin/msp430sim sing-op_swpb | tee ./log/sing-op_swpb.log
../bin/msp430sim sing-op_sxt | tee ./log/sing-op_sxt.log
../bin/msp430sim sing-op_push | tee ./log/sing-op_push.log
../bin/msp430sim sing-op_call | tee ./log/sing-op_call.log
# Perform the regression runs
for (( ii=0; ii<=$LAST_REGRESSION; ii++ ))
do
 
# Interrupts & NMI
../bin/msp430sim sing-op_reti | tee ./log/sing-op_reti.log
../bin/msp430sim nmi | tee ./log/nmi.log
../bin/msp430sim irq32 | tee ./log/irq32.log
../bin/msp430sim irq64 | tee ./log/irq64.log
# Cleanup & log directory setup
rm -rf ./cov_work
LOG_DIR=./log/$ii
mkdir -p $LOG_DIR
 
# ROM Data Read access
../bin/msp430sim two-op_add_rom-rd | tee ./log/two-op_add_rom-rd.log
../bin/msp430sim sing-op_push_rom-rd | tee ./log/sing-op_push_rom-rd.log
../bin/msp430sim sing-op_call_rom-rd | tee ./log/sing-op_call_rom-rd.log
# Two-Operand Arithmetic test patterns
../bin/msp430sim two-op_mov | tee $LOG_DIR/two-op_mov.log
../bin/msp430sim two-op_mov-b | tee $LOG_DIR/two-op_mov-b.log
../bin/msp430sim two-op_add | tee $LOG_DIR/two-op_add.log
 
# Power saving modes (CPUOFF, OSCOFF, SCG0, SCG1)
../bin/msp430sim op_modes | tee ./log/op_modes.log
../bin/msp430sim op_modes_asic | tee ./log/op_modes_asic.log
../bin/msp430sim lp_modes_asic | tee ./log/lp_modes_asic.log
../bin/msp430sim lp_modes_dbg_asic | tee ./log/lp_modes_dbg_asic.log
../bin/msp430sim two-op_add-b | tee $LOG_DIR/two-op_add-b.log
../bin/msp430sim two-op_addc | tee $LOG_DIR/two-op_addc.log
../bin/msp430sim two-op_sub | tee $LOG_DIR/two-op_sub.log
../bin/msp430sim two-op_subc | tee $LOG_DIR/two-op_subc.log
../bin/msp430sim two-op_cmp | tee $LOG_DIR/two-op_cmp.log
../bin/msp430sim two-op_bit | tee $LOG_DIR/two-op_bit.log
../bin/msp430sim two-op_bic | tee $LOG_DIR/two-op_bic.log
../bin/msp430sim two-op_bis | tee $LOG_DIR/two-op_bis.log
../bin/msp430sim two-op_xor | tee $LOG_DIR/two-op_xor.log
../bin/msp430sim two-op_and | tee $LOG_DIR/two-op_and.log
../bin/msp430sim two-op_dadd | tee $LOG_DIR/two-op_dadd.log
../bin/msp430sim two-op_autoincr | tee $LOG_DIR/two-op_autoincr.log
../bin/msp430sim two-op_autoincr-b | tee $LOG_DIR/two-op_autoincr-b.log
 
# CPU startup conditions
../bin/msp430sim cpu_startup_asic | tee ./log/cpu_startup_asic.log
# Conditional Jump test patterns
../bin/msp430sim c-jump_jeq | tee $LOG_DIR/c-jump_jeq.log
../bin/msp430sim c-jump_jne | tee $LOG_DIR/c-jump_jne.log
../bin/msp430sim c-jump_jc | tee $LOG_DIR/c-jump_jc.log
../bin/msp430sim c-jump_jnc | tee $LOG_DIR/c-jump_jnc.log
../bin/msp430sim c-jump_jn | tee $LOG_DIR/c-jump_jn.log
../bin/msp430sim c-jump_jge | tee $LOG_DIR/c-jump_jge.log
../bin/msp430sim c-jump_jl | tee $LOG_DIR/c-jump_jl.log
../bin/msp430sim c-jump_jmp | tee $LOG_DIR/c-jump_jmp.log
 
# Basic clock module
../bin/msp430sim clock_module | tee ./log/clock_module.log
../bin/msp430sim clock_module_asic | tee ./log/clock_module_asic.log
../bin/msp430sim clock_module_asic_mclk | tee ./log/clock_module_asic_mclk.log
../bin/msp430sim clock_module_asic_smclk | tee ./log/clock_module_asic_smclk.log
../bin/msp430sim clock_module_asic_lfxt | tee ./log/clock_module_asic_lfxt.log
# Single-Operand Arithmetic test patterns
../bin/msp430sim sing-op_rrc | tee $LOG_DIR/sing-op_rrc.log
../bin/msp430sim sing-op_rra | tee $LOG_DIR/sing-op_rra.log
../bin/msp430sim sing-op_swpb | tee $LOG_DIR/sing-op_swpb.log
../bin/msp430sim sing-op_sxt | tee $LOG_DIR/sing-op_sxt.log
../bin/msp430sim sing-op_push | tee $LOG_DIR/sing-op_push.log
../bin/msp430sim sing-op_call | tee $LOG_DIR/sing-op_call.log
 
# Serial Debug Interface (UART)
../bin/msp430sim dbg_uart | tee ./log/dbg_uart.log
../bin/msp430sim dbg_uart_sync | tee ./log/dbg_uart_sync.log
../bin/msp430sim dbg_uart_cpu | tee ./log/dbg_uart_cpu.log
../bin/msp430sim dbg_uart_mem | tee ./log/dbg_uart_mem.log
../bin/msp430sim dbg_uart_hwbrk0 | tee ./log/dbg_uart_hwbrk0.log
../bin/msp430sim dbg_uart_hwbrk1 | tee ./log/dbg_uart_hwbrk1.log
../bin/msp430sim dbg_uart_hwbrk2 | tee ./log/dbg_uart_hwbrk2.log
../bin/msp430sim dbg_uart_hwbrk3 | tee ./log/dbg_uart_hwbrk3.log
../bin/msp430sim dbg_uart_rdwr | tee ./log/dbg_uart_rdwr.log
../bin/msp430sim dbg_uart_halt_irq | tee ./log/dbg_uart_halt_irq.log
../bin/msp430sim dbg_uart_onoff | tee ./log/dbg_uart_onoff.log
../bin/msp430sim dbg_uart_onoff_asic | tee ./log/dbg_uart_onoff_asic.log
# Interrupts & NMI
../bin/msp430sim sing-op_reti | tee $LOG_DIR/sing-op_reti.log
../bin/msp430sim nmi | tee $LOG_DIR/nmi.log
../bin/msp430sim irq32 | tee $LOG_DIR/irq32.log
../bin/msp430sim irq64 | tee $LOG_DIR/irq64.log
 
# Serial Debug Interface (I2C)
../bin/msp430sim dbg_i2c | tee ./log/dbg_i2c.log
../bin/msp430sim dbg_i2c_sync | tee ./log/dbg_i2c_sync.log
../bin/msp430sim dbg_i2c_cpu | tee ./log/dbg_i2c_cpu.log
../bin/msp430sim dbg_i2c_mem | tee ./log/dbg_i2c_mem.log
../bin/msp430sim dbg_i2c_hwbrk0 | tee ./log/dbg_i2c_hwbrk0.log
../bin/msp430sim dbg_i2c_hwbrk1 | tee ./log/dbg_i2c_hwbrk1.log
../bin/msp430sim dbg_i2c_hwbrk2 | tee ./log/dbg_i2c_hwbrk2.log
../bin/msp430sim dbg_i2c_hwbrk3 | tee ./log/dbg_i2c_hwbrk3.log
../bin/msp430sim dbg_i2c_rdwr | tee ./log/dbg_i2c_rdwr.log
../bin/msp430sim dbg_i2c_halt_irq | tee ./log/dbg_i2c_halt_irq.log
../bin/msp430sim dbg_i2c_onoff | tee ./log/dbg_i2c_onoff.log
../bin/msp430sim dbg_i2c_onoff_asic | tee ./log/dbg_i2c_onoff_asic.log
# ROM Data Read access
../bin/msp430sim two-op_add_rom-rd | tee $LOG_DIR/two-op_add_rom-rd.log
../bin/msp430sim sing-op_push_rom-rd | tee $LOG_DIR/sing-op_push_rom-rd.log
../bin/msp430sim sing-op_call_rom-rd | tee $LOG_DIR/sing-op_call_rom-rd.log
 
# SFR test patterns
../bin/msp430sim sfr | tee ./log/sfr.log
# Power saving modes (CPUOFF, OSCOFF, SCG0, SCG1)
../bin/msp430sim op_modes | tee $LOG_DIR/op_modes.log
../bin/msp430sim op_modes_asic | tee $LOG_DIR/op_modes_asic.log
../bin/msp430sim lp_modes_asic | tee $LOG_DIR/lp_modes_asic.log
../bin/msp430sim lp_modes_dbg_asic | tee $LOG_DIR/lp_modes_dbg_asic.log
 
# SCAN test patterns (only to increase coverage)
../bin/msp430sim scan | tee ./log/scan.log
# CPU startup conditions
../bin/msp430sim cpu_startup_asic | tee $LOG_DIR/cpu_startup_asic.log
 
# Watchdog test patterns
../bin/msp430sim wdt_interval | tee ./log/wdt_interval.log
../bin/msp430sim wdt_watchdog | tee ./log/wdt_watchdog.log
../bin/msp430sim wdt_clkmux | tee ./log/wdt_clkmux.log
../bin/msp430sim wdt_wkup | tee ./log/wdt_wkup.log
# Basic clock module
../bin/msp430sim clock_module | tee $LOG_DIR/clock_module.log
../bin/msp430sim clock_module_asic | tee $LOG_DIR/clock_module_asic.log
../bin/msp430sim clock_module_asic_mclk | tee $LOG_DIR/clock_module_asic_mclk.log
../bin/msp430sim clock_module_asic_smclk | tee $LOG_DIR/clock_module_asic_smclk.log
../bin/msp430sim clock_module_asic_lfxt | tee $LOG_DIR/clock_module_asic_lfxt.log
 
# GPIO test patterns
../bin/msp430sim gpio_rdwr | tee ./log/gpio_rdwr.log
../bin/msp430sim gpio_irq | tee ./log/gpio_irq.log
# Serial Debug Interface (UART)
../bin/msp430sim dbg_uart | tee $LOG_DIR/dbg_uart.log
../bin/msp430sim dbg_uart_sync | tee $LOG_DIR/dbg_uart_sync.log
../bin/msp430sim dbg_uart_cpu | tee $LOG_DIR/dbg_uart_cpu.log
../bin/msp430sim dbg_uart_mem | tee $LOG_DIR/dbg_uart_mem.log
../bin/msp430sim dbg_uart_hwbrk0 | tee $LOG_DIR/dbg_uart_hwbrk0.log
../bin/msp430sim dbg_uart_hwbrk1 | tee $LOG_DIR/dbg_uart_hwbrk1.log
../bin/msp430sim dbg_uart_hwbrk2 | tee $LOG_DIR/dbg_uart_hwbrk2.log
../bin/msp430sim dbg_uart_hwbrk3 | tee $LOG_DIR/dbg_uart_hwbrk3.log
../bin/msp430sim dbg_uart_rdwr | tee $LOG_DIR/dbg_uart_rdwr.log
../bin/msp430sim dbg_uart_halt_irq | tee $LOG_DIR/dbg_uart_halt_irq.log
../bin/msp430sim dbg_uart_onoff | tee $LOG_DIR/dbg_uart_onoff.log
../bin/msp430sim dbg_uart_onoff_asic | tee $LOG_DIR/dbg_uart_onoff_asic.log
 
# Peripheral templates test patterns
../bin/msp430sim template_periph_8b | tee ./log/template_periph_8b.log
../bin/msp430sim template_periph_16b | tee ./log/template_periph_16b.log
# Serial Debug Interface (I2C)
../bin/msp430sim dbg_i2c | tee $LOG_DIR/dbg_i2c.log
../bin/msp430sim dbg_i2c_sync | tee $LOG_DIR/dbg_i2c_sync.log
../bin/msp430sim dbg_i2c_cpu | tee $LOG_DIR/dbg_i2c_cpu.log
../bin/msp430sim dbg_i2c_mem | tee $LOG_DIR/dbg_i2c_mem.log
../bin/msp430sim dbg_i2c_hwbrk0 | tee $LOG_DIR/dbg_i2c_hwbrk0.log
../bin/msp430sim dbg_i2c_hwbrk1 | tee $LOG_DIR/dbg_i2c_hwbrk1.log
../bin/msp430sim dbg_i2c_hwbrk2 | tee $LOG_DIR/dbg_i2c_hwbrk2.log
../bin/msp430sim dbg_i2c_hwbrk3 | tee $LOG_DIR/dbg_i2c_hwbrk3.log
../bin/msp430sim dbg_i2c_rdwr | tee $LOG_DIR/dbg_i2c_rdwr.log
../bin/msp430sim dbg_i2c_halt_irq | tee $LOG_DIR/dbg_i2c_halt_irq.log
../bin/msp430sim dbg_i2c_onoff | tee $LOG_DIR/dbg_i2c_onoff.log
../bin/msp430sim dbg_i2c_onoff_asic | tee $LOG_DIR/dbg_i2c_onoff_asic.log
 
# Timer A patterns
../bin/msp430sim tA_modes | tee ./log/tA_modes.log
../bin/msp430sim tA_compare | tee ./log/tA_compare.log
../bin/msp430sim tA_output | tee ./log/tA_output.log
../bin/msp430sim tA_capture | tee ./log/tA_capture.log
../bin/msp430sim tA_clkmux | tee ./log/tA_clkmux.log
# SFR test patterns
../bin/msp430sim sfr | tee $LOG_DIR/sfr.log
 
# Simple full duplex UART (8N1 protocol)
#../bin/msp430sim uart | tee ./log/uart.log
# SCAN test patterns (only to increase coverage)
../bin/msp430sim scan | tee $LOG_DIR/scan.log
 
# Watchdog test patterns
../bin/msp430sim wdt_interval | tee $LOG_DIR/wdt_interval.log
../bin/msp430sim wdt_watchdog | tee $LOG_DIR/wdt_watchdog.log
../bin/msp430sim wdt_clkmux | tee $LOG_DIR/wdt_clkmux.log
../bin/msp430sim wdt_wkup | tee $LOG_DIR/wdt_wkup.log
 
# Hardware multiplier test patterns
../bin/msp430sim mpy_basic | tee ./log/mpy_basic.log
# GPIO test patterns
../bin/msp430sim gpio_rdwr | tee $LOG_DIR/gpio_rdwr.log
../bin/msp430sim gpio_irq | tee $LOG_DIR/gpio_irq.log
 
# Peripheral templates test patterns
../bin/msp430sim template_periph_8b | tee $LOG_DIR/template_periph_8b.log
../bin/msp430sim template_periph_16b | tee $LOG_DIR/template_periph_16b.log
 
# Report regression results
../bin/parse_results
# Timer A patterns
../bin/msp430sim tA_modes | tee $LOG_DIR/tA_modes.log
../bin/msp430sim tA_compare | tee $LOG_DIR/tA_compare.log
../bin/msp430sim tA_output | tee $LOG_DIR/tA_output.log
../bin/msp430sim tA_capture | tee $LOG_DIR/tA_capture.log
../bin/msp430sim tA_clkmux | tee $LOG_DIR/tA_clkmux.log
 
# DMA Interface
../bin/msp430sim dma_rdwr_16b | tee $LOG_DIR/dma_rdwr_16b.log
../bin/msp430sim dma_rdwr_8b | tee $LOG_DIR/dma_rdwr_8b.log
../bin/msp430sim dma_resp | tee $LOG_DIR/dma_resp.log
../bin/msp430sim dma_dbg_arbiter | tee $LOG_DIR/dma_dbg_arbiter.log
../bin/msp430sim dma_lpm0_asic | tee $LOG_DIR/dma_lpm0_asic.log
../bin/msp430sim dma_lpm1_asic | tee $LOG_DIR/dma_lpm1_asic.log
../bin/msp430sim dma_lpm2_asic | tee $LOG_DIR/dma_lpm2_asic.log
../bin/msp430sim dma_lpm3_asic | tee $LOG_DIR/dma_lpm3_asic.log
../bin/msp430sim dma_lpm4_asic | tee $LOG_DIR/dma_lpm4_asic.log
 
# Simple full duplex UART (8N1 protocol)
#../bin/msp430sim uart | tee $LOG_DIR/uart.log
 
# Hardware multiplier test patterns
../bin/msp430sim mpy_basic | tee $LOG_DIR/mpy_basic.log
 
 
# Report regression results
../bin/parse_results $LOG_DIR | tee $LOG_DIR/../summary.$ii.log
 
done
 
 
if [ $LAST_REGRESSION != 0 ]; then
../bin/parse_summaries | tee $LOG_DIR/../regressions_summary.log
fi

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