URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk/core/sim/rtl_sim/src
- from Rev 85 to Rev 86
- ↔ Reverse comparison
Rev 85 → Rev 86
/dbg_hwbrk3.v
57,8 → 57,8
dbg_uart_wr(CPU_CTL, 16'h0020); |
|
// CONFIGURE BREAKPOINT (DISABLED) & RUN |
dbg_uart_wr(BRK3_ADDR0, 16'hf804); |
dbg_uart_wr(BRK3_ADDR1, 16'hf818); |
dbg_uart_wr(BRK3_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK3_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK3_CTL, 16'h000C); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
72,14 → 72,14
if (mem200 === 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 1 ====="); |
|
// CONFIGURE BREAKPOINT (ENABLED) & RUN |
dbg_uart_wr(BRK3_ADDR0, 16'hf804); |
dbg_uart_wr(BRK3_ADDR1, 16'hf818); |
dbg_uart_wr(BRK3_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK3_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK3_CTL, 16'h000D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf804) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h04)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 3 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 4 ====="); |
95,7 → 95,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 8 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 9 ====="); |
119,14 → 119,14
dbg_uart_wr(CPU_STAT, 16'h00ff); |
|
// CONFIGURE BREAKPOINT(ENABLED) & RUN |
dbg_uart_wr(BRK3_ADDR0, 16'hf700); |
dbg_uart_wr(BRK3_ADDR1, 16'hf820); |
dbg_uart_wr(BRK3_ADDR0, ('h10000-`PMEM_SIZE-'h100)); |
dbg_uart_wr(BRK3_ADDR1, ('h10000-`PMEM_SIZE+'h20)); |
dbg_uart_wr(BRK3_CTL, 16'h001D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf800) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 3 ====="); |
156,7 → 156,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 3 ====="); |
171,7 → 171,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 8 ====="); |
186,7 → 186,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (mem200 !== 16'h0002) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 13 ====="); |
215,7 → 215,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 3 ====="); |
230,7 → 230,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 8 ====="); |
245,7 → 245,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 13 ====="); |
260,7 → 260,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 18 ====="); |
275,7 → 275,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 23 ====="); |
304,7 → 304,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 3 ====="); |
319,7 → 319,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 8 ====="); |
334,7 → 334,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 13 ====="); |
349,7 → 349,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 18 ====="); |
364,7 → 364,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 23 ====="); |
379,7 → 379,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 28 ====="); |
410,7 → 410,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 3 ====="); |
425,7 → 425,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (mem200 !== 16'h0002) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 8 ====="); |
457,7 → 457,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 3 ====="); |
472,7 → 472,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 8 ====="); |
487,7 → 487,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 13 ====="); |
502,7 → 502,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 18 ====="); |
517,7 → 517,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 23 ====="); |
549,7 → 549,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 3 ====="); |
564,7 → 564,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 8 ====="); |
579,7 → 579,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 13 ====="); |
594,7 → 594,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 18 ====="); |
609,7 → 609,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 23 ====="); |
624,7 → 624,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0081) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 28 ====="); |
/dbg_mem.v
134,11 → 134,11
//-------------------------------------------------------- |
|
// READ ROM |
dbg_uart_wr(MEM_ADDR, 16'hf82e); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2e)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0001); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h5ab7) tb_error("====== ROM (16b): Read @0xf82e ====="); |
dbg_uart_wr(MEM_ADDR, 16'hf830); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h30)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0001); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h6bc8) tb_error("====== ROM (16b): Read @0xf830 ====="); |
160,11 → 160,11
//-------------------------------------------------------- |
|
// READ ROM |
dbg_uart_wr(MEM_ADDR, 16'hf82e); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2e)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0009); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h00b7) tb_error("====== ROM (8b): Read @0xf82e ====="); |
dbg_uart_wr(MEM_ADDR, 16'hf82f); // select memory address |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h2f)); // select memory address |
dbg_uart_wr(MEM_CTL, 16'h0009); // read memory |
dbg_uart_rd(MEM_DATA); // read data |
if (dbg_uart_buf !== 16'h005a) tb_error("====== ROM (8b): Read @0xf82f ====="); |
/dbg_hwbrk0.v
57,8 → 57,8
dbg_uart_wr(CPU_CTL, 16'h0020); |
|
// CONFIGURE BREAKPOINT (DISABLED) & RUN |
dbg_uart_wr(BRK0_ADDR0, 16'hf804); |
dbg_uart_wr(BRK0_ADDR1, 16'hf818); |
dbg_uart_wr(BRK0_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK0_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK0_CTL, 16'h000C); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
72,14 → 72,14
if (mem200 === 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 1 ====="); |
|
// CONFIGURE BREAKPOINT (ENABLED) & RUN |
dbg_uart_wr(BRK0_ADDR0, 16'hf804); |
dbg_uart_wr(BRK0_ADDR1, 16'hf818); |
dbg_uart_wr(BRK0_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK0_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK0_CTL, 16'h000D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf804) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h04)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 3 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 4 ====="); |
95,7 → 95,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 8 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 9 ====="); |
119,14 → 119,14
dbg_uart_wr(CPU_STAT, 16'h00ff); |
|
// CONFIGURE BREAKPOINT(ENABLED) & RUN |
dbg_uart_wr(BRK0_ADDR0, 16'hf700); |
dbg_uart_wr(BRK0_ADDR1, 16'hf820); |
dbg_uart_wr(BRK0_ADDR0, ('h10000-`PMEM_SIZE-'h100)); |
dbg_uart_wr(BRK0_ADDR1, ('h10000-`PMEM_SIZE+'h20)); |
dbg_uart_wr(BRK0_CTL, 16'h001D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf800) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 3 ====="); |
156,7 → 156,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 3 ====="); |
171,7 → 171,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 8 ====="); |
186,7 → 186,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (mem200 !== 16'h0002) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 13 ====="); |
215,7 → 215,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 3 ====="); |
230,7 → 230,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 8 ====="); |
245,7 → 245,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 13 ====="); |
260,7 → 260,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 18 ====="); |
275,7 → 275,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 23 ====="); |
304,7 → 304,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 3 ====="); |
319,7 → 319,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 8 ====="); |
334,7 → 334,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 13 ====="); |
349,7 → 349,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 18 ====="); |
364,7 → 364,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 23 ====="); |
379,7 → 379,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 28 ====="); |
410,7 → 410,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 3 ====="); |
425,7 → 425,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (mem200 !== 16'h0002) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 8 ====="); |
457,7 → 457,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 3 ====="); |
472,7 → 472,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 8 ====="); |
487,7 → 487,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 13 ====="); |
502,7 → 502,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 18 ====="); |
517,7 → 517,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 23 ====="); |
549,7 → 549,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 3 ====="); |
564,7 → 564,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 8 ====="); |
579,7 → 579,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 13 ====="); |
594,7 → 594,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 18 ====="); |
609,7 → 609,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 23 ====="); |
624,7 → 624,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0011) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 28 ====="); |
/dbg_hwbrk2.v
57,8 → 57,8
dbg_uart_wr(CPU_CTL, 16'h0020); |
|
// CONFIGURE BREAKPOINT (DISABLED) & RUN |
dbg_uart_wr(BRK2_ADDR0, 16'hf804); |
dbg_uart_wr(BRK2_ADDR1, 16'hf818); |
dbg_uart_wr(BRK2_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK2_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK2_CTL, 16'h000C); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
72,14 → 72,14
if (mem200 === 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 1 ====="); |
|
// CONFIGURE BREAKPOINT (ENABLED) & RUN |
dbg_uart_wr(BRK2_ADDR0, 16'hf804); |
dbg_uart_wr(BRK2_ADDR1, 16'hf818); |
dbg_uart_wr(BRK2_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK2_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK2_CTL, 16'h000D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf804) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h04)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 3 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 4 ====="); |
95,7 → 95,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 8 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 9 ====="); |
119,14 → 119,14
dbg_uart_wr(CPU_STAT, 16'h00ff); |
|
// CONFIGURE BREAKPOINT(ENABLED) & RUN |
dbg_uart_wr(BRK2_ADDR0, 16'hf700); |
dbg_uart_wr(BRK2_ADDR1, 16'hf820); |
dbg_uart_wr(BRK2_ADDR0, ('h10000-`PMEM_SIZE-'h100)); |
dbg_uart_wr(BRK2_ADDR1, ('h10000-`PMEM_SIZE+'h20)); |
dbg_uart_wr(BRK2_CTL, 16'h001D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf800) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 3 ====="); |
156,7 → 156,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 3 ====="); |
171,7 → 171,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 8 ====="); |
186,7 → 186,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (mem200 !== 16'h0002) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 13 ====="); |
215,7 → 215,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 3 ====="); |
230,7 → 230,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 8 ====="); |
245,7 → 245,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 13 ====="); |
260,7 → 260,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 18 ====="); |
275,7 → 275,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 23 ====="); |
304,7 → 304,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 3 ====="); |
319,7 → 319,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 8 ====="); |
334,7 → 334,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 13 ====="); |
349,7 → 349,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 18 ====="); |
364,7 → 364,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 23 ====="); |
379,7 → 379,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 28 ====="); |
410,7 → 410,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 3 ====="); |
425,7 → 425,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (mem200 !== 16'h0002) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 8 ====="); |
458,7 → 458,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 3 ====="); |
473,7 → 473,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 8 ====="); |
488,7 → 488,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 13 ====="); |
503,7 → 503,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 18 ====="); |
518,7 → 518,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 23 ====="); |
550,7 → 550,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 3 ====="); |
565,7 → 565,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 8 ====="); |
580,7 → 580,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 13 ====="); |
595,7 → 595,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 18 ====="); |
610,7 → 610,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 23 ====="); |
625,7 → 625,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0041) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 28 ====="); |
/dbg_cpu.v
150,13 → 150,13
dbg_uart_wr(CPU_CTL, 16'h0008); // RELEASE RESET |
dbg_uart_rd(CPU_STAT); // READ STATUS |
if (dbg_uart_buf !== 16'h000D) tb_error("====== SOFTWARE BREAKPOINT: test 1 ====="); |
if (r0 !== 16'hf812) tb_error("====== SOFTWARE BREAKPOINT: test 2 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h12)) tb_error("====== SOFTWARE BREAKPOINT: test 2 ====="); |
dbg_uart_wr(CPU_STAT, 16'h000C); // CLEAR STATUS |
dbg_uart_rd(CPU_STAT); // READ STATUS |
if (dbg_uart_buf !== 16'h0001) tb_error("====== SOFTWARE BREAKPOINT: test 3 ====="); |
|
// Replace software breakpoint with a mov #2, r15 (opcode=0x432f) |
dbg_uart_wr(MEM_ADDR, 16'hf812); |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h12)); |
dbg_uart_wr(MEM_DATA, 16'h432f); |
dbg_uart_wr(MEM_CTL, 16'h0003); |
|
172,7 → 172,7
|
dbg_uart_rd(CPU_STAT); // READ STATUS |
if (dbg_uart_buf !== 16'h0009) tb_error("====== SOFTWARE BREAKPOINT: test 5 ====="); |
if (r0 !== 16'hf816) tb_error("====== SOFTWARE BREAKPOINT: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h16)) tb_error("====== SOFTWARE BREAKPOINT: test 6 ====="); |
dbg_uart_wr(CPU_STAT, 16'h0008); // CLEAR STATUS |
dbg_uart_rd(CPU_STAT); // READ STATUS |
if (dbg_uart_buf !== 16'h0001) tb_error("====== SOFTWARE BREAKPOINT: test 7 ====="); |
179,7 → 179,7
|
|
// Replace software breakpoint with a mov #4, r15 (opcode=0x422f) |
dbg_uart_wr(MEM_ADDR, 16'hf816); |
dbg_uart_wr(MEM_ADDR, ('h10000-`PMEM_SIZE+'h16)); |
dbg_uart_wr(MEM_DATA, 16'h422f); |
dbg_uart_wr(MEM_CTL, 16'h0003); |
|
/dbg_hwbrk1.v
57,8 → 57,8
dbg_uart_wr(CPU_CTL, 16'h0020); |
|
// CONFIGURE BREAKPOINT (DISABLED) & RUN |
dbg_uart_wr(BRK1_ADDR0, 16'hf804); |
dbg_uart_wr(BRK1_ADDR1, 16'hf818); |
dbg_uart_wr(BRK1_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK1_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK1_CTL, 16'h000C); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
72,14 → 72,14
if (mem200 === 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 1 ====="); |
|
// CONFIGURE BREAKPOINT (ENABLED) & RUN |
dbg_uart_wr(BRK1_ADDR0, 16'hf804); |
dbg_uart_wr(BRK1_ADDR1, 16'hf818); |
dbg_uart_wr(BRK1_ADDR0, ('h10000-`PMEM_SIZE+'h04)); |
dbg_uart_wr(BRK1_ADDR1, ('h10000-`PMEM_SIZE+'h18)); |
dbg_uart_wr(BRK1_CTL, 16'h000D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf804) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h04)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 2 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 3 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 4 ====="); |
95,7 → 95,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 7 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 8 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES: test 9 ====="); |
119,14 → 119,14
dbg_uart_wr(CPU_STAT, 16'h00ff); |
|
// CONFIGURE BREAKPOINT(ENABLED) & RUN |
dbg_uart_wr(BRK1_ADDR0, 16'hf700); |
dbg_uart_wr(BRK1_ADDR1, 16'hf820); |
dbg_uart_wr(BRK1_ADDR0, ('h10000-`PMEM_SIZE-'h100)); |
dbg_uart_wr(BRK1_ADDR1, ('h10000-`PMEM_SIZE+'h20)); |
dbg_uart_wr(BRK1_CTL, 16'h001D); |
dbg_uart_wr(CPU_CTL, 16'h0002); |
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf800) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE: test 3 ====="); |
156,7 → 156,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 3 ====="); |
171,7 → 171,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 6 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ: test 8 ====="); |
186,7 → 186,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 11 ====="); |
if (mem200 !== 16'h0002) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ: test 13 ====="); |
215,7 → 215,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - WRITE: test 3 ====="); |
230,7 → 230,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 8 ====="); |
245,7 → 245,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 13 ====="); |
260,7 → 260,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 18 ====="); |
275,7 → 275,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - WRITE: test 23 ====="); |
304,7 → 304,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf83a) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 3 ====="); |
319,7 → 319,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf844) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h44)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 8 ====="); |
334,7 → 334,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80c) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0c)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 13 ====="); |
349,7 → 349,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf814) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h14)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 18 ====="); |
364,7 → 364,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - SINGLE ADDRESSES - READ/WRITE: test 23 ====="); |
379,7 → 379,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf81C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h1C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - SINGLE ADDRESSES - READ/WRITE: test 28 ====="); |
410,7 → 410,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 1 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ: test 3 ====="); |
425,7 → 425,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf818) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 6 ====="); |
if (mem200 !== 16'h0002) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ: test 8 ====="); |
457,7 → 457,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - WRITE: test 3 ====="); |
472,7 → 472,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 8 ====="); |
487,7 → 487,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 13 ====="); |
502,7 → 502,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 18 ====="); |
517,7 → 517,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - WRITE: test 23 ====="); |
548,7 → 548,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf836) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h36)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 1 ====="); |
if (mem200 !== 16'h0000) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 2 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 3 ====="); |
563,7 → 563,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf83a) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h3a)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 6 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 7 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 8 ====="); |
578,7 → 578,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 11 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 12 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 13 ====="); |
593,7 → 593,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf80C) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h0C)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 16 ====="); |
if (mem200 !== 16'h0000) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 17 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 18 ====="); |
608,7 → 608,7
repeat(100) @(posedge mclk); |
|
// CHECK |
if (r0 !== 16'hf818) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h18)) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 21 ====="); |
if (mem200 !== 16'h0001) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 22 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== DATA FLOW (EXECUTION-UNIT) - ADDRESS RANGE - READ/WRITE: test 23 ====="); |
623,7 → 623,7
repeat(100) @(posedge mclk); |
|
// RE-CHECK |
if (r0 !== 16'hf808) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (r0 !== ('h10000-`PMEM_SIZE+'h08)) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 26 ====="); |
if (mem200 !== 16'h0001) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 27 ====="); |
dbg_uart_rd(CPU_STAT); |
if (dbg_uart_buf !== 16'h0021) tb_error("====== INSTRUCTION FLOW (FRONTEND) - ADDRESS RANGE - READ/WRITE: test 28 ====="); |