URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench
- from Rev 104 to Rev 107
- ↔ Reverse comparison
Rev 104 → Rev 107
/verilog/tb_openMSP430_fpga.v
59,8 → 59,9
wire [9:0] led; |
|
// UART |
reg uart_rx; |
wire uart_tx; |
reg dbg_uart_rxd; |
wire dbg_uart_txd; |
reg [15:0] dbg_uart_buf; |
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// Core debug signals |
wire [8*32-1:0] i_state; |
85,6 → 86,9
// CPU & Memory registers |
`include "registers.v" |
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// Debug interface tasks |
`include "dbg_uart_tasks.v" |
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// Verilog stimulus |
`include "stimulus.v" |
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144,7 → 148,7
error = 0; |
stimulus_done = 1; |
switch = 10'h000; |
uart_rx = 1'b0; |
dbg_uart_rxd = 1'b1; |
end |
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// |
161,13 → 165,13
.sclk_y (sclk_y), // SPI Serial Clock |
.sync_n_x (sync_n_x), // SPI Frame synchronization signal (low active) |
.sync_n_y (sync_n_y), // SPI Frame synchronization signal (low active) |
.uart_tx (uart_tx), // Board UART TX pin |
.uart_tx (dbg_uart_txd), // Board UART TX pin |
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// INPUTs |
.oscclk (oscclk), // Board Oscillator (?? MHz) |
.porst_n (porst_n), // Board Power-On reset (active low) |
.pbrst_n (pbrst_n), // Board Push-Button reset (active low) |
.uart_rx (uart_rx), // Board UART RX pin |
.uart_rx (dbg_uart_rxd), // Board UART RX pin |
.switch (switch) // Board Switches |
); |
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