URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
Compare Revisions
- This comparison shows the changes necessary to convert path
/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim
- from Rev 167 to Rev 202
- ↔ Reverse comparison
Rev 167 → Rev 202
/rtl_sim/src/submit.f
21,9 → 21,9
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
// |
//----------------------------------------------------------------------------- |
// |
// |
// File Name: submit.f |
// |
// |
// Author(s): |
// - Olivier Girard, olgirard@gmail.com |
// |
53,9 → 53,9
//============================================================================= |
+libext+.v |
|
-y /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/unisims/ |
-y /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/simprims/ |
-y /opt/Xilinx/14.2/ISE_DS/ISE/verilog/src/XilinxCoreLib/ |
-y /opt/Xilinx/14.4/ISE_DS/ISE/verilog/src/unisims/ |
-y /opt/Xilinx/14.4/ISE_DS/ISE/verilog/src/simprims/ |
-y /opt/Xilinx/14.4/ISE_DS/ISE/verilog/src/XilinxCoreLib/ |
|
|
//============================================================================= |
99,4 → 99,3
../../../rtl/verilog/openmsp430/omsp_clock_mux.v |
../../../rtl/verilog/openmsp430/periph/omsp_gpio.v |
../../../rtl/verilog/openmsp430/periph/omsp_timerA.v |
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