OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/openmsp430/periph
    from Rev 85 to Rev 104
    Reverse comparison

Rev 85 → Rev 104

/template_periph_8b.v
40,8 → 40,10
// $LastChangedBy$
// $LastChangedDate$
//----------------------------------------------------------------------------
`include "timescale.v"
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_defines.v"
`endif
 
module template_periph_8b (
 
186,4 → 188,7
endmodule // template_periph_8b
 
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif
/omsp_gpio.v
35,8 → 35,10
// $LastChangedBy$
// $LastChangedDate$
//----------------------------------------------------------------------------
`include "timescale.v"
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_defines.v"
`endif
 
module omsp_gpio (
 
825,4 → 827,7
 
endmodule // omsp_gpio
 
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif
/omsp_timerA.v
35,8 → 35,10
// $LastChangedBy$
// $LastChangedDate$
//----------------------------------------------------------------------------
`include "timescale.v"
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_defines.v"
`endif
 
module omsp_timerA (
 
686,4 → 688,7
 
endmodule // omsp_timerA
 
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif
/template_periph_16b.v
40,8 → 40,10
// $LastChangedBy$
// $LastChangedDate$
//----------------------------------------------------------------------------
`include "timescale.v"
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_defines.v"
`endif
 
module template_periph_16b (
 
179,4 → 181,7
 
endmodule // template_periph_16b
 
`ifdef OMSP_NO_INCLUDE
`else
`include "openMSP430_undefines.v"
`endif

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